diff --git a/Balloon Fight (JU)/OVERVIEW.md b/Balloon Fight (JU)/OVERVIEW.md
new file mode 100644
index 0000000..bbe7ebd
--- /dev/null
+++ b/Balloon Fight (JU)/OVERVIEW.md	
@@ -0,0 +1,265 @@
+# Balloon Fight (JU) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Balloon Fight (JU) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
+
+---
+
+## 1. Reset Vector — CPU $FFFC → $C000
+
+**`Reset`** ($C000–$C07E)
+
+On power-on or reset, the 6502 jumps to `$C000`. The reset routine performs cold-start hardware initialization:
+
+| Step | Code | Purpose |
+|------|------|---------|
+| 1 | `lda #$00 / sta PPUCTRL` | Disable NMI and PPU rendering |
+| 2 | `lda #$00 / sta PPUMASK` | Disable screen output |
+| 3–6 | Poll `$2002` twice | Wait for two full VBlank periods (PPU warm-up) |
+| 7 | `sei / cld` | Disable interrupts, clear decimal mode |
+| 8 | `ldx #$FF / txs` | Initialize stack pointer |
+| 9–13 | Clear Zero Page | Zero all of RAM $00–$FF |
+| 14–21 | Warm-start signature check | Compare RAM `$07FA`–`$07FC` against `"HAL"` ($C082–$C084). If valid, skip full memory clear |
+| 22–31 | Initialize memory | Clear zero page + stack page ($0700–$07FF), set `$15 = $32`, run block-init loop (`jsr $D6DE` 50 times), `jsr $C579` |
+| 32–44 | Copy initialization data | Copy 15 bytes from $C085 to $0629 (initial game state table) |
+| 45–51 | Clear local variables | Zero $03–$06 |
+| 52–56 | Copy saved signature | Re-store `"HAL"` to $07FA–$07FC |
+| 57 | `jmp MainInitialization` | Transfer control to $F1D4 |
+
+**Warm-start signature:** `"HAL"` stored at $C082; RAM copy at $07FA. This lets the game resume state after a soft reset without re-initializing everything.
+
+---
+
+## 2. Main Initialization
+
+**`MainInitialization`** is at **$F1D4** (forward-referenced in `locals.inc`). It sets up the first round, initializes object pools, and enters the main loop. Its body lives in the upper bank region (not fully shown in the decoded $C000–$C07E range).
+
+---
+
+## 3. Interrupt Vectors — CPU $FFFA–$FFFF
+
+Located at the end of the bank (PRG offset $3FFA):
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $C094 | `NmiHandler` |
+| RESET | $C000 | `Reset` |
+| IRQ | $C0F7 | `IrqHandler` (self-loop `jmp $C0F7` — unused) |
+
+---
+
+## 4. NMI / Frame Heartbeat — `NmiHandler` ($C094)
+
+The NMI fires once per frame and drives the frame pacing. It:
+
+1. **Preserves registers** (A, X, Y on stack)
+2. **OAM DMA**: writes `$00` to `$2003`, then `$02` to `$4014` (DMA from $0200–$02FF)
+3. **PPU command buffer flush**: compares read/write offsets at $52/$53; if data pending, calls `FlushPpuCommandPreserved` ($C17C)
+4. **Transfer sources**: `jsr UpdatePpuTransferSources` ($D60D)
+5. **Build OAM**: `jsr BuildFrameOam` ($D798)
+6. **Frame counter**: `inc FrameCounter` ($19)
+7. **Scroll/rendering setup**: sets $2006/$2005 scroll registers, conditionally waits for VBlank if rendering disabled, writes $2000
+8. **Audio**: `jsr UpdateAudioFrame` ($FFF7 bank call → `Sound_F758`)
+9. **Sets `NmiCompletedFlag`** ($02 = $01)
+10. **Restores registers, `rti`**
+
+The main game loop runs during VBlank and waits for this flag.
+
+---
+
+## 5. Main Game Loop — $C209
+
+After initialization, control reaches the per-frame loop at **$C209**:
+
+```
+UpdateGameplayObjects      ($E691)   ; update all 20 gameplay-object slots
+UpdateSpecialObjectSystem  ($C6F9)   ; every other frame (frame counter / 2)
+[round spawner / HUD / spawning logic]
+[object physics & collision]
+[particle system]
+[OAM sorting / sprite setup]
+WaitForFrame               ($F465)   ; wait for NMI-completed flag
+jmp back to $C209
+```
+
+Key flow details:
+
+- **Scroll handling** ($C227): if `PpuScrollX` ($17) is non-zero, toggles `PpuControlBase` bit 0 (screen scroll page flip), decrements scroll X.
+- **Carrier/rescue sequence** ($C233): updates carrier position ($0488), target player, sound requests.
+- **Effect object pool** (8 slots, $055D–$0584): updates timers, respawns offscreen.
+- **Gameplay object pool** (20 slots, $0530–$055C): movement, position integration.
+- **Round spawner** ($C790): on frame boundaries, counts down `RoundSpawnDelay`, finds free slots, spawns round objects from tables ($C88F–$C8B5), plays spawn sound.
+- **HUD updates** ($C831): when spawn delay reaches 1, writes round HUD digits to PPU buffer.
+- **Sprite sorting**: `SortOrInitializeRecords` ($C579) maintains a sorted table of up to 50 five-byte records ($0700–$07F9) for OAM priority.
+
+---
+
+## 6. Subsystems
+
+### 6.1 PPU Command Buffer ($C12D–$C1C4)
+
+A buffered PPU update system. Commands are staged at $0300 with format:
+- Byte 0: PPU address high | $20
+- Byte 1: PPU address low
+- Byte 2: length (number of data bytes following)
+
+Routines:
+- `AppendBytesToPpuBuffer` ($C131) — appends raw bytes
+- `AppendLengthPrefixedPpuData` ($C139) — appends with length prefix
+- `BuildPpuCommand` ($C154, formerly `Sub_C154`) — formats address+length command
+- `FlushPpuCommandPreserved` ($C17C, formerly `Sub_C17C`) — drains buffer to $2006/$2007, preserving X/Y
+- Special handling for palette writes ($3Fxx range)
+
+### 6.2 Round Spawning ($C77A–$C88A)
+
+- `ChooseRoundSpawnIndex` ($C77A): picks a random spawn index below `RoundSpawnRandomLimit`, rejecting zero
+- `UpdateRoundSpawner` ($C790): timer-driven spawning; initializes object position, velocity (from tables at $C89F–$C8B1), flip flags, aux state; increments `SpawnSelector`; requests spawn sound ($F0 bit $04)
+- `UpdateRoundHud` / `ConfigureRoundPresentation` ($C831–$C88A): writes round number / HUD tiles to PPU buffer
+
+**Spawn tables** ($C88F–$C8B5): flip X/Y, X/Y offsets, parameter, velocity Y, position hi, velocity X — six entry types.
+
+### 6.3 Gameplay Objects ($C8B7–$C9DC)
+
+`UpdateRoundObjectSpritesAndPhysics` ($C8B7) updates slots 1 and 0:
+- Builds 3-sprite OAM per object from tile tables ($C9DD–$CA33)
+- Integrates fixed-point position ($C9B6)
+- Bounds testing (`TestGameplayObjectAgainstBounds`, $CA67) against rectangular regions
+- Velocity reflection on collision (`BounceGameplayObjectX/Y`, $CA4F/$CA37)
+- Object removal when offscreen
+
+### 6.4 Bonus Objects ($CB74–$CCCA)
+
+- `UpdateBonusObjectSystem` ($CB74): per-frame phase/timer advance for the single active bonus slot
+- `TestBonusObjectPlayerOverlap` ($CBB2): rectangle overlap vs both players; applies horizontal/vertical impulses, collision sound
+- `TestBonusObjectCollection` ($CC3A): phase-3 collection; starts bonus timer
+- `TriggerBonusObjectEffect` ($CCBF): increments effect counter, calls `ApplyBonusEffect` ($E983)
+- `DrawBonusObjectHud` ($CCCB): 3-row HUD tile display from phase tables ($CD26–$D046)
+
+### 6.5 Carrier / Rescue Sequence ($C5C3–$C715)
+
+- `UpdateCarrierSequence` ($C6F9): advances carrier target X while idle; finds eligible player; starts sequence
+- `FindEligiblePlayerForCarrier` ($C614): scans player slots 7→0, finds one at lower screen boundary ($B4+) matching carrier target X
+- `BeginCarrierTargetSequence` ($C6C4): captures player position/state, resets timer
+- `UpdateCarrierArrivalSequence` ($C658): moves carrier down, checks contact, transitions player to hit/rescue state, sound request
+- `UpdateCarrierObjectDisplay` ($C5C3): builds 8-sprite carrier metasprite, updates target player position relative to carrier
+- Tables: `NormalDisplayModeTable` ($C5B7), `AlternateDisplayModeTable` ($C5BB), `CarrierAnimationSequenceTable` ($C6B8)
+
+### 6.6 Particle System ($CD4A–$CEAD)
+
+- `InitializeParticleSlots` ($CD4A): 10 slots, offscreen Y ($F0)
+- `SpawnTimedParticle` ($CD5A): random timer, finds free slot, assigns position/velocity from `ParticleInitialVelocityTable` ($CEAE)
+- `UpdateParticleSystem` ($CDAA): integrates signed motion, applies scroll delta, retires offscreen particles
+- `DrawParticleSprites` ($CE2F): 3-sprite OAM per particle with animation/attribute masking
+
+### 6.7 Sound Driver ($FFF7 region, bank-switched)
+
+- `UpdateAudioFrame` jumps to `Sound_F758` in another bank
+- Sound sequence pointer table at $3BCA (32 entries)
+- Encoded sequence data $3BCA–$3FF1 (note/duration bytes with $02/$FF/$8x control codes)
+- APU channel init at $F7xx region (`InitializeApuChannelState`, `SilencePulseChannels`)
+- Sound request flags: $F0 (flags 0), $F1 (flags 1), $F2 (flags 2), $F3 (flags 3)
+
+---
+
+## 7. Memory Map (Key Zero Page / RAM)
+
+| Address | Name | Use |
+|---------|------|-----|
+| $00 | `PpuControlShadow` | $2000 mirror |
+| $01 | `PpuMaskShadow` | $2001 mirror |
+| $02 | `NmiCompletedFlag` | VBlank sync flag |
+| $12–$13 | `RecordIndex` / `ReverseRecordIndex` | Sorted-record insertion |
+| $14–$15 | `SpawnParameter` / `SpawnPixelPosition` | Spawn args |
+| $16 | `RenderingDisabledFlag` | Rendering state |
+| $17 | `PpuScrollX` | Scroll X |
+| $18 | `PpuControlBase` | Base PPU control |
+| $19 | `FrameCounter` | Frame tick |
+| $1B | `RandomState` | PRNG state |
+| $1D–$1E | `RecordPtrLo/Hi` | Record table pointer |
+| $23–$24 | `SpawnCommandPointerLo/Hi` | Command stream pointer |
+| $25–$26 | `DispatchPointerLo/Hi` | Spawn dispatch indirect jump |
+| $52–$53 | Ppu buffer read/write offsets | Command buffer |
+| $54–$56 | Ppu command address/length | Pending PPU command |
+| $7F | `PlayerLifecycleState` | Per-player lifecycle |
+| $88 | `PlayerSlotState` | Per-player active state |
+| $91 | `PlayerPosX` / `Player0PosX` | Player X |
+| $99 | `CarrierTargetX` | Carrier target |
+| $9A | `PlayerPosY` / `Player0PosY` | Player Y |
+| $A2 | `CarrierPosY` | Carrier Y |
+| $BD | `PlayerCollisionDisable` | Collision immunity |
+| $F0–$F3 | Sound request flags 0–3 | Audio requests |
+| $0300–$03FF | PPU command buffer | Staged PPU updates |
+| $0489–$048D | Carrier sequence state | Active, mode, target, drop, timer |
+| $0490–$0530 | Gameplay object pool (20 slots) | State, pos, velocity |
+| $055D–$0584 | Effect object pool (8 slots) | State, pos |
+| $0558–$05CE | Particle / sequence state | 10-slot particle pool |
+| $05D1–$060E | Bonus object state | Timer, phase, pos, HUD |
+| $0700–$07F9 | Sorted record table | 50 × 5-byte OAM sort records |
+| $07FA–$07FC | Warm-start signature | "HAL" |
+
+---
+
+## 8. Object Pools
+
+| Pool | Slots | State array | Purpose |
+|------|-------|-------------|---------|
+| Gameplay objects | 20 ($00–$13) | $0530 | Round enemies/objects, movement & physics |
+| Effect objects | 8 ($00–$07) | $055D | Short-lived spawn effects |
+| Particles | 10 ($00–$09) | $055D | Visual particles (shared state array, different offset interpretation) |
+
+Slot state convention: **negative ($FF) = inactive/free**, zero or positive = active.
+
+---
+
+## 9. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C000) ────► hardware init, clear RAM, validate "HAL" signature
+    │
+    ▼
+jmp MainInitialization ($F1D4)
+    │
+    ▼
+[first-round setup, object pool init]
+    │
+    ▼
+Main Loop ($C209) ──────────────────────────────────────────────┐
+    │                                                           │
+    ├─ UpdateGameplayObjects ($E691)                            │
+    ├─ UpdateSpecialObjectSystem ($C6F9) [alt frames]           │
+    ├─ Carrier sequence ($C6F9 family)                          │
+    ├─ Round spawner ($C790) + HUD ($C831)                      │
+    ├─ Object physics & collision ($C8B7, $CA67)                │
+    ├─ Bonus object system ($CB74)                              │
+    ├─ Particle system ($CDAA)                                  │
+    ├─ OAM sort ($C579)                                         │
+    ├─ WaitForFrame ($F465)  ◄──────── waits for NMI flag ──────┘
+    │
+    ▼ (loop back to $C209)
+
+NMI ($C094) [once per frame]
+    ├─ OAM DMA ($4014)
+    ├─ Flush PPU command buffer ($C17C)
+    ├─ Update transfer sources ($D60D)
+    ├─ Build frame OAM ($D798)
+    ├─ Frame counter++, scroll setup
+    ├─ UpdateAudioFrame ($FFF7 → Sound_F758)
+    └─ Set NmiCompletedFlag, rti
+```
+
+---
+
+## 10. Notes on Provisional Areas
+
+Some routines in the disassembly still carry placeholder names (`Label_Cxxxx`, `Sound_FBxx`) and some data blocks were previously marked "undecoded." These have been cleaned up in this review:
+
+- `Sub_C154` → **`BuildPpuCommand`**
+- `Sub_C17C` → **`FlushPpuCommandPreserved`**
+- `Sub_C40C` → **`SpawnRandomObject`**
+- `SpawnCommandStreamData_C4AD` → **`RoundSpawnCommandStream`** (format documented)
+
+The 497 `Label_` branch targets are local intra-routine labels; none are subroutine entry points (confirmed against all `jsr`/`jmp` targets in the source). The 77 `Sound_FBxx` labels are sound-driver entry points in the banked audio region.
+
+Build verification: `make` in `copilot/` produces `reconstructed_prg.bin` that is **byte-identical** to `prg.bin` and to the PRG bank of `balloon.nes`.
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/Makefile b/Balloon Fight (JU)/copilot/Makefile
index 3f9ba6f..7b0587a 100644
--- a/Balloon Fight (JU)/copilot/Makefile	
+++ b/Balloon Fight (JU)/copilot/Makefile	
@@ -1,10 +1,25 @@
-all: reconstructed_prg.bin verify
-prg.o: prg.s symbols.inc prg.bin
-	ca65 -g -o $@ prg.s
-reconstructed_prg.bin: prg.o linker.cfg
-	ld65 -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ prg.o
-verify: reconstructed_prg.bin prg.bin
-	cmp reconstructed_prg.bin prg.bin
-	@echo BYTE-IDENTICAL
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f prg.o reconstructed_prg.bin reconstructed.map reconstructed.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/chr.s b/Balloon Fight (JU)/copilot/chr.s
new file mode 100644
index 0000000..f6a8c21
--- /dev/null
+++ b/Balloon Fight (JU)/copilot/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/header.s b/Balloon Fight (JU)/copilot/header.s
new file mode 100644
index 0000000..37d1389
--- /dev/null
+++ b/Balloon Fight (JU)/copilot/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/linker.cfg b/Balloon Fight (JU)/copilot/linker.cfg
index d9d421d..cfaf881 100644
--- a/Balloon Fight (JU)/copilot/linker.cfg	
+++ b/Balloon Fight (JU)/copilot/linker.cfg	
@@ -1,6 +1,10 @@
 MEMORY {
-  PRG: start = $C000, size = $4000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
-  PRG: load = PRG, type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/locals.inc b/Balloon Fight (JU)/copilot/locals.inc
index f4c6416..8b641d5 100644
--- a/Balloon Fight (JU)/copilot/locals.inc	
+++ b/Balloon Fight (JU)/copilot/locals.inc	
@@ -1,230 +1,229 @@
-; Balloon Fight application-specific RAM and forward references.
-
-; Spawn-dispatch state
-DispatchPointerLo             = $25
-DispatchPointerHi             = $26
-SpawnCommandPointerLo         = $23
-SpawnCommandPointerHi         = $24
-SpawnParameter                = $14
-SpawnPixelPosition            = $15
-
-; Eight-entry effect-object pool ($00-$07)
-EffectObjectState             = $055D
-EffectObjectPosX              = $0567
-EffectObjectPosY              = $057B
-
-; Twenty-entry gameplay-object pool ($00-$13)
-GameplayObjectPosX            = $0490
-GameplayObjectPosY            = $04A4
-GameplayObjectVelocityY       = $04E0
-GameplayObjectVelocityX       = $04F4
-GameplayObjectParameter       = $0508
-GameplayObjectPosXHi          = $051C
-GameplayObjectState           = $0530
-
-; NMI/PPU state
 PpuControlShadow             = $00
 PpuMaskShadow                = $01
 NmiCompletedFlag             = $02
+CurrentRecord                = $0003
+
+Temp12                       = $12
+RecordIndex                  = $12
+CurrentRoundObjectTile       = $12
+CollisionDeltaX              = $12
+MotionDeltaLo                = $12
+
+ReverseRecordIndex           = $13
+CollisionDeltaY              = $13
+MotionDeltaHi                = $13
+
+SpawnParameter               = $14
+SpawnPixelPosition           = $15
+
 RenderingDisabledFlag        = $16
 PpuScrollX                   = $17
 PpuControlBase               = $18
 FrameCounter                 = $19
+
+RandomState                  = $1B
+
+RecordPtrLo                  = $1D
+RecordPtrHi                  = $1E
+DestinationPtrLo             = $1F
+DestinationPtrHi             = $20
+
 PpuSourcePtrLo               = $21
 PpuSourcePtrHi               = $22
+
+SpawnCommandPointerLo        = $23
+BoundsLeftPtrLo              = $23
+
+SpawnCommandPointerHi        = $24
+BoundsLeftPtrHi              = $24
+
+DispatchPointerLo            = $25
+BoundsRightPtrLo             = $25
+
+DispatchPointerHi            = $26
+BoundsRightPtrHi             = $26
+
+BoundsTopPtrLo               = $27
+BoundsTopPtrHi               = $28
+BoundsBottomPtrLo            = $29
+BoundsBottomPtrHi            = $2A
+
+RoundIndex                   = $3C
+
+CurrentObjectIndex           = $3E
+SequencePlayerIndex          = $3E
+
+PlayerCountMinusOne          = $40
+PlayerActiveFlags            = $41
+
+SelectedRecordIndex          = $43
+
+SequenceStep                 = $46
+SequenceValueLo              = $47
+SequenceValueHi              = $48
+
+SelectedRecordIndexCopy      = $49
+ScaledRecordValue            = $4A
+
 PpuDestinationHi             = $50
 PpuBufferReadOffset          = $52
 PpuBufferWriteOffset         = $53
 PpuCommandAddressHi          = $54
 PpuCommandAddressLo          = $55
 PpuCommandLength             = $56
-Temp12                       = $12
 
-; Temporary forward references outside the decoded block
-MainInitialization           = $F1D4
-UpdatePpuTransferSources     = $D60D
-BuildFrameOam                = $D798
-WaitForFrame                 = $F465
-InitializeOrQueueObject      = $D6DE
-SortOrInitializeRecords     = $C579
-InitializeAudio              = $F4A5
-UpdateGameplayObjects        = $E691
-UpdateSpecialObjectSystem    = $C6F9
-ReflectObjectYVelocity       = $CA4F
-GetRandomValue               = $F1B3
+RoundHudCommandAddressHi     = $57
+HudCommandAddressHi          = $57
+PpuCommandData0              = $57
 
-; Sorted five-byte record table helpers
-RecordIndex                  = $12
-ReverseRecordIndex           = $13
-RecordPtrLo                  = $1D
-RecordPtrHi                  = $1E
-DestinationPtrLo             = $1F
-DestinationPtrHi             = $20
-SelectedRecordIndex          = $43
-SelectedRecordIndexCopy      = $49
-ScaledRecordValue            = $4A
-RoundSeedValue               = $0559
-SortedRecordTable            = $0700
-CurrentRecord                = $0003
+RoundHudCommandAddressLo     = $58
+HudCommandAddressLo          = $58
+PpuCommandData1              = $58
 
-; Temporary forward references used by the decoded record helpers
-UpdateRoundSeedSource        = $D0E2
-DivideOrScaleRecordValue     = $D77C
+RoundHudCommandLength        = $59
+HudCommandLength             = $59
+PpuCommandData2              = $59
+
+RoundHudTile                 = $5A
+HudCommandTile0              = $5A
+
+HudCommandTile1              = $5B
+HudCommandTile2              = $5C
+
+PpuBufferHead                = $5D
+
+SequencePointerLo            = $68
+SequencePointerHi            = $69
 
-; Carrier/rescue sequence state
 PlayerLifecycleState         = $7F
+
 CarrierDisplayMode           = $87
 PlayerSlotState              = $88
 CarrierPhase                 = $89
+
 PlayerPosX                   = $91
 Player0PosX                  = $92
+
 CarrierTargetX               = $99
 PlayerPosY                   = $9A
 Player0PosY                  = $9B
+
 CarrierPosY                  = $A2
+RoundSpawnRandomLimit        = $A3
+SelectedSpawnIndex           = $A4
+SelectedSpawnIndexCopy       = $A5
+
+RoundSpawnBaseX              = $B2
+RoundSpawnBaseY              = $B5
+RoundSpawnDelay              = $B8
+SpawnSelector                = $BA
+
+PlayerCollisionDisable       = $BD
+SequenceState                = $BE
+
+BonusEffectCounter           = $CB
+GameplayObjectCollisionFlags = $CC
+BoundsCandidateIndex         = $CD
+
+SoundRequestFlags0           = $F0
+SoundRequestFlags1           = $F1
 SoundRequestFlags2           = $F2
+SoundRequestFlags3           = $F3
+
+OamBuffer                    = $0200
+ParticleOamBase              = $0250
+OamEntryE0Y                  = $02E0
+OamEntryE4Y                  = $02E4
+OamEntryE8Y                  = $02E8
+
+PlayerHorizontalImpulse      = $041B
+PlayerVerticalImpulse        = $042D
+
+PlayerVariantTable           = $0448
+CarrierSavedValue            = $0450
+PlayerAnimationState         = $0451
+PlayerStateTimer             = $045A
 
 CarrierSequenceActive        = $0489
 CarrierMode                  = $048A
 CarrierTargetPlayer          = $048B
 CarrierDropPending           = $048C
 CarrierSequenceTimer         = $048D
-CarrierSavedValue            = $0450
-PlayerVariantTable           = $0448
-PlayerAnimationState         = $0451
-
-; Forward references used by the carrier display/update code
-BuildObjectMetasprite        = $E3A4
-
-; Round initialization state
-RoundIndex                   = $3C
-CurrentObjectIndex           = $3E
-RoundSpawnDelay              = $B8
-SpawnSelector                = $BA
-SoundRequestFlags3           = $F3
-GameplayObjectAuxState       = $0544
-OamEntryE0Y                  = $02E0
-OamEntryE4Y                  = $02E4
-OamEntryE8Y                  = $02E8
-
-; Forward references used by round initialization
-SpawnRoundObjects             = $C77A
-
-; Round spawner and HUD state
-RoundSpawnRandomLimit        = $A3
-SelectedSpawnIndex           = $A4
-SelectedSpawnIndexCopy       = $A5
-RoundHudTile                 = $5A
-
-; Three-byte HUD command staged at $57-$59 before buffer append
-RoundHudCommandAddressHi      = $57
-RoundHudCommandAddressLo      = $58
-RoundHudCommandLength         = $59
-SoundRequestFlags0           = $F0
-SoundRequestFlags1           = $F1
 
+GameplayObjectPosX           = $0490
+GameplayObjectPosY           = $04A4
 GameplayObjectVelocityFracY  = $04B8
 GameplayObjectVelocityIntY   = $04CC
+GameplayObjectVelocityY      = $04E0
+GameplayObjectVelocityX      = $04F4
 
-; Temporary forward references for round spawn parameter tables
+GameplayObjectParameter      = $0508
+GameplayObjectPosXHi         = $051C
+GameplayObjectState          = $0530
+GameplayObjectAuxState       = $0544
 
-; Round-object renderer state
-CurrentRoundObjectTile       = $12
-RoundSpawnBaseX              = $B2
-RoundSpawnBaseY              = $B5
-OamBuffer                    = $0200
+ParticleSequenceIndex        = $0558
+RoundSeedValue               = $0559
+ParticleSequenceValue        = $0559
+ParticleScrollDelta          = $055A
+SequenceDataLo               = $055B
+SequenceDataHi               = $055C
 
-; Forward tables and routines used by the round-object renderer
+EffectObjectState            = $055D
+ParticleState                = $055D
 
-; Table-driven gameplay-object boundary tests
-BoundsLeftPtrLo              = $23
-BoundsLeftPtrHi              = $24
-BoundsRightPtrLo             = $25
-BoundsRightPtrHi             = $26
-BoundsTopPtrLo               = $27
-BoundsTopPtrHi               = $28
-BoundsBottomPtrLo            = $29
-BoundsBottomPtrHi            = $2A
-GameplayObjectCollisionFlags = $CC
-BoundsCandidateIndex         = $CD
+EffectObjectPosX             = $0567
+ParticlePosX                 = $0567
 
-; Forward routine at the next decoded boundary
+ParticlePosXFrac             = $0571
 
-; Gameplay-object/player interaction state
-CollisionDeltaX              = $12
-CollisionDeltaY              = $13
-PlayerCollisionDisable       = $BD
-PlayerStateTimer             = $045A
-PlayerHorizontalImpulse      = $041B
-PlayerVerticalImpulse        = $042D
+EffectObjectPosY             = $057B
+ParticlePosY                 = $057B
+
+ParticlePosYFrac             = $0585
+ParticleVelocityXHi          = $058F
+ParticleVelocityXLo          = $0599
+
+ParticleVelocityYLo          = $05B7
+ParticleVelocityYHi          = $05C1
+
+ParticleSpawnRemaining       = $05CB
+ParticleSpawnCountdown       = $05CC
+PlayerParticleHitCount       = $05CD
+PlayerParticleHitCount2      = $05CE
 
-; Bonus-object subsystem
-BonusEffectCounter           = $CB
 ActiveBonusObjectIndex       = $05D1
 BonusObjectPosX              = $05D2
 BonusObjectPosY              = $05DC
 BonusHudAddressLo            = $05E6
 BonusHudAddressHi            = $05F0
 BonusObjectPhase             = $05FA
+
 BonusObjectTimer             = $0604
 BonusObjectPhaseTimer        = $060E
 
-; Bonus HUD command staged at $57-$5C
-HudCommandAddressHi          = $57
-HudCommandAddressLo          = $58
-HudCommandLength             = $59
-HudCommandTile0              = $5A
-HudCommandTile1              = $5B
-HudCommandTile2              = $5C
+SortedRecordTable            = $0700
 
-; Forward references used by interaction and bonus-object code
 AbsoluteDifference           = $F08E
+UpdateSignedMotionAccumulator = $F1A6
+GetRandomValue               = $F1B3
+MainInitialization           = $F1D4
+WaitForFrame                 = $F465
+InitializeAudio              = $F4A5
+
+SortOrInitializeRecords      = $C579
+SpawnRoundObjects            = $C77A
+UpdateRoundSeedSource        = $D0E2
+UpdatePpuTransferSources     = $D60D
+InitializeOrQueueObject      = $D6DE
+BuildFrameOam                = $D798
+DivideOrScaleRecordValue     = $D77C
+
+BuildObjectMetasprite        = $E3A4
+UpdateGameplayObjects        = $E691
 ApplyBonusEffect             = $E983
 AdjustPlayerHorizontalState  = $EBB2
 AdjustPlayerVerticalState    = $EBBB
 
-; Ten-slot particle/effect subsystem
-RandomState                  = $1B
-MotionDeltaLo                = $12
-MotionDeltaHi                = $13
-ParticleScrollDelta          = $055A
-ParticleState                = $055D
-ParticlePosX                 = $0567
-ParticlePosXFrac             = $0571
-ParticlePosY                 = $057B
-ParticlePosYFrac             = $0585
-ParticleVelocityXHi          = $058F
-ParticleVelocityXLo          = $0599
-ParticleVelocityYLo          = $05B7
-ParticleVelocityYHi          = $05C1
-ParticleSpawnRemaining       = $05CB
-ParticleSpawnCountdown       = $05CC
-ParticleOamBase              = $0250
-
-; Forward references used by the particle subsystem
-UpdateSignedMotionAccumulator = $F1A6
-
-; Particle result/sequence state
-ParticleSequenceIndex        = $0558
-ParticleSequenceValue        = $0559
-SequenceDataLo               = $055B
-SequenceDataHi               = $055C
-PlayerParticleHitCount       = $05CD
-PlayerParticleHitCount2      = $05CE
-SequencePlayerIndex          = $3E
-SequenceStep                 = $46
-SequenceValueLo              = $47
-SequenceValueHi              = $48
-SequencePointerLo            = $68
-SequencePointerHi            = $69
-SequenceState                = $BE
-
-; Forward parameter tables for the next sequence-data block
-
-; Shared player-count and PPU staging aliases used by the particle sequence
-PlayerCountMinusOne          = $40
-PlayerActiveFlags            = $41
-PpuCommandData0              = $57
-PpuCommandData1              = $58
-PpuCommandData2              = $59
-PpuBufferHead                = $5D
+ReflectObjectYVelocity       = $CA4F
+UpdateSpecialObjectSystem    = $C6F9
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/prg.s b/Balloon Fight (JU)/copilot/prg.s
index 2c8c2de..56356f9 100644
--- a/Balloon Fight (JU)/copilot/prg.s	
+++ b/Balloon Fight (JU)/copilot/prg.s	
@@ -154,7 +154,7 @@ NmiHandler:
     lda PpuBufferReadOffset       ; $00A3: A5 52
     cmp PpuBufferWriteOffset      ; $00A5: C5 53
     beq Label_C0AC                ; $00A7: F0 03
-    jsr Sub_C17C                  ; $00A9: 20 7C C1
+    jsr FlushPpuCommandPreserved    ; $00A9: 20 7C C1
 Label_C0AC:
     jsr UpdatePpuTransferSources  ; $00AC: 20 0D D6
     jsr BuildFrameOam             ; $00AF: 20 98 D7
@@ -340,7 +340,7 @@ SetPpuMask:
 ;===============================================================================
 
 WaitForFrameAndSetPpuMask:
-    jsr Sub_C154                  ; $0119: 20 54 C1
+    jsr BuildPpuCommand           ; $0119: 20 54 C1
     ldy #$00                      ; $011C: A0 00
 Label_C11E:
     lda $0057,y                   ; $011E: B9 57 00
@@ -439,26 +439,27 @@ Label_C144:
     tax                           ; $0152: AA
     rts                           ; $0153: 60
 ;===============================================================================
-; Sub_C154
+; BuildPpuCommand
 ;
 ; Global:
-;   Reachable game-engine routine identified during recursive Pass-1 tracing.
+;   Builds a PPU command-buffer entry from the pending command address/length.
 ;
 ; Local:
-;   Performs the control flow beginning at CPU $C154; detailed semantics are
-;   refined as its RAM and table dependencies are traced.
+;   Formats the PPU command (address high byte with $20 prefix, address low
+;   byte, length) and writes it into the command buffer at $0300.
 ;
 ; Parameters:
-;   Caller-defined register and global RAM state.
+;   PpuCommandAddressLo/Hi ($55/$54), PpuCommandLength ($56),
+;   PpuBufferWriteOffset ($53).
 ;
 ; Returns:
-;   Routine-specific result; register preservation remains provisional.
+;   PpuBufferWriteOffset advanced; command bytes appended to $0300 buffer.
 ;
 ; PRG offset: $0154
 ; CPU address: $C154
 ;===============================================================================
 
-Sub_C154:
+BuildPpuCommand:
     ldx PpuBufferWriteOffset      ; $0154: A6 53
     lda #$00                      ; $0156: A9 00
     sta Temp12                    ; $0158: 85 12
@@ -505,26 +506,26 @@ AppendPpuAddressAndLength:
     inx                           ; $017A: E8
     rts                           ; $017B: 60
 ;===============================================================================
-; Sub_C17C
+; FlushPpuCommandPreserved
 ;
 ; Global:
-;   Reachable game-engine routine identified during recursive Pass-1 tracing.
+;   Flushes the PPU command buffer while preserving the X and Y registers.
 ;
 ; Local:
-;   Performs the control flow beginning at CPU $C17C; detailed semantics are
-;   refined as its RAM and table dependencies are traced.
+;   Saves X/Y, calls PreserveXYAndFinalizePpuCommand to walk the $0300 command
+;   buffer and write pending PPU updates, then restores X/Y.
 ;
 ; Parameters:
-;   Caller-defined register and global RAM state.
+;   PpuBufferReadOffset/WriteOffset ($52/$53).
 ;
 ; Returns:
-;   Routine-specific result; register preservation remains provisional.
+;   X and Y preserved; PPU command buffer drained.
 ;
 ; PRG offset: $017C
 ; CPU address: $C17C
 ;===============================================================================
 
-Sub_C17C:
+FlushPpuCommandPreserved:
     tya                           ; $017C: 98
     pha                           ; $017D: 48
     txa                           ; $017E: 8A
@@ -978,35 +979,38 @@ SpawnAtRandomPosition:
     jsr GetRandomValue            ; $03F7: 20 B3 F1
     and #$7F                      ; $03FA: 29 7F
     cmp #$04                      ; $03FC: C9 04
-    bcc Sub_C40C                  ; $03FE: 90 0C
+    bcc SpawnRandomObject                  ; $03FE: 90 0C
     cmp #$18                      ; $0400: C9 18
-    bcs Sub_C40C                  ; $0402: B0 08
+    bcs SpawnRandomObject                  ; $0402: B0 08
     asl a                         ; $0404: 0A
     asl a                         ; $0405: 0A
     asl a                         ; $0406: 0A
     sta SpawnPixelPosition        ; $0407: 85 15
     jsr AllocateEffectObject      ; $0409: 20 6B C4
 ;===============================================================================
-; Sub_C40C
+; SpawnRandomObject
 ;
 ; Global:
-;   Reachable game-engine routine identified during recursive Pass-1 tracing.
+;   Spawns a gameplay object at a randomized screen position.
 ;
 ; Local:
-;   Performs the control flow beginning at CPU $C40C; detailed semantics are
-;   refined as its RAM and table dependencies are traced.
+;   Picks a random Y position in the valid band, snaps it to a 32-pixel grid,
+;   derives a spawn parameter from random state and the spawn selector table,
+;   allocates a gameplay-object slot, then retries (optionally reflecting Y
+;   velocity) until the object is placed or the slot pool is exhausted.
 ;
 ; Parameters:
-;   Caller-defined register and global RAM state.
+;   RandomState ($1B), SpawnSelector ($BA), SpawnSelectorAdjustmentTable.
 ;
 ; Returns:
-;   Routine-specific result; register preservation remains provisional.
+;   A gameplay object allocated and initialized; X = slot ($00-$13) or $FF if
+;   the pool is full.
 ;
 ; PRG offset: $040C
 ; CPU address: $C40C
 ;===============================================================================
 
-Sub_C40C:
+SpawnRandomObject:
     jsr GetRandomValue            ; $040C: 20 B3 F1
     and #$3F                      ; $040F: 29 3F
     cmp #$02                      ; $0411: C9 02
@@ -1025,9 +1029,9 @@ Sub_C40C:
     jsr $C486                     ; $042A: 20 86 C4
     jsr GetRandomValue            ; $042D: 20 B3 F1
     lsr a                         ; $0430: 4A
-    bcc Sub_C40C                  ; $0431: 90 D9
+    bcc SpawnRandomObject                  ; $0431: 90 D9
     jsr ReflectObjectYVelocity    ; $0433: 20 4F CA
-    jmp Sub_C40C                  ; $0436: 4C 0C C4
+    jmp SpawnRandomObject           ; $0436: 4C 0C C4
 Label_C439:
     rts                           ; $0439: 60
 SpawnSelectorAdjustmentTable:
@@ -1112,7 +1116,7 @@ SpawnPatternNoneAlt:
 ;===============================================================================
 
 InitializeSpecialObject:
-    jsr Sub_C40C                  ; $045F: 20 0C C4
+    jsr SpawnRandomObject           ; $045F: 20 0C C4
     jsr GetRandomValue            ; $0462: 20 B3 F1
     and #$7F                      ; $0465: 29 7F
     sta $0508,x                   ; $0467: 9D 08 05
@@ -1210,17 +1214,19 @@ AllocateGameplayObject:
     sta GameplayObjectPosY,x    ; $04A9: 9D A4 04
     rts                         ; $04AC: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
-; SpawnCommandStreamData_C4AD
+; Round spawn command stream
 ;
-; Structured spawn/object command data preceding the sorted-record helpers.
-; The exact record boundaries and gameplay meanings remain provisional.
+; Command data consumed by SpawnFromCommandStream ($C3C9) to initialize
+; round objects. Each command byte: top 3 bits give the spawn Y position,
+; bits 7-6 select object type (%10 = effect object via AllocateEffectObject,
+; %00 = gameplay object via AllocateGameplayObject), and any other value
+; terminates the stream.
 ;
 ; PRG offsets: $04AD-$0526
 ; CPU range:   $C4AD-$C526
 ;===============================================================================
-SpawnCommandStreamData_C4AD:
+
+RoundSpawnCommandStream:
     .byte $00, $00, $09, $00, $08, $8C, $00, $07; $04AD: 00 00 09 00 08 8C 00 07
     .byte $18, $00, $18, $00, $19, $00, $1A, $00; $04B5: 18 00 18 00 19 00 1A 00
     .byte $84, $94, $1A, $00, $1A, $00, $1A, $00; $04BD: 84 94 1A 00 1A 00 1A 00
@@ -1384,8 +1390,6 @@ Label_C5AE:
     bpl Label_C5AE                    ; $05B4: 10 F8
     rts                               ; $05B6: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Carrier display-selection tables
 ;===============================================================================
 NormalDisplayModeTable:
@@ -1604,8 +1608,6 @@ Label_C6B3:
 Label_C6B7:
     rts                                 ; $06B7: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Carrier animation remap table
 ; Maps player animation states to the carrier-sequence animation states.
 ;===============================================================================
@@ -1759,8 +1761,6 @@ Label_C72E:
     lda #$03                            ; $0743: A9 03
     jmp ConfigureRoundPresentation      ; $0745: 4C 56 C8
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Round spawn lookup tables
 ;===============================================================================
 RoundObjectCountTable:
@@ -2010,8 +2010,6 @@ AppendRoundHudValue:
 Label_C88A:
     rts                                   ; $088A: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Round spawner and sprite lookup tables
 ;===============================================================================
 RoundHudTileTable:
@@ -2215,8 +2213,6 @@ IntegrateGameplayObjectPosition:
     sta GameplayObjectPosY,x                ; $09D9: 9D A4 04
     rts                                     ; $09DC: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Round-object sprite tables
 ;===============================================================================
 RoundObjectTileTable:
@@ -2426,8 +2422,7 @@ Label_CB0C:
 Label_CB18:
     jmp Label_CAE1                           ; $0B18: 4C E1 CA
 
-; Preserve the remaining undecoded PRG bytes.
-; $0B1B is the RTS terminating TestGameplayObjectAgainstBounds.
+; $0B1B: RTS terminating TestGameplayObjectAgainstBounds.
     rts                                      ; $0B1B: 60
 
 ;===============================================================================
@@ -2867,8 +2862,6 @@ AdvanceHudCommandAddress:
 Label_CD25:
     rts                                      ; $0D25: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Bonus-object HUD tile triplets
 ;
 ; Each four-byte table is indexed by BonusObjectPhase ($00-$03). The three
@@ -2900,7 +2893,6 @@ BonusHudRow2Tile1Table:
 BonusHudRow2Tile2Table:
     .byte $A7, $24, $24, $24             ; $0D46: A7 24 24 24
 
-; Preserve the remaining undecoded PRG bytes.
 ;===============================================================================
 ; InitializeParticleSlots
 ;
@@ -3152,8 +3144,6 @@ Label_CE99:
     sta $0259,y                              ; $0EAA: 99 59 02
     rts                                      ; $0EAD: 60
 
-; Preserve the remaining undecoded PRG bytes.
-;===============================================================================
 ; Particle rendering tables
 ;===============================================================================
 ParticleInitialVelocityTable:
@@ -3502,7 +3492,6 @@ Label_D104:
     sta PlayerParticleHitCount2               ; $1109: 8D CE 05
     rts                                       ; $110C: 60
 
-; Preserve the remaining undecoded PRG bytes.
 ; Sequence parameter tables
 ParticleSequenceIndexTable:
     .byte $03, $05, $07, $07, $07 ; $110D: 03 05 07 07 07
@@ -4172,7 +4161,6 @@ GetNametableAddressForIndex:
     sta $51                                   ; $1659: 85 51
     rts                                       ; $165B: 60
 
-; Preserve the remaining undecoded PRG bytes.
 NametableAddressPairTable:
     .byte $63, $21, $A5, $21, $CB, $20, $B7, $20 ; $165C: 63 21 A5 21 CB 20 B7 20
     .byte $7D, $21, $9B, $22, $F2, $20, $49, $22 ; $1664: 7D 21 9B 22 F2 20 49 22
diff --git a/Balloon Fight (JU)/copilot/reconstructed_prg.bin b/Balloon Fight (JU)/copilot/reconstructed_prg.bin
new file mode 100644
index 0000000..07026b9
Binary files /dev/null and b/Balloon Fight (JU)/copilot/reconstructed_prg.bin differ
diff --git a/Balloon Fight (JU)/copilot/rom.nes b/Balloon Fight (JU)/copilot/rom.nes
new file mode 120000
index 0000000..5aa2b74
--- /dev/null
+++ b/Balloon Fight (JU)/copilot/rom.nes	
@@ -0,0 +1 @@
+../balloon.nes
\ No newline at end of file
diff --git a/Balloon Fight (JU)/copilot/symbols.inc b/Balloon Fight (JU)/copilot/symbols.inc
new file mode 100644
index 0000000..245e111
--- /dev/null
+++ b/Balloon Fight (JU)/copilot/symbols.inc	
@@ -0,0 +1,52 @@
+; PPU registers 
+PPUCTRL = $2000
+PPUMASK = $2001
+PPUSTATUS = $2002
+OAMADDR = $2003
+OAMDATA = $2004
+PPUSCROLL = $2005
+PPUADDR = $2006
+PPUDATA = $2007
+OAMDMA = $4014
+JOY1 = $4016
+JOY2 = $4017
+
+APUPC1BASE = $4000
+APUPC1SWEEP = $4001
+APUPC1TLOW = $4002
+APUPC1THIGH = $4003
+
+APUPC2BASE = $4004
+APUPC2SWEEP = $4005
+APUPC2LOW = $4006
+APUPC2HIGH = $4007
+
+APUTRIBASE = $4008
+APUTRILOW = $400A
+APUTRIHIGH = $400B
+
+APUNOISEBASE = $400C
+APUNOISELOOP = $400E
+APUNOISELENGTH = $400F
+
+APUDMABASE = $4010
+APUDMALOAD = $4011
+APUDMAADDR = $4012
+APUDMALEN = $4013
+
+APUCTRL = $4015
+APUSTATUS = $4015
+APUFRAMECNT = $4017
+
+; Controller Masks
+PAD_RIGHT=$01
+PAD_LEFT=$02
+PAD_DOWN=$04
+PAD_UP=$08
+PAD_START=$10
+PAD_SELECT=$20
+PAD_B=$40
+PAD_A=$80
+PAD_HORIZONTAL=PAD_LEFT|PAD_RIGHT
+PAD_VERTICAL=PAD_UP|PAD_DOWN
+PAD_DPAD=PAD_HORIZONTAL|PAD_VERTICAL
diff --git a/Baseball (UE)/OVERVIEW.md b/Baseball (UE)/OVERVIEW.md
new file mode 100644
index 0000000..a3e6761
--- /dev/null
+++ b/Baseball (UE)/OVERVIEW.md	
@@ -0,0 +1,433 @@
+# Baseball (UE) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Baseball (UE) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Horizontal |
+| PRG bank start | CPU $C000 (`.org $C000`) |
+| Linker output | `reconstructed_prg.bin`, byte-identical to `prg.bin` |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler | Notes |
+|--------|---------|---------|-------|
+| NMI | $C046 | `NMI` | Runs once per frame; the primary frame driver |
+| RESET | $C40B | `Reset` | Cold-start initialization |
+| IRQ / BRK | $C43E | `IRQ` | Just `rti` (unused) |
+
+---
+
+## 2. Reset — CPU $FFFC → $C40B
+
+**`Reset`** ($C40B)
+
+On power-on or reset:
+
+1. `sei` / `cld` — disable maskable interrupts, clear decimal mode.
+2. **Clear CPU RAM** $0000–$07FF — one 256-byte page at a time using the indirect pointer at $00/$01, repeatedly writing $2000 to PPUCTRL during the clear.
+3. `jsr InitializeSpriteSortTables` ($C7B1) — set up the sprite sort/index tables at $0377, $038C, $0399.
+4. `jsr DisablePpuRendering` ($E96C) — turn off PPU output.
+5. **Disable APU** — write $00 to APUSTATUS ($4015) to silence all channels, then select the five-step frame-counter mode and inhibit frame-counter IRQ via JOY2 ($4017).
+6. `jsr ExpandRecordPointerList` ($C8BB) with inline data — builds record pointer structures.
+7. `lda #$1A / sta PpuMaskShadow` — initial PPU mask shadow value.
+8. `jmp InitializeTitleScreen` ($C74A) — RESET does not return; it transfers directly to the title screen.
+
+---
+
+## 3. NMI / Frame Heartbeat — `NMI` ($C046)
+
+The NMI fires once per frame and is the central frame driver. It does **not** simply return; it performs substantial per-frame work:
+
+1. **Save X and Y** into `NmiSavedX` ($0D) / `NmiSavedY` ($0E).
+2. **Read PPUSTATUS** ($2002) to reset the PPU address latch.
+3. **OAM DMA** — write $02 to OAMDMA ($4014) to copy $0200–$02FF to sprite memory.
+4. **Process the PPU command queue** at $0300 — walk variable-length packets (write packets to $2007, read packets discarded), terminating on a zero-length entry, then reset the queue head (`stx $0300`).
+5. **Apply scroll** — write `ScrollX` ($DF) and `ScrollY` ($E0) to $2005.
+6. **Apply PPU registers** — write `PpuMaskShadow` ($DE) to $2001 and `PpuCtrlShadow` ($DD) to $2000.
+7. `jsr InitializeAudioEngine` ($F9D0) — initialize/advance the audio engine.
+8. **Latch controllers** — strobe JOY1 ($4016) with $01 then $00.
+9. **Read both controllers** — sample JOY1/JOY2 eight times each, shifting button states into `ControllerPressed1` ($15) / `ControllerPressed2` ($16).
+10. **Update controller state** — compute newly-pressed edges (`Pressed = (Pressed & ~Held) | raw`) and update `ControllerHeld1/2` ($11/$12).
+11. **START-button branch**:
+    - If START pressed and `SessionActive` ($1E) is set → `jsr ProcessQueuedObjectEvent` with command $0B.
+    - If START pressed and session is **not** active → set `TransitionActive` ($1D) and `GameplaySuspended` ($EF), then `jmp InitializeNewSession` ($C49C).
+12. `NMI_CheckState` — if `NmiStateFlag` ($1F) is nonzero, skip ahead and restore registers.
+13. Otherwise `jsr QueueInlineObjectEvent` ($EB55) with inline command bytes `$05,$21,$C1`, then `jsr ProcessQueuedObjectEvent` ($EB2A) with command $0B.
+14. `inc FrameCounter` ($E3).
+15. `jsr CalculateControllerAssignments` ($C87E) — derive per-player control state.
+16. Store derived input into `InputState1/2` ($13/$14) and `InputAux1/2` ($17/$18).
+17. **Restore X, Y, A**, `rti`.
+
+Because the NMI does controller reading and event dispatch, the main loop largely waits on the NMI-driven queued-event system rather than polling hardware directly.
+
+---
+
+## 4. Title Screen — InitializeTitleScreen ($C74A)
+
+Shared entry point used by RESET and by post-match/transition paths:
+
+1. `jsr InitializeQueuedEventSystem` ($EB9D) — clear the $0600–$06FF event page, the queue count ($E2), active-event slots, and set `CurrentObjectIndex` ($E1) = 1.
+2. `GameplaySuspended` ($EF) = 0; `TransitionActive` ($1D) = 1.
+3. `PpuCtrlShadow` = $80; disable PPU rendering; fill PPU memory (`FillPpuMemoryAfterValueSaved` at $E985 with value $25).
+4. `jsr ProcessInlinePpuStream` ($EA63) twice — streams title PPU data (inline records `$8D,$F8` and `$00,$C0`).
+5. `jsr EnableNmiAndWaitForFrame` ($E978) — enable NMI and synchronize to a frame.
+6. Enable APU channels ($4015 = $0F), set timing byte $FD = $08.
+7. `RefreshTitleScreen` ($C77A) loop:
+   - Update `ModeFlags` ($40).
+   - `jsr QueueModeIndicatorTiles` ($E5CF).
+   - Wait for controller input release (SELECT/$20) and for the frame counter / delay byte $1B to elapse.
+8. On exit: `TransitionActive` = 0, `GameplaySuspended` = 1, clear audio ($4015), re-init the event system, queue an inline command `$03,$88,$C4`, then `jmp InitializeSessionDisplay` ($C4AA).
+
+### Attract mode — RunAttractMessageLoop ($C43F)
+
+Before reaching the title input loop, `Reset` can flow into `RunAttractMessageLoop`, which:
+- Clears `NmiStateFlag`, selects object event bank 1.
+- Draws encoded six-character messages via `CopyInlineDisplayRecord` ($EA17) with inline text bytes.
+- Exchanges the object event bank ($EB4E), increments `NmiStateFlag`, and loops back to itself — this is the idle attract display until the player presses START.
+
+---
+
+## 5. Session and Match Initialization
+
+### InitializeSessionDisplay ($C4AA)
+PPU shadow setup, disable rendering, fill PPU memory with $26, then process an inline PPU stream (`$F2,$F4`).
+
+### InitializeMatchState ($C4B9)
+- Clears base position and acceleration fields ($C94F/$C943).
+- Sets `$053B` and `PositionSignState` ($B7) to $80.
+- `jsr EnableNmiAndWaitForFrame`.
+- **Player/team selection**:
+  - `Random0To5` ($C850) → `PlayerOneSelection` ($34).
+  - Repeatedly `Random0To5` until a value different from player one → `PlayerTwoSelection` ($35).
+- If `GameplaySuspended` is set, skip side selection; otherwise derive `ActivePlayerSide` ($4B) from mode flags or a random bit.
+- Queue inline object events `$03,$19,$C8` and `$02,$19,$C8`, set `PlayerSelectionActive` ($44) = 1.
+- `WaitForPlayerSelection` ($C4FF) spins until `$43` (`SelectionState`) becomes negative, then queues `$03,$3E,$C4` and falls into `CompleteMatchSetup` ($C50C).
+
+### CompleteMatchSetup ($C50C)
+- `FillSelectionBackgroundBlocks` ($C85A), `QueuePlayerSelectionDisplay` ($C7DD), `InitializeRandomBitfields` ($C899), `QueuePlayerValueDisplay` ($CF8B).
+- Queue inline command `$09,$37,$CE`, then enter `InitializeRoundState` ($C51E).
+
+---
+
+## 6. Round / Gameplay State Machine
+
+### InitializeRoundState ($C51E)
+Round-setup entry point:
+- If gameplay is not suspended and `RoundStateIndex` ($33) < $12, select round music cue; otherwise reset round counters.
+- `EnableRoundAudio` ($C52A): enable APU channels ($4015 = $0F), set $FD = $08.
+- `ResetRoundCounters` ($C536): clear scores ($67/$68) and `RoundStateIndex`.
+- `jsr InitializeObjectsFromTable` ($D06B) — initialize objects from the table at $D0A0–$D131.
+- Set `$053B` / `PositionSignState` = $80.
+- Store a $3C-tick delay, draw an 8-character message, store another $3C delay.
+- `SelectRoundMusicCue` ($C566): choose a music delay value ($20 or $40) based on `RoundStateIndex` parity → store in $FD.
+- `PrepareRoundObjects` ($C573): queue player-selection display, queue random-state record, clear `MatchCompleteFlag` ($45) and `SecondarySequenceState` ($64).
+
+### ResetGameplayState ($C57F)
+- Clear `InningOrSharedScore` ($66), `BaseMotionActive` ($5C).
+- Mark four state entries ($0598–$059B) inactive ($FF).
+- `jsr QueueRoundNumberDisplay` ($CF67), re-init objects, set sign state to $80.
+- Store a $B4-tick delay.
+
+### Round setup continuation points
+- `ResumeRoundSetupAtRandomDirection` ($C5A4): queue random-direction record, clear primary/transition sequence state, set `StateSequenceActive` ($46) = 1, clear state field pairs ($03,$23 via $CF51).
+- `ResumeRoundSetupAtSelectionDisplay` ($C5BA): clear the 8-character field, clear $0597–$05A6, clear the 38-byte motion field range $056F–$0594.
+- Based on `RoundStateIndex` and score comparison ($67 vs $68), either jump to `CompleteMatchState` ($C6F7) or finish the reset.
+
+### FinishGameplayReset ($C5F1)
+- `InitializeDefaultObjects` ($D030), clear sign state, select event bank 1 → enter `RunRoundStateLoop` ($C5FE).
+
+### RunRoundStateLoop ($C5FE) — main per-round loop
+This is the core gameplay loop:
+- If `PendingStateTransition` ($60) is set → `InitializeObjectStateLookup` ($C8A3).
+- If either `PendingStateTransition` or `StateSequenceActive` ($46) is nonzero → dispatch state-specific handlers via queued inline commands (`$0D,$77,$D4`, `$0F,$81,$D3`).
+- `RunPrimaryRoundHandlers` ($C619):
+  - `InitializeSecondaryActors` ($D633), `InitializeConditionalObject` ($D126).
+  - Clear working state: `PendingScoreIncrement`, `BaseMotionPhase`, `BaseMotionEventCount`, `TrajectoryResult`, `PendingStateTransition`, `SpecialSequenceState`, `ObjectTransitionState`, `BaseMotionActive`, `ActionSequenceCounter`, `TrajectoryEvaluationEnabled`, and several others.
+  - Clear base acceleration and position fields.
+  - Queue three inline object events (`$25,$5A,$D8`, `$0E,$66,$D1`, `$1F,$76,$CA`).
+  - `jsr UpdateObjectEventBank_Exchange` with command $08.
+  - Walk the 22-entry `RoundEventSlotTable` ($C6E1) in reverse, dispatching each via `DispatchNextQueuedEvent` ($EB66).
+  - Write one inline character ($3F, value $28) to the PPU.
+- `ApplyPendingScoreUpdate` ($C67E): if a score increment is pending and no state transition, `jsr UpdateCountersAndDisplay` ($CFA6), clear the increment.
+- `StartPostRoundDelay` ($C68D): wait for `PendingEvent` ($6F) to clear, then count down delay counter $48.
+- If match is not complete and no sequence is active → `jmp ResumeRoundSetupAtSelectionDisplay` ($C5BA) to start the next round.
+- `ProcessPostRoundEvents` ($C6A5): dispatch event slots $0D and $0F, store a $0A-tick delay, decrement a counter based on `RoundStateIndex` parity.
+- `CheckPostRoundContinuation` ($C6C5): if match complete → `AdvanceRoundNumber` ($C6CC); otherwise `jmp ResumeRoundSetupAtRandomDirection` ($C5A4).
+- `AdvanceRoundNumber` ($C6CC): update counters/display, increment `RoundStateIndex`; if index reaches $12 → `InitializeResultsPosition` ($C708); otherwise `SelectRoundMusicCue` ($C566) to begin the next round.
+
+---
+
+## 7. Per-Frame Object and Motion Updates
+
+### UpdateFrameObjectsAndTimers ($C122)
+Called each frame to drive object motion:
+- Reset PPU queue offset, OAM write offset, and `FrameState20` ($20).
+- Queue/process inline object events ($07,$64,$C2 via bank, then command $01).
+- Decrement per-object timers at $063F,X (30 slots); when a timer reaches zero, queue a decoded object event.
+- Decrement four short countdowns at $05AD,X.
+- If a transition is active, jump to `CommonEngineExit` ($EB6A); otherwise `IntegrateAllObjectPositions` ($C15B).
+
+### IntegrateAllObjectPositions ($C15B)
+- For 36 object slots (X stepping by 2, each logical object uses two indices):
+  - Sign-extend and add horizontal delta ($050B/$050C,X from $056F/$0570,X).
+  - Sign-extend and add vertical delta ($053C/$053D,X from $0570/$0571,X).
+
+### UpdateBaseMotionSequence ($C18D)
+- Integrate velocity/position for three base object indices ($00, $31, $62).
+- Reflect base motion values when $056C is negative (negate $056B/$056C and halve $0569/$056A).
+- Apply doubled horizontal/vertical velocity adjustments to $0507/$0508 and $0538/$0539.
+- `jsr EvaluateTrajectoryResult` ($CAD2).
+- Advance `BaseMotionPhase` ($5D); when motion settles, clear base acceleration/position fields.
+- `UpdatePositionSignState` ($C228): compute a signed position delta relative to a $0A threshold, track sign changes in `PositionSignState` ($B7), and update rendering flags.
+
+### IntegrateObjectVelocityAndPosition ($C3CA)
+Signed fixed-point position integration used by the three base motion call sites: shifts the signed 16-bit velocity right twice (sign-preserving), adds to position ($0507/$0508), then adds the result to the secondary position ($0509/$050A).
+
+---
+
+## 8. Rendering and OAM
+
+### BuildFrameOam ($C2DE)
+- If `TransitionActive` is set: copy an 88-byte sprite/OAM template from $F94D into shadow OAM at $0200, set `OamWriteOffset` ($3F), and jump to `TerminatePpuUpdateQueue`.
+- Otherwise, if `PlayerSelectionActive` ($44) is set: copy an 8-byte OAM template from $C331, position two sprites from player selection coordinates (scaled ×16 + $50), choose tiles based on `ModeFlags`.
+- Otherwise: `SortObjectsByY` ($C339) — sort object indices by signed 16-bit Y coordinates ($0538/$0539) using the index table at $0377/$0378, then render each sorted object via `RenderSpriteRecordList` ($E77B).
+
+### FinalizeOamAndPpuQueue ($C386)
+- If `ObjectListFlag` ($C7) is set, skip status OAM; otherwise copy 20 bytes from $EBC2 into shadow OAM and select two extra bytes from $EBBC based on player selections.
+- `TerminatePpuUpdateQueue` ($C3AA): write $00 to terminate the PPU command queue at $0300,Y.
+- Hide unused sprites by writing $F0 to each remaining OAM Y coordinate (stepping by 4).
+- `jsr AdvanceRandomState` ($E5F4), then `jmp CommonEngineExit` ($EB6A).
+
+---
+
+## 9. Batting and Pitching
+
+### Pitching (RunPitcherWindupSequence, $C6044)
+- `RunPitcherWindupSequence` animates the pitcher windup (frames selected via `SetWindupFrame`).
+- `SelectPitchAction` ($C6139): reads controller input to choose the pitch action.
+- `SelectPitchType` ($C6178): searches `PitchTypeThresholdTable` / `PitchDirectionThresholdTable` ($C5973/$C5980) to determine pitch type and direction.
+- `AnimatePitchStart` ($C6229), `UpdatePitchMovement` ($C6321): apply pitch trajectory and controller-based horizontal/vertical input.
+- Pitch tables: `PitchVelocityBiasTable` ($C6399), `PitchDelayTable` ($C6402), `PitchRenderFlagTable` ($C6405).
+
+### Batting (SelectBatterAction, $C6414)
+- `WaitForBatterAction` ($C6422): wait for batter input.
+- `UseBatterControllerInput` ($C6464): map controller to batter action slot.
+- `SelectActionFromObjectState` ($C6590) with `ObjectActionLookupTable` ($C6502).
+- `DispatchActionType` ($C6614): route to the appropriate action handler.
+
+### Object motion and collision
+- `MoveControlledObject` ($D371): apply controlled horizontal/vertical offsets (`ControlledHorizontalOffsetTable` / `ControlledVerticalOffsetTable` at $D384/$D38C).
+- `TestObjectCollision` ($D38B): object-vs-object collision testing.
+- `TestCurrentObjectInput` ($D7D7): resolve controller input for the current object.
+- Geometry helpers: `CalculateCurrentObjectGeometry` ($D7AE), `CalculateGeometryDifference` ($D566), `BuildGeometryVector` ($D74D), extensive trigonometry/vector math routines ($D5xx–$D8xx).
+
+---
+
+## 10. Audio Engine
+
+### InitializeAudioEngine ($F9D0)
+Initialize the APU: write DMC settings, configure pulse/triangle/noise channel presets, write pulse periods from tables ($FA00–), set up audio lookup data.
+
+### UpdateAudioEngine ($FB05)
+Per-frame audio update:
+- Clear/finalize primary audio effects.
+- Update pulse 1 and pulse 2 effects (preset effects, descending effects, state-change effects, phase effects).
+- Update triangle pitch sweeps.
+- Dispatch music and noise (`DispatchMusicAndNoise` at $FB65): update music sequencer, noise envelope, timed triangle effects, DMC output.
+
+### Music
+- `StartMusicSequence` ($FD34): initialize a music sequence by finding its bank and copying the descriptor.
+- Channels: pulse 1 ($FD96), pulse 2 ($FDCF), triangle ($FE0B).
+- Music sequence data tables at $FE60–$FFD0 (`MusicSequenceData_FE60` … `MusicSequenceData_FFD0`).
+- Sound effect presets and noise/triangle envelopes throughout the $F9xx–$FE2x region.
+
+Audio is advanced from the NMI via `jsr InitializeAudioEngine` ($F9D0) each frame; the broader `UpdateAudioEngine` ($FB05) is called from the event system.
+
+---
+
+## 11. Object Event System (the main-loop engine)
+
+The game is driven by a **queued event system** rather than a simple polling loop:
+
+- `InitializeQueuedEventSystem` ($EB9D): clear $0600–$06FF, queue count $E2, active slots, set current object index.
+- `QueueInlineObjectEvent` ($EB55) / `QueueDecodedObjectEvent` ($EB2A): push an event onto the queue.
+- `ProcessQueuedObjectEvent` ($EB2A): walk the queue and process active events.
+- `DispatchNextQueuedEvent` ($EB66): pop the newest event, save its continuation address on the hardware stack (SP = $FF), and `rts` into it — this is how control transfers between event handlers.
+- `CommonEngineExit` ($EB6A): mark the current object inactive; if the queue is empty, wait (`beq DispatchNextQueuedEvent_Wait`) polling $E2; otherwise disable NMI bit 7 and dispatch the next entry.
+
+The main gameplay loop (`RunRoundStateLoop`) and most state handlers ultimately pass through `CommonEngineExit`, which blocks until the NMI or another producer queues the next event. This makes the NMI the real-time heartbeat and the main loop an event consumer.
+
+---
+
+## 12. PPU Streaming Helpers ($E9xx–$EBxx)
+
+A family of routines drives PPU updates from inline byte streams embedded in the code:
+- `DisablePpuRendering` ($E96C), `EnableNmiAndWaitForFrame` ($E978).
+- `FillPpuMemoryWith26` / `FillPpuMemoryAfterValueSaved` ($E983/$E985): fill PPU memory with a byte value.
+- `DecodeInlineParameters` ($EA09), `ReadInlineWord` ($EA28), `CopyInlineBytesToZeroPage` ($EA45).
+- `WritePpuControlFromCarry` ($EA6E), `SetPpuAddressFromInlineRecord` ($EA97), `WritePendingPpuByte` ($EABF), `WriteInlinePpuBlock` ($EAC9), `PPUWriteString` ($EAFB).
+- `CopyInlineDisplayRecord` ($EA17): draw an encoded text record (count byte followed by character data) — used heavily for titles, scores, round numbers, and announcements.
+- `ProcessInlinePpuStream` ($EA63): process a stream of PPU commands.
+
+Many routines are followed by `.byte` inline data that must **not** be disassembled as instructions; the disassembly marks these explicitly.
+
+---
+
+## 13. Match Completion and Results
+
+### CompleteMatchState ($C6F7)
+- Increment `RoundStateIndex`.
+- If `InningOrSharedScore` ($66) is nonzero → `InitializeResultsPosition`; otherwise draw a single encoded character ($32).
+- `InitializeResultsPosition` ($C708): set sign state to $80, draw a 10-character message (`$25,$10,$0A,$16,$0E,$25,$1C,$0E,$1D,$25`), set timing $FD = $4, dispatch event slot 2, queue inline `$02,$88,$C4`.
+- `ResultsDelayLoop` ($C737): repeat a $3C-tick delay 10 times.
+- Disable APU ($4015 = $00), clear `SessionActive` ($1E), then fall into `InitializeTitleScreen` ($C74A) to return to the title.
+
+---
+
+## 14. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C40B) ───► clear RAM $0000-$07FF, init sprite sort, disable PPU/APU
+    │
+    ▼
+jmp InitializeTitleScreen ($C74A)
+    │
+    ├─ init event system, draw title screen
+    ├─ EnableNmiAndWaitForFrame   (NMI now runs each frame)
+    ├─ WaitForTitleInputRelease   (wait for START + input release)
+    ▼
+jmp InitializeSessionDisplay ($C4AA)
+    │
+    ▼
+jmp InitializeMatchState ($C4B9)
+    │
+    ├─ Random0To5 → PlayerOneSelection ($34)
+    ├─ Random0To5 (≠ P1) → PlayerTwoSelection ($35)
+    ├─ derive ActivePlayerSide ($4B)
+    └─ WaitForPlayerSelection (spin until $43 < 0)
+    │
+    ▼
+CompleteMatchSetup ($C50C)
+    │
+    ▼
+InitializeRoundState ($C51E)
+    │
+    ├─ enable audio, reset counters, init objects from table ($D06B)
+    ├─ draw messages, select music cue
+    ▼
+ResetGameplayState ($C57F) → FinishGameplayReset ($C5F1)
+    │
+    ▼
+RunRoundStateLoop ($C5FE)  ◄───────────────────┐
+    │                                          │
+    ├─ InitializeObjectStateLookup             │
+    ├─ RunPrimaryRoundHandlers                 │
+    │     ├─ InitializeSecondaryActors         │
+    │     ├─ InitializeConditionalObject       │
+    │     ├─ walk RoundEventSlotTable          │
+    │     └─ dispatch queued events            │
+    ├─ ApplyPendingScoreUpdate                 │
+    ├─ StartPostRoundDelay (wait $48 ticks)    │
+    ├─ ProcessPostRoundEvents                  │
+    ├─ CheckPostRoundContinuation              │
+    │     ├─ match complete → results → title  │
+    │     └─ AdvanceRoundNumber → next round   │
+    └─ eventually → CommonEngineExit ($EB6A)   │
+              wait for queued event ($E2)      │
+              dispatch next event (rts into it)│
+              └────────────────────────────────┘
+
+NMI ($C046) [every frame]
+    ├─ PPU command queue flush ($0300)
+    ├─ OAM DMA ($4014)
+    ├─ scroll ($2005), PPU mask/ctrl ($2001/$2000)
+    ├─ InitializeAudioEngine ($F9D0)
+    ├─ controller latch + read (JOY1/JOY2)
+    ├─ controller state (pressed/held edges)
+    ├─ START branch → new session or command $0B
+    ├─ QueueInlineObjectEvent + ProcessQueuedObjectEvent
+    ├─ FrameCounter++, CalculateControllerAssignments
+    └─ restore registers, rti
+```
+
+---
+
+## 15. Key Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $00–$01 | IndirectPtrLo/Hi | RAM-clear indirect pointer |
+| $0D–$0E | NmiSavedX/Y | NMI register save |
+| $0F | DerivedControl0 | Derived control input |
+| $11–$12 | ControllerHeld1/2 | Currently held buttons |
+| $13–$14 | InputState1/2 | Current input state |
+| $15–$16 | ControllerPressed1/2 | Newly pressed buttons |
+| $17–$18 | InputAux1/2 | Auxiliary input |
+| $19–$1A | RandomStateLo/Hi | PRNG state |
+| $1B | TransitionCounter | Transition delay |
+| $1D | TransitionActive | Transition in progress |
+| $1E | SessionActive | Session/game active flag |
+| $1F | NmiStateFlag | NMI state flag |
+| $20 | FrameState20 | Frame state |
+| $21 | SelectedPitchAction | Current pitch action |
+| $33 | RoundStateIndex | Current round/inning index |
+| $34–$35 | PlayerOne/TwoSelection | Selected teams |
+| $36–$39 | ObjectScreenX/Y (+Hi) | Object screen coordinates |
+| $3E–$3F | PpuQueueOffset / OamWriteOffset | PPU/OAM write positions |
+| $40 | ModeFlags | Display/mode flags |
+| $42 | CurrentObjectArrayOffset | Current object slot |
+| $43 | SelectionState | Selection state |
+| $44 | PlayerSelectionActive | Player selection active |
+| $45 | MatchCompleteFlag | Match finished |
+| $46 | StateSequenceActive | State sequence running |
+| $48 | DelayCounter | General delay |
+| $4B | ActivePlayerSide | Active player (0/1) |
+| $4D–$50 | RandomState0/1, RandomBits0/1 | Randomization state |
+| $53–$56 | SavedBaseX/Y (Lo/Hi) | Saved base coordinates |
+| $5C | BaseMotionActive | Base motion active |
+| $5D | BaseMotionPhase | Base motion phase |
+| $5E | BaseMotionEventCount | Base motion event count |
+| $5F | TrajectoryResult | Trajectory result |
+| $60 | PendingStateTransition | Pending state change |
+| $66 | InningOrSharedScore | Inning / shared score |
+| $67–$68 | PlayerOne/TwoScore | Scores |
+| $69–$6A | EventWrite/ReadIndex | Event queue indices |
+| $6F | PendingEvent | Pending event |
+| $7E | ActionSequenceCounter | Action sequence counter |
+| $83 | ObjectApproachCount | Approach counter |
+| $86 | TrajectoryEvaluationEnabled | Trajectory eval enabled |
+| $8E–$90 | RandomHorizontal/VerticalMotion | Random motion |
+| $9D | CurrentActionState | Current action |
+| $9F–$A1 | SecondaryActorState0–2 | Secondary actor states |
+| $A2 | ObjectSequenceState | Object sequence state |
+| $B7 | PositionSignState | Position sign tracking |
+| $C7 | ObjectListFlag | Object list flag |
+| $C9–$CA | SpriteSortBaseIndex / SpriteArrayEnd | Sort table bounds |
+| $DD–$E0 | PpuCtrl/MaskShadow, ScrollX/Y | PPU/shadow/scroll state |
+| $E1 | CurrentObjectIndex | Current object being processed |
+| $E2 | ScriptDepth / queue count | Queued event count |
+| $E3 | FrameCounter | Frame tick counter |
+| $EF | GameplaySuspended | Gameplay suspended |
+| $F6–$F7 | SoundPtrLo/Hi | Sound pointer |
+| $FE | PendingAudioFlags | Pending audio flags |
+| $FF | RenderStateFlags | Render state flags |
+
+---
+
+## 16. Notes on the Disassembly
+
+- The source is **21,624 lines** and thoroughly annotated with symbolic names for nearly every routine, table, and data block — there are no generic `Label_Cxxxx` placeholders.
+- Numerous routines are followed by inline `.byte` data blocks consumed by `QueueInlineObjectEvent`, `CopyInlineDisplayRecord`, or `ProcessInlinePpuStream`; these are intentionally left as raw bytes and marked in comments.
+- The PRG is a single 16 KB bank at $C000–$FFFF; calls to $Dxxx/$Exxx/$Fxxx targets are all within the same bank (no bank switching).
+- Build verification: `make` in `copilot/` produces `reconstructed_prg.bin` that is **byte-identical** to `prg.bin` and to the PRG bank of `baseball.nes`.
\ No newline at end of file
diff --git a/Baseball (UE)/copilot/Makefile b/Baseball (UE)/copilot/Makefile
index 3f9ba6f..7b0587a 100644
--- a/Baseball (UE)/copilot/Makefile	
+++ b/Baseball (UE)/copilot/Makefile	
@@ -1,10 +1,25 @@
-all: reconstructed_prg.bin verify
-prg.o: prg.s symbols.inc prg.bin
-	ca65 -g -o $@ prg.s
-reconstructed_prg.bin: prg.o linker.cfg
-	ld65 -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ prg.o
-verify: reconstructed_prg.bin prg.bin
-	cmp reconstructed_prg.bin prg.bin
-	@echo BYTE-IDENTICAL
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f prg.o reconstructed_prg.bin reconstructed.map reconstructed.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Baseball (UE)/copilot/chr.bin b/Baseball (UE)/copilot/chr.bin
new file mode 100644
index 0000000..463db49
Binary files /dev/null and b/Baseball (UE)/copilot/chr.bin differ
diff --git a/Baseball (UE)/copilot/chr.o b/Baseball (UE)/copilot/chr.o
new file mode 100644
index 0000000..4931315
Binary files /dev/null and b/Baseball (UE)/copilot/chr.o differ
diff --git a/Baseball (UE)/copilot/chr.s b/Baseball (UE)/copilot/chr.s
new file mode 100644
index 0000000..f6a8c21
--- /dev/null
+++ b/Baseball (UE)/copilot/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Baseball (UE)/copilot/header.bin b/Baseball (UE)/copilot/header.bin
new file mode 100644
index 0000000..aee36c4
Binary files /dev/null and b/Baseball (UE)/copilot/header.bin differ
diff --git a/Baseball (UE)/copilot/header.o b/Baseball (UE)/copilot/header.o
new file mode 100644
index 0000000..271ce51
Binary files /dev/null and b/Baseball (UE)/copilot/header.o differ
diff --git a/Baseball (UE)/copilot/header.s b/Baseball (UE)/copilot/header.s
new file mode 100644
index 0000000..37d1389
--- /dev/null
+++ b/Baseball (UE)/copilot/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Baseball (UE)/copilot/linker.cfg b/Baseball (UE)/copilot/linker.cfg
index d9d421d..cfaf881 100644
--- a/Baseball (UE)/copilot/linker.cfg	
+++ b/Baseball (UE)/copilot/linker.cfg	
@@ -1,6 +1,10 @@
 MEMORY {
-  PRG: start = $C000, size = $4000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
-  PRG: load = PRG, type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Baseball (UE)/copilot/locals.inc b/Baseball (UE)/copilot/locals.inc
index 65b8c77..a620918 100644
--- a/Baseball (UE)/copilot/locals.inc	
+++ b/Baseball (UE)/copilot/locals.inc	
@@ -151,10 +151,3 @@ SoundPtrHi              = $F7
 
 PendingAudioFlags       = $FE
 RenderStateFlags        = $FF
-
-; Local References
-Music_Update   = $EB0A
-Sound_Update   = $EB2A
-UpdateSprites  = $EB48
-WaitFrame_End  = $F9D0
-
diff --git a/Baseball (UE)/copilot/prg.o b/Baseball (UE)/copilot/prg.o
new file mode 100644
index 0000000..6ecea6c
Binary files /dev/null and b/Baseball (UE)/copilot/prg.o differ
diff --git a/Baseball (UE)/copilot/prg.s b/Baseball (UE)/copilot/prg.s
index 1af6ac1..b54cdc5 100644
--- a/Baseball (UE)/copilot/prg.s	
+++ b/Baseball (UE)/copilot/prg.s	
@@ -5,16 +5,6 @@
 .include "symbols.inc"
 .include "locals.inc"
 
-; ------------------------------------------------------------
-; PRG-ROM $0000-$0045  (CPU $C000-$C045)
-; Unreached on first pass. Preserve as data.
-; ------------------------------------------------------------
-; ============================================================================
-; PRG-ROM mapping:
-;   File offset $0000 = CPU $C000
-;   File offset $3FFF = CPU $FFFF
-; ============================================================================
-
 ; ============================================================================
 ; Zero-page scratch policy
 ;
@@ -224,7 +214,7 @@ NMI_CheckState:                 ; $C0EC
 
     jsr QueueInlineObjectEvent                   ; $C0F0: 20 0A EB
 
-    ; Inline command data consumed by the routine at $EB0A.
+    ; Inline command data consumed by the routine at QueueInlineObjectEvent.
     ; These bytes must not be assembled as 6502 instructions.
     .byte $05,$21,$C1           ; $C0F3-$C0F5
 
@@ -281,7 +271,7 @@ UpdateFrameObjectsAndTimers:                   ; $C122
 
     jsr QueueInlineObjectEvent                   ; $C12A: 20 0A EB
 
-    ; Inline command data consumed by the routine at $EB0A.
+    ; Inline command data consumed by the routine at QueueInlineObjectEvent.
     .byte $07,$64,$C2           ; $C12D-$C12F
 
     ldx #$01                    ; $C130: A2 01
@@ -540,7 +530,7 @@ SaveSignedPositionDelta:         ; $C23A
 
     jsr QueueInlineObjectEvent                   ; $C243: 20 0A EB
 
-    ; Inline command data consumed by the routine at $EB0A.
+    ; Inline command data consumed by the routine at QueueInlineObjectEvent.
     .byte $23,$52,$C2           ; $C246-$C248
 
 CommitSignedPositionDelta:      ; $C249
@@ -1359,13 +1349,13 @@ DeriveSelectedSideFromMode:   ; $C4EC
 
     jsr QueueInlineObjectEvent                   ; $C4EF: 20 0A EB
 
-    ; Inline command data consumed by $EB0A.
+    ; Inline command data consumed by QueueInlineObjectEvent.
     .byte $03,$19,$C8           ; $C4F2-$C4F4
 
 StartPlayerSelection:        ; $C4F5
     jsr QueueInlineObjectEvent                   ; $C4F5: 20 0A EB
 
-    ; Inline command data consumed by $EB0A.
+    ; Inline command data consumed by QueueInlineObjectEvent.
     .byte $02,$19,$C8           ; $C4F8-$C4FA
 
     lda #$01                    ; $C4FB: A9 01
@@ -1386,7 +1376,7 @@ WaitForPlayerSelection:      ; $C4FF
 
     jsr QueueInlineObjectEvent                   ; $C506: 20 0A EB
 
-    ; Inline command data consumed by $EB0A.
+    ; Inline command data consumed by QueueInlineObjectEvent.
     .byte $03,$3E,$C4           ; $C509-$C50B
 
 ; ----------------------------------------------------------------------------
@@ -1401,7 +1391,7 @@ CompleteMatchSetup:          ; $C50C
 
     jsr QueueInlineObjectEvent                   ; $C518: 20 0A EB
 
-    ; Inline command data consumed by $EB0A.
+    ; Inline command data consumed by QueueInlineObjectEvent.
     .byte $09,$37,$CE           ; $C51B-$C51D
 
 ; ============================================================================
@@ -1703,12 +1693,12 @@ CheckRoundTransitionState:        ; $C605
 
     jsr QueueInlineObjectEvent                   ; $C60D: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $0D,$77,$D4           ; $C610-$C612
 
     jsr QueueInlineObjectEvent                   ; $C613: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $0F,$81,$D3           ; $C616-$C618
 
 ; ----------------------------------------------------------------------------
@@ -3377,7 +3367,7 @@ UpdateTrajectoryFrame:         ; $CA77
 
     jsr QueueInlineObjectEvent                   ; $CA98: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $24,$A3,$CD           ; $CA9B-$CA9D
 
     jmp WaitForTrajectoryLimit
@@ -3386,7 +3376,7 @@ UpdateTrajectoryFrame:         ; $CA77
 QueueNegativeTrajectoryCommand:         ; $CAA1
     jsr QueueInlineObjectEvent                   ; $CAA1: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $26,$A3,$CD           ; $CAA4-$CAA6
 
     jmp WaitForTrajectoryLimit
@@ -3395,7 +3385,7 @@ QueueNegativeTrajectoryCommand:         ; $CAA1
 QueueLaterTrajectoryCommand:         ; $CAAA
     jsr QueueInlineObjectEvent                   ; $CAAA: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $1A,$97,$CD           ; $CAAD-$CAAF
 
 ; ----------------------------------------------------------------------------
@@ -3572,7 +3562,7 @@ ApplyNegativeTrajectoryResult:       ; $CB1E
 
     jsr QueueInlineObjectEvent                   ; $CB27: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $18,$4C,$CC           ; $CB2A-$CB2C
 
     rts                         ; $CB2D: 60
@@ -3580,7 +3570,7 @@ ApplyNegativeTrajectoryResult:       ; $CB1E
 QueueNegativeResultCommand:          ; $CB2E
     jsr QueueInlineObjectEvent                   ; $CB2E: 20 0A EB
 
-    ; Alternate inline command record consumed by $EB0A.
+    ; Alternate inline command record consumed by QueueInlineObjectEvent.
     .byte $1C,$4C,$CC           ; $CB31-$CB33
 
 TrajectoryResultReturn:            ; $CB34
@@ -3922,7 +3912,7 @@ AdvancePrimaryStateSequence:                   ; $CC01
 
     jsr QueueInlineObjectEvent                   ; $CC13: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $06,$ED,$D9           ; $CC16-$CC18
 
     jsr ClearPrimaryStateField                   ; $CC19: 20 4A CF
@@ -3965,7 +3955,7 @@ QueuePrimaryStateEvent:          ; $CC2A
 
     jsr QueueInlineObjectEvent                   ; $CC35: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $28,$3B,$CC           ; $CC38-$CC3A
 
 Routine_CC3B_Return:            ; $CC3B
@@ -4109,7 +4099,7 @@ Routine_CCAA_OneTimeCommand:    ; $CCAA
 
     jsr QueueInlineObjectEvent                   ; $CCB2: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $28,$B8,$CC           ; $CCB5-$CCB7
 
 Routine_CCB8_Return:            ; $CCB8
@@ -4210,7 +4200,7 @@ Routine_CD09_OneTimeCommand:    ; $CD09
 
     jsr QueueInlineObjectEvent                   ; $CD11: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $28,$17,$CD           ; $CD14-$CD16
 
 Routine_CD17_Return:            ; $CD17
@@ -4279,7 +4269,7 @@ QueueSelectedStateMarker:                   ; $CD2E
 
     jsr QueueInlineObjectEvent                   ; $CD3B: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $28,$41,$CD           ; $CD3E-$CD40
 
 Routine_CD41_Return:            ; $CD41
@@ -4410,12 +4400,12 @@ RunHomeRunCelebration:                   ; $CDA4
     sta SpecialSequenceState                 ; $CDAA: 85 6D
 
 ; ----------------------------------------------------------------------------
-; Dispatch an inline command through $EB0A.
+; Dispatch an inline command through QueueInlineObjectEvent.
 ; ----------------------------------------------------------------------------
 
     jsr QueueInlineObjectEvent                   ; $CDAC: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $15,$D8,$CD           ; $CDAF-$CDB1
 
 ; ----------------------------------------------------------------------------
@@ -6002,7 +5992,7 @@ InitializePrimaryGameplayActor:                   ; $D167
 
     jsr QueueInlineObjectEvent                   ; $D16B: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $19,$F7,$D3           ; $D16E-$D170
 
 ; ----------------------------------------------------------------------------
@@ -6136,7 +6126,7 @@ SetWindupFrame:          ; $D1A2
 FinishWindupSequence:        ; $D1C8
     jsr QueueInlineObjectEvent                   ; $D1C8: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $17,$AC,$D2           ; $D1CB-$D1CD
 
     inc ActionSequenceCounter         ; $D1CE: E6 7E
@@ -6244,7 +6234,7 @@ AnimatePitchStart:           ; $D212
 
     jsr QueueInlineObjectEvent                   ; $D21A: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $13,$DA,$D6           ; $D21D-$D21F
 
 ; ----------------------------------------------------------------------------
@@ -6321,7 +6311,7 @@ PitchStartAnimationLoop:     ; $D225
 
     jsr QueueInlineObjectEvent                   ; $D25F: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $04,$85,$D7           ; $D262-$D264
 
 ; ----------------------------------------------------------------------------
@@ -6396,7 +6386,7 @@ CheckPitchVerticalLimit:       ; $D28F
 
     jsr QueueInlineObjectEvent                   ; $D29B: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $21,$27,$D0           ; $D29E-$D2A0
 
     jmp CommonEngineExit                   ; $D2A1: 4C 6A EB
@@ -6546,7 +6536,7 @@ SaveBatterAction:         ; $D2F9
 
     jsr QueueInlineObjectEvent                   ; $D317: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $11,$D7,$D5           ; $D31A-$D31C
 
     lda #$1E                    ; $D31D: A9 1E
@@ -6658,7 +6648,7 @@ Routine_D355_State1:            ; $D355
 
     jsr QueueInlineObjectEvent                   ; $D35A: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $10,$AB,$E3           ; $D35D-$D35F
 
     rts                         ; $D360: 60
@@ -6688,7 +6678,7 @@ Routine_D367_State2:            ; $D367
 
     jsr QueueInlineObjectEvent                   ; $D36C: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $12,$AB,$E3           ; $D36F-$D371
 
     rts                         ; $D372: 60
@@ -6703,7 +6693,7 @@ Routine_D373_State3:            ; $D373
 
     jsr QueueInlineObjectEvent                   ; $D378: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $16,$AB,$E3           ; $D37B-$D37D
 
     dec $03B7                   ; $D37E: CE B7 03
@@ -8323,12 +8313,12 @@ WaitForVerticalPosition02:      ; $D7EC
 
     jsr QueueInlineObjectEvent                   ; $D801: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $17,$AC,$D2           ; $D804-$D806
 
     jsr QueueInlineObjectEvent                   ; $D807: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $11,$D7,$D5           ; $D80A-$D80C
 
     jmp CommonEngineExit                   ; $D80D: 4C 6A EB
@@ -8462,7 +8452,7 @@ ProcessSecondaryObjectStates:   ; $D85B
 
     jsr QueueInlineObjectEvent                   ; $D860: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $08,$84,$D8           ; $D863-$D865
 
 ; ----------------------------------------------------------------------------
@@ -8479,7 +8469,7 @@ CheckObjectState059A:           ; $D866
 
     jsr QueueInlineObjectEvent                   ; $D86E: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $0A,$84,$D8           ; $D871-$D873
 
 ; ----------------------------------------------------------------------------
@@ -8497,7 +8487,7 @@ CheckObjectState059B:           ; $D874
 
     jsr QueueInlineObjectEvent                   ; $D87C: 20 0A EB
 
-    ; Inline command record consumed by $EB0A.
+    ; Inline command record consumed by QueueInlineObjectEvent.
     .byte $0C,$84,$D8           ; $D87F-$D881
 
 ; ----------------------------------------------------------------------------
@@ -13360,9 +13350,9 @@ CandidateObjectOffsetTable:     ; $E295
 ;   3. Restore X.
 ;   4. Tail-call the command dispatcher at $EB0D.
 ;
-; The jump to $EB0D enters three bytes after the normal $EB0A entry, which
+; The jump to $EB0D enters three bytes after the normal QueueInlineObjectEvent entry, which
 ; suggests $E99A has already completed the inline-record setup normally
-; performed by $EB0A.
+; performed by QueueInlineObjectEvent.
 ; ============================================================================
 
 ; ----------------------------------------------------------------------------
diff --git a/Baseball (UE)/copilot/reconstructed.lbl b/Baseball (UE)/copilot/reconstructed.lbl
new file mode 100644
index 0000000..7390cbc
--- /dev/null
+++ b/Baseball (UE)/copilot/reconstructed.lbl	
@@ -0,0 +1,951 @@
+al 00FFFE .IrqBrkVectorWord
+al 00FFFC .ResetVectorWord
+al 00FFFA .NmiVectorWord
+al 00FFFA .InterruptVectors
+al 00FFE2 .UnusedRomPadding
+al 00FFD0 .MusicSequenceData_FFD0
+al 00FFC0 .MusicSequenceData_FFC0
+al 00FFA0 .MusicSequenceData_FFA0
+al 00FF80 .MusicSequenceData_FF80
+al 00FF60 .MusicSequenceData_FF60
+al 00FF40 .MusicSequenceData_FF40
+al 00FF20 .MusicSequenceData_FF20
+al 00FF00 .MusicSequenceData_FF00
+al 00FEE0 .MusicSequenceData_FEE0
+al 00FEC0 .MusicSequenceData_FEC0
+al 00FEA0 .MusicSequenceData_FEA0
+al 00FE80 .MusicSequenceData_FE80
+al 00FE60 .MusicSequenceData_FE60
+al 00FE40 .MusicSequenceData
+al 00FE36 .UpdateMusicChannel3_WriteLinear
+al 00FE30 .UpdateMusicChannel3_CheckBank
+al 00FE15 .UpdateMusicChannel3_Decrement
+al 00FE3F .UpdateMusicSequence_Return
+al 00FE02 .UpdateMusicChannel2_Write
+al 00FDF1 .UpdateMusicChannel2_SelectControl
+al 00FDDF .UpdateMusicChannel2_HaveCommand
+al 00FE05 .UpdateTriangleMusicChannel
+al 00FDC7 .UpdateMusicChannel2_Decrement
+al 00FDAA .UpdateMusicChannel1_CheckAlt
+al 00FDB0 .UpdateMusicChannel1_Write
+al 00FD99 .UpdateMusicChannel1_SelectControl
+al 00FD90 .UpdateMusicChannel1_HaveNote
+al 00FD79 .UpdateMusicChannel1_Decrement
+al 00FDB9 .UpdatePulse2MusicChannel
+al 00FD51 .InitializeMusicSequence_CopyDescriptor
+al 00FD49 .InitializeMusicSequence_LoadPointer
+al 00FD3C .InitializeMusicSequence_BankFound
+al 00FD36 .InitializeMusicSequence_FindBank
+al 00FD67 .UpdatePulse1MusicChannel
+al 00FD34 .StartMusicSequence
+al 00FD0C .NoiseEnvelopeSequence
+al 00FCFD .AudioEvent_8_SetTimer
+al 00FCCF .CountDownTimedAudioEffect
+al 00FCC0 .ConfigureTimedTriangleEffect
+al 00FD14 .UpdateNoiseEnvelopeSequence
+al 00FD2A .UpdateMusicEngine
+al 00FC87 .ResetTimedAudioEvents
+al 00FCF3 .StartTriangleEffectAlternate
+al 00FD01 .UpdateTriangleEffectAlternate
+al 00FCD6 .StartTriangleEffectLong
+al 00FCE4 .UpdateTriangleEffectLong
+al 00FCB4 .StartTriangleEffectMedium
+al 00FC9A .StartTriangleEffectShort
+al 00FCA8 .UpdateDmcOutputEffect
+al 00FC97 .UpdateNoiseEffectSequence
+al 00FC31 .StartTriangleSweep_Save
+al 00FC1E .StartTrianglePitchSweep
+al 00FC33 .UpdateTrianglePitchSweep
+al 00FC60 .DispatchMusicAndNoise
+al 00FBFB .PulseEffectAlternate_Use90
+al 00FBF8 .PulseEffectAlternate_TestOdd
+al 00FBE4 .UpdateAlternatePulse2PhaseEffect
+al 00FC58 .CountDownPulse2PhaseEffect
+al 00FBD3 .StartAlternatePulse2PhaseEffect
+al 00FC55 .WritePulse2PhaseRegisters
+al 00FBD0 .PulseEffectF4_Apply
+al 00FBC8 .PulseEffectF4_CheckUpper
+al 00FBBC .PulseEffectF4_Configure
+al 00FBB9 .PulseEffectF4_WriteTimer
+al 00FBB3 .PulseEffectF4_Phase10
+al 00FBA9 .UpdatePulse2PhaseEffect
+al 00FBAF .PulseEffectF4_Phase18
+al 00FBA1 .StartPulse2PhaseEffect
+al 00FC94 .UpdateMusicSequencer
+al 00FB95 .UpdateAudioEffect2_SelectPitch
+al 00FB90 .UpdateAudioEffect2_WriteSweep
+al 00FB9C .UpdateAudioEffect2_CountDown
+al 00FB7F .UpdateAudioEffect2_CheckState
+al 00FB97 .UpdateAudioEffect2_Trigger
+al 00FBFF .UpdateSecondaryEffects
+al 00FB35 .ClearPrimaryAudioEffect
+al 00FB63 .StartPulse1StateChangeEffect
+al 00FB6B .UpdatePulse1StateChangeEffect
+al 00FB43 .StartPulse1DescendingEffect
+al 00FB4A .UpdatePulse1DescendingEffect
+al 00FB40 .UpdateAudioEngine_Finalize
+al 00FB5A .UpdateAudioEffect1_Write
+al 00FB02 .FinalizeSoundEffectPreset_Apply
+al 00FAF6 .FinalizeSoundEffectPreset_SelectX
+al 00FAEC .StartPulse1EffectPreset3FromControl
+al 00FAE5 .StartPulse1EffectPreset3
+al 00FAE1 .StartPulse1EffectPreset2FromControl
+al 00FADA .StartPulse1EffectPreset2
+al 00FAEE .UpdatePulse1PresetEffect
+al 00FAD6 .StartPulse1EffectPreset1FromControl
+al 00FACF .StartPulse1EffectPreset1
+al 00FAC5 .LookupAudioControlValueFinalRotate
+al 00FABF .LookupAudioControlValue
+al 00FABA .ReduceValueByOneThirtySecond_Subtract
+al 00FAAE .ReduceValueByOneThirtySecond
+al 00FAAA .WriteTrianglePeriodFromTable
+al 00FAA6 .WritePulse2PeriodAfterSweep
+al 00FAA3 .WritePulse2PeriodFromTable
+al 00FAA2 .WriteApuTimerFromTable_Return
+al 00FA91 .WriteApuTimerFromTable
+al 00FA8C .InitializePulse1PeriodAfterStateSaved
+al 00FA8F .WritePulsePeriod_SelectChannel
+al 00FA86 .WritePulsePeriodFromTable
+al 00FA7A .ConfigureNoiseChannel
+al 00FA73 .WritePulse2SweepAndControlFromRegisters
+al 00FA71 .WritePulse2SweepAndControl
+al 00FA6A .WritePulse1SweepAndControlFromRegisters
+al 00FA68 .WritePulse1SweepAndControl
+al 00FA76 .WritePulse2Control
+al 00FA64 .ConfigurePulse2ControlPreset
+al 00FA6D .WritePulse1Control
+al 00FA60 .ConfigurePulse1ControlPreset
+al 00FA00 .AudioLookupData_FA00
+al 00F9F4 .AudioPadding_F9F4
+al 00F9ED .InitializeAudioEngine_WriteDmc
+al 00FB05 .UpdateAudioEngine
+al 00F9A5 .RenderingAnimationData_F9A5
+al 00F900 .RenderingAnimationData_F900
+al 00F800 .RenderingAnimationData_F800
+al 00F700 .RenderingAnimationData_F700
+al 00F600 .RenderingAnimationData_F600
+al 00F500 .RenderingAnimationData_F500
+al 00F400 .RenderingAnimationData_F400
+al 00F300 .RenderingAnimationData_F300
+al 00F200 .RenderingAnimationData_F200
+al 00F100 .RenderingAnimationData_F100
+al 00F000 .RenderingAnimationData_F000
+al 00EF00 .RenderingAnimationData_EF00
+al 00EE00 .RenderingAnimationData_EE00
+al 00ED00 .RenderingAnimationData_ED00
+al 00EC1C .RenderingAndAnimationData_EC1C
+al 00EBFC .RenderingData_EBFC
+al 00EBDC .RenderingData_EBDC
+al 00EBBC .RenderingData_EBBC
+al 00EBB4 .UpdateRelativeObjectEventBank
+al 00EBAD .InitializeQueuedEventSystem_ClearActive
+al 00EBA0 .InitializeQueuedEventSystem_ClearPage
+al 00EB7D .DispatchNextQueuedEvent_Wait
+al 00EB81 .DispatchNextQueuedEvent_HaveEntry
+al 00EB65 .Return_EB65
+al 00EB5B .RestoreObjectEventContext
+al 00EB5A .UpdateObjectEventBank_Restore
+al 00EB3C .UpdateObjectEventBank
+al 00EB2F .ProcessQueuedObjectEvent_Loop
+al 00EB3B .ProcessQueuedObjectEvent_Return
+al 00EB16 .QueueDecodedObjectEventCheckActive
+al 00EAF5 .WriteFixedPpuSequence
+al 00EB00 .WriteGeneratedPpuWord
+al 00EAAF .RunDisplayTransition
+al 00EA8F .ProcessInlinePpuStream_Write
+al 00EA8C .ProcessInlinePpuStream_WriteLoop
+al 00EA89 .ProcessInlinePpuStream_DecodeCount
+al 00EA6C .ProcessInlinePpuStream_Record
+al 00EAA3 .ProcessInlinePpuStream_CheckRecord
+al 00EA26 .CopyInlineDisplayRecord_Loop
+al 00EA17 .PPUWriteString
+al 00EA0A .WriteInlinePpuBlock_Loop
+al 00EA05 .WriteInlinePpuBlockAfterAddress
+al 00EA02 .WriteInlinePpuBlock
+al 00E9FC .WritePendingPpuByte
+al 00E9E8 .SetPpuAddress_AddOffset
+al 00E9E0 .SetRelativePpuAddressFromInlineRecord
+al 00E9EF .SetPpuAddress_Write
+al 00E9D2 .WritePpuControlFromCarry
+al 00E9C7 .CopyInlineBytesToZeroPage_Loop
+al 00E9C2 .CopyInlineBytesToZeroPage
+al 00E9B1 .DecodeInlineParameters_Jump
+al 00E9B4 .ReadInlineWord
+al 00E990 .FillPpuMemoryWith26_Loop
+al 00E9DB .SetPpuAddressFromInlineRecord
+al 00E957 .UpdatePrimaryArithmeticPairAlternate_ShiftHigh
+al 00E943 .UpdatePrimaryArithmeticPairAlternate_ShiftLow
+al 00E93A .UpdatePrimaryArithmeticPairAlternate_SaveMask
+al 00E923 .UpdateSecondaryArithmeticPair_ShiftHigh
+al 00E929 .UpdateSecondaryArithmeticPair_AddHigh
+al 00E912 .UpdateSecondaryArithmeticPair_ShiftLow
+al 00E918 .UpdateSecondaryArithmeticPair_AddLow
+al 00E8FA .UpdatePrimaryArithmeticPair_ShiftHigh
+al 00E900 .UpdatePrimaryArithmeticPair_AddHigh
+al 00E8E9 .UpdatePrimaryArithmeticPair_ShiftLow
+al 00E8ED .UpdatePrimaryArithmeticPair_AddLow
+al 00E8E3 .UpdatePrimaryArithmeticPair_SaveMask
+al 00E8CB .TransformSignedComponentPair_Loop
+al 00E8C2 .TransformSignedComponentPair_SaveY
+al 00E8BB .TransformSignedComponentPair_SaveA
+al 00E8B7 .TransformSignedComponentPair
+al 00E931 .UpdatePrimaryArithmeticPairAlternate
+al 00E8B0 .RunEightRoundTransform_Loop
+al 00E88A .NormalizeSignedVector_Loop
+al 00E882 .NormalizeSignedVector_SaveSign
+al 00E86C .CalculateVectorFromRotatedMask_SaveMask
+al 00E863 .CalculateVectorFromRotatedMask_Loop
+al 00E908 .UpdateSecondaryArithmeticPair
+al 00E842 .CalculateSignedVector_Loop
+al 00E832 .CalculateSignedVector_SaveSign
+al 00E822 .CalculateSignedVector
+al 00E8DA .UpdatePrimaryArithmeticPair
+al 00E81B .CalculateVectorMagnitude_Loop
+al 00E810 .CalculateVectorMagnitude_SaveX
+al 00E802 .DivideUnsignedByte_Shift
+al 00E7FC .DivideUnsignedByte_Loop
+al 00E7F5 .DivideUnsignedByte
+al 00E7EF .CalculateScaledProduct_Next
+al 00E7E4 .CalculateScaledProduct_Loop
+al 00E7DB .CalculateScaledProduct
+al 00E7DA .AbsoluteValueAY_Return
+al 00E7C0 .HideOamSprites_Loop
+al 00E7BC .HideOamSprites
+al 00E791 .RenderSpriteRecordList_Loop
+al 00E7BB .RenderSpriteRecordList_Return
+al 00E76E .RenderingStateTable_Alternate
+al 00E761 .RenderingStateTable_Default
+al 00E761 .RenderingStateTable
+al 00E756 .InitializeRenderingState_CopyLoop
+al 00E752 .InitializeRenderingState_SaveFlags
+al 00E741 .InitializeRenderingState
+al 00E735 .ProjectObjectCoordinates_Return
+al 00E736 .ProjectObjectCoordinates_Fail
+al 00E6C1 .ProjectObjectCoordinates
+al 00E66F .DivideOrNormalizeWord_Return
+al 00E670 .DivideOrNormalizeWord_Overflow
+al 00E654 .DivideOrNormalizeWord_Shift
+al 00E64E .DivideOrNormalizeWord_CheckCarry
+al 00E644 .DivideOrNormalizeWord_Loop
+al 00E63E .DivideOrNormalizeWord
+al 00E630 .MultiplyByteBySignedWord_Shift
+al 00E61F .MultiplyByteBySignedWord_Loop
+al 00E611 .MultiplyByteBySignedWord
+al 00E60A .AdvanceRandomState_SaveLow
+al 00E5F9 .AdvanceRandomState_Loop
+al 00E5F4 .Return_E5F4
+al 00E5DF .QueueModeIndicatorTiles_Fill
+al 00E5C4 .InitializeSharedObjectMotion_Save
+al 00E965 .CalculateScaledRatio
+al 00E598 .ApplyBaseObjectGeometry_CopyCurrent
+al 00E576 .ApplyCurrentObjectGeometry_CopyPosition
+al 00E533 .StoreBaseObjectPositionAndClearMovement
+al 00E828 .CalculateSignedVectorFromResult
+al 00E510 .EvaluateGeometryDifference_VerticalReady
+al 00E509 .EvaluateGeometryDifference_HorizontalReady
+al 00E4D7 .CalculateBaseGeometryDifference
+al 00E4B2 .UseGeometryRecordOffset
+al 00E4B5 .StoreGeometryParameter
+al 00E46B .GetCurrentGeometryRecordOffset
+al 00E453 .GeometryParameterData_Block3
+al 00E433 .GeometryParameterData_Block2
+al 00E413 .GeometryParameterData
+al 00E57E .ApplyBaseObjectGeometry
+al 00E3C0 .RunSelectedObjectTransition_WaitLoop
+al 00E3BD .RunSelectedObjectTransition_GeometryClear
+al 00E3AF .RunSelectedObjectTransition_TestGeometry
+al 00E59D .InitializeSharedObjectMotion
+al 00E3AC .RunSelectedObjectTransition
+al 00E391 .ProcessCompactObjectState_LoadEntry
+al 00E39D .ProcessCompactObjectState_Consume
+al 00E379 .ProcessCompactObjectState_CompareState64
+al 00E380 .ProcessCompactObjectState_SavePending
+al 00E3AB .ProcessCompactObjectState_Return
+al 00E33F .FindAndQueueSelectedState_Found
+al 00E336 .FindAndQueueSelectedState_Search
+al 00E329 .CurrentObjectAnimationDelayTable
+al 00E30C .UpdateCurrentObjectAnimationDelay_LoadDelay
+al 00E319 .CurrentObjectAnimationBaseTable
+al 00E306 .UpdateCurrentObjectAnimationDelay_Reset
+al 00E321 .CurrentObjectAnimationLimitTable
+al 00E310 .UpdateCurrentObjectAnimationDelay_Default
+al 00E2A5 .CalculateObjectCoordinateDifference
+al 00EB0D .QueueDecodedObjectEvent
+al 00E28A .FindNearestCandidateObject_Next
+al 00E80B .CalculateVectorMagnitude
+al 00E295 .CandidateObjectOffsetTable
+al 00E264 .FindNearestCandidateObject_Loop
+al 00E25A .FindObjectStateForSelector_Previous
+al 00E252 .FindObjectStateForSelector_Search
+al 00E25D .FindObjectStateForSelector_Return
+al 00E384 .ProcessCompactObjectState_Validate
+al 00E23A .ProcessSelectedObjectState_Clear
+al 00E200 .FindEligibleObjectState_Return
+al 00E201 .TestIndexedObjectGeometry
+al 00E1FA .FindEligibleObjectState_Next
+al 00E1E9 .FindEligibleObjectState_Loop
+al 00E1E6 .TestObjectGeometryFourTimes_Return
+al 00E1D2 .TestObjectGeometryFourTimes_Loop
+al 00E1BE .ObjectStateDispatch_SaveFrame67
+al 00E1A7 .ObjectStateDispatch_SaveFrame5F
+al 00E19B .ObjectStateDispatch_SaveFirstFrame
+al 00E1C6 .ObjectStateDispatch_Object04
+al 00E15E .ObjectStateDispatch_SelectedObjectClear
+al 00E150 .ObjectStateDispatch_TestSelectedObject
+al 00E16C .ObjectStateDispatch_DifferentObject
+al 00E25E .FindNearestCandidateObject
+al 00E141 .ObjectStateDispatch_AssignState
+al 00E135 .ObjectStateDispatch_CheckSelector4
+al 00E10D .ObjectStateDispatch_FindInputIndex
+al 00E0CC .ObjectStateDispatch_CompareTables
+al 00E114 .ObjectStateDispatch_ForwardTransition
+al 00E0B7 .ObjectStateDispatch_TestState
+al 00E0F2 .ObjectStateDispatch_NextEntry
+al 00E0A8 .ObjectStateDispatch_Search
+al 00E0A5 .ObjectStateDispatch_AdvanceIndex
+al 00E098 .ObjectStateDispatch_SelectStart
+al 00E0F6 .ObjectStateDispatch_WaitLoop
+al 00E107 .ObjectStateDispatch_ForwardPath
+al 00E222 .ProcessSelectedObjectState
+al 00E089 .ObjectStateDispatch_InputActive
+al 00E074 .ObjectStateDispatch_TimerLoop
+al 00E06F .ObjectStateDispatch_StoreTimer
+al 00E06D .ObjectStateDispatch_SetTimer
+al 00E05F .ObjectStateDispatch_InitializeObject
+al 00E1E7 .FindEligibleObjectState
+al 00E331 .FindAndQueueSelectedState
+al 00E36A .ProcessCompactObjectState_TestSelector
+al 00E347 .ProcessCompactObjectState
+al 00E040 .ProcessObjectStateSelection
+al 00E049 .ObjectStateDispatch_CheckCandidate
+al 00E1CE .TestObjectGeometryFourTimes
+al 00E027 .ObjectStateResultTable
+al 00E021 .ObjectStateThresholdTable
+al 00E01D .ObjectStateLookupData
+al 00E313 .UpdateCurrentObjectAnimationAndWait
+al 00E017 .SetCurrentObjectState_Finish
+al 00E009 .SetCurrentObjectState_Retry
+al 00DFFF .SetCurrentObjectState5
+al 00DFFB .SetCurrentObjectState4
+al 00DFF7 .SetCurrentObjectState3
+al 00DFF3 .SetCurrentObjectState2
+al 00E001 .SetCurrentObjectState
+al 00DFEF .SetCurrentObjectState1
+al 00DFEB .ObjectDisplayAttributeTable
+al 00DFC4 .SignedCoordinateOffsetTable
+al 00DFBE .TransformSignedValue_Next
+al 00DFB6 .TransformSignedValue_Loop
+al 00DFAE .TransformSignedValue_HaveMagnitude
+al 00DFA7 .TransformSignedValue
+al 00DF92 .AddTransformedSignedValues
+al 00DF8A .CalculateCurrentObjectGeometry_ClearX
+al 00DF8C .CalculateCurrentObjectGeometry_SaveArguments
+al 00DF77 .CalculateCurrentObjectGeometry_RunTest
+al 00E8A5 .RunEightRoundTransform
+al 00DF80 .CalculateCurrentObjectGeometry_Clamp
+al 00DF67 .CalculateCurrentObjectGeometry_CompareMagnitude
+al 00DF7A .CalculateCurrentObjectGeometry_Nonnegative
+al 00E877 .NormalizeSignedVector
+al 00DF3C .PrepareBaseObjectGeometry
+al 00DF27 .SetupBaseObjectGeometry
+al 00DF12 .SetupCurrentObjectGeometry
+al 00DF05 .SelectObjectGeometrySize_Save
+al 00DEF8 .AssignCurrentObjectToSavedSlot
+al 00DED5 .ObjectRouting_MergeComplete
+al 00DEA7 .ObjectRouting_SaveCandidateAttribute
+al 00DEAA .ObjectRouting_UpdateCandidate
+al 00DE92 .ObjectRouting_SetCandidateAnimation
+al 00DEC8 .ObjectRouting_CandidateBelow2
+al 00E519 .BuildGeometryVectorFromArguments
+al 00DE66 .ObjectRouting_SetupCoordinates
+al 00DE84 .ObjectRouting_CandidateBelow7
+al 00DEEF .AssignCurrentObjectSlot
+al 00E037 .ObjectStateDispatch
+al 00DE4A .ObjectRouting_EnterEngine
+al 00E35A .ProcessCompactObjectState_FindAlternate
+al 00DE42 .ObjectRouting_TestRegion
+al 00DE2F .ObjectRouting_MergeSucceeded
+al 00DE1F .ObjectRouting_SaveMainFrame
+al 00DE18 .ObjectRouting_SaveFrames
+al 00DE16 .ObjectRouting_UseFrame60
+al 00DE78 .ObjectRouting_ApplyCoordinateSetup
+al 00DE4D .ObjectRouting_Alternate
+al 00DE6F .ObjectRouting_LargeCandidate
+al 00DDF7 .ObjectRouting_CompareCurrent
+al 00DDF5 .ObjectRouting_CheckCandidate8
+al 00DE55 .ObjectRouting_BaseStateAtLeast3
+al 00DDD0 .ObjectRouting_SearchSlots
+al 00DDC5 .ProcessSavedObjectAnimation_Done
+al 00DDB4 .ProcessSavedObjectAnimation
+al 00E562 .EvaluateLoadedCurrentObjectGeometry
+al 00DEFB .SelectObjectGeometrySize
+al 00DD88 .HandleSavedObject
+al 00DD8F .ProcessSavedObjectGeometry
+al 00DD80 .ObjectSelection_RestartSlots
+al 00DD7E .ObjectSelection_StatePath
+al 00DDC8 .ObjectRoutingPath
+al 00DDDF .ObjectRouting_CheckBaseState
+al 00DED8 .ObjectRouting_ReverseMovement
+al 00DD68 .ObjectSelection_CheckCurrent
+al 00DD78 .ObjectSelection_NoSavedObject
+al 00DD51 .ObjectSelection_SearchSlots
+al 00DD4D .ObjectSelectionSharedPath
+al 00DD82 .ObjectSelection_CheckActive
+al 00DD3C .AssignObjectToSlot
+al 00DD29 .FindAvailableObjectSlot_Search
+al 00DD30 .CheckSavedObjectOffset
+al 00DD21 .FindAvailableObjectSlot
+al 00DFD4 .UpdateCurrentObjectDisplayState
+al 00E548 .StoreGeometryInCurrentObject
+al 00DD4A .ContinueObjectProcessingWithDelay
+al 00E528 .StoreCurrentObjectMovement
+al 00E513 .BuildGeometryVector
+al 00DD15 .ProcessSelectedObject_SmallResult
+al 00DD07 .ProcessSelectedObject_LargeResult
+al 00E4DB .CalculateCurrentGeometryDifference
+al 00E4C2 .LoadGeometryRecord
+al 00E474 .SelectGeometryRecord_Default
+al 00DCEC .ProcessSelectedObject_Geometry
+al 00DCE0 .ProcessSelectedObject
+al 00DF45 .CalculateCurrentObjectGeometry
+al 00DD48 .ContinueObjectProcessing
+al 00DCCC .SelectActiveObject_Save
+al 00DF08 .TestCurrentObjectGeometry
+al 00DCD8 .SelectActiveObject_Alternate
+al 00DCDF .SelectActiveObject_Return
+al 00DCBA .SelectActiveObject
+al 00DCA4 .DispatchSixObjectEvents_Loop
+al 00DCA2 .DispatchSixObjectEvents
+al 00E4B8 .SelectGeometryRecordFromObject
+al 00DC97 .WaitForObjectRegionClear_Test
+al 00E2DE .UpdateCurrentObjectAnimationDelay
+al 00DC91 .WaitForObjectRegionClear
+al 00E29B .DispatchInlineObjectCommand
+al 00DC72 .InitializeObjectEventSequence_DispatchLoop
+al 00DC88 .ObjectEventSlotTable
+al 00DC60 .InitializeObjectEventSequence_ProcessEvents
+al 00DC5A .InitializeObjectEventSequence_SaveBounds
+al 00DC50 .InitializeObjectEventSequence_CheckUpper
+al 00DC31 .InitializeObjectEventSequence
+al 00DC29 .VerticalAdjustmentTable
+al 00DC28 .TestCurrentObjectCoordinateRegion_Return
+al 00DC2A .HorizontalAdjustmentTable
+al 00DC06 .TestCurrentObjectCoordinateRegion
+al 00DBF6 .SecondaryAnimationBaseTable
+al 00DBED .SecondaryObjectDelay_ResetFrame
+al 00DBFE .SecondaryAnimationLimitTable
+al 00DBF3 .SecondaryObjectDelay_Return
+al 00DBAE .TestCurrentObjectRegion_Shift
+al 00DBAF .TestCurrentObjectRegion_Return
+al 00DB8E .TestCurrentObjectRegion_Search
+al 00DB75 .ResolveCurrentObject_ZeroResult
+al 00DB84 .TestCurrentObjectRegion
+al 00DB82 .ResolveCurrentObject_Neutral
+al 00DB79 .ResolveCurrentObject_SecondaryRegion
+al 00DB7E .ResolveCurrentObject_AlternateResult
+al 00DB46 .ResolveCurrentObjectSelector
+al 00DBB0 .InputMaskTable
+al 00DB2E .CurrentObjectInputFallback
+al 00DB2C .TestCurrentObjectInput_Shift
+al 00DB17 .UpdateCurrentObjectSelectorState_Return
+al 00DAF6 .StoreCurrentObjectSelector_Return
+al 00E2D3 .ClearCurrentObjectMovement
+al 00DAC8 .StoreStateSelector
+al 00DAC3 .DisableCurrentObject
+al 00DAB4 .CountMatchingObjectStates_Next
+al 00DAAE .CountMatchingObjectStates_Loop
+al 00DAD5 .FinishSecondaryObject
+al 00DAA0 .ObjectAnimationFrameTable
+al 00DA9C .ObjectAnimationAttributeTable
+al 00DA80 .MarkMatchingObjectState_Return
+al 00E246 .FindObjectStateForSelector
+al 00DA5C .SecondaryObject_DA5C_ReturnToIndexedPath
+al 00E49A .SelectGeometryRecord_28
+al 00DA49 .SecondaryObject_DA49_CheckSelector
+al 00DA2C .SecondaryObject_DA2C_TimerLoop
+al 00DA11 .SecondaryObject_WaitForState
+al 00E4B0 .UseFixedGeometryRecord54
+al 00DA00 .SecondaryObject_SelectRetryDelay
+al 00DA06 .SecondaryObject_RunFrameHelper_DA06
+al 00D9E0 .SecondaryObject_FinishSelectorEight
+al 00D9CC .SecondaryObject_RunFrameHelper
+al 00D9A2 .SecondaryObject_ActionWait
+al 00D991 .SecondaryObject_RetryPath
+al 00D981 .SecondaryObject_RecalculateSelector
+al 00D9B3 .SecondaryObject_SelectorEight
+al 00E3DC .GetCurrentObjectSelectorAndState
+al 00D967 .SecondaryObject_AdvanceIndexedState
+al 00D997 .SecondaryObject_ActionActive
+al 00D960 .SecondaryObject_ActionStatePath
+al 00D95D .SecondaryObject_TimerPath
+al 00D94A .SecondaryObject_State86Wait
+al 00D95A .SecondaryObject_JumpToNegativeResult
+al 00D9E6 .SecondaryObject_TransitionHandler
+al 00D93C .SecondaryObject_CheckResult
+al 00D941 .SecondaryObject_Transition
+al 00DA5F .GetCurrentObjectSelector
+al 00D92B .SecondaryObject_CheckState6D
+al 00DA6D .MarkMatchingObjectState
+al 00D917 .SecondaryObject_StateLoop
+al 00E48F .SelectGeometryRecord_34
+al 00D906 .SecondaryObject_RetryGeometry
+al 00D90C .SecondaryObject_Continue
+al 00DAEB .StoreCurrentObjectSelector
+al 00DAF7 .UpdateCurrentObjectSelectorState
+al 00DAA4 .CountMatchingObjectStates
+al 00D8F4 .SecondaryObject_NoCollision
+al 00E4A5 .SelectGeometryRecord_24
+al 00DABC .CheckCurrentObjectSelector
+al 00D8DC .SecondaryObject_ProcessFrame
+al 00D8CA .SecondaryObject_TimerLoop
+al 00D8C5 .SecondaryObject_SetTimer
+al 00DA25 .SecondaryObject_NegativeResultPath
+al 00DB18 .TestCurrentObjectInput
+al 00D944 .SecondaryObject_State86Path
+al 00D8B3 .SecondaryObject_CheckFlags
+al 00D8A9 .SecondaryObject_WaitFrame
+al 00DA81 .UpdateCurrentObjectAnimation
+al 00E55F .ApplyCurrentObjectGeometry
+al 00E481 .SelectGeometryRecord_44
+al 00D8C3 .SecondaryObject_ActivateTimer
+al 00DBB8 .SelectSecondaryObjectDelay
+al 00D88D .SecondaryObject_RetryDelay
+al 00D897 .SecondaryObject_CheckRegion
+al 00DA68 .GetCurrentObjectStateIndex
+al 00D885 .UpdateSecondaryObjectState
+al 00D882 .FinishSecondaryObjectStates
+al 00D874 .CheckObjectState059B
+al 00D866 .CheckObjectState059A
+al 00D85B .ProcessSecondaryObjectStates
+al 00D84F .AnimationFrameDelayTable
+al 00D837 .AnimationFrameBaseTable
+al 00D82B .CheckLowerFrameBound
+al 00D843 .AnimationFrameLimitTable
+al 00D831 .SelectAnimationDelay
+al 00D810 .SelectAnimationFrameAndDelay
+al 00E3E8 .CopyCurrentObjectPositionToBaseAfterIndex
+al 00D7EC .WaitForVerticalPosition02
+al 00D7B2 .WaitForObjectFieldsFrame
+al 00D7AB .WaitForObjectFieldsToClear
+al 00E08B .ObjectStateDispatch_NextPath
+al 00E3E6 .InitializeBaseObjectFromCurrent
+al 00D786 .WaitForVerticalPositionF6
+al 00D783 .ExitObjectApproachState
+al 00D769 .AdvanceObjectApproachState
+al 00D734 .AddObjectProximityCount
+al 00D732 .AddDoubleObjectProximityCount
+al 00D736 .UpdateObjectCoordinateFlag
+al 00D745 .EvaluateObjectApproachCompletion
+al 00D6F5 .CheckObjectApproachState
+al 00D6EA .UpdateObjectApproachFrame
+al 00D6E8 .UpdateObjectApproachTimer
+al 00D6E4 .ResetObjectApproachTimer
+al 00D6DB .RunObjectApproachSequence
+al 00D6CB .StoreState2Actor
+al 00D6B7 .InitializeState2Actor
+al 00D69D .StoreState4Actor
+al 00D689 .InitializeState4Actor
+al 00D66A .StoreState6Actor
+al 00D656 .InitializeState6Actor
+al 00D5DC .Routine_D5DC_WaitFrame
+al 00D5D8 .WaitForMotionToSettle
+al 00D5CE .RandomMotionAngleThresholdTable
+al 00D5CD .RandomMotionAnglePadding
+al 00D5C3 .RandomMotionAngleTable
+al 00D5BE .RandomMotionThresholdTable
+al 00D5B9 .RandomMotionBaseTable
+al 00D599 .FinishRandomMotionSequence
+al 00D584 .UpdateMotionEndAnimation
+al 00E855 .CalculateVectorFromRotatedMask
+al 00D527 .CompareMotionAngleThreshold
+al 00D524 .SearchMotionAngleThreshold
+al 00D52D .SelectRandomMotionOffset
+al 00D510 .StartRandomMotion
+al 00D504 .SearchMotionThreshold
+al 00D4D5 .UpdateFielderAnimationCounters
+al 00D4E7 .ReverseFielderAnimation
+al 00D4FF .SelectRandomMotionParameters
+al 00D4BE .UpdateFielderAnimationFrame
+al 00D4B4 .CheckFielderAnimationState
+al 00D4AD .AdvanceFielderAnimationCycle
+al 00D4A6 .WaitForFielderInput
+al 00D49E .ResetFielderAnimationCounters
+al 00D478 .RunFielderAnimationSequence
+al 00D46A .RunActorAlternateDelay
+al 00D453 .RunActorFinalDelay
+al 00D448 .RunActorDelayCountdown
+al 00D475 .FinishControlledActorDelay
+al 00D461 .SelectActorAlternateDelay
+al 00D41D .WaitForActorDescent
+al 00D414 .WaitForActorAscent
+al 00D407 .SelectControlledActorDelay
+al 00D3FC .Routine_D3FC_InitialDelay
+al 00D3F8 .RunControlledActorDelay
+al 00D3E8 .Routine_D3E8_UpdateObject
+al 00D3CB .Routine_D3CB_AddVertical
+al 00D3F3 .ControlledVerticalOffsetTable
+al 00D3C1 .Routine_D3C1_Vertical
+al 00D399 .Routine_D399_AddHorizontal
+al 00D3F0 .ControlledHorizontalOffsetTable
+al 00D38B .Routine_D38B_FindIndex
+al 00D382 .MoveControlledObject
+al 00D355 .Routine_D355_State1
+al 00D367 .Routine_D367_State2
+al 00D373 .Routine_D373_State3
+al 00D352 .Routine_D352_NextEntry
+al 00D344 .Routine_D344_SearchEntries
+al 00D361 .Routine_D361_TestBits
+al 00D339 .ObjectActionLookupTable
+al 00D33C .DispatchActionType
+al 00D2F9 .SaveBatterAction
+al 00D2F7 .UseBatterInputAction
+al 00D2DB .FindAvailableBatterActionSlot
+al 00D2D9 .SelectBatterActionSlot
+al 00D32A .SelectActionFromObjectState
+al 00D2BF .CheckActiveFieldObjects
+al 00D2D4 .UseBatterControllerInput
+al 00D2B2 .WaitForBatterAction
+al 00D2AD .SelectBatterAction
+al 00D28F .CheckPitchVerticalLimit
+al 00D28B .SetPitchMovementFlags
+al 00D285 .ApplyPitchLeftInput
+al 00D27D .ApplyPitchHorizontalInput
+al 00D27B .UsePitchControllerInput
+al 00D265 .UpdatePitchMovement
+al 00D2A7 .PitchDelayTable
+al 00D2A4 .PitchVelocityBiasTable
+al 00D2AA .PitchRenderFlagTable
+al 00D225 .PitchStartAnimationLoop
+al 00D212 .AnimatePitchStart
+al 00D1FD .SearchPitchDirectionThresholds
+al 00D1ED .SearchPitchTypeThresholds
+al 00D1EA .SelectPitchType
+al 00D1E1 .FindAvailablePitchState
+al 00D20A .UseControllerPitchSelection
+al 00D1D0 .SelectPitchAction
+al 00D1C8 .FinishWindupSequence
+al 00D19A .RunWindupAlternateFrame
+al 00D1A2 .SetWindupFrame
+al 00D18B .RunPitcherWindupSequence
+al 00D171 .ClearPrimaryActorState
+al 00D167 .InitializePrimaryGameplayActor
+al 00D162 .PitchTypeResultTable
+al 00D15D .PitchTypeThresholdTable
+al 00D154 .PitchDirectionResultTable
+al 00D14B .PitchDirectionThresholdTable
+al 00D14A .ConditionalObjectInitReturn
+al 00D125 .ObjectInitTable_End
+al 00D11E .ObjectInit_D11E
+al 00D117 .ObjectInit_D117
+al 00D110 .ObjectInit_D110
+al 00D109 .ObjectInit_D109
+al 00D102 .ObjectInit_D102
+al 00D0FB .ObjectInit_D0FB
+al 00D0F4 .ObjectInit_D0F4
+al 00D0ED .ObjectInit_D0ED
+al 00D0E6 .ObjectInit_D0E6
+al 00D0DF .ObjectInit_D0DF
+al 00D0D8 .ObjectInit_D0D8
+al 00D0D1 .ObjectInit_D0D1
+al 00D0CA .ObjectInit_D0CA
+al 00D0C3 .ObjectInit_D0C3
+al 00D0BC .ObjectInit_D0BC
+al 00D0B5 .ObjectInit_D0B5
+al 00D0AE .ObjectInit_D0AE
+al 00D0A7 .ObjectInit_D0A7
+al 00D0A0 .ObjectInit_D0A0
+al 00D09A .AdvanceObjectInitRecord
+al 00D09F .ObjectInitializationReturn
+al 00D0A0 .ObjectInitializationTable
+al 00D06C .InitializeNextObjectRecord
+al 00D047 .ConvertSharedCounterToDigits
+al 00D028 .DisplaySharedCounter
+al 00D01F .Routine_D01F_SubtractTen
+al 00D00B .SelectSharedCounterQueueOffset
+al 00CFFB .SelectPlayerDisplayQueueOffset
+al 00CFEB .StoreCounterDisplayDigits
+al 00CFE7 .BlankLeadingCounterDigit
+al 00D01D .DivideABy10
+al 00CFB6 .SaveSaturatedSideCounter
+al 00CF5C .QueueThreeBlanks
+al 00CF3A .QueueStateMarkerEntry
+al 00CF18 .Routine_CF18_SaveIndex
+al 00CF0B .AnnouncementTextSafe
+al 00CF05 .AnnouncementTextChange
+al 00CEFF .AnnouncementTextDeadBall
+al 00CEF9 .AnnouncementTextThreeBase
+al 00CEF3 .AnnouncementTextTwoBase
+al 00CEED .AnnouncementTextSingle
+al 00CEE7 .AnnouncementTextWalk
+al 00CEE1 .AnnouncementTextBall
+al 00CEDB .AnnouncementTextOut
+al 00CED5 .AnnouncementTextStrike
+al 00CECF .AnnouncementTextFoul
+al 00CEC9 .AnnouncementTextBlank
+al 00CEC9 .AnnouncementTextTable
+al 00CEBC .CopyAnnouncementText
+al 00CEAC .DisplaySecondaryAnnouncement
+al 00CEAE .QueueAnnouncementText
+al 00CEA5 .DisplayAnnouncementPair
+al 00CE91 .SaveAnnouncementAudioFlag
+al 00CE8B .CheckAnnouncement18
+al 00CE85 .CheckAnnouncement0C
+al 00CE7F .CheckAnnouncement42
+al 00CE79 .CheckAnnouncement12
+al 00CE9C .DisplayBlankAnnouncement
+al 00CE71 .MapAnnouncementToAudioFlag
+al 00CE46 .FindReadyAnnouncement
+al 00CE38 .WaitAnnouncementDelay
+al 00CE36 .ReloadAnnouncementDelay
+al 00CE32 .RunEventAnnouncementLoop
+al 00CE1A .CelebrationPaletteSequence
+al 00CDF5 .WaitCelebrationColorFrame
+al 00CDEE .SaveCelebrationColorIndex
+al 00CDEC .ResetCelebrationColorIndex
+al 00CDBD .HomeRunAnimationLoop
+al 00CDA4 .RunHomeRunCelebration
+al 00CD98 .StartHomeRunSequence
+al 00CD7B .WaitForStateAnimation
+al 00CD4F .LoadStateAnimationParameters
+al 00CD42 .RunSelectedStateAnimation
+al 00CD41 .Routine_CD41_Return
+al 00CD2E .QueueSelectedStateMarker
+al 00CD2B .StateVerticalHighTable
+al 00CD28 .StateVerticalLowTable
+al 00CD25 .StateHorizontalHighTable
+al 00CD22 .StateHorizontalLowTable
+al 00CD51 .StoreStateAnimationParameters
+al 00CD18 .DispatchStateSelectorAnimation
+al 00CD17 .Routine_CD17_Return
+al 00CD09 .Routine_CD09_OneTimeCommand
+al 00CF45 .ClearBothStateFields
+al 00CD02 .Routine_CD02_OptionalSetup
+al 00CCC9 .RunDualStateAnimationTail
+al 00CCB9 .RunDualStateAnimation
+al 00CCB8 .Routine_CCB8_Return
+al 00CE22 .FinishStateProgression
+al 00CF2A .QueueSecondaryStateMarker
+al 00CCAA .Routine_CCAA_OneTimeCommand
+al 00CC7A .AdvanceDualStateSequence
+al 00E738 .ConvertObjectOffsetToDisplayIndex
+al 00CF23 .QueuePrimaryStateMarker
+al 00CC58 .QueueSecondaryStateEvent
+al 00CC4D .AdvanceSecondaryStateSequence
+al 00CC3C .RunPrimaryStateDelay
+al 00CC3B .Routine_CC3B_Return
+al 00CF11 .AddTimedStateEvent
+al 00CF2F .BuildStateMarkerEntries
+al 00CC2A .QueuePrimaryStateEvent
+al 00CF4A .ClearPrimaryStateField
+al 00CC20 .HandleEarlyPrimaryState
+al 00CC01 .AdvancePrimaryStateSequence
+al 00E502 .EvaluateGeometryDifference
+al 00E4DD .CalculateGeometryDifference
+al 00CBEA .TestCurrentObjectCollision
+al 00CBA5 .Routine_CBA5_SecondPositive
+al 00CB86 .Routine_CB86_FirstPositive
+al 00CBC4 .IntegrateFixedPointObject
+al 00CB63 .Routine_CB63_UpdateLoop
+al 00CB7D .PrepareFixedPointObject
+al 00CB39 .SimulateObjectTrajectories
+al 00CB2E .QueueNegativeResultCommand
+al 00CCE4 .AdvanceAlternateStateSequence
+al 00CB1E .ApplyNegativeTrajectoryResult
+al 00CB35 .TrajectoryResultTable
+al 00CB34 .TrajectoryResultReturn
+al 00CAC7 .FinishTrajectorySequence
+al 00CAA1 .QueueNegativeTrajectoryCommand
+al 00CAAA .QueueLaterTrajectoryCommand
+al 00CAB0 .WaitForTrajectoryLimit
+al 00CBEC .TestObjectCollision
+al 00CA77 .UpdateTrajectoryFrame
+al 00CA54 .AdvanceTrajectoryPhase
+al 00CA4C .RunBaseTrajectorySequence
+al 00CA2A .InitializeBaseMotion
+al 00CA2F .StoreBaseMotionInitialization
+al 00CA23 .InitializeBaseMotionZero
+al 00E7CB .AbsoluteValueAY
+al 00CA20 .ObjectMergeFailed
+al 00C9C0 .TryMergeObjectIntoBase
+al 00C9A7 .LoadObjectPositionInline
+al 00C963 .LoadBasePositionFieldsInline
+al 00C959 .ClearBaseMotionFields
+al 00C985 .LoadBaseMotionFieldsInline
+al 00C93A .QueueAlternateDirectionRecord
+al 00C92F .SaveDirectionSelection
+al 00C926 .SelectRandomDirectionBit
+al 00C92C .UseRandomDirectionSignBit
+al 00C914 .QueueAlternateRandomStateRecord
+al 00C8EF .Routine_C8EF_BuildRandomBits
+al 00C8EA .Routine_C8EA_NextEntry
+al 00C8E5 .Routine_C8E5_Done
+al 00C8C6 .Routine_C8C6_ReadRecord
+al 00E99A .DecodeInlineParameters
+al 00C8B1 .Routine_C8B1_SaveResult
+al 00C8A8 .Routine_C8A8_SearchValues
+al 00C8A4 .Routine_C8A4_NextEntry
+al 00C899 .CalculateOppositeControllerAssignment
+al 00C8A1 .ControllerAssignmentReturn
+al 00C86F .FillBackgroundBlock
+al 00EA3E .AllocateDisplayBufferRecord
+al 00C860 .FillNextBackgroundBlock
+al 00C83A .SavePlayerSelection
+al 00C832 .ApplySelectionDecrement
+al 00C81D .SelectPlayerSelectionEntry
+al 00C81A .UpdatePlayerSelections
+al 00C7BF .InitializeNextSpriteSortIndex
+al 00C7B3 .InitializeSpriteSortIndexLoop
+al 00C783 .WaitForTitleInputRelease
+al 00E5CF .QueueModeIndicatorTiles
+al 00C77A .RefreshTitleScreen
+al 00E985 .FillPpuMemoryAfterValueSaved
+al 00C737 .ResultsDelayLoop
+al 00C708 .InitializeResultsPosition
+al 00C6CC .AdvanceRoundNumber
+al 00C6C5 .CheckPostRoundContinuation
+al 00C6A5 .ProcessPostRoundEvents
+al 00C691 .WaitPostRoundFrame
+al 00CFA6 .UpdateCountersAndDisplay
+al 00C68D .StartPostRoundDelay
+al 00C67E .ApplyPendingScoreUpdate
+al 00EB66 .DispatchNextQueuedEvent
+al 00C6E1 .RoundEventSlotTable
+al 00C66A .ProcessRoundEventSlotTable
+al 00D126 .InitializeConditionalObject
+al 00D610 .InitializeSecondaryActors
+al 00C619 .RunPrimaryRoundHandlers
+al 00C8A2 .InitializeObjectStateLookup
+al 00C605 .CheckRoundTransitionState
+al 00C5FE .RunRoundStateLoop
+al 00D069 .InitializeDefaultObjects
+al 00C6F7 .CompleteMatchState
+al 00C5F1 .FinishGameplayReset
+al 00C5DC .ClearObjectMotionFields
+al 00C7C9 .ClearEightCharacterField
+al 00C5BA .ResumeRoundSetupAtSelectionDisplay
+al 00CF51 .ClearStateFieldPair
+al 00C91B .QueueRandomDirectionRecord
+al 00C5A4 .ResumeRoundSetupAtRandomDirection
+al 00CF67 .QueueRoundNumberDisplay
+al 00C57F .ResetGameplayState
+al 00C904 .QueueRandomStateRecord
+al 00C571 .StoreRoundMusicCue
+al 00C573 .PrepareRoundObjects
+al 00EB41 .StoreObjectEventBankValue
+al 00D06B .InitializeObjectsFromTable
+al 00C536 .ResetRoundCounters
+al 00C566 .SelectRoundMusicCue
+al 00C52A .EnableRoundAudio
+al 00C51E .InitializeRoundState
+al 00CF8B .QueuePlayerValueDisplay
+al 00C8E8 .InitializeRandomBitfields
+al 00C7DD .QueuePlayerSelectionDisplay
+al 00C85A .FillSelectionBackgroundBlocks
+al 00C4FF .WaitForPlayerSelection
+al 00C4F5 .StartPlayerSelection
+al 00C4EC .DeriveSelectedSideFromMode
+al 00C50C .CompleteMatchSetup
+al 00C4CE .SelectDistinctSecondPlayerValue
+al 00C850 .Random0To5
+al 00E978 .EnableNmiAndWaitForFrame
+al 00C4B9 .InitializeMatchState
+al 00EA63 .ProcessInlinePpuStream
+al 00E983 .FillPpuMemoryWith26
+al 00C4AA .InitializeSessionDisplay
+al 00EB9D .InitializeQueuedEventSystem
+al 00C496 .CheckStartInputSign
+al 00EB4C .SelectObjectEventBank0
+al 00C489 .WaitForStartInput
+al 00EB4E .UpdateObjectEventBank_Exchange
+al 00EA17 .CopyInlineDisplayRecord
+al 00EB48 .SelectObjectEventBank1
+al 00C43F .RunAttractMessageLoop
+al 00C43E .IRQ
+al 00C74A .InitializeTitleScreen
+al 00C8BB .ExpandRecordPointerList
+al 00E96C .DisablePpuRendering
+al 00C7B1 .InitializeSpriteSortTables
+al 00C416 .Reset_ClearPageLoop
+al 00C40B .Reset
+al 00C3FC .AddIntegratedPosition
+al 00C3DC .SaveVelocitySignExtension
+al 00C3D3 .CalculateSignedVelocityDelta
+al 00E5F5 .AdvanceRandomState
+al 00C3BB .HideUnusedOamSpriteLoop
+al 00C3C7 .FinishFrameRendering
+al 00C3B9 .HideUnusedOamSprites
+al 00C38E .CopyStatusOamData
+al 00E77B .RenderSpriteRecordList
+al 00C366 .RenderNextSortedObject
+al 00C35D .ContinueObjectDepthSort
+al 00C33C .SortNextObjectPair
+al 00C331 .OAMTemplate_C331
+al 00C386 .FinalizeOamAndPpuQueue
+al 00C32A .FinishSelectionOam
+al 00C2FB .CopySelectionOamTemplate
+al 00C339 .SortObjectsByY
+al 00C3AA .TerminatePpuUpdateQueue
+al 00F94D .FrameOamTemplate_F94D
+al 00C2E6 .CopyTransitionOamTemplate
+al 00C2F5 .CheckOamBuildMode
+al 00C2DE .BuildFrameOam
+al 00C2CA .StoreSecondaryAnimationTile
+al 00C2D7 .SetFinalBaseObjectTile
+al 00E695 .BuildBaseMovementTransforms
+al 00C2A0 .StorePrimaryAnimationTile
+al 00C2A3 .SelectSecondaryAnimationTile
+al 00E673 .BuildCurrentMovementTransforms
+al 00C27B .SaveBaseObjectRenderFlags
+al 00C2D0 .SetDefaultBaseObjectTile
+al 00C265 .UpdateBaseObjectSprites
+al 00E6B7 .ClearMovementTransforms
+al 00C255 .UpdateNextGameplayObject
+al 00C253 .UpdateAllGameplayObjects
+al 00E746 .InitializeRenderingStateFromCarry
+al 00C249 .CommitSignedPositionDelta
+al 00C237 .SubtractPositionThreshold
+al 00C23A .SaveSignedPositionDelta
+al 00C94F .ClearBasePositionFields
+al 00C943 .ClearBaseAccelerationFields
+al 00C215 .AdvanceBaseMotionPhase
+al 00CAD2 .EvaluateTrajectoryResult
+al 00C1F0 .DoubleVerticalVelocity
+al 00C1D0 .DoubleHorizontalVelocity
+al 00C228 .UpdatePositionSignState
+al 00C1A4 .ReflectBaseMotionValues
+al 00C3CA .IntegrateObjectVelocityAndPosition
+al 00C18D .UpdateBaseMotionSequence
+al 00C17B .AddObjectVerticalDelta
+al 00C165 .AddObjectHorizontalDelta
+al 00C15D .IntegrateObjectPositionLoop
+al 00EB6A .CommonEngineExit
+al 00C15B .IntegrateAllObjectPositions
+al 00C151 .UpdateNextShortCountdown
+al 00C149 .UpdateShortCountdowns
+al 00EB15 .QueueDecodedObjectEventSelectIndex
+al 00C144 .UpdateNextObjectTimer
+al 00C137 .UpdateObjectTimerLoop
+al 00C122 .UpdateFrameObjectsAndTimers
+al 00C118 .NMI_StoreSecondObject
+al 00C10A .NMI_StoreFirstObject
+al 00C87E .CalculateControllerAssignments
+al 00EB0A .QueueInlineObjectEvent
+al 00C11C .NMI_RestoreRegisters
+al 00EB2A .ProcessQueuedObjectEvent
+al 00C49C .InitializeNewSession
+al 00C0E7 .NMI_RunCommand0B
+al 00C0EC .NMI_CheckState
+al 00C0CA .NMI_UpdateControllerState
+al 00C0B3 .NMI_ReadControllers
+al 00F9D0 .InitializeAudioEngine
+al 00C081 .NMI_ReadPacketLoop
+al 00C072 .NMI_WritePacket
+al 00C07E .NMI_ReadPacket
+al 00C08D .NMI_QueueDone
+al 00C055 .NMI_PacketLoop
+al 00C046 .NMI
+al 00C036 .CalculateRandomizedPitchMotion
+al 00C030 .TeamSelectionSpriteXTable
+al 00C02A .TeamSelectionSpriteTileTable
+al 00C024 .TeamInitialTileTable
+al 00C000 .TitleCopyrightPpuStream
diff --git a/Baseball (UE)/copilot/reconstructed.map b/Baseball (UE)/copilot/reconstructed.map
new file mode 100644
index 0000000..1ad1cc6
--- /dev/null
+++ b/Baseball (UE)/copilot/reconstructed.map	
@@ -0,0 +1,32 @@
+Modules list:
+-------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
+prg.o:
+    PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
+
+
+Segment list:
+-------------
+Name                   Start     End    Size  Align
+----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
+PRG                   00C000  00FFFF  004000  00001
+
+
+Exports list by name:
+---------------------
+
+
+
+Exports list by value:
+----------------------
+
+
+
+Imports list:
+-------------
+
diff --git a/Baseball (UE)/copilot/reconstructed.nes b/Baseball (UE)/copilot/reconstructed.nes
new file mode 100644
index 0000000..08fab2d
Binary files /dev/null and b/Baseball (UE)/copilot/reconstructed.nes differ
diff --git a/Baseball (UE)/copilot/rom.nes b/Baseball (UE)/copilot/rom.nes
new file mode 120000
index 0000000..8a34dbc
--- /dev/null
+++ b/Baseball (UE)/copilot/rom.nes	
@@ -0,0 +1 @@
+../baseball.nes
\ No newline at end of file
diff --git a/Bomberman (U)/OVERVIEW.md b/Bomberman (U)/OVERVIEW.md
new file mode 100644
index 0000000..eb82dd0
--- /dev/null
+++ b/Bomberman (U)/OVERVIEW.md	
@@ -0,0 +1,335 @@
+# Bomberman (U) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Bomberman (U) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/main.s` in the repository.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Vertical (per header byte $01) |
+| PRG bank start | CPU $C000 |
+| Source file | `copilot/main.s` (8,070 lines, ~614 KB) |
+| Output | `reconstructed_bomberman.nes` (24,592 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $C01A | `NmiHandler` |
+| RESET | $C000 | `Reset` |
+| IRQ / BRK | $FFF9 | `IrqHandler` (just `rti` — unused) |
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles and links successfully, producing `reconstructed_bomberman.nes` (24,592 bytes).
+
+**Verification result:** The reconstructed ROM is **byte-identical** to `bomberman.nes` — headers, CHR, and all 16,384 PRG bytes match exactly.
+
+### Naming fixes applied
+
+| Change | Location | Reason |
+|--------|----------|--------|
+| `RandomState0` kept at `$54`; added `RandomStateAlt = $E4` | `locals.inc` | Zero-page reuse: `$54` is the random-state byte used by most code; `$E4` is a distinct byte decremented at CPU `$E71B` |
+| `dec RandomState0` → `dec RandomStateAlt` | `main.s:6972` | The original ROM has `dec $E4` at CPU `$E71B`, not `dec $54` |
+| `ControllerState` → `ControllerState1` | `main.s` (16 refs) | Clarifies this is controller port 1; added `ControllerState2 = $13` for port 2 |
+| `Main_HandleControl_C368` → `MainGameLoop` | `main.s` (3 refs) | Main per-frame game loop entry point |
+| `Gameplay_HandleControl_C79D` → `GameplayUpdate` | `main.s` (4 refs) | Gameplay object dispatcher/update |
+| `Sound_HandleControl_E65F` → `SoundUpdate` | `main.s` (3 refs) | Sound engine update called from NMI |
+
+---
+
+## 3. Reset — CPU $FFFC → $C000
+
+**`Reset`** ($C000)
+
+On power-on or reset:
+
+1. `sei` — disable maskable interrupts.
+2. `lda #$00 / sta PPUMASK / sta PPUCTRL` — disable PPU rendering and NMI.
+3. `cld` — clear decimal mode.
+4. `ldx #$FF / txs` — initialize stack pointer to $FF.
+5. **Wait for two startup VBlanks** — `WaitForFirstStartupVBlank` ($C00D) and `WaitForSecondStartupVBlank` ($C012) each poll `PPUSTATUS` ($2002) for the VBlank bit.
+6. `jmp InitializeSystemAndRunMainLoop` ($C30C) — transfer control to the system initializer.
+
+---
+
+## 4. System Initialization — `InitializeSystemAndRunMainLoop` ($C30C)
+
+This is the main entry point after reset:
+
+1. **Clear RAM** — writes $00 to zero page and a range of RAM via an indirect pointer at $E0/$E1 (loops through $00–$FF pages).
+2. `jsr InitializeVideoSystem` ($C1F2) — disables rendering, clears shadow OAM, uploads the system palette, enables NMI.
+3. `jsr InitializeApu` ($E642) — silences all APU channels, resets sound delay/state variables.
+4. Sets up the sound dispatch index and writes zero to sound state variables ($E0–$E3).
+5. Sets stack pointer to $FF, enables APU ($4015 = $0F).
+6. `jsr ComposeStatusScreen` ($DE83) — draws the initial status/title screen.
+7. `jsr EnableNmiInPpuControl` ($C2B0) — enables NMI via PPUCTRL shadow.
+8. Sets `GameplayActive`-style flag $72 = $01.
+9. Enters the main loop at `Main_HandleControl_C368` ($C368).
+
+---
+
+## 5. NMI / Frame Heartbeat — `NmiHandler` ($C01A)
+
+The NMI fires once per frame and is the central real-time driver:
+
+1. **Save registers** (A, X, Y on stack).
+2. Set `FrameSyncFlag` ($0B) = $00.
+3. Set OAM address to $00.
+4. **Sprite DMA path** — if $60 is zero, write OAM entry $0700–$0703 (sprite #0 at Y=$F8) and trigger OAMDMA ($4014 = $07).
+5. **VRAM transfer path** — if $14 ≠ $15, transfer VRAM data from a table at $0600–$0607, indexing into pointer data at $D9C6–$D9C9. Handles both write and read packet types.
+6. **Screen state / NMI work pending** — based on $72 and $60, transfers various VRAM data blocks (title screen, gameplay screen, etc.) using `SetPpuAddress` ($C196).
+7. **PPU status / audio** — reads PPUSTATUS, commits PPU state and scroll via `CommitPpuStateAndScroll` ($C296), increments a frame counter at $33, handles audio channel timing at $69/$6A.
+8. `jsr Ppu_WriteZp10_C19D` ($C19D) — reads and debounces both controller ports, stores results in `ControllerState` ($12) and $13.
+9. `jsr Gameplay_ReadZpB2_E4C7` ($E4C7) — gameplay input handling.
+10. `jsr Sound_HandleControl_E65F` ($E65F) — sound engine update.
+11. **DMC control** — if $38 and $59 are zero, starts DMC playback ($4010 = $0E, DMC address $C000, length $FF, enable channels).
+12. **PPU scroll wait** — if $60 is set, waits for VBlank (polls PPUSTATUS bit 6), then applies scroll from $0E/$0F.
+13. Toggles $DB with EOR #$05 (frame parity / flip-flop flag).
+14. **Restore registers, `rti`.**
+
+### Controller reading (`Ppu_ReadControllerAndReturnA_C1BF` / $C1BF)
+- Strobes JOY1 ($4016) with $01 then $00.
+- Reads 8 bits per controller, shifting into X.
+- `Ppu_HandleControl_C1EB` masks to the low 2 bits ($03) and increments X if non-zero (button press detection).
+- Port 1 result → `ControllerState` ($12); port 2 result → $13.
+
+---
+
+## 6. Main Loop
+
+The main loop starts at **`Main_HandleControl_C368`** ($C368):
+
+```
+Main_HandleControl_C368 ($C368):
+    wait until ControllerState ($12) is nonzero (button pressed)
+    └─ branch on SELECT ($20) to toggle $5F
+    └─ decrement sub-delay $71 / main delay $70
+    └─ when delays expire, increment $59 (game mode / screen state)
+```
+
+Based on `$59` and `$5F`, the loop dispatches to:
+- `RunMenuSelectionScreen` ($DA8E) — title/menu screen
+- Gameplay initialization paths ($C3B6–$C5FF) — sets up object positions, stage, sound
+- `Main_WriteStageCounter_C613` ($C613) — stage counter display
+
+The core per-frame gameplay dispatch uses a **state table** at `MainStateDispatchTable` ($C75D–$C79C), which maps state indices to handler sub-indices ($00–$27). Gameplay object processing walks arrays at $03E6 (state), $0436, $0486 (X/Y position), $04D6, $0526 (timer/flags), with up to 80 ($4F) object slots.
+
+Key main-loop subroutines:
+- `Main_ReadGameMode_C60B` ($C60B) — waits for $B5 (frame delay) to reach zero.
+- `Main_WriteStageCounter_C613` ($C613) — updates stage counter, handles START button to begin gameplay.
+- `Gameplay_HandleControl_C79D` ($C79D) — main gameplay object dispatcher (80 slots).
+- `Gameplay_Dispatch_C7A4` / `Gameplay_Dispatch_C835` — object state dispatch.
+- `Stage_WriteObjectWorkX_D8FC` ($D8FC) — object work initialization.
+
+---
+
+## 7. Gameplay Systems
+
+### Object management
+- Up to 80 object slots ($00–$4F), tracked by state at $03E6,X.
+- Position arrays: $0436,X / $0486,X (X/Y), $04D6,X (state/flags), $0526,X (timer/direction).
+- `Stage_WriteObjectWorkX_D8FC` ($D8FC) initializes object work fields.
+- Objects are processed in a loop with `dex`/index retreat patterns ($C756, $C8A6).
+
+### Bomb / explosion / player mechanics
+Referenced throughout the gameplay code:
+- `Gameplay_HandleControl_C96A`, `Gameplay_HandleControl_CA1B`, `Gameplay_HandleControl_C79D` — player/bomb input and state.
+- `Object_WriteStageProgress_CFB0` ($CFB0) — stage progress tracking.
+- `Frame_ReadObjectIndex_CE5B` ($CE5B), `Frame_ReadObjectX_CDD4` ($CDD4) — frame-based object reading.
+
+### Stage system
+- `Stage_ReadZp58_D69A` ($D69A) — stage data lookup.
+- Stage counter display via `Main_WriteStageCounter_C613`.
+
+---
+
+## 8. Audio / Sound Engine
+
+### `InitializeApu` ($E642)
+- Clears DMC direct register ($4011), sound delays $E1–$E3.
+- Silences pulse 1, pulse 2, triangle, noise channel controls ($4000, $4004, $4008, $400C).
+- Enables APU channels ($4015 = $0F).
+
+### `Sound_HandleControl_E65F` ($E65F)
+- Loops over 3 sound channels (X = 2 down to 0).
+- Decrements per-channel delay at $E1,X.
+- When delay expires, reads sound command state from $DF:
+  - If $DF < 0 → read sound RAM pointer ($E6BC table).
+  - If $DF == 3 → write sound command state.
+  - Otherwise → return or handle based on $E0 (indirect pointer).
+- Calls into sound dispatch via `SoundDispatchAddressTable` ($E6AD–$E6C8).
+
+### Sound dispatch table (`SoundDispatchAddressTable`, $E6AD)
+A jump table of 14 sound handler addresses (e.g., $E641, $E6C8, $E6CC, $E6DE, $E727, $E766, $E792, $E7AB, etc.), each handling a specific sound effect or music channel.
+
+### Channel-specific sound paths
+- `Sound_UpdateAudioChannelPath_E6CF` ($E6CF) — noise channel ($400E–$400F).
+- `Sound_UpdateAudioChannelPath_E6DF` ($E6DF) — pulse 2 channel: sets sweep ($4005 = $84), timer lo/hi ($4006/$4007), noise period/length.
+- `Sound_UpdateAudioChannelPath_E70B` ($E70B) — decrements `RandomState0`, reconfigures pulse 2 when expired.
+
+### Sound state (zero page)
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $DF | SoundCommandState | Sound command / state |
+| $E0 | SoundDispatchIndex / IndirectPtrLo | Sound dispatch pointer low |
+| $E1–$E3 | SoundDelay0–2 | Per-channel sound delays |
+
+---
+
+## 9. PPU / Rendering
+
+### `InitializeVideoSystem` ($C1F2)
+- `jsr DisableRendering` ($C257) — wait for VBlank, turn off PPUMASK.
+- `jsr Ppu_HandleControl_C2B9` ($C2B9) — apply PPUCTRL shadow with NMI disabled.
+- Set PPUCTRL shadow ($0C) = $10, clear $0E/$0F/$14/$15.
+- `jsr HideAllSprites` ($C268) — fills $0700–$07FF with $F8 (offscreen) in 32-byte strides.
+- `jsr UploadSystemPalette` ($C2C3) — uploads 32 bytes of palette data from `SystemPaletteData` ($C2E7) to $3F00–$3F1F.
+- `jsr EnableNmiInPpuControl` ($C2B0) — enable NMI.
+
+### `CommitPpuStateAndScroll` ($C296)
+- Writes `PpuMaskShadow` ($0D) to PPUMASK ($2001).
+- Sets PPU address to $0000, writes $00 to $2005 twice (scroll).
+- Writes `PpuCtrlShadow` ($0C) to PPUCTRL ($2000).
+
+### Palette data (`SystemPaletteData`, $C2E7)
+32 bytes of NES palette colors starting at $3F00.
+
+---
+
+## 10. Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $0B | FrameSyncFlag | NMI frame sync |
+| $0C–$0D | PpuCtrlShadow / PpuMaskShadow | PPU register shadows |
+| $12 | ControllerState1 | Controller port 1 state |
+| $13 | ControllerState2 | Controller port 2 state |
+| $14–$15 | VramReadOffset / VramWriteLimit | NMI VRAM-transfer window (index + limit) |
+| $16 | NmiPathSelector | Selects NMI sub-path (sprite DMA vs VRAM data) |
+| $1F–$20 | (unnamed) | Object X/Y temp |
+| $28–$2C | (unnamed) | Object spawn parameters |
+| $29–$2B | (unnamed) | Object coordinates |
+| $33 | FrameCounter | Frame tick counter |
+| $34 | IndirectPtrHi | Pointer high (used by sound/object) |
+| $36 | (unnamed) | Object X temp |
+| $38 | (unnamed) | DMC / audio flag |
+| $39 | (unnamed) | Stage counter flag |
+| $3C–$3F | (unnamed) | Delay counters |
+| $54–$57 | RandomState0–3 | PRNG state (4-byte RNG) |
+| $59 | GameMode | Game mode / screen state |
+| $5A | (unnamed) | Stage / level |
+| $5B | (unnamed) | Object X bound |
+| $5C–$5E | (unnamed) | Object state flags |
+| $5F | (unnamed) | Menu toggle |
+| $60 | NmiWorkPending | NMI VRAM-transfer work pending flag |
+| $61–$6A | (unnamed) | Object init / temp |
+| $68–$70 | MainDelay / SubDelay | Main loop delay counters |
+| $72 | ScreenState | Screen state flag |
+| $73 | ObjectXLimit | Object X limit |
+| $76–$7A | (unnamed) | Object position/state |
+| $7D–$7E | (unnamed) | Bomb / object state |
+| $78–$7C | (unnamed) | Player / bomb coords |
+| $79–$7A | (unnamed) | Player position |
+| $93 | StageCounter | Stage counter |
+| $94 | (unnamed) | Audio / object |
+| $9C–$9F | ObjectWork0–3 | Object work fields |
+| $A0–$A7 | (unnamed) | Object work / bonus |
+| $A4 | BonusTimer | Bonus timer |
+| $AC–$AE | (unnamed) | Audio data pointers |
+| $B0 | GameModeCounter | Game mode counter |
+| $B1 | ObjectType | Object type |
+| $B2 | (unnamed) | Audio flag |
+| $B5 | FrameDelay | Frame delay |
+| $DB | FrameParity | Frame parity toggle (NMI toggles each frame) |
+| $DF | SoundCommandState | Sound command state |
+| $E0–$E3 | SoundDispatchIndex / SoundDelay0–2 | Sound dispatch & delays |
+| $E4 | RandomStateAlt | Alternate random-state byte (dec'd at CPU $E71B; distinct from RandomState0 at $54) |
+
+---
+
+## 11. Data Tables
+
+| Label | Address | Description |
+|-------|---------|-------------|
+| `InesHeader` | $C000–$C00F | iNES header (embedded in source) |
+| `SystemPaletteData` | $C2E7–$C306 | 32-byte palette for $3F00 |
+| `MainStateDispatchTable` | $C75D–$C79C | 64-byte gameplay state dispatch table |
+| `SoundDispatchAddressTable` | $E6AD–$E6C8 | 14-entry sound handler jump table |
+| `PatternTableGraphics` | $C010+ (CHR) | CHR pattern table data |
+
+---
+
+## 12. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C000) ───────────────────────────────────────┐
+    │ sei, disable PPU, cld, stack=$FF               │
+    │ wait 2× VBlank                                 │
+    ▼                                                │
+jmp InitializeSystemAndRunMainLoop ($C30C)           │
+    │                                                │
+    ├─ clear RAM ($0000–$07FF)                       │
+    ├─ InitializeVideoSystem ($C1F2)                 │
+    │     ├─ DisableRendering                        │
+    │     ├─ HideAllSprites                          │
+    │     ├─ UploadSystemPalette ($3F00–$3F1F)       │
+    │     └─ EnableNmiInPpuControl                   │
+    ├─ InitializeApu ($E642) — silence all channels  │
+    ├─ ComposeStatusScreen ($DE83)                   │
+    ├─ EnableNmiInPpuControl                         │
+    └─ MainGameLoop ($C368) ◄─────────────┘
+                                                     │
+MainGameLoop ($C368) ─────────────────────────────────┤
+    │                                                │
+    ├─ wait for controller button press              │
+    ├─ handle SELECT / delay counters ($70,$71)      │
+    ├─ increment game mode ($59)                     │
+    ├─ RunMenuSelectionScreen ($DA8E) [title]        │
+    ├─ gameplay init ($C3B6–$C5FF)                   │
+    ├─ GameplayUpdate ($C79D)                        │
+    │     │ 80 object slots ($03E6 state array)      │
+    │     ├─ object position ($0436/$0486)           │
+    │     ├─ object timer ($0526)                    │
+    │     └─ object dispatch via StateDispatchTable  │
+    └─ eventually → back to MainGameLoop             │
+                                                     │
+NMI ($C01A) [every frame]                            │
+    │                                                │
+    ├─ OAM setup + DMA ($4014)                       │
+    ├─ VRAM transfer from $0600 table                │
+    ├─ screen state transfer ($D9C6–$D9C9 pointers)  │
+    ├─ controller read & debounce ($C1BF)            │
+    ├─ Gameplay_ReadZpB2_E4C7 ($E4C7)                │
+    ├─ SoundUpdate ($E65F)                           │
+    ├─ DMC start ($4010–$4013)                       │
+    ├─ PPU state & scroll commit ($C296)             │
+    ├─ frame parity toggle ($DB)                     │
+    └─ rti                                           │
+                                                     │
+Sound Engine ($E65F) [from NMI]                      │
+    ├─ per-channel delay countdown ($E1–$E3)         │
+    ├─ SoundDispatchAddressTable ($E6AD)             │
+    ├─ pulse 2, noise, DMC channel control           │
+    └─ RandomStateAlt ($E4) decrement                │
+```
+
+---
+
+## 13. Notes
+
+- **Build is byte-identical:** The apparent one-byte difference (`dec $E4` vs `dec $54` at CPU $E71B) was resolved by recognizing zero-page reuse — `$54` is `RandomState0` used by most code, while `$E4` is a distinct byte (`RandomStateAlt`) decremented at that one location. Both are now separately named in `locals.inc`.
+- The source uses a "ROM $00XXXX" file-offset annotation scheme on every instruction, enabling direct comparison with the binary.
+- Code is organized as reachable routines traced from the NMI/RESET/IRQ control-flow graph; unreachable bytes are classified as explicit data regions.
+- The disassembly is a single file (`main.s`) with embedded iNES header and CHR data segments.
+- Vectors confirm NMI at $C01A and RESET at $C000, matching the reset handler location.
\ No newline at end of file
diff --git a/Bomberman (U)/copilot/Makefile b/Bomberman (U)/copilot/Makefile
index 2721d3d..7b0587a 100644
--- a/Bomberman (U)/copilot/Makefile	
+++ b/Bomberman (U)/copilot/Makefile	
@@ -1,19 +1,25 @@
 CA65 ?= ca65
 LD65 ?= ld65
 
-all: reconstructed_bomberman.nes
+all: reconstructed.nes verify
 
-main.o: main.s symbols.inc locals.inc
-	$(CA65) -g -o $@ main.s
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
 
-reconstructed_bomberman.nes: main.o linker.cfg
-	$(LD65) -C linker.cfg -o $@ main.o
+header.o: header.s
+	$(CA65) -g -o $@ $<
 
-verify: reconstructed_bomberman.nes
-	@test "$$(wc -c < reconstructed_bomberman.nes)" -eq 24592
-	cmp -l original_bomberman.nes reconstructed_bomberman.nes
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
 
 clean:
-	rm -f main.o reconstructed_bomberman.nes
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
 
-.PHONY: all verify clean
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Bomberman (U)/copilot/chr.bin b/Bomberman (U)/copilot/chr.bin
new file mode 100644
index 0000000..543c3bd
Binary files /dev/null and b/Bomberman (U)/copilot/chr.bin differ
diff --git a/Bomberman (U)/copilot/chr.o b/Bomberman (U)/copilot/chr.o
new file mode 100644
index 0000000..6ad76dd
Binary files /dev/null and b/Bomberman (U)/copilot/chr.o differ
diff --git a/Bomberman (U)/copilot/chr.s b/Bomberman (U)/copilot/chr.s
new file mode 100644
index 0000000..fd4b792
--- /dev/null
+++ b/Bomberman (U)/copilot/chr.s	
@@ -0,0 +1,515 @@
+.segment "CHR"
+; CHR ROM pattern-table data.
+PatternTableGraphics:
+    .byte $1F, $3F, $2B, $2B, $3F, $1F, $00, $33, $00, $00, $2B, $2A, $00, $00, $0F, $34 ; ROM $004010: 1F 3F 2B 2B 3F 1F 00 33 00 00 2B 2A 00 00 0F 34
+    .byte $B0, $C0, $E0, $E0, $C0, $80, $00, $80, $10, $00, $00, $00, $00, $40, $C0, $60 ; ROM $004020: B0 C0 E0 E0 C0 80 00 80 10 00 00 00 00 40 C0 60
+    .byte $1F, $3F, $2B, $2B, $3F, $1F, $00, $11, $00, $00, $2B, $2A, $00, $00, $0F, $0E ; ROM $004030: 1F 3F 2B 2B 3F 1F 00 11 00 00 2B 2A 00 00 0F 0E
+    .byte $B0, $C0, $E0, $E0, $C0, $00, $00, $C0, $10, $00, $00, $00, $00, $C0, $C0, $20 ; ROM $004040: B0 C0 E0 E0 C0 00 00 C0 10 00 00 00 00 C0 C0 20
+    .byte $00, $1F, $3F, $2B, $2B, $3F, $1F, $00, $00, $00, $00, $2B, $2A, $00, $00, $07 ; ROM $004050: 00 1F 3F 2B 2B 3F 1F 00 00 00 00 2B 2A 00 00 07
+    .byte $10, $80, $C0, $E0, $E0, $C0, $00, $C0, $10, $20, $00, $00, $00, $00, $C0, $20 ; ROM $004060: 10 80 C0 E0 E0 C0 00 C0 10 20 00 00 00 00 C0 20
+    .byte $07, $0F, $0D, $0D, $0F, $07, $00, $08, $00, $00, $05, $05, $00, $00, $03, $07 ; ROM $004070: 07 0F 0D 0D 0F 07 00 08 00 00 05 05 00 00 03 07
+    .byte $E0, $F0, $B0, $B0, $F0, $E0, $00, $3C, $00, $00, $A0, $A0, $00, $00, $C0, $CC ; ROM $004080: E0 F0 B0 B0 F0 E0 00 3C 00 00 A0 A0 00 00 C0 CC
+    .byte $07, $0F, $0D, $0D, $0F, $07, $00, $0C, $00, $00, $05, $05, $00, $00, $03, $03 ; ROM $004090: 07 0F 0D 0D 0F 07 00 0C 00 00 05 05 00 00 03 03
+    .byte $E0, $F0, $B0, $B0, $F0, $E0, $00, $30, $00, $00, $A0, $A0, $00, $00, $C0, $C0 ; ROM $0040A0: E0 F0 B0 B0 F0 E0 00 30 00 00 A0 A0 00 00 C0 C0
+    .byte $07, $0F, $0D, $0D, $0F, $07, $00, $3C, $00, $00, $05, $05, $00, $00, $03, $33 ; ROM $0040B0: 07 0F 0D 0D 0F 07 00 3C 00 00 05 05 00 00 03 33
+    .byte $E0, $F0, $B0, $B0, $F0, $E0, $00, $10, $00, $00, $A0, $A0, $00, $00, $C0, $E0 ; ROM $0040C0: E0 F0 B0 B0 F0 E0 00 10 00 00 A0 A0 00 00 C0 E0
+    .byte $07, $0E, $0F, $0F, $0F, $07, $00, $08, $00, $01, $00, $00, $00, $00, $03, $07 ; ROM $0040D0: 07 0E 0F 0F 0F 07 00 08 00 01 00 00 00 00 03 07
+    .byte $E0, $70, $B0, $F0, $F0, $E0, $00, $1C, $00, $80, $40, $00, $00, $00, $C0, $EC ; ROM $0040E0: E0 70 B0 F0 F0 E0 00 1C 00 80 40 00 00 00 C0 EC
+    .byte $07, $0E, $0F, $0F, $0F, $07, $00, $08, $00, $01, $00, $00, $00, $00, $03, $07 ; ROM $0040F0: 07 0E 0F 0F 0F 07 00 08 00 01 00 00 00 00 03 07
+    .byte $E0, $70, $B0, $F0, $F0, $E0, $00, $10, $00, $80, $40, $00, $00, $00, $C0, $E0 ; ROM $004100: E0 70 B0 F0 F0 E0 00 10 00 80 40 00 00 00 C0 E0
+    .byte $3F, $0F, $20, $38, $3C, $38, $00, $00, $30, $00, $27, $37, $33, $36, $00, $00 ; ROM $004110: 3F 0F 20 38 3C 38 00 00 30 00 27 37 33 36 00 00
+    .byte $98, $18, $00, $80, $F0, $F8, $30, $60, $78, $F8, $E0, $60, $00, $18, $30, $60 ; ROM $004120: 98 18 00 80 F0 F8 30 60 78 F8 E0 60 00 18 30 60
+    .byte $10, $30, $31, $01, $06, $06, $0E, $01, $0F, $3F, $3F, $0F, $01, $06, $0E, $01 ; ROM $004130: 10 30 31 01 06 06 0E 01 0F 3F 3F 0F 01 06 0E 01
+    .byte $E0, $E0, $C0, $80, $C0, $C0, $C0, $C0, $00, $80, $A0, $E0, $00, $00, $C0, $C0 ; ROM $004140: E0 E0 C0 80 C0 C0 C0 C0 00 80 A0 E0 00 00 C0 C0
+    .byte $00, $30, $38, $08, $03, $03, $01, $03, $0F, $3F, $37, $07, $00, $00, $01, $03 ; ROM $004150: 00 30 38 08 03 03 01 03 0F 3F 37 07 00 00 01 03
+    .byte $E0, $70, $38, $18, $18, $BC, $84, $80, $00, $80, $D8, $F8, $E0, $0C, $84, $80 ; ROM $004160: E0 70 38 18 18 BC 84 80 00 80 D8 F8 E0 0C 84 80
+    .byte $18, $18, $30, $30, $06, $06, $06, $00, $07, $07, $37, $37, $01, $06, $06, $00 ; ROM $004170: 18 18 30 30 06 06 06 00 07 07 37 37 01 06 06 00
+    .byte $1C, $00, $00, $60, $60, $60, $60, $60, $EC, $E0, $E0, $80, $80, $00, $60, $60 ; ROM $004180: 1C 00 00 60 60 60 60 60 EC E0 E0 80 80 00 60 60
+    .byte $18, $38, $30, $00, $06, $06, $06, $06, $07, $37, $37, $07, $01, $00, $06, $06 ; ROM $004190: 18 38 30 00 06 06 06 06 07 37 37 07 01 00 06 06
+    .byte $18, $1C, $0C, $00, $60, $60, $60, $60, $E0, $EC, $EC, $E0, $80, $00, $60, $60 ; ROM $0041A0: 18 1C 0C 00 60 60 60 60 E0 EC EC E0 80 00 60 60
+    .byte $38, $00, $00, $06, $06, $06, $06, $06, $37, $07, $07, $01, $01, $00, $06, $06 ; ROM $0041B0: 38 00 00 06 06 06 06 06 37 07 07 01 01 00 06 06
+    .byte $18, $18, $0C, $0C, $60, $60, $60, $00, $E0, $E0, $EC, $EC, $80, $60, $60, $00 ; ROM $0041C0: 18 18 0C 0C 60 60 60 00 E0 E0 EC EC 80 60 60 00
+    .byte $19, $19, $37, $30, $06, $06, $06, $00, $07, $07, $30, $37, $01, $06, $06, $00 ; ROM $0041D0: 19 19 37 30 06 06 06 00 07 07 30 37 01 06 06 00
+    .byte $9C, $80, $E0, $00, $60, $60, $60, $60, $EC, $E0, $00, $E0, $80, $00, $60, $60 ; ROM $0041E0: 9C 80 E0 00 60 60 60 60 EC E0 00 E0 80 00 60 60
+    .byte $18, $39, $37, $00, $06, $06, $06, $06, $07, $37, $30, $07, $01, $00, $06, $06 ; ROM $0041F0: 18 39 37 00 06 06 06 06 07 37 30 07 01 00 06 06
+    .byte $18, $9C, $EC, $00, $60, $60, $60, $60, $E0, $EC, $0C, $E0, $80, $00, $60, $60 ; ROM $004200: 18 9C EC 00 60 60 60 60 E0 EC 0C E0 80 00 60 60
+    .byte $07, $0E, $0F, $0F, $0F, $07, $00, $38, $00, $01, $00, $00, $00, $00, $03, $37 ; ROM $004210: 07 0E 0F 0F 0F 07 00 38 00 01 00 00 00 00 03 37
+    .byte $E0, $70, $B0, $F0, $F0, $E0, $00, $10, $00, $80, $40, $00, $00, $00, $C0, $E0 ; ROM $004220: E0 70 B0 F0 F0 E0 00 10 00 80 40 00 00 00 C0 E0
+    .byte $0F, $1F, $1B, $1F, $1F, $0F, $30, $38, $00, $00, $00, $00, $00, $00, $33, $37 ; ROM $004230: 0F 1F 1B 1F 1F 0F 30 38 00 00 00 00 00 00 33 37
+    .byte $F0, $F8, $B8, $F8, $F8, $F0, $0C, $3C, $00, $00, $00, $00, $00, $00, $CC, $CC ; ROM $004240: F0 F8 B8 F8 F8 F0 0C 3C 00 00 00 00 00 00 CC CC
+    .byte $0F, $15, $1B, $15, $1F, $0F, $30, $30, $00, $00, $00, $00, $00, $00, $37, $3F ; ROM $004250: 0F 15 1B 15 1F 0F 30 30 00 00 00 00 00 00 37 3F
+    .byte $F0, $58, $B8, $58, $F8, $F0, $0C, $0C, $00, $00, $00, $00, $00, $00, $EC, $FC ; ROM $004260: F0 58 B8 58 F8 F0 0C 0C 00 00 00 00 00 00 EC FC
+    .byte $0F, $15, $1B, $15, $1F, $08, $30, $34, $00, $00, $00, $00, $00, $07, $3F, $3B ; ROM $004270: 0F 15 1B 15 1F 08 30 34 00 00 00 00 00 07 3F 3B
+    .byte $F0, $58, $B8, $58, $F8, $10, $0C, $0C, $00, $00, $00, $00, $00, $E0, $DC, $BC ; ROM $004280: F0 58 B8 58 F8 10 0C 0C 00 00 00 00 00 E0 DC BC
+    .byte $0F, $15, $1B, $15, $18, $00, $30, $32, $00, $00, $00, $00, $07, $0F, $3F, $38 ; ROM $004290: 0F 15 1B 15 18 00 30 32 00 00 00 00 07 0F 3F 38
+    .byte $F0, $58, $B8, $58, $08, $08, $0C, $2C, $00, $00, $00, $00, $F0, $F0, $1C, $1C ; ROM $0042A0: F0 58 B8 58 08 08 0C 2C 00 00 00 00 F0 F0 1C 1C
+    .byte $00, $0F, $15, $18, $12, $04, $30, $30, $00, $00, $00, $07, $0C, $18, $38, $38 ; ROM $0042B0: 00 0F 15 18 12 04 30 30 00 00 00 07 0C 18 38 38
+    .byte $00, $F0, $58, $18, $08, $00, $0C, $3C, $00, $00, $00, $E0, $F0, $38, $0C, $0C ; ROM $0042C0: 00 F0 58 18 08 00 0C 3C 00 00 00 E0 F0 38 0C 0C
+    .byte $00, $06, $08, $00, $00, $00, $30, $30, $00, $01, $07, $62, $40, $00, $30, $78 ; ROM $0042D0: 00 06 08 00 00 00 30 30 00 01 07 62 40 00 30 78
+    .byte $00, $D0, $98, $08, $00, $00, $0C, $1C, $00, $20, $40, $26, $02, $00, $0C, $0C ; ROM $0042E0: 00 D0 98 08 00 00 0C 1C 00 20 40 26 02 00 0C 0C
+    .byte $00, $00, $00, $00, $00, $00, $30, $30, $00, $00, $00, $00, $00, $00, $30, $38 ; ROM $0042F0: 00 00 00 00 00 00 30 30 00 00 00 00 00 00 30 38
+    .byte $00, $00, $00, $00, $00, $00, $0C, $0C, $00, $00, $00, $00, $00, $00, $0C, $1C ; ROM $004300: 00 00 00 00 00 00 0C 0C 00 00 00 00 00 00 0C 1C
+    .byte $38, $01, $07, $00, $06, $06, $06, $06, $37, $07, $00, $07, $01, $00, $06, $06 ; ROM $004310: 38 01 07 00 06 06 06 06 37 07 00 07 01 00 06 06
+    .byte $18, $98, $EC, $0C, $60, $60, $60, $00, $E0, $E0, $0C, $EC, $80, $60, $60, $00 ; ROM $004320: 18 98 EC 0C 60 60 60 00 E0 E0 0C EC 80 60 60 00
+    .byte $00, $00, $00, $00, $00, $08, $1C, $18, $0F, $1F, $1F, $1F, $0F, $07, $1B, $18 ; ROM $004330: 00 00 00 00 00 08 1C 18 0F 1F 1F 1F 0F 07 1B 18
+    .byte $00, $00, $00, $00, $00, $10, $38, $18, $F0, $F8, $F8, $F8, $F0, $E0, $D8, $18 ; ROM $004340: 00 00 00 00 00 10 38 18 F0 F8 F8 F8 F0 E0 D8 18
+    .byte $00, $06, $02, $00, $00, $00, $18, $18, $19, $38, $3C, $3D, $1F, $0F, $1F, $1B ; ROM $004350: 00 06 02 00 00 00 18 18 19 38 3C 3D 1F 0F 1F 1B
+    .byte $00, $80, $00, $40, $80, $00, $18, $18, $78, $7C, $FC, $3C, $78, $F0, $F8, $D8 ; ROM $004360: 00 80 00 40 80 00 18 18 78 7C FC 3C 78 F0 F8 D8
+    .byte $01, $08, $04, $04, $01, $04, $18, $18, $72, $70, $78, $78, $32, $1B, $1F, $1F ; ROM $004370: 01 08 04 04 01 04 18 18 72 70 78 78 32 1B 1F 1F
+    .byte $00, $00, $40, $00, $40, $00, $18, $18, $7E, $7E, $BE, $3E, $0C, $78, $F8, $F8 ; ROM $004380: 00 00 40 00 40 00 18 18 7E 7E BE 3E 0C 78 F8 F8
+    .byte $00, $08, $04, $00, $00, $01, $18, $18, $10, $30, $38, $30, $30, $1A, $1F, $1F ; ROM $004390: 00 08 04 00 00 01 18 18 10 30 38 30 30 1A 1F 1F
+    .byte $40, $20, $00, $00, $80, $40, $18, $18, $38, $1C, $1C, $1C, $0C, $98, $F8, $F8 ; ROM $0043A0: 40 20 00 00 80 40 18 18 38 1C 1C 1C 0C 98 F8 F8
+    .byte $00, $00, $10, $00, $00, $04, $19, $18, $60, $60, $60, $60, $00, $18, $18, $1B ; ROM $0043B0: 00 00 10 00 00 04 19 18 60 60 60 60 00 18 18 1B
+    .byte $40, $10, $00, $00, $00, $80, $18, $18, $38, $0C, $0C, $0C, $00, $10, $D8, $D8 ; ROM $0043C0: 40 10 00 00 00 80 18 18 38 0C 0C 0C 00 10 D8 D8
+    .byte $20, $40, $00, $00, $20, $00, $19, $18, $C0, $80, $40, $00, $00, $60, $58, $1B ; ROM $0043D0: 20 40 00 00 20 00 19 18 C0 80 40 00 00 60 58 1B
+    .byte $00, $00, $00, $08, $00, $00, $98, $18, $09, $04, $04, $05, $01, $02, $18, $98 ; ROM $0043E0: 00 00 00 08 00 00 98 18 09 04 04 05 01 02 18 98
+    .byte $00, $00, $00, $00, $00, $00, $18, $18, $00, $00, $00, $00, $00, $00, $18, $18 ; ROM $0043F0: 00 00 00 00 00 00 18 18 00 00 00 00 00 00 18 18
+    .byte $00, $00, $00, $00, $00, $00, $18, $18, $00, $00, $00, $00, $00, $00, $18, $18 ; ROM $004400: 00 00 00 00 00 00 18 18 00 00 00 00 00 00 18 18
+    .byte $0F, $1F, $01, $01, $01, $00, $00, $03, $0F, $1F, $0F, $0B, $1B, $0F, $07, $30 ; ROM $004410: 0F 1F 01 01 01 00 00 03 0F 1F 0F 0B 1B 0F 07 30
+    .byte $D0, $E0, $F0, $F0, $F0, $E0, $00, $E0, $C0, $C0, $30, $30, $F0, $E0, $C0, $40 ; ROM $004420: D0 E0 F0 F0 F0 E0 00 E0 C0 C0 30 30 F0 E0 C0 40
+    .byte $0F, $1F, $01, $01, $01, $00, $00, $03, $0F, $1F, $0F, $0B, $1B, $0F, $07, $00 ; ROM $004430: 0F 1F 01 01 01 00 00 03 0F 1F 0F 0B 1B 0F 07 00
+    .byte $D0, $E0, $F0, $F0, $F0, $E0, $00, $E0, $C0, $C0, $30, $30, $F0, $E0, $C0, $80 ; ROM $004440: D0 E0 F0 F0 F0 E0 00 E0 C0 C0 30 30 F0 E0 C0 80
+    .byte $00, $0F, $1F, $01, $01, $01, $00, $00, $00, $0F, $1F, $0F, $0B, $1B, $0F, $07 ; ROM $004450: 00 0F 1F 01 01 01 00 00 00 0F 1F 0F 0B 1B 0F 07
+    .byte $00, $D0, $E0, $F0, $F0, $F0, $E0, $00, $00, $C0, $C0, $30, $30, $F0, $E0, $C0 ; ROM $004460: 00 D0 E0 F0 F0 F0 E0 00 00 C0 C0 30 30 F0 E0 C0
+    .byte $00, $00, $00, $77, $55, $55, $55, $77, $00, $00, $00, $77, $55, $55, $55, $77 ; ROM $004470: 00 00 00 77 55 55 55 77 00 00 00 77 55 55 55 77
+    .byte $00, $00, $00, $70, $50, $50, $50, $70, $00, $00, $00, $70, $50, $50, $50, $70 ; ROM $004480: 00 00 00 70 50 50 50 70 00 00 00 70 50 50 50 70
+    .byte $00, $0C, $12, $21, $2E, $2E, $1E, $1E, $00, $00, $0C, $1E, $1F, $1F, $0B, $0F ; ROM $004490: 00 0C 12 21 2E 2E 1E 1E 00 00 0C 1E 1F 1F 0B 0F
+    .byte $00, $30, $48, $84, $74, $74, $78, $78, $00, $00, $30, $78, $F8, $F8, $D0, $F0 ; ROM $0044A0: 00 30 48 84 74 74 78 78 00 00 30 78 F8 F8 D0 F0
+    .byte $00, $00, $00, $00, $0E, $0E, $06, $02, $00, $00, $04, $0E, $0F, $0D, $07, $03 ; ROM $0044B0: 00 00 00 00 0E 0E 06 02 00 00 04 0E 0F 0D 07 03
+    .byte $00, $00, $00, $00, $70, $70, $60, $40, $00, $00, $20, $70, $F0, $B0, $E0, $C0 ; ROM $0044C0: 00 00 00 00 70 70 60 40 00 00 20 70 F0 B0 E0 C0
+    .byte $00, $00, $00, $00, $06, $06, $02, $00, $00, $00, $00, $04, $06, $05, $03, $01 ; ROM $0044D0: 00 00 00 00 06 06 02 00 00 00 00 04 06 05 03 01
+    .byte $00, $00, $00, $00, $60, $60, $40, $00, $00, $00, $00, $20, $60, $A0, $C0, $80 ; ROM $0044E0: 00 00 00 00 60 60 40 00 00 00 00 20 60 A0 C0 80
+    .byte $00, $00, $00, $00, $0C, $04, $00, $00, $00, $00, $00, $00, $0C, $06, $00, $00 ; ROM $0044F0: 00 00 00 00 0C 04 00 00 00 00 00 00 0C 06 00 00
+    .byte $00, $00, $00, $00, $30, $20, $00, $00, $00, $00, $00, $00, $30, $60, $00, $00 ; ROM $004500: 00 00 00 00 30 20 00 00 00 00 00 00 30 60 00 00
+    .byte $0F, $1F, $27, $3F, $3F, $3C, $00, $00, $30, $00, $04, $0F, $0F, $0C, $00, $00 ; ROM $004510: 0F 1F 27 3F 3F 3C 00 00 30 00 04 0F 0F 0C 00 00
+    .byte $F0, $E0, $E0, $E0, $F0, $F8, $30, $60, $48, $58, $E0, $E0, $F0, $E0, $00, $00 ; ROM $004520: F0 E0 E0 E0 F0 F8 30 60 48 58 E0 E0 F0 E0 00 00
+    .byte $07, $0F, $0B, $0E, $06, $06, $0E, $01, $01, $31, $3F, $0F, $07, $00, $00, $00 ; ROM $004530: 07 0F 0B 0E 06 06 0E 01 01 31 3F 0F 07 00 00 00
+    .byte $E0, $E0, $60, $60, $60, $C0, $C0, $C0, $00, $80, $E0, $E0, $E0, $C0, $00, $00 ; ROM $004540: E0 E0 60 60 60 C0 C0 C0 00 80 E0 E0 E0 C0 00 00
+    .byte $03, $07, $0F, $0E, $07, $03, $01, $03, $00, $31, $33, $07, $07, $03, $00, $00 ; ROM $004550: 03 07 0F 0E 07 03 01 03 00 31 33 07 07 03 00 00
+    .byte $E0, $F0, $E0, $E0, $F8, $BC, $84, $80, $80, $00, $18, $F8, $F0, $B0, $00, $00 ; ROM $004560: E0 F0 E0 E0 F8 BC 84 80 80 00 18 F8 F0 B0 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $004570: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $004580: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $11, $13, $23, $20, $21, $12, $0C, $00, $0E, $0C, $1C, $1F, $1E, $0C, $00, $00 ; ROM $004590: 11 13 23 20 21 12 0C 00 0E 0C 1C 1F 1E 0C 00 00
+    .byte $88, $C8, $C4, $04, $84, $48, $30, $00, $70, $30, $38, $F8, $78, $30, $00, $00 ; ROM $0045A0: 88 C8 C4 04 84 48 30 00 70 30 38 F8 78 30 00 00
+    .byte $01, $03, $00, $00, $00, $00, $00, $00, $02, $04, $0F, $0E, $0C, $00, $00, $00 ; ROM $0045B0: 01 03 00 00 00 00 00 00 02 04 0F 0E 0C 00 00 00
+    .byte $80, $C0, $00, $00, $00, $00, $00, $00, $40, $20, $F0, $70, $30, $00, $00, $00 ; ROM $0045C0: 80 C0 00 00 00 00 00 00 40 20 F0 70 30 00 00 00
+    .byte $01, $00, $00, $00, $00, $00, $00, $00, $02, $07, $06, $04, $00, $00, $00, $00 ; ROM $0045D0: 01 00 00 00 00 00 00 00 02 07 06 04 00 00 00 00
+    .byte $80, $00, $00, $00, $00, $00, $00, $00, $40, $E0, $60, $20, $00, $00, $00, $00 ; ROM $0045E0: 80 00 00 00 00 00 00 00 40 E0 60 20 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $06, $0C, $00, $00, $00, $00, $00 ; ROM $0045F0: 00 00 00 00 00 00 00 00 00 06 0C 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $60, $30, $00, $00, $00, $00, $00 ; ROM $004600: 00 00 00 00 00 00 00 00 00 60 30 00 00 00 00 00
+    .byte $07, $1C, $30, $60, $40, $46, $46, $46, $00, $03, $0F, $1F, $3F, $3F, $3D, $3D ; ROM $004610: 07 1C 30 60 40 46 46 46 00 03 0F 1F 3F 3F 3D 3D
+    .byte $E0, $38, $0C, $06, $02, $62, $62, $62, $00, $C0, $F0, $F8, $FC, $FC, $DC, $DC ; ROM $004620: E0 38 0C 06 02 62 62 62 00 C0 F0 F8 FC FC DC DC
+    .byte $0F, $38, $20, $60, $40, $46, $46, $46, $00, $07, $1F, $1F, $3F, $3F, $3D, $3D ; ROM $004630: 0F 38 20 60 40 46 46 46 00 07 1F 1F 3F 3F 3D 3D
+    .byte $F0, $1C, $04, $06, $02, $62, $62, $62, $00, $E0, $F8, $F8, $FC, $FC, $DC, $DC ; ROM $004640: F0 1C 04 06 02 62 62 62 00 E0 F8 F8 FC FC DC DC
+    .byte $0F, $38, $60, $C0, $86, $86, $86, $C0, $00, $07, $1F, $3F, $7F, $7D, $7D, $3F ; ROM $004650: 0F 38 60 C0 86 86 86 C0 00 07 1F 3F 7F 7D 7D 3F
+    .byte $F0, $1C, $06, $03, $61, $61, $61, $03, $00, $E0, $F8, $FC, $FE, $DE, $DE, $FC ; ROM $004660: F0 1C 06 03 61 61 61 03 00 E0 F8 FC FE DE DE FC
+    .byte $07, $1C, $30, $6A, $4E, $4E, $4E, $4E, $00, $03, $0F, $15, $3F, $3B, $3B, $3F ; ROM $004670: 07 1C 30 6A 4E 4E 4E 4E 00 03 0F 15 3F 3B 3B 3F
+    .byte $E0, $38, $0C, $56, $72, $72, $72, $72, $00, $C0, $F0, $A8, $FC, $DC, $DC, $FC ; ROM $004680: E0 38 0C 56 72 72 72 72 00 C0 F0 A8 FC DC DC FC
+    .byte $01, $03, $03, $07, $1D, $38, $40, $96, $00, $01, $01, $03, $07, $1F, $3F, $7F ; ROM $004690: 01 03 03 07 1D 38 40 96 00 01 01 03 07 1F 3F 7F
+    .byte $80, $C0, $E0, $E0, $38, $9C, $02, $61, $00, $80, $C0, $C0, $E0, $F8, $FC, $FE ; ROM $0046A0: 80 C0 E0 E0 38 9C 02 61 00 80 C0 C0 E0 F8 FC FE
+    .byte $00, $01, $03, $07, $1D, $38, $40, $96, $00, $00, $01, $03, $07, $1F, $3F, $7F ; ROM $0046B0: 00 01 03 07 1D 38 40 96 00 00 01 03 07 1F 3F 7F
+    .byte $E0, $D0, $90, $E0, $38, $9C, $02, $61, $00, $E0, $E0, $C0, $E0, $F8, $FC, $FE ; ROM $0046C0: E0 D0 90 E0 38 9C 02 61 00 E0 E0 C0 E0 F8 FC FE
+    .byte $01, $03, $03, $07, $1D, $38, $40, $96, $00, $01, $01, $03, $07, $1F, $3F, $7D ; ROM $0046D0: 01 03 03 07 1D 38 40 96 00 01 01 03 07 1F 3F 7D
+    .byte $80, $C0, $E0, $E0, $38, $9C, $02, $61, $00, $80, $C0, $C0, $E0, $F8, $FC, $DE ; ROM $0046E0: 80 C0 E0 E0 38 9C 02 61 00 80 C0 C0 E0 F8 FC DE
+    .byte $01, $03, $03, $07, $1D, $30, $4E, $8E, $00, $01, $01, $03, $07, $1F, $3F, $7B ; ROM $0046F0: 01 03 03 07 1D 30 4E 8E 00 01 01 03 07 1F 3F 7B
+    .byte $80, $C0, $E0, $E0, $38, $9C, $72, $71, $00, $80, $C0, $C0, $E0, $F8, $FC, $DE ; ROM $004700: 80 C0 E0 E0 38 9C 72 71 00 80 C0 C0 E0 F8 FC DE
+    .byte $40, $60, $31, $18, $0C, $06, $03, $03, $3F, $1F, $0E, $07, $03, $01, $01, $00 ; ROM $004710: 40 60 31 18 0C 06 03 03 3F 1F 0E 07 03 01 01 00
+    .byte $02, $06, $8C, $18, $30, $60, $C0, $C0, $FC, $F8, $70, $E0, $C0, $80, $80, $00 ; ROM $004720: 02 06 8C 18 30 60 C0 C0 FC F8 70 E0 C0 80 80 00
+    .byte $60, $20, $31, $18, $0E, $03, $03, $00, $1F, $1F, $0E, $07, $01, $01, $00, $00 ; ROM $004730: 60 20 31 18 0E 03 03 00 1F 1F 0E 07 01 01 00 00
+    .byte $06, $04, $8C, $18, $70, $C0, $C0, $00, $F8, $F8, $70, $E0, $80, $80, $00, $00 ; ROM $004740: 06 04 8C 18 70 C0 C0 00 F8 F8 70 E0 80 80 00 00
+    .byte $40, $61, $38, $0E, $03, $03, $00, $00, $3F, $1E, $07, $01, $01, $00, $00, $00 ; ROM $004750: 40 61 38 0E 03 03 00 00 3F 1E 07 01 01 00 00 00
+    .byte $02, $86, $1C, $70, $C0, $C0, $00, $00, $FC, $78, $E0, $80, $80, $00, $00, $00 ; ROM $004760: 02 86 1C 70 C0 C0 00 00 FC 78 E0 80 80 00 00 00
+    .byte $40, $63, $33, $19, $0C, $06, $03, $03, $3F, $1C, $0C, $06, $03, $01, $01, $00 ; ROM $004770: 40 63 33 19 0C 06 03 03 3F 1C 0C 06 03 01 01 00
+    .byte $02, $C6, $CC, $98, $30, $60, $C0, $C0, $FC, $38, $30, $60, $C0, $80, $80, $00 ; ROM $004780: 02 C6 CC 98 30 60 C0 C0 FC 38 30 60 C0 80 80 00
+    .byte $A6, $A6, $80, $41, $20, $1F, $22, $3E, $7D, $7D, $7F, $3E, $1F, $00, $1C, $00 ; ROM $004790: A6 A6 80 41 20 1F 22 3E 7D 7D 7F 3E 1F 00 1C 00
+    .byte $61, $61, $01, $82, $3C, $C4, $7C, $00, $DE, $DE, $FE, $7C, $C0, $38, $00, $00 ; ROM $0047A0: 61 61 01 82 3C C4 7C 00 DE DE FE 7C C0 38 00 00
+    .byte $A6, $A6, $80, $41, $20, $1F, $22, $3E, $7D, $7D, $7F, $3E, $1F, $00, $1C, $00 ; ROM $0047B0: A6 A6 80 41 20 1F 22 3E 7D 7D 7F 3E 1F 00 1C 00
+    .byte $61, $61, $01, $82, $0C, $F8, $44, $7C, $DE, $DE, $FE, $7C, $F0, $00, $38, $00 ; ROM $0047C0: 61 61 01 82 0C F8 44 7C DE DE FE 7C F0 00 38 00
+    .byte $A6, $A6, $80, $41, $3C, $23, $3E, $00, $7D, $7F, $7F, $3E, $03, $1C, $00, $00 ; ROM $0047D0: A6 A6 80 41 3C 23 3E 00 7D 7F 7F 3E 03 1C 00 00
+    .byte $61, $61, $01, $82, $0C, $F8, $44, $7C, $DE, $FE, $FE, $7C, $F0, $00, $38, $00 ; ROM $0047E0: 61 61 01 82 0C F8 44 7C DE FE FE 7C F0 00 38 00
+    .byte $AE, $AE, $83, $43, $20, $1F, $22, $3E, $7B, $7F, $7C, $3C, $1F, $00, $1C, $00 ; ROM $0047F0: AE AE 83 43 20 1F 22 3E 7B 7F 7C 3C 1F 00 1C 00
+    .byte $71, $71, $C1, $C2, $0C, $F8, $44, $7C, $DE, $FE, $3E, $3C, $F0, $00, $38, $18 ; ROM $004800: 71 71 C1 C2 0C F8 44 7C DE FE 3E 3C F0 00 38 18
+    .byte $1F, $10, $20, $3F, $40, $46, $76, $46, $00, $0F, $1F, $00, $3F, $3F, $0D, $3D ; ROM $004810: 1F 10 20 3F 40 46 76 46 00 0F 1F 00 3F 3F 0D 3D
+    .byte $F8, $08, $04, $FC, $02, $62, $6E, $62, $00, $F0, $F8, $00, $FC, $FC, $D0, $DC ; ROM $004820: F8 08 04 FC 02 62 6E 62 00 F0 F8 00 FC FC D0 DC
+    .byte $1F, $20, $3F, $40, $46, $76, $46, $46, $00, $1F, $00, $3F, $3F, $0D, $3D, $3D ; ROM $004830: 1F 20 3F 40 46 76 46 46 00 1F 00 3F 3F 0D 3D 3D
+    .byte $F8, $04, $FC, $02, $62, $6E, $62, $62, $00, $F8, $00, $FC, $FC, $D0, $DC, $DC ; ROM $004840: F8 04 FC 02 62 6E 62 62 00 F8 00 FC FC D0 DC DC
+    .byte $1F, $60, $FF, $86, $F6, $86, $F6, $80, $00, $1F, $00, $7F, $0D, $7D, $0D, $7F ; ROM $004850: 1F 60 FF 86 F6 86 F6 80 00 1F 00 7F 0D 7D 0D 7F
+    .byte $F8, $06, $FF, $61, $6F, $61, $6F, $01, $00, $F8, $00, $FE, $D0, $DE, $D0, $FE ; ROM $004860: F8 06 FF 61 6F 61 6F 01 00 F8 00 FE D0 DE D0 FE
+    .byte $1F, $10, $20, $3F, $40, $4E, $7E, $4E, $00, $0F, $1F, $00, $3F, $3F, $0B, $3B ; ROM $004870: 1F 10 20 3F 40 4E 7E 4E 00 0F 1F 00 3F 3F 0B 3B
+    .byte $F8, $08, $04, $FC, $02, $72, $7E, $72, $00, $F0, $F8, $00, $FC, $FC, $D0, $DC ; ROM $004880: F8 08 04 FC 02 72 7E 72 00 F0 F8 00 FC FC D0 DC
+    .byte $07, $1C, $30, $60, $40, $C6, $86, $86, $00, $03, $0F, $1F, $3F, $3F, $7D, $7D ; ROM $004890: 07 1C 30 60 40 C6 86 86 00 03 0F 1F 3F 3F 7D 7D
+    .byte $E0, $38, $0C, $06, $02, $63, $61, $61, $00, $C0, $F0, $F8, $FC, $FC, $DE, $DE ; ROM $0048A0: E0 38 0C 06 02 63 61 61 00 C0 F0 F8 FC FC DE DE
+    .byte $07, $1C, $30, $60, $40, $C6, $86, $86, $00, $03, $0F, $1F, $3F, $3F, $7D, $7D ; ROM $0048B0: 07 1C 30 60 40 C6 86 86 00 03 0F 1F 3F 3F 7D 7D
+    .byte $E0, $38, $0C, $06, $02, $63, $61, $61, $00, $C0, $F0, $F8, $FC, $FC, $DE, $DE ; ROM $0048C0: E0 38 0C 06 02 63 61 61 00 C0 F0 F8 FC FC DE DE
+    .byte $07, $1C, $30, $60, $46, $C6, $86, $86, $00, $03, $0F, $1F, $3F, $3D, $7D, $7D ; ROM $0048D0: 07 1C 30 60 46 C6 86 86 00 03 0F 1F 3F 3D 7D 7D
+    .byte $E0, $38, $0C, $06, $62, $63, $61, $61, $00, $C0, $F0, $F8, $FC, $DC, $DE, $DE ; ROM $0048E0: E0 38 0C 06 62 63 61 61 00 C0 F0 F8 FC DC DE DE
+    .byte $07, $1C, $30, $60, $40, $CE, $8E, $8E, $00, $03, $0F, $1F, $3F, $3F, $7B, $7F ; ROM $0048F0: 07 1C 30 60 40 CE 8E 8E 00 03 0F 1F 3F 3F 7B 7F
+    .byte $E0, $38, $0C, $06, $02, $73, $71, $71, $00, $C0, $F0, $F8, $FC, $FC, $DE, $FE ; ROM $004900: E0 38 0C 06 02 73 71 71 00 C0 F0 F8 FC FC DE FE
+    .byte $46, $70, $40, $41, $3F, $20, $10, $1F, $3D, $0F, $3F, $3E, $00, $1F, $0F, $00 ; ROM $004910: 46 70 40 41 3F 20 10 1F 3D 0F 3F 3E 00 1F 0F 00
+    .byte $62, $0E, $02, $82, $FC, $04, $08, $F8, $DC, $F0, $FC, $7C, $00, $F8, $F0, $00 ; ROM $004920: 62 0E 02 82 FC 04 08 F8 DC F0 FC 7C 00 F8 F0 00
+    .byte $70, $40, $41, $3F, $20, $1F, $00, $00, $0F, $3F, $3E, $00, $1F, $00, $00, $00 ; ROM $004930: 70 40 41 3F 20 1F 00 00 0F 3F 3E 00 1F 00 00 00
+    .byte $0E, $02, $82, $FC, $04, $F8, $00, $00, $F0, $FC, $7C, $00, $F8, $00, $00, $00 ; ROM $004940: 0E 02 82 FC 04 F8 00 00 F0 FC 7C 00 F8 00 00 00
+    .byte $81, $FF, $60, $1F, $00, $00, $00, $00, $7E, $00, $1F, $00, $00, $00, $00, $00 ; ROM $004950: 81 FF 60 1F 00 00 00 00 7E 00 1F 00 00 00 00 00
+    .byte $81, $FF, $06, $F8, $00, $00, $00, $00, $7E, $00, $F8, $00, $00, $00, $00, $00 ; ROM $004960: 81 FF 06 F8 00 00 00 00 7E 00 F8 00 00 00 00 00
+    .byte $4E, $70, $41, $43, $3F, $21, $10, $1F, $3F, $0F, $3E, $3C, $00, $1E, $0F, $00 ; ROM $004970: 4E 70 41 43 3F 21 10 1F 3F 0F 3E 3C 00 1E 0F 00
+    .byte $72, $0E, $82, $C2, $FC, $84, $08, $F8, $FC, $F0, $7C, $3C, $00, $78, $F0, $00 ; ROM $004980: 72 0E 82 C2 FC 84 08 F8 FC F0 7C 3C 00 78 F0 00
+    .byte $80, $80, $CF, $4F, $67, $30, $1C, $07, $7F, $7F, $31, $30, $18, $0F, $03, $00 ; ROM $004990: 80 80 CF 4F 67 30 1C 07 7F 7F 31 30 18 0F 03 00
+    .byte $01, $01, $F3, $F2, $E6, $0C, $38, $E0, $FE, $FE, $4C, $0C, $18, $F0, $C0, $00 ; ROM $0049A0: 01 01 F3 F2 E6 0C 38 E0 FE FE 4C 0C 18 F0 C0 00
+    .byte $80, $80, $CF, $47, $60, $30, $1C, $07, $7F, $7F, $31, $38, $1F, $0F, $03, $00 ; ROM $0049B0: 80 80 CF 47 60 30 1C 07 7F 7F 31 38 1F 0F 03 00
+    .byte $01, $01, $F3, $E2, $06, $0C, $38, $E0, $FE, $FE, $4C, $1C, $F8, $F0, $C0, $00 ; ROM $0049C0: 01 01 F3 E2 06 0C 38 E0 FE FE 4C 1C F8 F0 C0 00
+    .byte $80, $90, $CF, $47, $60, $30, $1C, $07, $7F, $6F, $31, $38, $1F, $0F, $03, $00 ; ROM $0049D0: 80 90 CF 47 60 30 1C 07 7F 6F 31 38 1F 0F 03 00
+    .byte $01, $09, $F3, $E2, $06, $0C, $38, $E0, $FE, $F6, $4C, $1C, $F8, $F0, $C0, $00 ; ROM $0049E0: 01 09 F3 E2 06 0C 38 E0 FE F6 4C 1C F8 F0 C0 00
+    .byte $80, $83, $C7, $47, $67, $33, $1C, $07, $7F, $7C, $3A, $38, $18, $0C, $03, $00 ; ROM $0049F0: 80 83 C7 47 67 33 1C 07 7F 7C 3A 38 18 0C 03 00
+    .byte $01, $C1, $E3, $E2, $E6, $CC, $38, $E0, $FE, $3E, $5C, $1C, $18, $30, $C0, $00 ; ROM $004A00: 01 C1 E3 E2 E6 CC 38 E0 FE 3E 5C 1C 18 30 C0 00
+    .byte $01, $02, $65, $9A, $A2, $A0, $43, $43, $00, $01, $03, $67, $7F, $7F, $3F, $3E ; ROM $004A10: 01 02 65 9A A2 A0 43 43 00 01 03 67 7F 7F 3F 3E
+    .byte $C0, $20, $18, $04, $02, $02, $62, $62, $00, $C0, $E0, $F8, $FC, $FC, $FC, $DC ; ROM $004A20: C0 20 18 04 02 02 62 62 00 C0 E0 F8 FC FC FC DC
+    .byte $0E, $11, $21, $22, $62, $A0, $43, $43, $00, $0E, $1F, $1F, $3F, $7F, $3F, $3E ; ROM $004A30: 0E 11 21 22 62 A0 43 43 00 0E 1F 1F 3F 7F 3F 3E
+    .byte $3C, $C2, $01, $01, $01, $01, $61, $62, $00, $3C, $FE, $FE, $FE, $FE, $FE, $DC ; ROM $004A40: 3C C2 01 01 01 01 61 62 00 3C FE FE FE FE FE DC
+    .byte $3C, $53, $81, $82, $62, $60, $83, $83, $00, $3C, $7F, $7F, $3F, $3F, $7F, $7E ; ROM $004A50: 3C 53 81 82 62 60 83 83 00 3C 7F 7F 3F 3F 7F 7E
+    .byte $FC, $02, $01, $01, $01, $02, $62, $62, $00, $FC, $FE, $FE, $FE, $FC, $FC, $DC ; ROM $004A60: FC 02 01 01 01 02 62 62 00 FC FE FE FE FC FC DC
+    .byte $39, $56, $80, $80, $67, $67, $87, $87, $00, $39, $7F, $7F, $3F, $3D, $7D, $7F ; ROM $004A70: 39 56 80 80 67 67 87 87 00 39 7F 7F 3F 3D 7D 7F
+    .byte $CC, $32, $01, $01, $72, $72, $71, $71, $00, $CC, $FE, $FE, $FC, $DC, $DE, $FE ; ROM $004A80: CC 32 01 01 72 72 71 71 00 CC FE FE FC DC DE FE
+    .byte $03, $0C, $10, $10, $20, $26, $26, $26, $00, $03, $0F, $0F, $1F, $1F, $1D, $1D ; ROM $004A90: 03 0C 10 10 20 26 26 26 00 03 0F 0F 1F 1F 1D 1D
+    .byte $C0, $30, $08, $08, $04, $C4, $C4, $C4, $00, $C0, $F0, $F0, $F8, $F8, $B8, $B8 ; ROM $004AA0: C0 30 08 08 04 C4 C4 C4 00 C0 F0 F0 F8 F8 B8 B8
+    .byte $03, $0C, $10, $10, $20, $26, $26, $26, $00, $03, $0F, $0F, $1F, $1F, $1D, $1D ; ROM $004AB0: 03 0C 10 10 20 26 26 26 00 03 0F 0F 1F 1F 1D 1D
+    .byte $C0, $30, $08, $08, $04, $C4, $C4, $C4, $00, $C0, $F0, $F0, $F8, $F8, $B8, $B8 ; ROM $004AC0: C0 30 08 08 04 C4 C4 C4 00 C0 F0 F0 F8 F8 B8 B8
+    .byte $00, $01, $02, $04, $08, $09, $11, $11, $00, $00, $01, $03, $07, $07, $0F, $0F ; ROM $004AD0: 00 01 02 04 08 09 11 11 00 00 01 03 07 07 0F 0F
+    .byte $60, $98, $04, $02, $01, $B1, $B1, $B1, $00, $60, $F8, $FC, $FE, $FE, $6E, $6E ; ROM $004AE0: 60 98 04 02 01 B1 B1 B1 00 60 F8 FC FE FE 6E 6E
+    .byte $03, $0C, $10, $10, $2E, $2E, $2E, $2E, $00, $03, $0F, $0F, $1F, $1B, $1B, $1F ; ROM $004AF0: 03 0C 10 10 2E 2E 2E 2E 00 03 0F 0F 1F 1B 1B 1F
+    .byte $C0, $30, $08, $08, $74, $74, $74, $74, $00, $C0, $F0, $F0, $F8, $D8, $D8, $F8 ; ROM $004B00: C0 30 08 08 74 74 74 74 00 C0 F0 F0 F8 D8 D8 F8
+    .byte $53, $50, $A0, $A0, $A0, $86, $49, $30, $3E, $3F, $7F, $7F, $7F, $79, $30, $00 ; ROM $004B10: 53 50 A0 A0 A0 86 49 30 3E 3F 7F 7F 7F 79 30 00
+    .byte $62, $02, $01, $C1, $C1, $02, $8C, $70, $DC, $FC, $FE, $3E, $3E, $FC, $70, $00 ; ROM $004B20: 62 02 01 C1 C1 02 8C 70 DC FC FE 3E 3E FC 70 00
+    .byte $53, $50, $A0, $A0, $A0, $80, $4E, $31, $3E, $3F, $7F, $7F, $7F, $7F, $31, $00 ; ROM $004B30: 53 50 A0 A0 A0 80 4E 31 3E 3F 7F 7F 7F 7F 31 00
+    .byte $62, $02, $02, $C2, $02, $06, $3C, $C0, $DC, $FC, $FC, $3C, $FC, $F8, $C0, $00 ; ROM $004B40: 62 02 02 C2 02 06 3C C0 DC FC FC 3C FC F8 C0 00
+    .byte $93, $50, $60, $60, $60, $60, $38, $07, $7E, $3F, $3F, $3F, $3F, $1F, $07, $00 ; ROM $004B50: 93 50 60 60 60 60 38 07 7E 3F 3F 3F 3F 1F 07 00
+    .byte $62, $02, $01, $C1, $C1, $02, $7C, $80, $DC, $FC, $FE, $3E, $3E, $FC, $80, $00 ; ROM $004B60: 62 02 01 C1 C1 02 7C 80 DC FC FE 3E 3E FC 80 00
+    .byte $97, $50, $61, $A3, $A3, $41, $24, $1B, $7F, $3F, $3E, $7C, $7C, $3E, $1B, $00 ; ROM $004B70: 97 50 61 A3 A3 41 24 1B 7F 3F 3E 7C 7C 3E 1B 00
+    .byte $71, $02, $C2, $E1, $E1, $C2, $90, $6C, $FE, $FC, $3C, $1E, $1E, $3C, $6C, $00 ; ROM $004B80: 71 02 C2 E1 E1 C2 90 6C FE FC 3C 1E 1E 3C 6C 00
+    .byte $20, $20, $27, $23, $20, $40, $46, $79, $1F, $1F, $18, $1C, $1F, $3F, $39, $00 ; ROM $004B90: 20 20 27 23 20 40 46 79 1F 1F 18 1C 1F 3F 39 00
+    .byte $04, $04, $C4, $84, $04, $02, $72, $8E, $F8, $F8, $38, $78, $F8, $FC, $8C, $00 ; ROM $004BA0: 04 04 C4 84 04 02 72 8E F8 F8 38 78 F8 FC 8C 00
+    .byte $20, $20, $27, $23, $20, $40, $31, $0E, $1F, $1F, $18, $1C, $1F, $3F, $0E, $00 ; ROM $004BB0: 20 20 27 23 20 40 31 0E 1F 1F 18 1C 1F 3F 0E 00
+    .byte $04, $04, $C4, $84, $04, $02, $8C, $70, $F8, $F8, $38, $78, $F8, $FC, $70, $00 ; ROM $004BC0: 04 04 C4 84 04 02 8C 70 F8 F8 38 78 F8 FC 70 00
+    .byte $10, $20, $60, $80, $40, $61, $1E, $00, $0F, $1F, $1F, $7F, $3F, $1E, $00, $00 ; ROM $004BD0: 10 20 60 80 40 61 1E 00 0F 1F 1F 7F 3F 1E 00 00
+    .byte $01, $02, $02, $04, $08, $90, $60, $00, $FE, $FC, $FC, $F8, $F0, $60, $00, $00 ; ROM $004BE0: 01 02 02 04 08 90 60 00 FE FC FC F8 F0 60 00 00
+    .byte $20, $21, $23, $23, $21, $40, $46, $79, $1F, $1E, $1C, $1C, $1E, $3F, $39, $00 ; ROM $004BF0: 20 21 23 23 21 40 46 79 1F 1E 1C 1C 1E 3F 39 00
+    .byte $04, $84, $C4, $C4, $84, $02, $72, $8E, $F8, $78, $38, $38, $78, $FC, $8C, $00 ; ROM $004C00: 04 84 C4 C4 84 02 72 8E F8 78 38 38 78 FC 8C 00
+    .byte $33, $4C, $B0, $A0, $46, $46, $86, $B0, $00, $33, $7F, $7F, $3F, $3D, $7D, $7F ; ROM $004C10: 33 4C B0 A0 46 46 86 B0 00 33 7F 7F 3F 3D 7D 7F
+    .byte $CC, $32, $0D, $05, $62, $62, $61, $0D, $00, $CC, $FE, $FE, $FC, $DC, $DE, $FE ; ROM $004C20: CC 32 0D 05 62 62 61 0D 00 CC FE FE FC DC DE FE
+    .byte $33, $4C, $B0, $A0, $46, $46, $86, $B0, $00, $33, $7F, $7F, $3F, $3D, $7D, $7F ; ROM $004C30: 33 4C B0 A0 46 46 86 B0 00 33 7F 7F 3F 3D 7D 7F
+    .byte $CC, $32, $0D, $05, $62, $62, $61, $0D, $00, $CC, $FE, $FE, $FC, $DC, $DE, $FE ; ROM $004C40: CC 32 0D 05 62 62 61 0D 00 CC FE FE FC DC DE FE
+    .byte $03, $34, $78, $A0, $86, $46, $86, $B0, $00, $03, $37, $7F, $7D, $3D, $7F, $7F ; ROM $004C50: 03 34 78 A0 86 46 86 B0 00 03 37 7F 7D 3D 7F 7F
+    .byte $C0, $2C, $1E, $05, $61, $62, $61, $0D, $00, $C0, $EC, $FE, $DE, $DC, $FE, $FE ; ROM $004C60: C0 2C 1E 05 61 62 61 0D 00 C0 EC FE DE DC FE FE
+    .byte $33, $4C, $B0, $AE, $4E, $4E, $8E, $B0, $00, $33, $7F, $7F, $3B, $3B, $7F, $7F ; ROM $004C70: 33 4C B0 AE 4E 4E 8E B0 00 33 7F 7F 3B 3B 7F 7F
+    .byte $CC, $32, $0D, $75, $72, $72, $71, $0D, $00, $CC, $FE, $FE, $DC, $DC, $FE, $FE ; ROM $004C80: CC 32 0D 75 72 72 71 0D 00 CC FE FE DC DC FE FE
+    .byte $07, $1C, $30, $60, $40, $C6, $86, $86, $00, $03, $0F, $1F, $3F, $3F, $7D, $7D ; ROM $004C90: 07 1C 30 60 40 C6 86 86 00 03 0F 1F 3F 3F 7D 7D
+    .byte $E0, $38, $0C, $06, $02, $63, $61, $61, $00, $C0, $F0, $F8, $FC, $FC, $DE, $DE ; ROM $004CA0: E0 38 0C 06 02 63 61 61 00 C0 F0 F8 FC FC DE DE
+    .byte $07, $09, $12, $12, $14, $25, $25, $25, $00, $06, $0D, $0D, $0B, $1B, $1A, $1A ; ROM $004CB0: 07 09 12 12 14 25 25 25 00 06 0D 0D 0B 1B 1A 1A
+    .byte $C0, $20, $10, $10, $08, $48, $48, $48, $00, $C0, $E0, $E0, $F0, $F0, $B0, $B0 ; ROM $004CC0: C0 20 10 10 08 48 48 48 00 C0 E0 E0 F0 F0 B0 B0
+    .byte $03, $02, $02, $02, $02, $02, $02, $02, $00, $01, $01, $01, $01, $01, $01, $01 ; ROM $004CD0: 03 02 02 02 02 02 02 02 00 01 01 01 01 01 01 01
+    .byte $C0, $40, $40, $40, $40, $40, $40, $40, $00, $80, $80, $80, $80, $80, $80, $80 ; ROM $004CE0: C0 40 40 40 40 40 40 40 00 80 80 80 80 80 80 80
+    .byte $07, $1C, $30, $60, $4E, $CE, $8E, $8E, $00, $03, $0F, $1F, $3F, $3B, $7B, $7F ; ROM $004CF0: 07 1C 30 60 4E CE 8E 8E 00 03 0F 1F 3F 3B 7B 7F
+    .byte $E0, $38, $0C, $06, $72, $73, $71, $71, $00, $C0, $F0, $F8, $FC, $DC, $DE, $FE ; ROM $004D00: E0 38 0C 06 72 73 71 71 00 C0 F0 F8 FC DC DE FE
+    .byte $A0, $83, $C7, $47, $67, $33, $18, $07, $7F, $7C, $3A, $38, $18, $0C, $07, $00 ; ROM $004D10: A0 83 C7 47 67 33 18 07 7F 7C 3A 38 18 0C 07 00
+    .byte $05, $C1, $E3, $E2, $E6, $CC, $18, $E0, $FE, $3E, $5C, $1C, $18, $30, $E0, $00 ; ROM $004D20: 05 C1 E3 E2 E6 CC 18 E0 FE 3E 5C 1C 18 30 E0 00
+    .byte $A0, $83, $CF, $47, $61, $30, $18, $07, $7F, $7C, $32, $38, $1E, $0F, $07, $00 ; ROM $004D30: A0 83 CF 47 61 30 18 07 7F 7C 32 38 1E 0F 07 00
+    .byte $05, $C1, $F3, $E2, $86, $0C, $18, $E0, $FE, $3E, $4C, $1C, $78, $F0, $E0, $00 ; ROM $004D40: 05 C1 F3 E2 86 0C 18 E0 FE 3E 4C 1C 78 F0 E0 00
+    .byte $A0, $81, $C7, $47, $63, $31, $18, $07, $7F, $7E, $3A, $38, $1C, $0E, $07, $00 ; ROM $004D50: A0 81 C7 47 63 31 18 07 7F 7E 3A 38 1C 0E 07 00
+    .byte $05, $81, $E3, $E2, $C6, $8C, $18, $E0, $FE, $7E, $5C, $1C, $38, $70, $E0, $00 ; ROM $004D60: 05 81 E3 E2 C6 8C 18 E0 FE 7E 5C 1C 38 70 E0 00
+    .byte $A1, $83, $C7, $47, $67, $33, $18, $07, $7E, $7C, $3A, $38, $18, $0C, $07, $00 ; ROM $004D70: A1 83 C7 47 67 33 18 07 7E 7C 3A 38 18 0C 07 00
+    .byte $85, $C1, $E3, $E2, $E6, $CC, $18, $E0, $7E, $3E, $5C, $1C, $18, $30, $E0, $00 ; ROM $004D80: 85 C1 E3 E2 E6 CC 18 E0 7E 3E 5C 1C 18 30 E0 00
+    .byte $80, $80, $C0, $43, $61, $30, $1C, $07, $7F, $7F, $3F, $3C, $1E, $0F, $03, $00 ; ROM $004D90: 80 80 C0 43 61 30 1C 07 7F 7F 3F 3C 1E 0F 03 00
+    .byte $01, $01, $03, $C2, $86, $0C, $38, $E0, $FE, $FE, $FC, $3C, $78, $F0, $C0, $00 ; ROM $004DA0: 01 01 03 C2 86 0C 38 E0 FE FE FC 3C 78 F0 C0 00
+    .byte $24, $24, $24, $12, $12, $12, $09, $07, $1B, $1B, $1B, $0D, $0D, $0D, $06, $00 ; ROM $004DB0: 24 24 24 12 12 12 09 07 1B 1B 1B 0D 0D 0D 06 00
+    .byte $08, $08, $08, $D0, $90, $10, $20, $C0, $F0, $F0, $F0, $20, $60, $E0, $C0, $00 ; ROM $004DC0: 08 08 08 D0 90 10 20 C0 F0 F0 F0 20 60 E0 C0 00
+    .byte $02, $02, $02, $02, $02, $02, $02, $03, $01, $01, $01, $01, $01, $01, $01, $00 ; ROM $004DD0: 02 02 02 02 02 02 02 03 01 01 01 01 01 01 01 00
+    .byte $40, $40, $40, $40, $40, $40, $40, $C0, $80, $80, $80, $80, $80, $80, $80, $00 ; ROM $004DE0: 40 40 40 40 40 40 40 C0 80 80 80 80 80 80 80 00
+    .byte $80, $80, $C1, $43, $63, $30, $1C, $07, $7F, $7F, $3E, $3C, $1C, $0F, $03, $00 ; ROM $004DF0: 80 80 C1 43 63 30 1C 07 7F 7F 3E 3C 1C 0F 03 00
+    .byte $01, $01, $83, $C2, $C6, $0C, $38, $E0, $FE, $FE, $7C, $3C, $38, $F0, $C0, $00 ; ROM $004E00: 01 01 83 C2 C6 0C 38 E0 FE FE 7C 3C 38 F0 C0 00
+    .byte $00, $00, $00, $30, $30, $31, $31, $30, $7F, $C0, $9F, $8F, $8C, $8C, $8C, $8F ; ROM $004E10: 00 00 00 30 30 31 31 30 7F C0 9F 8F 8C 8C 8C 8F
+    .byte $00, $00, $1E, $0E, $06, $C6, $C6, $06, $FE, $03, $E1, $F1, $31, $31, $31, $E1 ; ROM $004E20: 00 00 1E 0E 06 C6 C6 06 FE 03 E1 F1 31 31 31 E1
+    .byte $0F, $00, $1F, $00, $3F, $00, $7F, $0F, $00, $1F, $00, $3F, $00, $7F, $00, $F0 ; ROM $004E30: 0F 00 1F 00 3F 00 7F 0F 00 1F 00 3F 00 7F 00 F0
+    .byte $F0, $08, $F8, $04, $FC, $02, $FE, $F1, $00, $F0, $00, $F8, $00, $FC, $00, $0E ; ROM $004E40: F0 08 F8 04 FC 02 FE F1 00 F0 00 F8 00 FC 00 0E
+    .byte $01, $0F, $1F, $30, $30, $37, $3F, $0F, $00, $00, $00, $0F, $0F, $08, $05, $17 ; ROM $004E50: 01 0F 1F 30 30 37 3F 0F 00 00 00 0F 0F 08 05 17
+    .byte $E0, $F8, $FC, $FC, $0E, $F6, $FA, $F8, $00, $00, $00, $00, $F0, $08, $54, $74 ; ROM $004E60: E0 F8 FC FC 0E F6 FA F8 00 00 00 00 F0 08 54 74
+    .byte $3F, $7F, $20, $20, $20, $20, $3F, $3F, $3F, $7F, $7F, $7F, $60, $60, $7F, $7F ; ROM $004E70: 3F 7F 20 20 20 20 3F 3F 3F 7F 7F 7F 60 60 7F 7F
+    .byte $FC, $FE, $04, $04, $04, $04, $FC, $FC, $FC, $FE, $FE, $FE, $06, $06, $FE, $FE ; ROM $004E80: FC FE 04 04 04 04 FC FC FC FE FE FE 06 06 FE FE
+    .byte $02, $02, $03, $07, $0F, $1F, $14, $17, $03, $03, $00, $00, $02, $04, $0F, $0C ; ROM $004E90: 02 02 03 07 0F 1F 14 17 03 03 00 00 02 04 0F 0C
+    .byte $00, $00, $80, $C0, $E0, $F0, $10, $90, $80, $80, $00, $00, $00, $00, $E0, $60 ; ROM $004EA0: 00 00 80 C0 E0 F0 10 90 80 80 00 00 00 00 E0 60
+    .byte $07, $0F, $08, $1C, $28, $2D, $5D, $5D, $07, $0F, $0F, $03, $17, $1F, $3A, $3F ; ROM $004EB0: 07 0F 08 1C 28 2D 5D 5D 07 0F 0F 03 17 1F 3A 3F
+    .byte $A0, $D0, $68, $6C, $6C, $AC, $CC, $E8, $E0, $F0, $F8, $BC, $9C, $DC, $F6, $F7 ; ROM $004EC0: A0 D0 68 6C 6C AC CC E8 E0 F0 F8 BC 9C DC F6 F7
+    .byte $00, $00, $00, $01, $03, $01, $01, $01, $00, $00, $00, $01, $03, $01, $01, $01 ; ROM $004ED0: 00 00 00 01 03 01 01 01 00 00 00 01 03 01 01 01
+    .byte $00, $00, $00, $07, $01, $07, $04, $07, $00, $00, $00, $07, $01, $07, $04, $07 ; ROM $004EE0: 00 00 00 07 01 07 04 07 00 00 00 07 01 07 04 07
+    .byte $00, $00, $00, $0A, $0A, $0F, $02, $02, $00, $00, $00, $0A, $0A, $0F, $02, $02 ; ROM $004EF0: 00 00 00 0A 0A 0F 02 02 00 00 00 0A 0A 0F 02 02
+    .byte $00, $00, $00, $0F, $09, $0F, $09, $0F, $00, $00, $00, $0F, $09, $0F, $09, $0F ; ROM $004F00: 00 00 00 0F 09 0F 09 0F 00 00 00 0F 09 0F 09 0F
+    .byte $30, $31, $31, $30, $20, $30, $3F, $00, $8C, $8C, $8C, $8F, $9F, $80, $C0, $7F ; ROM $004F10: 30 31 31 30 20 30 3F 00 8C 8C 8C 8F 9F 80 C0 7F
+    .byte $06, $C6, $C6, $06, $06, $0E, $FC, $00, $31, $31, $31, $F1, $E1, $01, $03, $FE ; ROM $004F20: 06 C6 C6 06 06 0E FC 00 31 31 31 F1 E1 01 03 FE
+    .byte $FF, $00, $FE, $0E, $F6, $06, $F3, $03, $00, $F1, $01, $F1, $09, $F9, $0C, $74 ; ROM $004F30: FF 00 FE 0E F6 06 F3 03 00 F1 01 F1 09 F9 0C 74
+    .byte $FF, $81, $FF, $F1, $FF, $F1, $FF, $E2, $00, $0E, $00, $0E, $00, $0E, $00, $0C ; ROM $004F40: FF 81 FF F1 FF F1 FF E2 00 0E 00 0E 00 0E 00 0C
+    .byte $07, $10, $1C, $0D, $0C, $06, $03, $00, $18, $0F, $03, $02, $03, $01, $00, $00 ; ROM $004F50: 07 10 1C 0D 0C 06 03 00 18 0F 03 02 03 01 00 00
+    .byte $70, $04, $1C, $D8, $18, $30, $E0, $00, $8C, $F8, $E0, $20, $E0, $C0, $00, $00 ; ROM $004F60: 70 04 1C D8 18 30 E0 00 8C F8 E0 20 E0 C0 00 00
+    .byte $3F, $3C, $24, $27, $7F, $7F, $60, $3F, $7F, $7F, $7F, $7F, $7F, $7F, $7F, $3F ; ROM $004F70: 3F 3C 24 27 7F 7F 60 3F 7F 7F 7F 7F 7F 7F 7F 3F
+    .byte $FC, $3C, $24, $E4, $FE, $FE, $06, $FC, $FE, $FE, $FE, $FE, $FE, $FE, $FE, $FC ; ROM $004F80: FC 3C 24 E4 FE FE 06 FC FE FE FE FE FE FE FE FC
+    .byte $14, $14, $14, $14, $13, $10, $1F, $0F, $0B, $0B, $0B, $0B, $0C, $0F, $00, $00 ; ROM $004F90: 14 14 14 14 13 10 1F 0F 0B 0B 0B 0B 0C 0F 00 00
+    .byte $50, $10, $10, $50, $90, $10, $F0, $E0, $A0, $E0, $E0, $A0, $60, $E0, $00, $00 ; ROM $004FA0: 50 10 10 50 90 10 F0 E0 A0 E0 E0 A0 60 E0 00 00
+    .byte $02, $25, $20, $07, $08, $00, $20, $70, $7F, $7A, $7F, $78, $37, $3F, $1F, $0F ; ROM $004FB0: 02 25 20 07 08 00 20 70 7F 7A 7F 78 37 3F 1F 0F
+    .byte $04, $04, $20, $20, $84, $0E, $1E, $1F, $FB, $FB, $FF, $FE, $78, $F0, $E0, $80 ; ROM $004FC0: 04 04 20 20 84 0E 1E 1F FB FB FF FE 78 F0 E0 80
+    .byte $00, $00, $00, $17, $35, $15, $15, $17, $00, $00, $00, $17, $35, $15, $15, $17 ; ROM $004FD0: 00 00 00 17 35 15 15 17 00 00 00 17 35 15 15 17
+    .byte $00, $00, $00, $77, $15, $75, $45, $77, $00, $00, $00, $77, $15, $75, $45, $77 ; ROM $004FE0: 00 00 00 77 15 75 45 77 00 00 00 77 15 75 45 77
+    .byte $00, $00, $00, $A7, $A5, $F5, $25, $27, $00, $00, $00, $A7, $A5, $F5, $25, $27 ; ROM $004FF0: 00 00 00 A7 A5 F5 25 27 00 00 00 A7 A5 F5 25 27
+    .byte $00, $00, $00, $77, $55, $75, $55, $77, $00, $00, $00, $77, $55, $75, $55, $77 ; ROM $005000: 00 00 00 77 55 75 55 77 00 00 00 77 55 75 55 77
+    .byte $7F, $BF, $C0, $C1, $C3, $C7, $CF, $CF, $FF, $C0, $BF, $BF, $BF, $BF, $BF, $BF ; ROM $005010: 7F BF C0 C1 C3 C7 CF CF FF C0 BF BF BF BF BF BF
+    .byte $FD, $FF, $03, $F3, $F3, $E3, $F3, $F3, $FE, $02, $FE, $EE, $8E, $DE, $EE, $EE ; ROM $005020: FD FF 03 F3 F3 E3 F3 F3 FE 02 FE EE 8E DE EE EE
+    .byte $7F, $BF, $C0, $C0, $C3, $C7, $CF, $DF, $FF, $C0, $BF, $BF, $BF, $BF, $BF, $BA ; ROM $005030: 7F BF C0 C0 C3 C7 CF DF FF C0 BF BF BF BF BF BA
+    .byte $FD, $FF, $1F, $7F, $FF, $FF, $FF, $FF, $FE, $02, $FA, $F2, $E6, $8E, $FA, $F2 ; ROM $005040: FD FF 1F 7F FF FF FF FF FE 02 FA F2 E6 8E FA F2
+    .byte $7F, $BF, $C0, $C1, $C3, $CF, $FF, $FF, $FF, $C0, $BF, $BF, $BE, $BD, $BF, $BF ; ROM $005050: 7F BF C0 C1 C3 CF FF FF FF C0 BF BF BE BD BF BF
+    .byte $FD, $FF, $FB, $FB, $FF, $FF, $FF, $FF, $FE, $02, $B6, $76, $FA, $FA, $FA, $FA ; ROM $005060: FD FF FB FB FF FF FF FF FE 02 B6 76 FA FA FA FA
+    .byte $7F, $BF, $CF, $CF, $CF, $F7, $FF, $FF, $FF, $C0, $BF, $BF, $B6, $AF, $BF, $87 ; ROM $005070: 7F BF CF CF CF F7 FF FF FF C0 BF BF B6 AF BF 87
+    .byte $FD, $FF, $83, $FF, $FF, $FF, $FF, $FF, $FE, $02, $7E, $FE, $02, $FE, $42, $3E ; ROM $005080: FD FF 83 FF FF FF FF FF FE 02 7E FE 02 FE 42 3E
+    .byte $7F, $BF, $CE, $DF, $FF, $FF, $FF, $FF, $FF, $C0, $BD, $BE, $BF, $BF, $BC, $BB ; ROM $005090: 7F BF CE DF FF FF FF FF FF C0 BD BE BF BF BC BB
+    .byte $FD, $FF, $3B, $7F, $FF, $FF, $FF, $FF, $FE, $02, $F6, $FA, $FE, $9E, $7E, $3E ; ROM $0050A0: FD FF 3B 7F FF FF FF FF FE 02 F6 FA FE 9E 7E 3E
+    .byte $7F, $BF, $C3, $C7, $CF, $DF, $DF, $DF, $FF, $C0, $BE, $BC, $BE, $BF, $BF, $BF ; ROM $0050B0: 7F BF C3 C7 CF DF DF DF FF C0 BE BC BE BF BF BF
+    .byte $FD, $FF, $03, $FF, $FF, $FF, $FF, $FF, $FE, $02, $FE, $FE, $02, $FE, $02, $FE ; ROM $0050C0: FD FF 03 FF FF FF FF FF FE 02 FE FE 02 FE 02 FE
+    .byte $7F, $BF, $C8, $C8, $CD, $ED, $EF, $EF, $FF, $C0, $BF, $BF, $BF, $BF, $BA, $BA ; ROM $0050D0: 7F BF C8 C8 CD ED EF EF FF C0 BF BF BF BF BA BA
+    .byte $FD, $FF, $8B, $8B, $9B, $BB, $F3, $F7, $FE, $02, $FE, $FE, $FE, $FE, $5E, $5E ; ROM $0050E0: FD FF 8B 8B 9B BB F3 F7 FE 02 FE FE FE FE 5E 5E
+    .byte $7F, $BF, $C3, $C7, $CF, $CF, $CE, $CE, $FF, $C0, $BF, $BF, $BE, $BC, $BD, $B1 ; ROM $0050F0: 7F BF C3 C7 CF CF CE CE FF C0 BF BF BE BC BD B1
+    .byte $FD, $FF, $E3, $F3, $FB, $7B, $3B, $7B, $FE, $02, $DE, $EE, $76, $B6, $F6, $F6 ; ROM $005100: FD FF E3 F3 FB 7B 3B 7B FE 02 DE EE 76 B6 F6 F6
+    .byte $CF, $CF, $CF, $C7, $C3, $C0, $7F, $FF, $BF, $BF, $B7, $BB, $BC, $BF, $FF, $00 ; ROM $005110: CF CF CF C7 C3 C0 7F FF BF BF B7 BB BC BF FF 00
+    .byte $F3, $F3, $F3, $E3, $C3, $03, $FD, $FF, $EE, $EE, $CE, $9E, $3E, $FE, $FE, $00 ; ROM $005120: F3 F3 F3 E3 C3 03 FD FF EE EE CE 9E 3E FE FE 00
+    .byte $DF, $DF, $DF, $DF, $CF, $C7, $7F, $FF, $BA, $BF, $B8, $AF, $B7, $B8, $FF, $00 ; ROM $005130: DF DF DF DF CF C7 7F FF BA BF B8 AF B7 B8 FF 00
+    .byte $FB, $FF, $FF, $FB, $F3, $E3, $FD, $FF, $E6, $BE, $72, $E6, $CE, $1E, $FE, $00 ; ROM $005140: FB FF FF FB F3 E3 FD FF E6 BE 72 E6 CE 1E FE 00
+    .byte $FF, $DC, $FE, $F6, $DE, $DC, $7F, $FF, $80, $BB, $A5, $AD, $B9, $A3, $FF, $00 ; ROM $005150: FF DC FE F6 DE DC 7F FF 80 BB A5 AD B9 A3 FF 00
+    .byte $FF, $3B, $7F, $4F, $7F, $3B, $FD, $FF, $02, $F6, $CA, $FA, $B2, $C6, $FE, $00 ; ROM $005160: FF 3B 7F 4F 7F 3B FD FF 02 F6 CA FA B2 C6 FE 00
+    .byte $CF, $CF, $FD, $FD, $C0, $C0, $7F, $FF, $BF, $B9, $BB, $82, $BF, $BF, $FF, $00 ; ROM $005170: CF CF FD FD C0 C0 7F FF BF B9 BB 82 BF BF FF 00
+    .byte $BF, $FF, $FF, $E3, $7F, $7F, $FD, $FF, $42, $FE, $C2, $5E, $DE, $82, $FE, $00 ; ROM $005180: BF FF FF E3 7F 7F FD FF 42 FE C2 5E DE 82 FE 00
+    .byte $DF, $CF, $C7, $C3, $C1, $C1, $7F, $FF, $BA, $B8, $BC, $BF, $BF, $BE, $FF, $00 ; ROM $005190: DF CF C7 C3 C1 C1 7F FF BA B8 BC BF BF BE FF 00
+    .byte $FF, $FF, $FB, $F3, $E3, $C3, $FD, $FF, $3A, $32, $66, $CE, $9E, $3E, $FE, $00 ; ROM $0051A0: FF FF FB F3 E3 C3 FD FF 3A 32 66 CE 9E 3E FE 00
+    .byte $DF, $DF, $CF, $C0, $C0, $C0, $7F, $FF, $BF, $AE, $B0, $BF, $BF, $BF, $FF, $00 ; ROM $0051B0: DF DF CF C0 C0 C0 7F FF BF AE B0 BF BF BF FF 00
+    .byte $FF, $FF, $7F, $03, $03, $03, $FD, $FF, $02, $7E, $82, $FE, $FE, $FE, $FE, $00 ; ROM $0051C0: FF FF 7F 03 03 03 FD FF 02 7E 82 FE FE FE FE 00
+    .byte $FF, $FF, $DF, $DF, $DF, $CF, $7F, $FF, $B8, $BE, $BE, $B8, $BB, $B3, $FF, $00 ; ROM $0051D0: FF FF DF DF DF CF 7F FF B8 BE BE B8 BB B3 FF 00
+    .byte $FF, $FF, $FF, $FB, $FB, $F3, $FD, $FF, $1E, $7E, $7E, $1E, $DE, $CE, $FE, $00 ; ROM $0051E0: FF FF FF FB FB F3 FD FF 1E 7E 7E 1E DE CE FE 00
+    .byte $C1, $C1, $C1, $C1, $C1, $C1, $7F, $FF, $BF, $BF, $BE, $BF, $BF, $BE, $FF, $00 ; ROM $0051F0: C1 C1 C1 C1 C1 C1 7F FF BF BF BE BF BF BE FF 00
+    .byte $FB, $F3, $C3, $C3, $C3, $C7, $FD, $FF, $E6, $8E, $3E, $BE, $BE, $3E, $FE, $00 ; ROM $005200: FB F3 C3 C3 C3 C7 FD FF E6 8E 3E BE BE 3E FE 00
+    .byte $00, $00, $00, $00, $88, $6F, $B2, $00, $00, $00, $00, $00, $00, $00, $4D, $FF ; ROM $005210: 00 00 00 00 88 6F B2 00 00 00 00 00 00 00 4D FF
+    .byte $00, $4A, $B7, $08, $00, $00, $00, $00, $FF, $B5, $00, $00, $00, $00, $00, $00 ; ROM $005220: 00 4A B7 08 00 00 00 00 FF B5 00 00 00 00 00 00
+    .byte $0A, $04, $06, $02, $0C, $04, $06, $04, $01, $03, $01, $01, $03, $03, $01, $03 ; ROM $005230: 0A 04 06 02 0C 04 06 04 01 03 01 01 03 03 01 03
+    .byte $20, $60, $20, $50, $20, $20, $40, $20, $C0, $80, $C0, $80, $C0, $C0, $80, $C0 ; ROM $005240: 20 60 20 50 20 20 40 20 C0 80 C0 80 C0 C0 80 C0
+    .byte $00, $00, $00, $85, $FF, $04, $10, $FF, $00, $00, $00, $00, $00, $FB, $FF, $FF ; ROM $005250: 00 00 00 85 FF 04 10 FF 00 00 00 00 00 FB FF FF
+    .byte $FF, $80, $22, $FF, $B5, $00, $00, $00, $FF, $FF, $DD, $00, $00, $00, $00, $00 ; ROM $005260: FF 80 22 FF B5 00 00 00 FF FF DD 00 00 00 00 00
+    .byte $19, $09, $0D, $19, $0B, $09, $09, $19, $07, $07, $03, $07, $07, $07, $07, $07 ; ROM $005270: 19 09 0D 19 0B 09 09 19 07 07 03 07 07 07 07 07
+    .byte $98, $B0, $98, $90, $98, $B8, $90, $D8, $E0, $C0, $E0, $E0, $E0, $C0, $E0, $E0 ; ROM $005280: 98 B0 98 90 98 B8 90 D8 E0 C0 E0 E0 E0 C0 E0 E0
+    .byte $00, $4C, $5D, $EF, $82, $35, $7B, $FF, $00, $00, $00, $10, $7D, $FF, $FF, $FF ; ROM $005290: 00 4C 5D EF 82 35 7B FF 00 00 00 10 7D FF FF FF
+    .byte $FF, $6B, $88, $EA, $FF, $4D, $20, $00, $FF, $FF, $7F, $15, $00, $00, $00, $00 ; ROM $0052A0: FF 6B 88 EA FF 4D 20 00 FF FF 7F 15 00 00 00 00
+    .byte $37, $1B, $75, $73, $27, $17, $73, $19, $0F, $07, $0F, $0F, $1F, $0F, $0F, $07 ; ROM $0052B0: 37 1B 75 73 27 17 73 19 0F 07 0F 0F 1F 0F 0F 07
+    .byte $CC, $D8, $8C, $FC, $88, $DA, $DC, $B8, $F0, $E0, $F0, $E0, $F0, $E0, $E0, $C0 ; ROM $0052C0: CC D8 8C FC 88 DA DC B8 F0 E0 F0 E0 F0 E0 E0 C0
+    .byte $94, $AF, $10, $49, $FF, $FF, $FF, $FF, $00, $50, $EF, $FF, $FF, $FF, $FF, $FF ; ROM $0052D0: 94 AF 10 49 FF FF FF FF 00 50 EF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $79, $00, $34, $FF, $49, $FF, $FF, $FF, $FF, $FF, $CB, $00, $00 ; ROM $0052E0: FF FF FF 79 00 34 FF 49 FF FF FF FF FF CB 00 00
+    .byte $5F, $4F, $CF, $5F, $AF, $4F, $1F, $CF, $3F, $3F, $3F, $3F, $5F, $3F, $7F, $3F ; ROM $0052F0: 5F 4F CF 5F AF 4F 1F CF 3F 3F 3F 3F 5F 3F 7F 3F
+    .byte $F3, $E2, $E6, $F3, $F6, $F6, $F3, $E2, $FC, $FC, $F8, $FC, $F8, $F8, $FC, $FC ; ROM $005300: F3 E2 E6 F3 F6 F6 F3 E2 FC FC F8 FC F8 F8 FC FC
+    .byte $7E, $FF, $EF, $DF, $F7, $E7, $FF, $7E, $FD, $C6, $DE, $F6, $EE, $DE, $7C, $81 ; ROM $005310: 7E FF EF DF F7 E7 FF 7E FD C6 DE F6 EE DE 7C 81
+    .byte $1C, $3C, $3C, $1C, $1C, $1C, $1C, $1C, $FB, $FB, $DB, $FB, $FB, $FB, $FB, $E3 ; ROM $005320: 1C 3C 3C 1C 1C 1C 1C 1C FB FB DB FB FB FB FB E3
+    .byte $7E, $FF, $E7, $FF, $7E, $F8, $FF, $FF, $FD, $C6, $DE, $1C, $F1, $C7, $FE, $00 ; ROM $005330: 7E FF E7 FF 7E F8 FF FF FD C6 DE 1C F1 C7 FE 00
+    .byte $7E, $FF, $E7, $1F, $1F, $C7, $FF, $7E, $FD, $C6, $1E, $FC, $E6, $FE, $7C, $81 ; ROM $005340: 7E FF E7 1F 1F C7 FF 7E FD C6 1E FC E6 FE 7C 81
+    .byte $1E, $3E, $6E, $EE, $FF, $FF, $0E, $0E, $FD, $ED, $DD, $DD, $FE, $0C, $FD, $F1 ; ROM $005350: 1E 3E 6E EE FF FF 0E 0E FD ED DD DD FE 0C FD F1
+    .byte $FF, $FF, $FE, $FF, $07, $E7, $FF, $7E, $FE, $C0, $FD, $06, $FE, $DE, $7C, $81 ; ROM $005360: FF FF FE FF 07 E7 FF 7E FE C0 FD 06 FE DE 7C 81
+    .byte $7E, $FF, $E7, $FE, $FF, $E7, $FF, $7E, $FD, $C6, $D8, $FD, $C6, $DE, $7C, $81 ; ROM $005370: 7E FF E7 FE FF E7 FF 7E FD C6 D8 FD C6 DE 7C 81
+    .byte $FF, $FF, $E7, $0F, $1E, $1C, $1C, $1C, $FE, $C6, $1E, $FC, $F9, $FB, $FB, $E3 ; ROM $005380: FF FF E7 0F 1E 1C 1C 1C FE C6 1E FC F9 FB FB E3
+    .byte $7E, $FF, $E7, $FF, $FF, $E7, $FF, $7E, $FD, $C6, $DE, $7C, $C6, $DE, $7C, $81 ; ROM $005390: 7E FF E7 FF FF E7 FF 7E FD C6 DE 7C C6 DE 7C 81
+    .byte $7E, $FF, $E7, $FF, $7F, $E7, $FF, $7E, $FD, $C6, $DE, $7E, $86, $DE, $7C, $81 ; ROM $0053A0: 7E FF E7 FF 7F E7 FF 7E FD C6 DE 7E 86 DE 7C 81
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $0053B0: 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $0053C0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $E3, $CB, $C3, $C3, $CB, $DF, $00, $3E, $7E, $FE, $FE, $7E, $76, $77 ; ROM $0053D0: FF FF E3 CB C3 C3 CB DF 00 3E 7E FE FE 7E 76 77
+    .byte $FE, $FE, $8E, $A6, $86, $86, $A6, $F6, $00, $F8, $FC, $FE, $FE, $FC, $DC, $DC ; ROM $0053E0: FE FE 8E A6 86 86 A6 F6 00 F8 FC FE FE FC DC DC
+    .byte $DF, $CB, $C3, $C3, $CB, $E3, $FF, $FF, $77, $76, $7E, $FE, $FE, $7E, $3E, $00 ; ROM $0053F0: DF CB C3 C3 CB E3 FF FF 77 76 7E FE FE 7E 3E 00
+    .byte $F6, $A6, $86, $86, $A6, $8E, $FE, $FE, $DC, $DC, $FC, $FE, $FE, $FC, $F8, $00 ; ROM $005400: F6 A6 86 86 A6 8E FE FE DC DC FC FE FE FC F8 00
+    .byte $E0, $F8, $FE, $FF, $FF, $FE, $F8, $E0, $DF, $F7, $FD, $FF, $FC, $F1, $C7, $1F ; ROM $005410: E0 F8 FE FF FF FE F8 E0 DF F7 FD FF FC F1 C7 1F
+    .byte $3C, $7E, $F7, $E7, $FF, $FF, $E7, $E7, $FB, $ED, $CE, $DE, $FE, $C6, $DE, $18 ; ROM $005420: 3C 7E F7 E7 FF FF E7 E7 FB ED CE DE FE C6 DE 18
+    .byte $FE, $FF, $E7, $FF, $FF, $E7, $FF, $FE, $FD, $C6, $DE, $FC, $C6, $DE, $FC, $01 ; ROM $005430: FE FF E7 FF FF E7 FF FE FD C6 DE FC C6 DE FC 01
+    .byte $3E, $7F, $F7, $E0, $E0, $F7, $7F, $3E, $FD, $E6, $C8, $DF, $DF, $6E, $BC, $C1 ; ROM $005440: 3E 7F F7 E0 E0 F7 7F 3E FD E6 C8 DF DF 6E BC C1
+    .byte $FC, $FE, $EF, $E7, $E7, $EF, $FE, $FC, $FB, $CD, $D6, $DE, $DE, $DC, $F9, $03 ; ROM $005450: FC FE EF E7 E7 EF FE FC FB CD D6 DE DE DC F9 03
+    .byte $FF, $FF, $E0, $FC, $FC, $E0, $FF, $FF, $FE, $C0, $DF, $FB, $C3, $DF, $FE, $00 ; ROM $005460: FF FF E0 FC FC E0 FF FF FE C0 DF FB C3 DF FE 00
+    .byte $FF, $FF, $E0, $FC, $FC, $E0, $E0, $E0, $FE, $C0, $DF, $FB, $C3, $DF, $DF, $1F ; ROM $005470: FF FF E0 FC FC E0 E0 E0 FE C0 DF FB C3 DF DF 1F
+    .byte $3F, $7F, $F0, $EF, $EF, $FF, $7F, $3F, $FE, $E0, $CF, $DE, $D6, $66, $BE, $C0 ; ROM $005480: 3F 7F F0 EF EF FF 7F 3F FE E0 CF DE D6 66 BE C0
+    .byte $E7, $E7, $E7, $FF, $FF, $E7, $E7, $E7, $DE, $DE, $DE, $FE, $C6, $DE, $DE, $18 ; ROM $005490: E7 E7 E7 FF FF E7 E7 E7 DE DE DE FE C6 DE DE 18
+    .byte $7C, $7C, $38, $38, $38, $38, $7C, $7C, $FB, $B3, $F7, $F7, $F7, $F7, $FB, $83 ; ROM $0054A0: 7C 7C 38 38 38 38 7C 7C FB B3 F7 F7 F7 F7 FB 83
+    .byte $07, $07, $07, $07, $E7, $E7, $FF, $7E, $FE, $FE, $FE, $FE, $DE, $DE, $7C, $81 ; ROM $0054B0: 07 07 07 07 E7 E7 FF 7E FE FE FE FE DE DE 7C 81
+    .byte $E7, $EE, $FC, $F8, $F8, $FC, $EF, $E7, $DE, $DD, $DB, $F7, $FF, $CF, $D6, $18 ; ROM $0054C0: E7 EE FC F8 F8 FC EF E7 DE DD DB F7 FF CF D6 18
+    .byte $E0, $E0, $E0, $E0, $E0, $E0, $FF, $FF, $DF, $DF, $DF, $DF, $DF, $DF, $FE, $00 ; ROM $0054D0: E0 E0 E0 E0 E0 E0 FF FF DF DF DF DF DF DF FE 00
+    .byte $E7, $FF, $FF, $FF, $FF, $E7, $E7, $E7, $DE, $EE, $FE, $D6, $C6, $DE, $DE, $18 ; ROM $0054E0: E7 FF FF FF FF E7 E7 E7 DE EE FE D6 C6 DE DE 18
+    .byte $E7, $F7, $FF, $FF, $FF, $EF, $E7, $E7, $DE, $EE, $F6, $DE, $CE, $D6, $DE, $18 ; ROM $0054F0: E7 F7 FF FF FF EF E7 E7 DE EE F6 DE CE D6 DE 18
+    .byte $7E, $FF, $E7, $E7, $E7, $E7, $FF, $7E, $FD, $C6, $DE, $DE, $DE, $DE, $7C, $81 ; ROM $005500: 7E FF E7 E7 E7 E7 FF 7E FD C6 DE DE DE DE 7C 81
+    .byte $FE, $FF, $E7, $E7, $FF, $FE, $E0, $E0, $FD, $C6, $DE, $DE, $FC, $C1, $DF, $1F ; ROM $005510: FE FF E7 E7 FF FE E0 E0 FD C6 DE DE FC C1 DF 1F
+    .byte $7E, $FF, $E7, $E7, $FF, $FF, $FF, $7F, $FD, $C6, $DE, $DE, $DE, $E4, $7A, $80 ; ROM $005520: 7E FF E7 E7 FF FF FF 7F FD C6 DE DE DE E4 7A 80
+    .byte $FE, $FF, $E7, $EF, $FF, $FE, $FF, $EF, $FD, $C6, $DE, $DE, $F8, $DD, $CE, $10 ; ROM $005530: FE FF E7 EF FF FE FF EF FD C6 DE DE F8 DD CE 10
+    .byte $7C, $FE, $EE, $FE, $7F, $E7, $FF, $7E, $FB, $CD, $D1, $7D, $86, $DE, $7C, $81 ; ROM $005540: 7C FE EE FE 7F E7 FF 7E FB CD D1 7D 86 DE 7C 81
+    .byte $FE, $FE, $38, $38, $38, $38, $38, $38, $FD, $31, $F7, $F7, $F7, $F7, $F7, $C7 ; ROM $005550: FE FE 38 38 38 38 38 38 FD 31 F7 F7 F7 F7 F7 C7
+    .byte $E7, $E7, $E7, $E7, $E7, $E7, $FF, $7E, $DE, $DE, $DE, $DE, $DE, $DE, $7C, $81 ; ROM $005560: E7 E7 E7 E7 E7 E7 FF 7E DE DE DE DE DE DE 7C 81
+    .byte $E7, $E7, $E7, $FF, $FF, $7E, $3C, $18, $DE, $DE, $DE, $EE, $7C, $B9, $D3, $E7 ; ROM $005570: E7 E7 E7 FF FF 7E 3C 18 DE DE DE EE 7C B9 D3 E7
+    .byte $E7, $E7, $F7, $FF, $FF, $FF, $FF, $E7, $DE, $DE, $DE, $FE, $FE, $EE, $C6, $18 ; ROM $005580: E7 E7 F7 FF FF FF FF E7 DE DE DE FE FE EE C6 18
+    .byte $E7, $FF, $FF, $7E, $7E, $FF, $FF, $E7, $DE, $EE, $7C, $B9, $FD, $EE, $C6, $18 ; ROM $005590: E7 FF FF 7E 7E FF FF E7 DE EE 7C B9 FD EE C6 18
+    .byte $EE, $EE, $EE, $FE, $7C, $38, $38, $38, $DD, $DD, $DD, $79, $B3, $F7, $F7, $C7 ; ROM $0055A0: EE EE EE FE 7C 38 38 38 DD DD DD 79 B3 F7 F7 C7
+    .byte $FF, $FF, $1F, $3E, $7C, $F8, $FF, $FF, $FE, $0E, $FC, $F9, $F3, $E7, $FE, $00 ; ROM $0055B0: FF FF 1F 3E 7C F8 FF FF FE 0E FC F9 F3 E7 FE 00
+    .byte $00, $4C, $5D, $EF, $82, $35, $7B, $FF, $00, $00, $00, $10, $7D, $FF, $FF, $FF ; ROM $0055C0: 00 4C 5D EF 82 35 7B FF 00 00 00 10 7D FF FF FF
+    .byte $FF, $6B, $88, $EA, $FF, $4D, $20, $00, $FF, $FF, $7F, $15, $00, $00, $00, $00 ; ROM $0055D0: FF 6B 88 EA FF 4D 20 00 FF FF 7F 15 00 00 00 00
+    .byte $94, $AF, $10, $49, $FF, $FF, $FF, $FF, $00, $50, $EF, $FF, $FF, $FF, $FF, $FF ; ROM $0055E0: 94 AF 10 49 FF FF FF FF 00 50 EF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $79, $00, $34, $FF, $49, $FF, $FF, $FF, $FF, $FF, $CB, $00, $00 ; ROM $0055F0: FF FF FF 79 00 34 FF 49 FF FF FF FF FF CB 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005610: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005620: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005630: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005640: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $7F, $80, $80, $80, $80, $80, $80, $80, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $005650: 7F 80 80 80 80 80 80 80 FF FF FF FF FF FF FF FF
+    .byte $FF, $01, $01, $01, $01, $01, $01, $01, $FE, $FE, $FE, $FE, $FE, $FE, $FE, $FE ; ROM $005660: FF 01 01 01 01 01 01 01 FE FE FE FE FE FE FE FE
+    .byte $80, $80, $80, $80, $80, $80, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $80, $00 ; ROM $005670: 80 80 80 80 80 80 FF FF FF FF FF FF FF FF 80 00
+    .byte $01, $01, $01, $01, $01, $01, $FD, $FF, $FE, $FE, $FE, $FE, $FE, $FE, $02, $00 ; ROM $005680: 01 01 01 01 01 01 FD FF FE FE FE FE FE FE 02 00
+    .byte $FF, $FF, $80, $80, $80, $FF, $FF, $06, $00, $7F, $FF, $FF, $FF, $00, $F9, $FB ; ROM $005690: FF FF 80 80 80 FF FF 06 00 7F FF FF FF 00 F9 FB
+    .byte $FF, $FF, $01, $01, $01, $FF, $FF, $00, $00, $FE, $FE, $FE, $FE, $00, $FF, $FF ; ROM $0056A0: FF FF 01 01 01 FF FF 00 00 FE FE FE FE 00 FF FF
+    .byte $06, $06, $FF, $FF, $00, $00, $00, $FF, $FB, $FB, $00, $FF, $FF, $FF, $FF, $00 ; ROM $0056B0: 06 06 FF FF 00 00 00 FF FB FB 00 FF FF FF FF 00
+    .byte $00, $00, $FF, $FF, $60, $60, $60, $FF, $FF, $FF, $00, $9F, $BF, $BF, $BF, $00 ; ROM $0056C0: 00 00 FF FF 60 60 60 FF FF FF 00 9F BF BF BF 00
+    .byte $00, $7F, $80, $80, $00, $7F, $F1, $02, $00, $7F, $FF, $FF, $7F, $00, $F1, $FB ; ROM $0056D0: 00 7F 80 80 00 7F F1 02 00 7F FF FF 7F 00 F1 FB
+    .byte $00, $FC, $00, $00, $02, $FC, $FF, $00, $00, $FC, $FE, $FE, $FC, $00, $FF, $FF ; ROM $0056E0: 00 FC 00 00 02 FC FF 00 00 FC FE FE FC 00 FF FF
+    .byte $02, $08, $F1, $FF, $00, $00, $00, $FF, $FB, $F1, $00, $FF, $FF, $FF, $FF, $00 ; ROM $0056F0: 02 08 F1 FF 00 00 00 FF FB F1 00 FF FF FF FF 00
+    .byte $00, $00, $FF, $1F, $20, $20, $80, $1F, $FF, $FF, $00, $1F, $BF, $BF, $1F, $00 ; ROM $005700: 00 00 FF 1F 20 20 80 1F FF FF 00 1F BF BF 1F 00
+    .byte $00, $00, $3F, $40, $00, $3F, $00, $E0, $00, $00, $3F, $7F, $3F, $00, $00, $E0 ; ROM $005710: 00 00 3F 40 00 3F 00 E0 00 00 3F 7F 3F 00 00 E0
+    .byte $00, $00, $F8, $00, $04, $F8, $00, $FF, $00, $00, $F8, $FC, $F8, $00, $00, $FF ; ROM $005720: 00 00 F8 00 04 F8 00 FF 00 00 F8 FC F8 00 00 FF
+    .byte $01, $10, $E0, $00, $FF, $00, $00, $FF, $F1, $E0, $00, $00, $FF, $FF, $FF, $00 ; ROM $005730: 01 10 E0 00 FF 00 00 FF F1 E0 00 00 FF FF FF 00
+    .byte $00, $00, $FF, $00, $07, $08, $80, $07, $FF, $FF, $00, $00, $07, $8F, $07, $00 ; ROM $005740: 00 00 FF 00 07 08 80 07 FF FF 00 00 07 8F 07 00
+    .byte $00, $00, $3F, $00, $3F, $00, $00, $E0, $00, $00, $3F, $3F, $00, $00, $00, $E0 ; ROM $005750: 00 00 3F 00 3F 00 00 E0 00 00 3F 3F 00 00 00 E0
+    .byte $00, $00, $F8, $04, $FC, $00, $00, $FF, $00, $00, $F8, $F8, $00, $00, $00, $FF ; ROM $005760: 00 00 F8 04 FC 00 00 FF 00 00 F8 F8 00 00 00 FF
+    .byte $10, $F0, $00, $00, $FF, $00, $FF, $00, $E0, $00, $00, $00, $FF, $FF, $00, $00 ; ROM $005770: 10 F0 00 00 FF 00 FF 00 E0 00 00 00 FF FF 00 00
+    .byte $00, $FF, $00, $00, $07, $80, $87, $00, $FF, $00, $00, $00, $07, $07, $00, $00 ; ROM $005780: 00 FF 00 00 07 80 87 00 FF 00 00 00 07 07 00 00
+    .byte $00, $00, $1F, $1F, $00, $00, $00, $F0, $00, $00, $1F, $00, $00, $00, $00, $E0 ; ROM $005790: 00 00 1F 1F 00 00 00 F0 00 00 1F 00 00 00 00 E0
+    .byte $00, $00, $FC, $FC, $00, $00, $00, $7F, $00, $00, $F8, $00, $00, $00, $00, $7F ; ROM $0057A0: 00 00 FC FC 00 00 00 7F 00 00 F8 00 00 00 00 7F
+    .byte $F0, $00, $00, $00, $FF, $FF, $00, $00, $00, $00, $00, $00, $FF, $00, $00, $00 ; ROM $0057B0: F0 00 00 00 FF FF 00 00 00 00 00 00 FF 00 00 00
+    .byte $7F, $00, $00, $00, $83, $83, $00, $00, $00, $00, $00, $00, $03, $00, $00, $00 ; ROM $0057C0: 7F 00 00 00 83 83 00 00 00 00 00 00 03 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $03, $00, $00, $00, $00, $E0 ; ROM $0057D0: 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 E0
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $F8, $00, $00, $00, $00, $0F ; ROM $0057E0: 00 00 00 00 00 00 00 00 00 00 F8 00 00 00 00 0F
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $7F, $00, $00, $00 ; ROM $0057F0: 00 00 00 00 00 00 00 00 00 00 00 00 7F 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005800: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $07, $1F, $3F, $7F, $7F, $FF, $FF, $00, $00, $00, $0C, $18, $18, $30, $30 ; ROM $005810: 00 07 1F 3F 7F 7F FF FF 00 00 00 0C 18 18 30 30
+    .byte $75, $F0, $FA, $FC, $FE, $FE, $FF, $FF, $75, $C0, $82, $80, $00, $00, $00, $00 ; ROM $005820: 75 F0 FA FC FE FE FF FF 75 C0 82 80 00 00 00 00
+    .byte $FF, $FF, $FF, $7F, $7F, $3F, $1F, $07, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005830: FF FF FF 7F 7F 3F 1F 07 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FE, $FE, $FC, $F8, $E0, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005840: FF FF FF FE FE FC F8 E0 00 00 00 00 00 00 00 00
+    .byte $00, $03, $0F, $1D, $3F, $2F, $7B, $7F, $00, $00, $00, $06, $0C, $1C, $1C, $18 ; ROM $005850: 00 03 0F 1D 3F 2F 7B 7F 00 00 00 06 0C 1C 1C 18
+    .byte $68, $C0, $F0, $F8, $FC, $FC, $FE, $FE, $68, $C0, $90, $80, $00, $00, $00, $00 ; ROM $005860: 68 C0 F0 F8 FC FC FE FE 68 C0 90 80 00 00 00 00
+    .byte $67, $7F, $7F, $3F, $3F, $1F, $0F, $03, $18, $00, $00, $00, $00, $00, $00, $00 ; ROM $005870: 67 7F 7F 3F 3F 1F 0F 03 18 00 00 00 00 00 00 00
+    .byte $FE, $FE, $FE, $FC, $FC, $F8, $F0, $C0, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005880: FE FE FE FC FC F8 F0 C0 00 00 00 00 00 00 00 00
+    .byte $01, $07, $0F, $1F, $1F, $3F, $3F, $3F, $00, $00, $00, $04, $0C, $0C, $18, $18 ; ROM $005890: 01 07 0F 1F 1F 3F 3F 3F 00 00 00 04 0C 0C 18 18
+    .byte $84, $F0, $F2, $F8, $F8, $FC, $FC, $FC, $04, $70, $C2, $80, $80, $00, $00, $00 ; ROM $0058A0: 84 F0 F2 F8 F8 FC FC FC 04 70 C2 80 80 00 00 00
+    .byte $3F, $3F, $3F, $1F, $1F, $0F, $07, $01, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $0058B0: 3F 3F 3F 1F 1F 0F 07 01 00 00 00 00 00 00 00 00
+    .byte $FC, $FC, $FC, $F8, $F8, $F0, $E0, $80, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $0058C0: FC FC FC F8 F8 F0 E0 80 00 00 00 00 00 00 00 00
+    .byte $04, $0E, $0F, $1F, $6F, $FF, $27, $1F, $03, $01, $05, $03, $19, $0A, $DE, $FA ; ROM $0058D0: 04 0E 0F 1F 6F FF 27 1F 03 01 05 03 19 0A DE FA
+    .byte $20, $20, $F0, $D0, $FC, $F7, $F8, $FC, $C0, $C0, $C0, $78, $00, $18, $5F, $57 ; ROM $0058E0: 20 20 F0 D0 FC F7 F8 FC C0 C0 C0 78 00 18 5F 57
+    .byte $1F, $1F, $CD, $6F, $3B, $1B, $0C, $06, $EB, $EB, $36, $14, $0E, $16, $03, $01 ; ROM $0058F0: 1F 1F CD 6F 3B 1B 0C 06 EB EB 36 14 0E 16 03 01
+    .byte $FC, $F8, $F3, $EE, $EC, $D8, $30, $20, $B7, $3F, $AC, $70, $50, $E8, $C0, $C0 ; ROM $005900: FC F8 F3 EE EC D8 30 20 B7 3F AC 70 50 E8 C0 C0
+    .byte $0D, $1D, $3D, $79, $F3, $F7, $07, $FF, $03, $03, $07, $07, $1F, $3F, $FF, $FF ; ROM $005910: 0D 1D 3D 79 F3 F7 07 FF 03 03 07 07 1F 3F FF FF
+    .byte $B0, $B0, $D8, $DE, $EF, $E7, $F8, $FF, $C0, $E0, $E0, $F8, $F0, $F8, $FF, $FF ; ROM $005920: B0 B0 D8 DE EF E7 F8 FF C0 E0 E0 F8 F0 F8 FF FF
+    .byte $FF, $1F, $CF, $E3, $7B, $3B, $19, $0D, $FF, $FF, $3F, $1F, $17, $0F, $0F, $03 ; ROM $005930: FF 1F CF E3 7B 3B 19 0D FF FF 3F 1F 17 0F 0F 03
+    .byte $FF, $F8, $E3, $EF, $DE, $D8, $B8, $B0, $FF, $FF, $FC, $F0, $E8, $F0, $C0, $C0 ; ROM $005940: FF F8 E3 EF DE D8 B8 B0 FF FF FC F0 E8 F0 C0 C0
+    .byte $13, $7B, $F3, $E3, $07, $0F, $FF, $FF, $0F, $07, $0F, $1F, $FF, $FF, $FF, $FF ; ROM $005950: 13 7B F3 E3 07 0F FF FF 0F 07 0F 1F FF FF FF FF
+    .byte $D8, $9C, $CD, $C7, $C2, $E5, $FF, $FF, $E0, $E0, $F0, $F8, $FD, $FF, $FF, $FF ; ROM $005960: D8 9C CD C7 C2 E5 FF FF E0 E0 F0 F8 FD FF FF FF
+    .byte $FF, $FF, $9F, $0F, $CF, $E3, $73, $37, $FF, $FF, $FF, $FF, $3F, $1F, $0F, $0F ; ROM $005970: FF FF 9F 0F CF E3 73 37 FF FF FF FF 3F 1F 0F 0F
+    .byte $FF, $FB, $E0, $E2, $CF, $95, $DC, $C8, $FF, $FF, $FF, $FD, $F0, $E8, $E0, $F0 ; ROM $005980: FF FB E0 E2 CF 95 DC C8 FF FF FF FD F0 E8 E0 F0
+    .byte $EF, $8F, $17, $5F, $FF, $FF, $FF, $FF, $1F, $7F, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $005990: EF 8F 17 5F FF FF FF FF 1F 7F FF FF FF FF FF FF
+    .byte $F4, $C7, $F8, $F9, $FF, $FF, $FF, $FF, $F8, $F8, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $0059A0: F4 C7 F8 F9 FF FF FF FF F8 F8 FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $7F, $3F, $0F, $C7, $67, $FF, $FF, $FF, $FF, $FF, $FF, $3F, $1F ; ROM $0059B0: FF FF FF 7F 3F 0F C7 67 FF FF FF FF FF FF 3F 1F
+    .byte $FF, $FF, $FF, $FF, $FE, $FE, $E3, $F5, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $F8 ; ROM $0059C0: FF FF FF FF FE FE E3 F5 FF FF FF FF FF FF FC F8
+    .byte $00, $00, $00, $00, $0A, $07, $06, $0C, $00, $00, $00, $00, $00, $00, $01, $03 ; ROM $0059D0: 00 00 00 00 0A 07 06 0C 00 00 00 00 00 00 01 03
+    .byte $00, $00, $00, $00, $B0, $E0, $60, $30, $00, $00, $00, $00, $00, $00, $80, $C0 ; ROM $0059E0: 00 00 00 00 B0 E0 60 30 00 00 00 00 00 00 80 C0
+    .byte $04, $06, $0F, $02, $00, $00, $00, $00, $03, $01, $00, $00, $00, $00, $00, $00 ; ROM $0059F0: 04 06 0F 02 00 00 00 00 03 01 00 00 00 00 00 00
+    .byte $20, $60, $E0, $90, $00, $00, $00, $00, $C0, $80, $00, $00, $00, $00, $00, $00 ; ROM $005A00: 20 60 E0 90 00 00 00 00 C0 80 00 00 00 00 00 00
+    .byte $00, $00, $00, $0D, $0F, $06, $1D, $0B, $00, $00, $00, $00, $00, $01, $03, $07 ; ROM $005A10: 00 00 00 0D 0F 06 1D 0B 00 00 00 00 00 01 03 07
+    .byte $00, $00, $00, $18, $F0, $60, $B0, $D0, $00, $00, $00, $00, $00, $80, $C0, $E0 ; ROM $005A20: 00 00 00 18 F0 60 B0 D0 00 00 00 00 00 80 C0 E0
+    .byte $0B, $05, $0E, $1B, $02, $00, $00, $00, $07, $03, $01, $00, $00, $00, $00, $00 ; ROM $005A30: 0B 05 0E 1B 02 00 00 00 07 03 01 00 00 00 00 00
+    .byte $D8, $B0, $60, $F0, $18, $00, $00, $00, $E0, $C0, $80, $00, $00, $00, $00, $00 ; ROM $005A40: D8 B0 60 F0 18 00 00 00 E0 C0 80 00 00 00 00 00
+    .byte $A4, $F2, $7F, $3F, $3D, $0C, $39, $1D, $00, $00, $00, $00, $02, $03, $07, $03 ; ROM $005A50: A4 F2 7F 3F 3D 0C 39 1D 00 00 00 00 02 03 07 03
+    .byte $25, $4F, $FE, $FE, $F8, $3E, $1C, $D8, $00, $00, $00, $00, $00, $C0, $E0, $E0 ; ROM $005A60: 25 4F FE FE F8 3E 1C D8 00 00 00 00 00 C0 E0 E0
+    .byte $4D, $39, $1C, $5F, $3F, $1F, $73, $C0, $03, $07, $03, $00, $00, $00, $00, $00 ; ROM $005A70: 4D 39 1C 5F 3F 1F 73 C0 03 07 03 00 00 00 00 00
+    .byte $98, $9E, $3D, $FC, $FE, $F8, $9E, $03, $E0, $E0, $C0, $00, $00, $00, $00, $00 ; ROM $005A80: 98 9E 3D FC FE F8 9E 03 E0 E0 C0 00 00 00 00 00
+    .byte $A6, $FB, $6E, $A0, $23, $67, $CF, $6F, $00, $00, $11, $1F, $1F, $1F, $3F, $1F ; ROM $005A90: A6 FB 6E A0 23 67 CF 6F 00 00 11 1F 1F 1F 3F 1F
+    .byte $B5, $EF, $FA, $33, $86, $E3, $F6, $F2, $00, $00, $04, $CC, $F8, $FC, $F8, $FC ; ROM $005AA0: B5 EF FA 33 86 E3 F6 F2 00 00 04 CC F8 FC F8 FC
+    .byte $CF, $4F, $87, $F3, $40, $BC, $77, $CA, $3F, $3F, $3F, $0F, $3F, $03, $00, $00 ; ROM $005AB0: CF 4F 87 F3 40 BC 77 CA 3F 3F 3F 0F 3F 03 00 00
+    .byte $F3, $F6, $EF, $C4, $26, $A4, $FE, $23, $FC, $F8, $F0, $F8, $D8, $58, $00, $00 ; ROM $005AC0: F3 F6 EF C4 26 A4 FE 23 FC F8 F0 F8 D8 58 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005AD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005AE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005AF0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005B00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005B10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $7F, $3F, $FF, $FF, $FF, $FF, $FF, $FF, $7F, $3F ; ROM $005B20: FF FF FF FF FF FF 7F 3F FF FF FF FF FF FF 7F 3F
+    .byte $07, $07, $07, $07, $07, $07, $03, $01, $07, $07, $07, $07, $07, $07, $03, $01 ; ROM $005B30: 07 07 07 07 07 07 03 01 07 07 07 07 07 07 03 01
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $F8, $F8, $F8, $F8, $F8, $F8, $F8 ; ROM $005B40: FF FF FF FF FF FF FF FF F8 F8 F8 F8 F8 F8 F8 F8
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $CF, $FF, $FF, $FF, $FF, $FF, $FF, $7E, $0C ; ROM $005B50: FF FF FF FF FF FF FF CF FF FF FF FF FF FF 7E 0C
+    .byte $F8, $F8, $F8, $F8, $F8, $F8, $F8, $F8, $00, $00, $00, $00, $00, $00, $80, $C0 ; ROM $005B60: F8 F8 F8 F8 F8 F8 F8 F8 00 00 00 00 00 00 80 C0
+    .byte $00, $80, $C0, $C0, $E0, $E0, $F0, $F0, $00, $80, $C0, $C0, $E0, $E0, $F0, $F0 ; ROM $005B70: 00 80 C0 C0 E0 E0 F0 F0 00 80 C0 C0 E0 E0 F0 F0
+    .byte $FF, $FF, $FF, $FB, $FB, $F9, $F9, $F8, $0F, $07, $07, $03, $03, $01, $01, $00 ; ROM $005B80: FF FF FF FB FB F9 F9 F8 0F 07 07 03 03 01 01 00
+    .byte $03, $0F, $18, $13, $37, $37, $6F, $6F, $03, $0F, $1F, $1F, $3F, $3F, $7F, $7F ; ROM $005B90: 03 0F 18 13 37 37 6F 6F 03 0F 1F 1F 3F 3F 7F 7F
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $7F, $7F, $7F, $3F, $3F ; ROM $005BA0: FF FF FF FF FF FF FF FF FF FF FF 7F 7F 7F 3F 3F
+    .byte $FF, $FF, $FF, $7F, $7F, $7F, $3F, $0F, $FF, $FF, $FF, $7F, $7F, $7F, $3F, $0F ; ROM $005BB0: FF FF FF 7F 7F 7F 3F 0F FF FF FF 7F 7F 7F 3F 0F
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $3F, $1F, $1F, $1F, $0F, $0F, $0F, $07 ; ROM $005BC0: FF FF FF FF FF FF FF FF 3F 1F 1F 1F 0F 0F 0F 07
+    .byte $00, $80, $80, $C0, $C0, $C0, $E0, $FC, $00, $80, $80, $C0, $C0, $C0, $E0, $E0 ; ROM $005BD0: 00 80 80 C0 C0 C0 E0 FC 00 80 80 C0 C0 C0 E0 E0
+    .byte $FC, $FC, $FE, $FE, $FE, $FF, $FF, $FF, $E0, $F0, $F0, $F0, $F8, $F8, $F8, $FC ; ROM $005BE0: FC FC FE FE FE FF FF FF E0 F0 F0 F0 F8 F8 F8 FC
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $FC, $FE, $FE, $FE, $FF, $FF, $FF ; ROM $005BF0: FF FF FF FF FF FF FF FF FC FC FE FE FE FF FF FF
+    .byte $E7, $F7, $F7, $F7, $FF, $FF, $FF, $FF, $87, $87, $87, $C7, $C7, $C7, $E7, $E7 ; ROM $005C00: E7 F7 F7 F7 FF FF FF FF 87 87 87 C7 C7 C7 E7 E7
+    .byte $0F, $3F, $61, $47, $CF, $DF, $DF, $DF, $0F, $3F, $7F, $7F, $FF, $FF, $FF, $FF ; ROM $005C10: 0F 3F 61 47 CF DF DF DF 0F 3F 7F 7F FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $005C20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $80, $E0, $F0, $F0, $F8, $F8, $F8, $FC, $80, $E0, $F0, $F0, $F8, $F8, $F8, $F8 ; ROM $005C30: 80 E0 F0 F0 F8 F8 F8 FC 80 E0 F0 F0 F8 F8 F8 F8
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $F8, $F8, $F8, $F0, $F0, $E0, $80 ; ROM $005C40: FF FF FF FF FF FF FF FF F8 F8 F8 F8 F0 F0 E0 80
+    .byte $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07 ; ROM $005C50: 07 07 07 07 07 07 07 07 07 07 07 07 07 07 07 07
+    .byte $FE, $FE, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $F8, $FC, $FC, $FE, $FE, $FF, $FF ; ROM $005C60: FE FE FF FF FF FF FF FF F8 F8 FC FC FE FE FF FF
+    .byte $00, $00, $01, $01, $83, $83, $C7, $C7, $00, $00, $01, $01, $03, $03, $07, $07 ; ROM $005C70: 00 00 01 01 83 83 C7 C7 00 00 01 01 03 03 07 07
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $CF, $FF, $FF, $FF, $FF, $FF, $FF, $7F, $0F ; ROM $005C80: FF FF FF FF FF FF FF CF FF FF FF FF FF FF 7F 0F
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $E7, $F7, $F7, $F7, $FF, $FF, $FF, $FF ; ROM $005C90: FF FF FF FF FF FF FF FF E7 F7 F7 F7 FF FF FF FF
+    .byte $FF, $FF, $FB, $FB, $FB, $F9, $F9, $F9, $07, $07, $03, $03, $03, $01, $01, $01 ; ROM $005CA0: FF FF FB FB FB F9 F9 F9 07 07 03 03 03 01 01 01
+    .byte $07, $07, $07, $07, $07, $03, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005CB0: 07 07 07 07 07 03 01 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005CC0: FF FF FF FF FF FF FF 00 00 00 00 00 00 00 00 00
+    .byte $55, $AA, $55, $AA, $55, $AA, $55, $AA, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005CD0: 55 AA 55 AA 55 AA 55 AA 00 00 00 00 00 00 00 00
+    .byte $C0, $C0, $C0, $80, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005CE0: C0 C0 C0 80 80 00 00 00 00 00 00 00 00 00 00 00
+    .byte $C7, $C7, $C7, $83, $83, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005CF0: C7 C7 C7 83 83 01 00 00 00 00 00 00 00 00 00 00
+    .byte $F8, $F8, $F8, $F8, $F8, $F8, $F8, $F8, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005D00: F8 F8 F8 F8 F8 F8 F8 F8 00 00 00 00 00 00 00 00
+    .byte $F8, $F8, $F8, $F8, $FF, $FF, $FF, $FF, $00, $00, $80, $C0, $FF, $FF, $FF, $FF ; ROM $005D10: F8 F8 F8 F8 FF FF FF FF 00 00 80 C0 FF FF FF FF
+    .byte $07, $05, $0D, $19, $F3, $C7, $FF, $FF, $07, $07, $0F, $1F, $FF, $FF, $FF, $FF ; ROM $005D20: 07 05 0D 19 F3 C7 FF FF 07 07 0F 1F FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $F8, $F8, $F8, $F8, $F8, $F0, $E0 ; ROM $005D30: FF FF FF FF FF FF FF FF F8 F8 F8 F8 F8 F8 F0 E0
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $07, $1F, $0F, $07, $07, $07, $07, $07, $07 ; ROM $005D40: FF FF FF FF FF FF FF 07 1F 0F 07 07 07 07 07 07
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $7F, $3F, $FF, $FF, $FF, $FF, $FF, $FF, $7E, $3C ; ROM $005D50: FF FF FF FF FF FF 7F 3F FF FF FF FF FF FF 7E 3C
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $7F, $7F, $3F, $3F, $1F, $1F, $0F ; ROM $005D60: FF FF FF FF FF FF FF FF FF 7F 7F 3F 3F 1F 1F 0F
+    .byte $EF, $EF, $FF, $FF, $FF, $FF, $FF, $FF, $8F, $8F, $DF, $FF, $FF, $FF, $FF, $FF ; ROM $005D70: EF EF FF FF FF FF FF FF 8F 8F DF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F7, $F7, $E7, $E7, $C7, $C7, $87 ; ROM $005D80: FF FF FF FF FF FF FF FF FF F7 F7 E7 E7 C7 C7 87
+    .byte $F8, $F8, $F8, $F8, $F8, $F0, $E0, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005D90: F8 F8 F8 F8 F8 F0 E0 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $C0, $80, $00, $00, $00, $00, $00, $00 ; ROM $005DA0: FF FF FF FF FF FF FF FC C0 80 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07, $07 ; ROM $005DB0: FF FF FF 07 07 07 07 07 07 07 07 07 07 07 07 07
+    .byte $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005DC0: FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $FC, $FE, $FF, $FF, $00, $00, $00, $00, $FC, $FE, $FF, $FF ; ROM $005DD0: 00 00 00 00 FC FE FF FF 00 00 00 00 FC FE FF FF
+    .byte $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00 ; ROM $005DE0: FF FF FF 00 00 00 00 00 00 FF 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $E0, $E0, $E0, $E0, $E0, $00, $7F, $40, $40, $40, $40, $40, $40 ; ROM $005DF0: FF FF FF E0 E0 E0 E0 E0 00 7F 40 40 40 40 40 40
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005E00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $C0, $80, $00, $00 ; ROM $005E10: FF FF FF FF FF FF FF FF FF FF FF FF C0 80 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $1F, $0F, $07, $07 ; ROM $005E20: FF FF FF FF FF FF FF FF FF FF FF FF 1F 0F 07 07
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $E0, $F0, $F8, $F8, $F8, $F8, $F8, $F8 ; ROM $005E30: FF FF FF FF FF FF FF FF E0 F0 F8 F8 F8 F8 F8 F8
+    .byte $07, $07, $07, $07, $05, $05, $0D, $19, $07, $07, $07, $07, $07, $07, $0F, $1F ; ROM $005E40: 07 07 07 07 05 05 0D 19 07 07 07 07 07 07 0F 1F
+    .byte $01, $03, $06, $04, $05, $05, $07, $07, $01, $03, $07, $07, $07, $07, $07, $07 ; ROM $005E50: 01 03 06 04 05 05 07 07 01 03 07 07 07 07 07 07
+    .byte $FF, $7F, $7F, $3F, $1F, $1F, $0F, $00, $F8, $70, $00, $00, $00, $00, $00, $00 ; ROM $005E60: FF 7F 7F 3F 1F 1F 0F 00 F8 70 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FE, $FE, $FC, $FC, $F8 ; ROM $005E70: FF FF FF FF FF FF FF FF FF FF FF FE FE FC FC F8
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $87, $07, $07, $07, $07, $07, $07, $07 ; ROM $005E80: FF FF FF FF FF FF FF FF 87 07 07 07 07 07 07 07
+    .byte $FF, $FF, $FF, $FC, $F8, $F8, $F8, $F8, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005E90: FF FF FF FC F8 F8 F8 F8 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005EA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $3F, $3F, $3F, $3F, $3F, $1F, $0F, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005EB0: 3F 3F 3F 3F 3F 1F 0F 00 00 00 00 00 00 00 00 00
+    .byte $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005EC0: C0 C0 C0 C0 C0 C0 C0 C0 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $E0, $F0, $F8, $F8, $F8, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005ED0: 00 00 00 E0 F0 F8 F8 F8 00 00 00 00 00 00 00 00
+    .byte $F8, $F0, $E0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005EE0: F8 F0 E0 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $80, $80, $C0, $C0, $C0, $C0, $C0, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005EF0: 00 80 80 C0 C0 C0 C0 C0 00 00 00 00 00 00 00 00
+    .byte $C0, $C0, $C0, $C0, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005F00: C0 C0 C0 C0 80 00 00 00 00 00 00 00 00 00 00 00
+    .byte $F7, $F7, $E7, $E7, $C7, $C7, $87, $07, $07, $07, $07, $07, $07, $07, $07, $07 ; ROM $005F10: F7 F7 E7 E7 C7 C7 87 07 07 07 07 07 07 07 07 07
+    .byte $F3, $C7, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $005F20: F3 C7 FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $87, $87, $87, $C7, $C7, $C7, $E7, $E7, $07, $07, $07, $07, $07, $07, $07, $07 ; ROM $005F30: 87 87 87 C7 C7 C7 E7 E7 07 07 07 07 07 07 07 07
+    .byte $07, $07, $07, $03, $03, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005F40: 07 07 07 03 03 01 00 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00, $7F, $FF, $00, $00, $00, $00, $00 ; ROM $005F50: FF FF FF FF FF FF FF FF 00 7F FF 00 00 00 00 00
+    .byte $FF, $FF, $FE, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FE, $FC, $00, $00, $00, $00 ; ROM $005F60: FF FF FE FF FF FF FF FF FF FF FE FC 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $20, $60, $60, $60, $60, $60, $60, $60 ; ROM $005F70: FF FF FF FF FF FF FF FF 20 60 60 60 60 60 60 60
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $60, $E0, $E0, $00, $00, $00, $00, $00 ; ROM $005F80: FF FF FF FF FF FF FF FF 60 E0 E0 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005F90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00, $FF, $FF, $00, $00, $00, $00, $00 ; ROM $005FA0: FF FF FF FF FF FF FF FF 00 FF FF 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $005FB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $02, $CE, $08, $08, $08, $08, $08, $38, $FC, $30, $30, $30, $30, $30, $30, $00 ; ROM $005FC0: 02 CE 08 08 08 08 08 38 FC 30 30 30 30 30 30 00
+    .byte $21, $11, $01, $29, $39, $21, $21, $E7, $C6, $EE, $FE, $D6, $C6, $C6, $C6, $00 ; ROM $005FD0: 21 11 01 29 39 21 21 E7 C6 EE FE D6 C6 C6 C6 00
+    .byte $00, $00, $00, $00, $00, $1C, $1C, $18, $00, $00, $00, $00, $00, $18, $18, $00 ; ROM $005FE0: 00 00 00 00 00 1C 1C 18 00 00 00 00 00 18 18 00
+    .byte $3C, $46, $93, $9F, $93, $C6, $7C, $38, $38, $44, $92, $9E, $92, $44, $38, $00 ; ROM $005FF0: 3C 46 93 9F 93 C6 7C 38 38 44 92 9E 92 44 38 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $006000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/Bomberman (U)/copilot/header.bin b/Bomberman (U)/copilot/header.bin
new file mode 100644
index 0000000..d5ba821
Binary files /dev/null and b/Bomberman (U)/copilot/header.bin differ
diff --git a/Bomberman (U)/copilot/header.o b/Bomberman (U)/copilot/header.o
new file mode 100644
index 0000000..ed9e383
Binary files /dev/null and b/Bomberman (U)/copilot/header.o differ
diff --git a/Bomberman (U)/copilot/header.s b/Bomberman (U)/copilot/header.s
new file mode 100644
index 0000000..5a67ad9
--- /dev/null
+++ b/Bomberman (U)/copilot/header.s	
@@ -0,0 +1,12 @@
+; Bomberman NES - Phase 3 semantic refinement
+; Based on the user-validated Phase 2 recursive trace from NMI, RESET, and IRQ/BRK.
+; Reachable official 6502 opcodes are emitted as instructions.
+; Unreachable bytes are classified as explicit data regions.
+
+.setcpu "6502"
+.include "symbols.inc"
+.include "locals.inc"
+
+.segment "HEADER"
+InesHeader:
+    .byte $4E, $45, $53, $1A, $01, $01, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $000000: 4E 45 53 1A 01 01 01 00 00 00 00 00 00 00 00 00
diff --git a/Bomberman (U)/copilot/linker.cfg b/Bomberman (U)/copilot/linker.cfg
index 818df82..137e696 100644
--- a/Bomberman (U)/copilot/linker.cfg	
+++ b/Bomberman (U)/copilot/linker.cfg	
@@ -1,10 +1,10 @@
 MEMORY {
-    HEADER: start = $0000, size = $0010, file = %O, fill = yes;
-    PRG:    start = $C000, size = $4000, file = %O, fill = yes;
-    CHR:    start = $0000, size = $2000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $0010, size = $4000, fill = yes;
+  CHR:    start = $4010, size = $2000, fill = yes;
 }
 SEGMENTS {
-    HEADER: load = HEADER, type = ro;
-    PRG:    load = PRG,    type = ro;
-    CHR:    load = CHR,    type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Bomberman (U)/copilot/locals.inc b/Bomberman (U)/copilot/locals.inc
index 0fc2b45..ab10886 100644
--- a/Bomberman (U)/copilot/locals.inc	
+++ b/Bomberman (U)/copilot/locals.inc	
@@ -9,8 +9,18 @@ FrameSyncFlag          = $0B
 PpuCtrlShadow          = $0C
 PpuMaskShadow          = $0D
 
-; Controller sample consulted by main-loop and menu paths.
-ControllerState        = $12
+; Controller samples consulted by main-loop and menu paths.
+ControllerState1       = $12
+ControllerState2       = $13
+
+; NMI VRAM-transfer window: $14 indexes into the $0600 transfer table,
+; $15 is the upper limit compared against $14 to decide whether to keep
+; transferring or switch to the screen-state path.
+VramReadOffset         = $14
+VramWriteLimit         = $15
+
+; Selects which NMI sub-path is taken ($60=0 → sprite DMA; $60≠0 → VRAM data).
+NmiPathSelector        = $16
 
 ; Four-byte pseudo-random generator state used by AdvanceRandomState.
 RandomState0           = $54
@@ -18,13 +28,68 @@ RandomState1           = $55
 RandomState2           = $56
 RandomState3           = $57
 
+; Alternate random-state byte at $E4 (decremented at CPU $E71B; distinct from
+; RandomState0 which lives at $54 — zero-page is reused across subsystems).
+RandomStateAlt         = $E4
+
+; Main loop delay counters.
+MainDelay              = $70
+SubDelay               = $71
+
+; Screen / mode state.
+ScreenState            = $72
+GameMode               = $59
+
+; NMI work-pending flag: nonzero means the NMI should perform VRAM transfers.
+NmiWorkPending         = $60
+
+; Object coordinate / state temporaries used by gameplay object processing.
+ObjectScreenX          = $1F
+ObjectScreenY          = $20
+ObjectXLimit           = $73
+ObjectSpawnParam       = $28
+ObjectSpawnY           = $29
+ObjectSpawnX           = $2A
+ObjectSpawnWidth       = $2B
+ObjectSpawnHeight      = $2C
+ObjectStateFlags       = $5C
+ObjectStateTimer       = $5D
+ObjectStateExtra       = $5E
+
+; Frame counters and stage counters.
+FrameCounter           = $33
+StageCounter           = $93
+
+; Object work fields and bonus timer.
+ObjectWork0            = $9C
+ObjectWork1            = $9D
+ObjectWork2            = $9E
+ObjectWork3            = $9F
+BonusTimer             = $A4
+
+; Game mode counter and object type.
+GameModeCounter        = $B0
+ObjectType             = $B1
+FrameDelay             = $B5
+
+; Frame parity toggle (NMI toggles this each frame).
+FrameParity            = $DB
+
 ; General-purpose indirect pointer used by RAM clearing and transfer loops.
+; Aliased with sound dispatcher state below (zero-page is reused).
 IndirectPtrLo          = $E0
 IndirectPtrHi          = $E1
 
 ; Sound dispatcher and channel-delay state observed in the $E642 sound engine.
+; $E0/$E1 double as IndirectPtrLo/IndirectPtrHi; $E2/$E3 are dedicated delays.
 SoundCommandState      = $DF
-SoundDispatchIndex     = $E0
-SoundDelay0            = $E1
+SoundDispatchIndex     = $E0   ; aliases IndirectPtrLo
+SoundDelay0            = $E1   ; aliases IndirectPtrHi
 SoundDelay1            = $E2
 SoundDelay2            = $E3
+
+; Audio data pointers used by the sound engine.
+AudioPtrLo             = $AC
+AudioPtrHi             = $AD
+AudioArgLo             = $AE
+AudioArgHi             = $AF
\ No newline at end of file
diff --git a/Bomberman (U)/copilot/main.s b/Bomberman (U)/copilot/main.s
index b7e2a5f..0649991 100644
--- a/Bomberman (U)/copilot/main.s	
+++ b/Bomberman (U)/copilot/main.s	
@@ -295,7 +295,7 @@ Nmi_UpdateAudioChannelPath_C13E:
     sta $69                          ; ROM $00014E: 85 69
     jsr Ppu_WriteZp10_C19D                 ; ROM $000150: 20 9D C1
     jsr Gameplay_ReadZpB2_E4C7                 ; ROM $000153: 20 C7 E4
-    jsr Sound_HandleControl_E65F                 ; ROM $000156: 20 5F E6
+    jsr SoundUpdate                 ; ROM $000156: 20 5F E6
     lda $38                          ; ROM $000159: A5 38
     beq Nmi_ReadNmiWorkPending_C16E        ; ROM $00015B: F0 21
     lda $59                          ; ROM $00015D: A5 59
@@ -385,12 +385,12 @@ SetPpuAddress:
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Ppu_WriteZp10_C19D:
     jsr Ppu_ReadControllerAndReturnA_C1BF                 ; ROM $0001AD: 20 BF C1
-    lda ControllerState                          ; ROM $0001B0: A5 12
+    lda ControllerState1                          ; ROM $0001B0: A5 12
     sta $10                          ; ROM $0001B2: 85 10
     lda $13                          ; ROM $0001B4: A5 13
     sta $11                          ; ROM $0001B6: 85 11
     jsr Ppu_ReadControllerAndReturnA_C1BF                 ; ROM $0001B8: 20 BF C1
-    lda ControllerState                          ; ROM $0001BB: A5 12
+    lda ControllerState1                          ; ROM $0001BB: A5 12
     cmp $10                          ; ROM $0001BD: C5 10
     bne Ppu_WriteZp13_C1B8                 ; ROM $0001BF: D0 07
     lda $13                          ; ROM $0001C1: A5 13
@@ -406,7 +406,7 @@ Ppu_WriteZp10_C19D:
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Ppu_WriteZp13_C1B8:
     lda #$00                         ; ROM $0001C8: A9 00
-    sta ControllerState                          ; ROM $0001CA: 85 12
+    sta ControllerState1                          ; ROM $0001CA: 85 12
     sta $13                          ; ROM $0001CC: 85 13
     rts                              ; ROM $0001CE: 60
 ; Routine: Ppu_ReadControllerAndReturnA_C1BF
@@ -437,7 +437,7 @@ Ppu_ReadControllerPath_C1CC:
     lda JOY1                         ; ROM $0001DF: AD 16 40
     jsr Ppu_HandleControl_C1EB                 ; ROM $0001E2: 20 EB C1
     bne Ppu_ReadControllerPath_C1CC                 ; ROM $0001E5: D0 F5
-    stx ControllerState                          ; ROM $0001E7: 86 12
+    stx ControllerState1                          ; ROM $0001E7: 86 12
     ldx #$00                         ; ROM $0001E9: A2 00
     ldy #$08                         ; ROM $0001EB: A0 08
 ; Routine: Ppu_ReadControllerPath_C1DD
@@ -767,7 +767,7 @@ SystemPaletteData:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 WaitForFrameBoundary:
-    lda ControllerState              ; ROM $000317: A5 12
+    lda ControllerState1              ; ROM $000317: A5 12
     bne WaitForFrameBoundary         ; ROM $000319: D0 FC
     rts                              ; ROM $00031B: 60
 ; Routine: InitializeSystemAndRunMainLoop
@@ -857,16 +857,16 @@ Main_UpdateAudioChannelPath_C34A:
     jsr EnableNmiInPpuControl                 ; ROM $000371: 20 B0 C2
     lda #$01                         ; ROM $000374: A9 01
     sta $72                          ; ROM $000376: 85 72
-; Routine: Main_HandleControl_C368
+; Routine: MainGameLoop
 ; Global: Reachable code entry at CPU $C368 traced from the interrupt-root control-flow graph.
 ; Local: Performs the instruction sequence below; semantic purpose remains provisional.
 ; Parameters: Register and memory inputs are caller-dependent.
 ; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
-Main_HandleControl_C368:
-    lda ControllerState                          ; ROM $000378: A5 12
-    bne Main_HandleControl_C368                 ; ROM $00037A: D0 FC
+MainGameLoop:
+    lda ControllerState1                          ; ROM $000378: A5 12
+    bne MainGameLoop                 ; ROM $00037A: D0 FC
 ; Routine: Main_WriteMainDelay_C36C
 ; Global: Reachable code entry at CPU $C36C traced from the interrupt-root control-flow graph.
 ; Local: Performs the instruction sequence below; semantic purpose remains provisional.
@@ -886,10 +886,10 @@ Main_WriteMainDelay_C36C:
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Main_ReadOptionState_C370:
     jsr WaitForNmiFrameHandoff                 ; ROM $000380: 20 FB CB
-    lda ControllerState                          ; ROM $000383: A5 12
+    lda ControllerState1                          ; ROM $000383: A5 12
     and #$10                         ; ROM $000385: 29 10
     bne Main_ReadGameState_C398                 ; ROM $000387: D0 1F
-    lda ControllerState                          ; ROM $000389: A5 12
+    lda ControllerState1                          ; ROM $000389: A5 12
     and #$20                         ; ROM $00038B: 29 20
     beq Main_DecrementSubDelay_C38B                 ; ROM $00038D: F0 0C
     lda $5F                          ; ROM $00038F: A5 5F
@@ -1077,7 +1077,7 @@ Main_ReadZp5D_C44F:
     lda $33                          ; ROM $000482: A5 33
     and #$03                         ; ROM $000484: 29 03
     bne Main_ReadZp5D_C44F                 ; ROM $000486: D0 D7
-    jsr Gameplay_HandleControl_C79D                 ; ROM $000488: 20 9D C7
+    jsr GameplayUpdate                 ; ROM $000488: 20 9D C7
     jsr Main_HandleControl_C66C                 ; ROM $00048B: 20 6C C6
     jmp Main_ReadZp5D_C44F                 ; ROM $00048E: 4C 4F C4
 ; Routine: Main_ReadGameState_C481
@@ -1123,7 +1123,7 @@ Main_WriteNmiWorkPending_C49F:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Main_ReadGameMode_C4AA:
-    lda ControllerState                          ; ROM $0004BA: A5 12
+    lda ControllerState1                          ; ROM $0004BA: A5 12
     and #$10                         ; ROM $0004BC: 29 10
     bne Main_WriteGameMode_C4B4                 ; ROM $0004BE: D0 04
     lda $B5                          ; ROM $0004C0: A5 B5
@@ -1146,7 +1146,7 @@ Main_WriteGameMode_C4B4:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Main_HandleControl_C4B8:
-    lda ControllerState                          ; ROM $0004C8: A5 12
+    lda ControllerState1                          ; ROM $0004C8: A5 12
     beq Main_HandleControl_C4B8                 ; ROM $0004CA: F0 FC
     jmp Main_UpdateAudioChannelPath_C34A                 ; ROM $0004CC: 4C 4A C3
 ; Routine: Main_ReadGameState_C4BF
@@ -1278,7 +1278,7 @@ Main_ReadZp93_C52E:
     lda $33                          ; ROM $00055D: A5 33
     and #$01                         ; ROM $00055F: 29 01
     bne Main_ReadZp93_C52E                 ; ROM $000561: D0 DB
-    jsr Gameplay_HandleControl_C79D                 ; ROM $000563: 20 9D C7
+    jsr GameplayUpdate                 ; ROM $000563: 20 9D C7
     jsr Main_HandleControl_C66C                 ; ROM $000566: 20 6C C6
     jmp Main_ReadZp93_C52E                 ; ROM $000569: 4C 2E C5
 ; Routine: Main_WriteGameMode_C55C
@@ -1382,7 +1382,7 @@ Main_ReadGameMode_C5BF:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Main_WriteZp58_C5C3:
-    lda ControllerState                          ; ROM $0005D3: A5 12
+    lda ControllerState1                          ; ROM $0005D3: A5 12
     beq Main_WriteZp58_C5C3                 ; ROM $0005D5: F0 FC
     lda #$01                         ; ROM $0005D7: A9 01
     sta $58                          ; ROM $0005D9: 85 58
@@ -1460,7 +1460,7 @@ Main_WriteStageCounter_C613:
     jsr WaitForNmiFrameHandoff                 ; ROM $000623: 20 FB CB
     lda #$01                         ; ROM $000626: A9 01
     sta $39                          ; ROM $000628: 85 39
-    lda ControllerState                          ; ROM $00062A: A5 12
+    lda ControllerState1                          ; ROM $00062A: A5 12
     and #$10                         ; ROM $00062C: 29 10
     beq Main_ReturnToCaller_C643                 ; ROM $00062E: F0 23
     lda $59                          ; ROM $000630: A5 59
@@ -1478,7 +1478,7 @@ Main_WriteStageCounter_C613:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Main_WriteSoundCommandState_C62F:
-    lda ControllerState                          ; ROM $00063F: A5 12
+    lda ControllerState1                          ; ROM $00063F: A5 12
     and #$10                         ; ROM $000641: 29 10
     beq Main_WriteSoundCommandState_C62F                 ; ROM $000643: F0 FA
     lda #$06                         ; ROM $000645: A9 06
@@ -1774,14 +1774,14 @@ MainStateDispatchTable:
     .byte $0F, $10, $11, $12, $13, $14, $15, $16, $13, $14, $11, $12, $0F, $10, $00, $00 ; ROM $00077D: 0F 10 11 12 13 14 15 16 13 14 11 12 0F 10 00 00
     .byte $17, $18, $19, $1A, $1B, $1C, $1D, $1E, $1F, $20, $21, $22, $23, $24, $25, $26 ; ROM $00078D: 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26
     .byte $1F, $20, $21, $22, $1B, $1C, $1D, $1E, $17, $18, $19, $1A, $00, $00, $00, $00 ; ROM $00079D: 1F 20 21 22 1B 1C 1D 1E 17 18 19 1A 00 00 00 00
-; Routine: Gameplay_HandleControl_C79D
+; Routine: GameplayUpdate
 ; Global: Reachable code entry at CPU $C79D traced from the interrupt-root control-flow graph.
 ; Local: Performs the instruction sequence below; semantic purpose remains provisional.
 ; Parameters: Register and memory inputs are caller-dependent.
 ; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
-Gameplay_HandleControl_C79D:
+GameplayUpdate:
     ldx #$4F                         ; ROM $0007AD: A2 4F
 ; Routine: Gameplay_ReadRam03E6_C79F
 ; Global: Reachable code entry at CPU $C79F traced from the interrupt-root control-flow graph.
@@ -3804,7 +3804,7 @@ Object_ReturnToCaller_CFA3:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Object_MergeZp13_CFA4:
-    lda ControllerState                          ; ROM $000FB4: A5 12
+    lda ControllerState1                          ; ROM $000FB4: A5 12
     ora $13                          ; ROM $000FB6: 05 13
     rts                              ; ROM $000FB8: 60
 ; Routine: Object_IncrementZpAC_CFA9
@@ -4785,7 +4785,7 @@ Menu_TransferVramDataPath_DAB5:
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Menu_TransferVramDataPath_DAC9:
     jsr WaitForVBlankTransition                 ; ROM $001AD9: 20 8B C2
-    lda ControllerState                          ; ROM $001ADC: A5 12
+    lda ControllerState1                          ; ROM $001ADC: A5 12
     and #$8F                         ; ROM $001ADE: 29 8F
     bne Menu_UpdateAudioChannelPath_DAF8                 ; ROM $001AE0: D0 26
     dex                              ; ROM $001AE2: CA
@@ -4807,7 +4807,7 @@ Menu_TransferVramDataPath_DAC9:
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Menu_CallHelper_DAE9:
     jsr WaitForVBlankTransition                 ; ROM $001AF9: 20 8B C2
-    lda ControllerState                          ; ROM $001AFC: A5 12
+    lda ControllerState1                          ; ROM $001AFC: A5 12
     and #$8F                         ; ROM $001AFE: 29 8F
     bne Menu_UpdateAudioChannelPath_DAF8                 ; ROM $001B00: D0 06
     dex                              ; ROM $001B02: CA
@@ -6804,14 +6804,14 @@ InitializeApu:
     lda #$0F                         ; ROM $002669: A9 0F
     sta APUSTATUS                    ; ROM $00266B: 8D 15 40
     rts                              ; ROM $00266E: 60
-; Routine: Sound_HandleControl_E65F
+; Routine: SoundUpdate
 ; Global: Reachable code entry at CPU $E65F traced from the interrupt-root control-flow graph.
 ; Local: Performs the instruction sequence below; semantic purpose remains provisional.
 ; Parameters: Register and memory inputs are caller-dependent.
 ; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
-Sound_HandleControl_E65F:
+SoundUpdate:
     ldx #$02                         ; ROM $00266F: A2 02
 ; Routine: Sound_ReadSoundDelay0_E661
 ; Global: Reachable code entry at CPU $E661 traced from the interrupt-root control-flow graph.
@@ -6969,7 +6969,7 @@ Sound_UpdateAudioChannelPath_E6DF:
 ; Side effects: Registers, flags, memory, and hardware registers written below.
 ; Confidence: High for reachability and encoding; semantic role provisional.
 Sound_UpdateAudioChannelPath_E70B:
-    dec RandomState0                ; ROM $00271B: C6 E4
+    dec RandomStateAlt              ; ROM $00271B: C6 E4
     bne Sound_ReturnToCaller_E727                 ; ROM $00271D: D0 18
     lda #$DF                         ; ROM $00271F: A9 DF
     sta APUPULSE2CTRL                        ; ROM $002721: 8D 04 40
diff --git a/Bomberman (U)/copilot/prg.o b/Bomberman (U)/copilot/prg.o
new file mode 100644
index 0000000..4e3cad5
Binary files /dev/null and b/Bomberman (U)/copilot/prg.o differ
diff --git a/Bomberman (U)/copilot/prg.s b/Bomberman (U)/copilot/prg.s
new file mode 100644
index 0000000..48b384d
--- /dev/null
+++ b/Bomberman (U)/copilot/prg.s	
@@ -0,0 +1,7552 @@
+; Bomberman NES - Phase 3 semantic refinement
+; Based on the user-validated Phase 2 recursive trace from NMI, RESET, and IRQ/BRK.
+; Reachable official 6502 opcodes are emitted as instructions.
+; Unreachable bytes are classified as explicit data regions.
+
+.setcpu "6502"
+.include "symbols.inc"
+.include "locals.inc"
+
+.segment "PRG"
+.org $C000
+
+; Routine: Reset
+; Global: Reachable code entry at CPU $C000 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Reset:
+    sei                              ; ROM $000010: 78
+    lda #$00                         ; ROM $000011: A9 00
+    sta PPUMASK                      ; ROM $000013: 8D 01 20
+    sta PPUCTRL                      ; ROM $000016: 8D 00 20
+    cld                              ; ROM $000019: D8
+    ldx #$FF                         ; ROM $00001A: A2 FF
+    txs                              ; ROM $00001C: 9A
+; Routine: WaitForFirstStartupVBlank
+; Global: Reachable code entry at CPU $C00D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+WaitForFirstStartupVBlank:
+    lda PPUSTATUS                    ; ROM $00001D: AD 02 20
+    bpl WaitForFirstStartupVBlank                 ; ROM $000020: 10 FB
+; Routine: WaitForSecondStartupVBlank
+; Global: Reachable code entry at CPU $C012 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+WaitForSecondStartupVBlank:
+    lda PPUSTATUS                    ; ROM $000022: AD 02 20
+    bpl WaitForSecondStartupVBlank                 ; ROM $000025: 10 FB
+    jmp InitializeSystemAndRunMainLoop                 ; ROM $000027: 4C 0C C3
+; Routine: NmiHandler
+; Global: Reachable code entry at CPU $C01A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+NmiHandler:
+    pha                              ; ROM $00002A: 48
+    txa                              ; ROM $00002B: 8A
+    pha                              ; ROM $00002C: 48
+    tya                              ; ROM $00002D: 98
+    pha                              ; ROM $00002E: 48
+    ldx #$00                         ; ROM $00002F: A2 00
+    stx FrameSyncFlag                ; ROM $000031: 86 0B
+    stx OAMADDR                      ; ROM $000033: 8E 03 20
+    lda $60                          ; ROM $000036: A5 60
+    beq Nmi_TransferSpriteDmaPath_C03E                 ; ROM $000038: F0 14
+    lda #$19                         ; ROM $00003A: A9 19
+    sta $0700                        ; ROM $00003C: 8D 00 07
+    lda #$EC                         ; ROM $00003F: A9 EC
+    sta $0701                        ; ROM $000041: 8D 01 07
+    lda #$00                         ; ROM $000044: A9 00
+    sta $0702                        ; ROM $000046: 8D 02 07
+    lda #$F8                         ; ROM $000049: A9 F8
+    sta $0703                        ; ROM $00004B: 8D 03 07
+; Routine: Nmi_TransferSpriteDmaPath_C03E
+; Global: Reachable code entry at CPU $C03E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferSpriteDmaPath_C03E:
+    lda #$07                         ; ROM $00004E: A9 07
+    sta OAMDMA                       ; ROM $000050: 8D 14 40
+    ldx #$09                         ; ROM $000053: A2 09
+    stx $16                          ; ROM $000055: 86 16
+    bne Nmi_ReadZp14_C0B3                 ; ROM $000057: D0 6A
+; Routine: Nmi_TransferVramDataPath_C049
+; Global: Reachable code entry at CPU $C049 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferVramDataPath_C049:
+    lda $0602,y                      ; ROM $000059: B9 02 06
+    ora $0600,y                      ; ROM $00005C: 19 00 06
+    pha                              ; ROM $00005F: 48
+    sta PPUADDR                      ; ROM $000060: 8D 06 20
+    ldx $0601,y                      ; ROM $000063: BE 01 06
+    stx PPUADDR                      ; ROM $000066: 8E 06 20
+    ldx $0603,y                      ; ROM $000069: BE 03 06
+    lda $D9C6,x                      ; ROM $00006C: BD C6 D9
+    sta PPUDATA                      ; ROM $00006F: 8D 07 20
+    lda $D9C7,x                      ; ROM $000072: BD C7 D9
+    sta PPUDATA                      ; ROM $000075: 8D 07 20
+    pla                              ; ROM $000078: 68
+    sta PPUADDR                      ; ROM $000079: 8D 06 20
+    lda $0601,y                      ; ROM $00007C: B9 01 06
+    clc                              ; ROM $00007F: 18
+    adc #$20                         ; ROM $000080: 69 20
+    sta PPUADDR                      ; ROM $000082: 8D 06 20
+    lda $D9C8,x                      ; ROM $000085: BD C8 D9
+    sta PPUDATA                      ; ROM $000088: 8D 07 20
+    lda $D9C9,x                      ; ROM $00008B: BD C9 D9
+    sta PPUDATA                      ; ROM $00008E: 8D 07 20
+    lda #$23                         ; ROM $000091: A9 23
+    ora $0600,y                      ; ROM $000093: 19 00 06
+    pha                              ; ROM $000096: 48
+    sta PPUADDR                      ; ROM $000097: 8D 06 20
+    lda $0604,y                      ; ROM $00009A: B9 04 06
+    sta PPUADDR                      ; ROM $00009D: 8D 06 20
+    tax                              ; ROM $0000A0: AA
+    lda PPUDATA                      ; ROM $0000A1: AD 07 20
+    lda PPUDATA                      ; ROM $0000A4: AD 07 20
+    and $0606,y                      ; ROM $0000A7: 39 06 06
+    ora $0607,y                      ; ROM $0000AA: 19 07 06
+    tay                              ; ROM $0000AD: A8
+    pla                              ; ROM $0000AE: 68
+    sta PPUADDR                      ; ROM $0000AF: 8D 06 20
+    stx PPUADDR                      ; ROM $0000B2: 8E 06 20
+    sty PPUDATA                      ; ROM $0000B5: 8C 07 20
+    lda #$08                         ; ROM $0000B8: A9 08
+    clc                              ; ROM $0000BA: 18
+    adc $14                          ; ROM $0000BB: 65 14
+    sta $14                          ; ROM $0000BD: 85 14
+    dec $16                          ; ROM $0000BF: C6 16
+    beq Nmi_ReadScreenState_C0B9                 ; ROM $0000C1: F0 06
+; Routine: Nmi_ReadZp14_C0B3
+; Global: Reachable code entry at CPU $C0B3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadZp14_C0B3:
+    ldy $14                          ; ROM $0000C3: A4 14
+    cpy $15                          ; ROM $0000C5: C4 15
+    bne Nmi_TransferVramDataPath_C049                 ; ROM $0000C7: D0 90
+; Routine: Nmi_ReadScreenState_C0B9
+; Global: Reachable code entry at CPU $C0B9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadScreenState_C0B9:
+    lda $72                          ; ROM $0000C9: A5 72
+    beq Nmi_ReadNmiWorkPending_C0E4                 ; ROM $0000CB: F0 27
+    lda #$22                         ; ROM $0000CD: A9 22
+    ldx #$68                         ; ROM $0000CF: A2 68
+    jsr SetPpuAddress                 ; ROM $0000D1: 20 96 C1
+    ldy #$B0                         ; ROM $0000D4: A0 B0
+    lda $5F                          ; ROM $0000D6: A5 5F
+    bne Nmi_TransferVramDataPath_C0CC                 ; ROM $0000D8: D0 02
+    ldy #$40                         ; ROM $0000DA: A0 40
+; Routine: Nmi_TransferVramDataPath_C0CC
+; Global: Reachable code entry at CPU $C0CC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferVramDataPath_C0CC:
+    sty PPUDATA                      ; ROM $0000DC: 8C 07 20
+    lda #$22                         ; ROM $0000DF: A9 22
+    ldx #$70                         ; ROM $0000E1: A2 70
+    jsr SetPpuAddress                 ; ROM $0000E3: 20 96 C1
+    ldy #$B0                         ; ROM $0000E6: A0 B0
+    lda $5F                          ; ROM $0000E8: A5 5F
+    beq Nmi_TransferVramDataPath_C0DE                 ; ROM $0000EA: F0 02
+    ldy #$40                         ; ROM $0000EC: A0 40
+; Routine: Nmi_TransferVramDataPath_C0DE
+; Global: Reachable code entry at CPU $C0DE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferVramDataPath_C0DE:
+    sty PPUDATA                      ; ROM $0000EE: 8C 07 20
+    jmp Nmi_ReadPpuStatusPath_C126                 ; ROM $0000F1: 4C 26 C1
+; Routine: Nmi_ReadNmiWorkPending_C0E4
+; Global: Reachable code entry at CPU $C0E4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadNmiWorkPending_C0E4:
+    lda $60                          ; ROM $0000F4: A5 60
+    beq Nmi_ReadPpuStatusPath_C126                 ; ROM $0000F6: F0 3E
+    lda $16                          ; ROM $0000F8: A5 16
+    cmp #$04                         ; ROM $0000FA: C9 04
+    bcc Nmi_ReadPpuStatusPath_C126                 ; ROM $0000FC: 90 38
+    lda #$20                         ; ROM $0000FE: A9 20
+    ldx #$4B                         ; ROM $000100: A2 4B
+    jsr SetPpuAddress                 ; ROM $000102: 20 96 C1
+    ldx #$00                         ; ROM $000105: A2 00
+; Routine: Nmi_TransferVramDataPath_C0F7
+; Global: Reachable code entry at CPU $C0F7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferVramDataPath_C0F7:
+    lda $61,x                        ; ROM $000107: B5 61
+    bne Nmi_TransferVramDataPath_C107                 ; ROM $000109: D0 0C
+    lda #$3A                         ; ROM $00010B: A9 3A
+    sta PPUDATA                      ; ROM $00010D: 8D 07 20
+    inx                              ; ROM $000110: E8
+    cpx #$07                         ; ROM $000111: E0 07
+    bne Nmi_TransferVramDataPath_C0F7                 ; ROM $000113: D0 F2
+    beq Nmi_ReadZp93_C114                 ; ROM $000115: F0 0D
+; Routine: Nmi_TransferVramDataPath_C107
+; Global: Reachable code entry at CPU $C107 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_TransferVramDataPath_C107:
+    lda $61,x                        ; ROM $000117: B5 61
+    clc                              ; ROM $000119: 18
+    adc #$30                         ; ROM $00011A: 69 30
+    sta PPUDATA                      ; ROM $00011C: 8D 07 20
+    inx                              ; ROM $00011F: E8
+    cpx #$07                         ; ROM $000120: E0 07
+    bne Nmi_TransferVramDataPath_C107                 ; ROM $000122: D0 F3
+; Routine: Nmi_ReadZp93_C114
+; Global: Reachable code entry at CPU $C114 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadZp93_C114:
+    lda #$20                         ; ROM $000124: A9 20
+    ldx #$46                         ; ROM $000126: A2 46
+    jsr SetPpuAddress                 ; ROM $000128: 20 96 C1
+    lda $93                          ; ROM $00012B: A5 93
+    cmp #$FF                         ; ROM $00012D: C9 FF
+    bne Nmi_CallHelper_C123                 ; ROM $00012F: D0 02
+    lda #$00                         ; ROM $000131: A9 00
+; Routine: Nmi_CallHelper_C123
+; Global: Reachable code entry at CPU $C123 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_CallHelper_C123:
+    jsr Menu_HandleControl_DF48                 ; ROM $000133: 20 48 DF
+; Routine: Nmi_ReadPpuStatusPath_C126
+; Global: Reachable code entry at CPU $C126 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadPpuStatusPath_C126:
+    lda PPUSTATUS                    ; ROM $000136: AD 02 20
+    jsr CommitPpuStateAndScroll                 ; ROM $000139: 20 96 C2
+    inc $33                          ; ROM $00013C: E6 33
+    lda $6A                          ; ROM $00013E: A5 6A
+    beq Nmi_UpdateAudioChannelPath_C13E                 ; ROM $000140: F0 0C
+    inc $69                          ; ROM $000142: E6 69
+    lda $69                          ; ROM $000144: A5 69
+    cmp #$3C                         ; ROM $000146: C9 3C
+    bcc Nmi_UpdateAudioChannelPath_C13E                 ; ROM $000148: 90 04
+    lda #$00                         ; ROM $00014A: A9 00
+    sta $6A                          ; ROM $00014C: 85 6A
+; Routine: Nmi_UpdateAudioChannelPath_C13E
+; Global: Reachable code entry at CPU $C13E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_UpdateAudioChannelPath_C13E:
+    sta $69                          ; ROM $00014E: 85 69
+    jsr Ppu_WriteZp10_C19D                 ; ROM $000150: 20 9D C1
+    jsr Gameplay_ReadZpB2_E4C7                 ; ROM $000153: 20 C7 E4
+    jsr SoundUpdate                 ; ROM $000156: 20 5F E6
+    lda $38                          ; ROM $000159: A5 38
+    beq Nmi_ReadNmiWorkPending_C16E        ; ROM $00015B: F0 21
+    lda $59                          ; ROM $00015D: A5 59
+    bne Nmi_ReadNmiWorkPending_C16E        ; ROM $00015F: D0 1D
+    lda #$0E                         ; ROM $000161: A9 0E
+    sta APUDMCCTRL                   ; ROM $000163: 8D 10 40
+    lda #$00                         ; ROM $000166: A9 00
+    sta $38                          ; ROM $000168: 85 38
+    lda #$C0                         ; ROM $00016A: A9 C0
+    sta APUDMCADDR                   ; ROM $00016C: 8D 12 40
+    lda #$FF                         ; ROM $00016F: A9 FF
+    sta APUDMCLENGTH                 ; ROM $000171: 8D 13 40
+    lda #$0F                         ; ROM $000174: A9 0F
+    sta APUSTATUS                    ; ROM $000176: 8D 15 40
+    lda #$1F                         ; ROM $000179: A9 1F
+    sta APUSTATUS                    ; ROM $00017B: 8D 15 40
+; Routine: Nmi_ReadNmiWorkPending_C16E
+; Global: Reachable code entry at CPU $C16E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadNmiWorkPending_C16E:
+    lda $60                          ; ROM $00017E: A5 60
+    beq Nmi_ToggleZpDB_C18A                 ; ROM $000180: F0 18
+; Routine: Nmi_ReadPpuStatusPath_C172
+; Global: Reachable code entry at CPU $C172 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadPpuStatusPath_C172:
+    lda PPUSTATUS                    ; ROM $000182: AD 02 20
+    and #$40                         ; ROM $000185: 29 40
+    bne Nmi_ReadPpuStatusPath_C172                 ; ROM $000187: D0 F9
+; Routine: Nmi_ReadPpuStatusPath_C179
+; Global: Reachable code entry at CPU $C179 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ReadPpuStatusPath_C179:
+    lda PPUSTATUS                    ; ROM $000189: AD 02 20
+    and #$40                         ; ROM $00018C: 29 40
+    beq Nmi_ReadPpuStatusPath_C179                 ; ROM $00018E: F0 F9
+    lda $0E                          ; ROM $000190: A5 0E
+    sta PPUSCROLL                    ; ROM $000192: 8D 05 20
+    lda $0F                          ; ROM $000195: A5 0F
+    sta PPUSCROLL                    ; ROM $000197: 8D 05 20
+; Routine: Nmi_ToggleZpDB_C18A
+; Global: Reachable code entry at CPU $C18A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Nmi_ToggleZpDB_C18A:
+    lda #$05                         ; ROM $00019A: A9 05
+    eor $DB                          ; ROM $00019C: 45 DB
+    sta $DB                          ; ROM $00019E: 85 DB
+    pla                              ; ROM $0001A0: 68
+    tay                              ; ROM $0001A1: A8
+    pla                              ; ROM $0001A2: 68
+    tax                              ; ROM $0001A3: AA
+    pla                              ; ROM $0001A4: 68
+    rti                              ; ROM $0001A5: 40
+; Routine: SetPpuAddress
+; Global: Reachable code entry at CPU $C196 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+SetPpuAddress:
+    sta PPUADDR                      ; ROM $0001A6: 8D 06 20
+    stx PPUADDR                      ; ROM $0001A9: 8E 06 20
+    rts                              ; ROM $0001AC: 60
+; Routine: Ppu_WriteZp10_C19D
+; Global: Reachable code entry at CPU $C19D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_WriteZp10_C19D:
+    jsr Ppu_ReadControllerAndReturnA_C1BF                 ; ROM $0001AD: 20 BF C1
+    lda ControllerState1                          ; ROM $0001B0: A5 12
+    sta $10                          ; ROM $0001B2: 85 10
+    lda $13                          ; ROM $0001B4: A5 13
+    sta $11                          ; ROM $0001B6: 85 11
+    jsr Ppu_ReadControllerAndReturnA_C1BF                 ; ROM $0001B8: 20 BF C1
+    lda ControllerState1                          ; ROM $0001BB: A5 12
+    cmp $10                          ; ROM $0001BD: C5 10
+    bne Ppu_WriteZp13_C1B8                 ; ROM $0001BF: D0 07
+    lda $13                          ; ROM $0001C1: A5 13
+    cmp $11                          ; ROM $0001C3: C5 11
+    bne Ppu_WriteZp13_C1B8                 ; ROM $0001C5: D0 01
+    rts                              ; ROM $0001C7: 60
+; Routine: Ppu_WriteZp13_C1B8
+; Global: Reachable code entry at CPU $C1B8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_WriteZp13_C1B8:
+    lda #$00                         ; ROM $0001C8: A9 00
+    sta ControllerState1                          ; ROM $0001CA: 85 12
+    sta $13                          ; ROM $0001CC: 85 13
+    rts                              ; ROM $0001CE: 60
+; Routine: Ppu_ReadControllerAndReturnA_C1BF
+; Global: Reachable code entry at CPU $C1BF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_ReadControllerAndReturnA_C1BF:
+    lda #$01                         ; ROM $0001CF: A9 01
+    sta JOY1                         ; ROM $0001D1: 8D 16 40
+    lda #$00                         ; ROM $0001D4: A9 00
+    sta JOY1                         ; ROM $0001D6: 8D 16 40
+    tax                              ; ROM $0001D9: AA
+    ldy #$08                         ; ROM $0001DA: A0 08
+; Routine: Ppu_ReadControllerPath_C1CC
+; Global: Reachable code entry at CPU $C1CC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_ReadControllerPath_C1CC:
+    txa                              ; ROM $0001DC: 8A
+    asl a                            ; ROM $0001DD: 0A
+    tax                              ; ROM $0001DE: AA
+    lda JOY1                         ; ROM $0001DF: AD 16 40
+    jsr Ppu_HandleControl_C1EB                 ; ROM $0001E2: 20 EB C1
+    bne Ppu_ReadControllerPath_C1CC                 ; ROM $0001E5: D0 F5
+    stx ControllerState1                          ; ROM $0001E7: 86 12
+    ldx #$00                         ; ROM $0001E9: A2 00
+    ldy #$08                         ; ROM $0001EB: A0 08
+; Routine: Ppu_ReadControllerPath_C1DD
+; Global: Reachable code entry at CPU $C1DD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_ReadControllerPath_C1DD:
+    txa                              ; ROM $0001ED: 8A
+    asl a                            ; ROM $0001EE: 0A
+    tax                              ; ROM $0001EF: AA
+    lda JOY2                         ; ROM $0001F0: AD 17 40
+    jsr Ppu_HandleControl_C1EB                 ; ROM $0001F3: 20 EB C1
+    bne Ppu_ReadControllerPath_C1DD                 ; ROM $0001F6: D0 F5
+    stx $13                          ; ROM $0001F8: 86 13
+    rts                              ; ROM $0001FA: 60
+; Routine: Ppu_HandleControl_C1EB
+; Global: Reachable code entry at CPU $C1EB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_HandleControl_C1EB:
+    and #$03                         ; ROM $0001FB: 29 03
+    beq Ppu_RetreatIndexY_C1F0                 ; ROM $0001FD: F0 01
+    inx                              ; ROM $0001FF: E8
+; Routine: Ppu_RetreatIndexY_C1F0
+; Global: Reachable code entry at CPU $C1F0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_RetreatIndexY_C1F0:
+    dey                              ; ROM $000200: 88
+    rts                              ; ROM $000201: 60
+; Routine: InitializeVideoSystem
+; Global: Reachable code entry at CPU $C1F2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+InitializeVideoSystem:
+    jsr DisableRendering                 ; ROM $000202: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $000205: 20 B9 C2
+    lda #$10                         ; ROM $000208: A9 10
+    sta PpuCtrlShadow                          ; ROM $00020A: 85 0C
+    sta PPUCTRL                      ; ROM $00020C: 8D 00 20
+    lda #$00                         ; ROM $00020F: A9 00
+    sta $0E                          ; ROM $000211: 85 0E
+    sta $14                          ; ROM $000213: 85 14
+    sta $15                          ; ROM $000215: 85 15
+    sta $0F                          ; ROM $000217: 85 0F
+    jsr HideAllSprites                 ; ROM $000219: 20 68 C2
+    jsr DisableRendering                 ; ROM $00021C: 20 57 C2
+    jsr WaitForVBlankTransition                 ; ROM $00021F: 20 8B C2
+    jsr UploadSystemPalette                 ; ROM $000222: 20 C3 C2
+; Routine: Ppu_HandleControl_C215
+; Global: Reachable code entry at CPU $C215 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_HandleControl_C215:
+    lda #$20                         ; ROM $000225: A9 20
+    ldx #$00                         ; ROM $000227: A2 00
+    jsr SetPpuAddress                 ; ROM $000229: 20 96 C1
+    ldy #$08                         ; ROM $00022C: A0 08
+    lda #$B0                         ; ROM $00022E: A9 B0
+; Routine: Ppu_TransferVramDataPath_C220
+; Global: Reachable code entry at CPU $C220 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_TransferVramDataPath_C220:
+    sta PPUDATA                      ; ROM $000230: 8D 07 20
+    dex                              ; ROM $000233: CA
+    bne Ppu_TransferVramDataPath_C220                 ; ROM $000234: D0 FA
+    dey                              ; ROM $000236: 88
+    bne Ppu_TransferVramDataPath_C220                 ; ROM $000237: D0 F7
+    lda #$23                         ; ROM $000239: A9 23
+    ldx #$C0                         ; ROM $00023B: A2 C0
+    jsr SetPpuAddress                 ; ROM $00023D: 20 96 C1
+    ldx #$40                         ; ROM $000240: A2 40
+    lda #$00                         ; ROM $000242: A9 00
+; Routine: Ppu_TransferVramDataPath_C234
+; Global: Reachable code entry at CPU $C234 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_TransferVramDataPath_C234:
+    sta PPUDATA                      ; ROM $000244: 8D 07 20
+    dex                              ; ROM $000247: CA
+    bne Ppu_TransferVramDataPath_C234                 ; ROM $000248: D0 FA
+    rts                              ; ROM $00024A: 60
+; Routine: Ppu_CallHelper_C23B
+; Global: Reachable code entry at CPU $C23B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_CallHelper_C23B:
+    jsr Ppu_HandleControl_C2B9                 ; ROM $00024B: 20 B9 C2
+    jsr WaitForVBlankTransition                 ; ROM $00024E: 20 8B C2
+    lda #$0E                         ; ROM $000251: A9 0E
+    jsr Ppu_UpdatePpuState_C25C                 ; ROM $000253: 20 5C C2
+    jsr Ppu_TransferSpriteDmaAndReturnA_C24C                 ; ROM $000256: 20 4C C2
+    jmp EnableNmiInPpuControl                 ; ROM $000259: 4C B0 C2
+; Routine: Ppu_TransferSpriteDmaAndReturnA_C24C
+; Global: Reachable code entry at CPU $C24C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_TransferSpriteDmaAndReturnA_C24C:
+    lda #$00                         ; ROM $00025C: A9 00
+    sta OAMADDR                      ; ROM $00025E: 8D 03 20
+    lda #$07                         ; ROM $000261: A9 07
+    sta OAMDMA                       ; ROM $000263: 8D 14 40
+    rts                              ; ROM $000266: 60
+; Routine: DisableRendering
+; Global: Reachable code entry at CPU $C257 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+DisableRendering:
+    jsr WaitForVBlankTransition                 ; ROM $000267: 20 8B C2
+    lda #$00                         ; ROM $00026A: A9 00
+; Routine: Ppu_UpdatePpuState_C25C
+; Global: Reachable code entry at CPU $C25C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_UpdatePpuState_C25C:
+    sta PPUMASK                      ; ROM $00026C: 8D 01 20
+; Routine: Ppu_HandleControl_C25F
+; Global: Reachable code entry at CPU $C25F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_HandleControl_C25F:
+    sta PpuMaskShadow                          ; ROM $00026F: 85 0D
+    rts                              ; ROM $000271: 60
+; Routine: Ppu_HandleControl_C262
+; Global: Reachable code entry at CPU $C262 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_HandleControl_C262:
+    lda PpuMaskShadow                          ; ROM $000272: A5 0D
+    ora #$10                         ; ROM $000274: 09 10
+    bne Ppu_HandleControl_C25F                 ; ROM $000276: D0 F7
+; Routine: HideAllSprites
+; Global: Reachable code entry at CPU $C268 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+HideAllSprites:
+    ldy #$1C                         ; ROM $000278: A0 1C
+    lda #$F8                         ; ROM $00027A: A9 F8
+; Routine: Ppu_WriteRam0700_C26C
+; Global: Reachable code entry at CPU $C26C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_WriteRam0700_C26C:
+    sta $0700,y                      ; ROM $00027C: 99 00 07
+    sta $0720,y                      ; ROM $00027F: 99 20 07
+    sta $0740,y                      ; ROM $000282: 99 40 07
+    sta $0760,y                      ; ROM $000285: 99 60 07
+    sta $0780,y                      ; ROM $000288: 99 80 07
+    sta $07A0,y                      ; ROM $00028B: 99 A0 07
+    sta $07C0,y                      ; ROM $00028E: 99 C0 07
+    sta $07E0,y                      ; ROM $000291: 99 E0 07
+    dey                              ; ROM $000294: 88
+    dey                              ; ROM $000295: 88
+    dey                              ; ROM $000296: 88
+    dey                              ; ROM $000297: 88
+    bpl Ppu_WriteRam0700_C26C                 ; ROM $000298: 10 E2
+    rts                              ; ROM $00029A: 60
+; Routine: WaitForVBlankTransition
+; Global: Reachable code entry at CPU $C28B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+WaitForVBlankTransition:
+    lda PPUSTATUS                    ; ROM $00029B: AD 02 20
+    bmi WaitForVBlankTransition                 ; ROM $00029E: 30 FB
+; Routine: Ppu_WaitPpuStatusPath_C290
+; Global: Reachable code entry at CPU $C290 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_WaitPpuStatusPath_C290:
+    lda PPUSTATUS                    ; ROM $0002A0: AD 02 20
+    bpl Ppu_WaitPpuStatusPath_C290                 ; ROM $0002A3: 10 FB
+    rts                              ; ROM $0002A5: 60
+; Routine: CommitPpuStateAndScroll
+; Global: Reachable code entry at CPU $C296 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+CommitPpuStateAndScroll:
+    lda PpuMaskShadow                          ; ROM $0002A6: A5 0D
+    sta PPUMASK                      ; ROM $0002A8: 8D 01 20
+    lda #$00                         ; ROM $0002AB: A9 00
+    ldx #$00                         ; ROM $0002AD: A2 00
+    jsr SetPpuAddress                 ; ROM $0002AF: 20 96 C1
+    lda #$00                         ; ROM $0002B2: A9 00
+    sta PPUSCROLL                    ; ROM $0002B4: 8D 05 20
+    sta PPUSCROLL                    ; ROM $0002B7: 8D 05 20
+    lda PpuCtrlShadow                          ; ROM $0002BA: A5 0C
+    sta PPUCTRL                      ; ROM $0002BC: 8D 00 20
+    rts                              ; ROM $0002BF: 60
+; Routine: EnableNmiInPpuControl
+; Global: Reachable code entry at CPU $C2B0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+EnableNmiInPpuControl:
+    jsr WaitForVBlankTransition                 ; ROM $0002C0: 20 8B C2
+    lda PpuCtrlShadow                          ; ROM $0002C3: A5 0C
+    ora #$80                         ; ROM $0002C5: 09 80
+    bne Ppu_UpdatePpuStatePath_C2BD                 ; ROM $0002C7: D0 04
+; Routine: Ppu_HandleControl_C2B9
+; Global: Reachable code entry at CPU $C2B9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_HandleControl_C2B9:
+    lda PpuCtrlShadow                          ; ROM $0002C9: A5 0C
+    and #$7F                         ; ROM $0002CB: 29 7F
+; Routine: Ppu_UpdatePpuStatePath_C2BD
+; Global: Reachable code entry at CPU $C2BD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_UpdatePpuStatePath_C2BD:
+    sta PpuCtrlShadow                          ; ROM $0002CD: 85 0C
+    sta PPUCTRL                      ; ROM $0002CF: 8D 00 20
+    rts                              ; ROM $0002D2: 60
+; Routine: UploadSystemPalette
+; Global: Reachable code entry at CPU $C2C3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+UploadSystemPalette:
+    lda #$3F                         ; ROM $0002D3: A9 3F
+    ldx #$00                         ; ROM $0002D5: A2 00
+    jsr SetPpuAddress                 ; ROM $0002D7: 20 96 C1
+    ldy #$20                         ; ROM $0002DA: A0 20
+; Routine: Ppu_TransferVramDataPath_C2CC
+; Global: Reachable code entry at CPU $C2CC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_TransferVramDataPath_C2CC:
+    lda $C2E7,x                      ; ROM $0002DC: BD E7 C2
+    sta PPUDATA                      ; ROM $0002DF: 8D 07 20
+    inx                              ; ROM $0002E2: E8
+    dey                              ; ROM $0002E3: 88
+    bne Ppu_TransferVramDataPath_C2CC                 ; ROM $0002E4: D0 F6
+; Routine: Ppu_SetVramAddress_C2D6
+; Global: Reachable code entry at CPU $C2D6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Ppu_SetVramAddress_C2D6:
+    lda #$3F                         ; ROM $0002E6: A9 3F
+    sta PPUADDR                      ; ROM $0002E8: 8D 06 20
+    lda #$00                         ; ROM $0002EB: A9 00
+    sta PPUADDR                      ; ROM $0002ED: 8D 06 20
+    sta PPUADDR                      ; ROM $0002F0: 8D 06 20
+    sta PPUADDR                      ; ROM $0002F3: 8D 06 20
+    rts                              ; ROM $0002F6: 60
+
+; Data region: CPU $C2E7-$C306; unreachable by direct recursive trace.
+SystemPaletteData:
+    .byte $19, $0F, $10, $30, $19, $16, $26, $36, $19, $0F, $18, $28, $19, $0F, $17, $07 ; ROM $0002F7: 19 0F 10 30 19 16 26 36 19 0F 18 28 19 0F 17 07
+    .byte $19, $30, $21, $26, $19, $0F, $26, $30, $19, $0F, $15, $30, $19, $0F, $21, $30 ; ROM $000307: 19 30 21 26 19 0F 26 30 19 0F 15 30 19 0F 21 30
+; Routine: WaitForFrameBoundary
+; Global: Reachable code entry at CPU $C307 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+WaitForFrameBoundary:
+    lda ControllerState1              ; ROM $000317: A5 12
+    bne WaitForFrameBoundary         ; ROM $000319: D0 FC
+    rts                              ; ROM $00031B: 60
+; Routine: InitializeSystemAndRunMainLoop
+; Global: Reachable code entry at CPU $C30C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+InitializeSystemAndRunMainLoop:
+    ldy #$00                         ; ROM $00031C: A0 00
+    sty $E0                          ; ROM $00031E: 84 E0
+    iny                              ; ROM $000320: C8
+    sty $E1                          ; ROM $000321: 84 E1
+    dey                              ; ROM $000323: 88
+    tya                              ; ROM $000324: 98
+    ldx #$07                         ; ROM $000325: A2 07
+; Routine: Main_WriteSoundDispatchIndex_C317
+; Global: Reachable code entry at CPU $C317 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteSoundDispatchIndex_C317:
+    sta ($E0),y                      ; ROM $000327: 91 E0
+    iny                              ; ROM $000329: C8
+    bne Main_WriteSoundDispatchIndex_C317                 ; ROM $00032A: D0 FB
+    inc $E1                          ; ROM $00032C: E6 E1
+    dex                              ; ROM $00032E: CA
+    bne Main_WriteSoundDispatchIndex_C317                 ; ROM $00032F: D0 F6
+    ldx #$00                         ; ROM $000331: A2 00
+    ldy $08                          ; ROM $000333: A4 08
+    cpy #$93                         ; ROM $000335: C0 93
+    bne Main_WriteZp00_C333                 ; ROM $000337: D0 0A
+    ldy $09                          ; ROM $000339: A4 09
+    bne Main_WriteZp00_C333                 ; ROM $00033B: D0 06
+    ldy $0A                          ; ROM $00033D: A4 0A
+    bne Main_WriteZp00_C333                 ; ROM $00033F: D0 02
+    ldx #$08                         ; ROM $000341: A2 08
+; Routine: Main_WriteZp00_C333
+; Global: Reachable code entry at CPU $C333 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp00_C333:
+    sta $00,x                        ; ROM $000343: 95 00
+    inx                              ; ROM $000345: E8
+    bne Main_WriteZp00_C333                 ; ROM $000346: D0 FB
+    lda #$93                         ; ROM $000348: A9 93
+    sta $08                          ; ROM $00034A: 85 08
+; Routine: Main_WriteZpDB_C33C
+; Global: Reachable code entry at CPU $C33C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZpDB_C33C:
+    jsr InitializeVideoSystem                 ; ROM $00034C: 20 F2 C1
+    lda #$00                         ; ROM $00034F: A9 00
+    sta $DB                          ; ROM $000351: 85 DB
+    jsr InitializeApu                 ; ROM $000353: 20 42 E6
+    lda #$01                         ; ROM $000356: A9 01
+    sta $B5                          ; ROM $000358: 85 B5
+; Routine: Main_UpdateAudioChannelPath_C34A
+; Global: Reachable code entry at CPU $C34A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_UpdateAudioChannelPath_C34A:
+    ldx #$FF                         ; ROM $00035A: A2 FF
+    txs                              ; ROM $00035C: 9A
+    lda #$0F                         ; ROM $00035D: A9 0F
+    sta APUSTATUS                    ; ROM $00035F: 8D 15 40
+    lda #$00                         ; ROM $000362: A9 00
+    sta $38                          ; ROM $000364: 85 38
+    sta $59                          ; ROM $000366: 85 59
+    sta $B2                          ; ROM $000368: 85 B2
+    sta $60                          ; ROM $00036A: 85 60
+    sta $70                          ; ROM $00036C: 85 70
+    jsr ComposeStatusScreen                 ; ROM $00036E: 20 83 DE
+    jsr EnableNmiInPpuControl                 ; ROM $000371: 20 B0 C2
+    lda #$01                         ; ROM $000374: A9 01
+    sta $72                          ; ROM $000376: 85 72
+; Routine: MainGameLoop
+; Global: Reachable code entry at CPU $C368 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+MainGameLoop:
+    lda ControllerState1                          ; ROM $000378: A5 12
+    bne MainGameLoop                 ; ROM $00037A: D0 FC
+; Routine: Main_WriteMainDelay_C36C
+; Global: Reachable code entry at CPU $C36C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteMainDelay_C36C:
+    lda #$08                         ; ROM $00037C: A9 08
+    sta $70                          ; ROM $00037E: 85 70
+; Routine: Main_ReadOptionState_C370
+; Global: Reachable code entry at CPU $C370 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadOptionState_C370:
+    jsr WaitForNmiFrameHandoff                 ; ROM $000380: 20 FB CB
+    lda ControllerState1                          ; ROM $000383: A5 12
+    and #$10                         ; ROM $000385: 29 10
+    bne Main_ReadGameState_C398                 ; ROM $000387: D0 1F
+    lda ControllerState1                          ; ROM $000389: A5 12
+    and #$20                         ; ROM $00038B: 29 20
+    beq Main_DecrementSubDelay_C38B                 ; ROM $00038D: F0 0C
+    lda $5F                          ; ROM $00038F: A5 5F
+    eor #$01                         ; ROM $000391: 49 01
+    sta $5F                          ; ROM $000393: 85 5F
+    jsr WaitForFrameBoundary                 ; ROM $000395: 20 07 C3
+    jmp Main_WriteMainDelay_C36C                 ; ROM $000398: 4C 6C C3
+; Routine: Main_DecrementSubDelay_C38B
+; Global: Reachable code entry at CPU $C38B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_DecrementSubDelay_C38B:
+    jsr AdvanceRandomState                 ; ROM $00039B: 20 70 D6
+    dec $71                          ; ROM $00039E: C6 71
+    bne Main_ReadOptionState_C370                 ; ROM $0003A0: D0 DE
+    dec $70                          ; ROM $0003A2: C6 70
+    bne Main_ReadOptionState_C370                 ; ROM $0003A4: D0 DA
+    inc $59                          ; ROM $0003A6: E6 59
+; Routine: Main_ReadGameState_C398
+; Global: Reachable code entry at CPU $C398 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameState_C398:
+    lda $59                          ; ROM $0003A8: A5 59
+    bne Main_WriteScreenState_C3A3                 ; ROM $0003AA: D0 07
+    lda $5F                          ; ROM $0003AC: A5 5F
+    beq Main_WriteScreenState_C3A3                 ; ROM $0003AE: F0 03
+    jsr RunMenuSelectionScreen                 ; ROM $0003B0: 20 8E DA
+; Routine: Main_WriteScreenState_C3A3
+; Global: Reachable code entry at CPU $C3A3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteScreenState_C3A3:
+    lda #$00                         ; ROM $0003B3: A9 00
+    sta $72                          ; ROM $0003B5: 85 72
+    jsr WaitForFrameBoundary                 ; ROM $0003B7: 20 07 C3
+    lda #$02                         ; ROM $0003BA: A9 02
+    sta $68                          ; ROM $0003BC: 85 68
+    lda $59                          ; ROM $0003BE: A5 59
+    bne Main_WriteZp58_C3B6                 ; ROM $0003C0: D0 04
+    lda $5F                          ; ROM $0003C2: A5 5F
+    bne Main_WriteObjectDirection_C40A                 ; ROM $0003C4: D0 54
+; Routine: Main_WriteZp58_C3B6
+; Global: Reachable code entry at CPU $C3B6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp58_C3B6:
+    lda #$01                         ; ROM $0003C6: A9 01
+    sta $58                          ; ROM $0003C8: 85 58
+    lda $59                          ; ROM $0003CA: A5 59
+    bne Main_UpdateAudioChannelPath_C3C7                 ; ROM $0003CC: D0 09
+    ldx #$06                         ; ROM $0003CE: A2 06
+    lda #$00                         ; ROM $0003D0: A9 00
+; Routine: Main_WriteZp61_C3C2
+; Global: Reachable code entry at CPU $C3C2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp61_C3C2:
+    sta $61,x                        ; ROM $0003D2: 95 61
+    dex                              ; ROM $0003D4: CA
+    bpl Main_WriteZp61_C3C2                 ; ROM $0003D5: 10 FB
+; Routine: Main_UpdateAudioChannelPath_C3C7
+; Global: Reachable code entry at CPU $C3C7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_UpdateAudioChannelPath_C3C7:
+    lda #$10                         ; ROM $0003D7: A9 10
+    sta $73                          ; ROM $0003D9: 85 73
+    lda #$00                         ; ROM $0003DB: A9 00
+    sta $74                          ; ROM $0003DD: 85 74
+    sta $77                          ; ROM $0003DF: 85 77
+    sta $75                          ; ROM $0003E1: 85 75
+    sta $76                          ; ROM $0003E3: 85 76
+    sta $79                          ; ROM $0003E5: 85 79
+    sta $94                          ; ROM $0003E7: 85 94
+    lda $59                          ; ROM $0003E9: A5 59
+    beq Main_WriteObjectDirection_C40A                 ; ROM $0003EB: F0 2D
+    lda #$09                         ; ROM $0003ED: A9 09
+    sta $74                          ; ROM $0003EF: 85 74
+    lda #$40                         ; ROM $0003F1: A9 40
+    sta $73                          ; ROM $0003F3: 85 73
+    lda #$01                         ; ROM $0003F5: A9 01
+    sta $77                          ; ROM $0003F7: 85 77
+    lda #$00                         ; ROM $0003F9: A9 00
+    sta APUSTATUS                    ; ROM $0003FB: 8D 15 40
+    sta RandomState0                          ; ROM $0003FE: 85 54
+    sta RandomState1                          ; ROM $000400: 85 55
+    sta RandomState2                          ; ROM $000402: 85 56
+    sta RandomState3                          ; ROM $000404: 85 57
+    sta $33                          ; ROM $000406: 85 33
+    lda #$F4                         ; ROM $000408: A9 F4
+    sta $AC                          ; ROM $00040A: 85 AC
+    lda #$ED                         ; ROM $00040C: A9 ED
+    sta $AD                          ; ROM $00040E: 85 AD
+    lda $EDF2                        ; ROM $000410: AD F2 ED
+    sta $AE                          ; ROM $000413: 85 AE
+    lda $EDF3                        ; ROM $000415: AD F3 ED
+    sta $AF                          ; ROM $000418: 85 AF
+; Routine: Main_WriteObjectDirection_C40A
+; Global: Reachable code entry at CPU $C40A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteObjectDirection_C40A:
+    lda #$00                         ; ROM $00041A: A9 00
+    sta $78                          ; ROM $00041C: 85 78
+    sta $7A                          ; ROM $00041E: 85 7A
+; Routine: Main_WriteZpB1_C410
+; Global: Reachable code entry at CPU $C410 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZpB1_C410:
+    lda #$00                         ; ROM $000420: A9 00
+    sta $B1                          ; ROM $000422: 85 B1
+    sta $A8                          ; ROM $000424: 85 A8
+    sta $60                          ; ROM $000426: 85 60
+    sta $9E                          ; ROM $000428: 85 9E
+    sta $9F                          ; ROM $00042A: 85 9F
+    sta $9C                          ; ROM $00042C: 85 9C
+    sta $A0                          ; ROM $00042E: 85 A0
+    sta $A1                          ; ROM $000430: 85 A1
+    sta $A2                          ; ROM $000432: 85 A2
+    sta $A3                          ; ROM $000434: 85 A3
+    sta $A4                          ; ROM $000436: 85 A4
+    sta $A5                          ; ROM $000438: 85 A5
+    sta $A6                          ; ROM $00043A: 85 A6
+    sta $A7                          ; ROM $00043C: 85 A7
+    jsr Menu_WriteZp0E_DE1D                 ; ROM $00043E: 20 1D DE
+    lda #$02                         ; ROM $000441: A9 02
+    sta $B5                          ; ROM $000443: 85 B5
+    jsr Main_ReadGameMode_C60B                 ; ROM $000445: 20 0B C6
+    lda #$03                         ; ROM $000448: A9 03
+    sta $B5                          ; ROM $00044A: 85 B5
+    jsr Ppu_HandleControl_C2B9                 ; ROM $00044C: 20 B9 C2
+    jsr Gameplay_WriteTransferPointer_CA4B                 ; ROM $00044F: 20 4B CA
+    jsr Main_WriteObjectType_C5CE                 ; ROM $000452: 20 CE C5
+    jsr Gameplay_ReadZp58_E4AF                 ; ROM $000455: 20 AF E4
+    jsr Main_CallHelper_C5FF                 ; ROM $000458: 20 FF C5
+    lda #$C8                         ; ROM $00045B: A9 C8
+    sta $93                          ; ROM $00045D: 85 93
+; Routine: Main_ReadZp5D_C44F
+; Global: Reachable code entry at CPU $C44F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadZp5D_C44F:
+    jsr Main_WriteStageCounter_C613                 ; ROM $00045F: 20 13 C6
+    jsr HideAllSprites                 ; ROM $000462: 20 68 C2
+    jsr Frame_ReadZp7D_CC36                 ; ROM $000465: 20 36 CC
+    jsr Gameplay_HandleControl_C96A                 ; ROM $000468: 20 6A C9
+    jsr Frame_ReadObjectIndex_CE5B                 ; ROM $00046B: 20 5B CE
+    jsr Object_WriteStageProgress_CFB0                 ; ROM $00046E: 20 B0 CF
+    jsr Gameplay_HandleControl_CA1B                 ; ROM $000471: 20 1B CA
+    jsr Main_ReadZp33_C644                 ; ROM $000474: 20 44 C6
+    jsr Gameplay_ReadStageProgress_E399                 ; ROM $000477: 20 99 E3
+    lda $5D                          ; ROM $00047A: A5 5D
+    bne Main_ReadGameState_C481                 ; ROM $00047C: D0 13
+    lda $5E                          ; ROM $00047E: A5 5E
+    bne Main_ReadGameState_C4BF                 ; ROM $000480: D0 4D
+    lda $33                          ; ROM $000482: A5 33
+    and #$03                         ; ROM $000484: 29 03
+    bne Main_ReadZp5D_C44F                 ; ROM $000486: D0 D7
+    jsr GameplayUpdate                 ; ROM $000488: 20 9D C7
+    jsr Main_HandleControl_C66C                 ; ROM $00048B: 20 6C C6
+    jmp Main_ReadZp5D_C44F                 ; ROM $00048E: 4C 4F C4
+; Routine: Main_ReadGameState_C481
+; Global: Reachable code entry at CPU $C481 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameState_C481:
+    lda $59                          ; ROM $000491: A5 59
+    bne Main_WriteGameMode_C4C3                 ; ROM $000493: D0 3E
+    lda #$00                         ; ROM $000495: A9 00
+    sta $76                          ; ROM $000497: 85 76
+    sta $78                          ; ROM $000499: 85 78
+    sta $77                          ; ROM $00049B: 85 77
+    sta $79                          ; ROM $00049D: 85 79
+    sta $7A                          ; ROM $00049F: 85 7A
+    lda #$08                         ; ROM $0004A1: A9 08
+    sta $B5                          ; ROM $0004A3: 85 B5
+    jsr Main_ReadGameMode_C60B                 ; ROM $0004A5: 20 0B C6
+    dec $68                          ; ROM $0004A8: C6 68
+    bmi Main_WriteNmiWorkPending_C49F                 ; ROM $0004AA: 30 03
+    jmp Main_WriteZpB1_C410                 ; ROM $0004AC: 4C 10 C4
+; Routine: Main_WriteNmiWorkPending_C49F
+; Global: Reachable code entry at CPU $C49F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteNmiWorkPending_C49F:
+    lda #$00                         ; ROM $0004AF: A9 00
+    sta $60                          ; ROM $0004B1: 85 60
+    jsr Menu_CallHelper_DD3E                 ; ROM $0004B3: 20 3E DD
+    lda #$09                         ; ROM $0004B6: A9 09
+    sta $B5                          ; ROM $0004B8: 85 B5
+; Routine: Main_ReadGameMode_C4AA
+; Global: Reachable code entry at CPU $C4AA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameMode_C4AA:
+    lda ControllerState1                          ; ROM $0004BA: A5 12
+    and #$10                         ; ROM $0004BC: 29 10
+    bne Main_WriteGameMode_C4B4                 ; ROM $0004BE: D0 04
+    lda $B5                          ; ROM $0004C0: A5 B5
+    bne Main_ReadGameMode_C4AA                 ; ROM $0004C2: D0 F6
+; Routine: Main_WriteGameMode_C4B4
+; Global: Reachable code entry at CPU $C4B4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteGameMode_C4B4:
+    lda #$00                         ; ROM $0004C4: A9 00
+    sta $B5                          ; ROM $0004C6: 85 B5
+; Routine: Main_HandleControl_C4B8
+; Global: Reachable code entry at CPU $C4B8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_HandleControl_C4B8:
+    lda ControllerState1                          ; ROM $0004C8: A5 12
+    beq Main_HandleControl_C4B8                 ; ROM $0004CA: F0 FC
+    jmp Main_UpdateAudioChannelPath_C34A                 ; ROM $0004CC: 4C 4A C3
+; Routine: Main_ReadGameState_C4BF
+; Global: Reachable code entry at CPU $C4BF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameState_C4BF:
+    lda $59                          ; ROM $0004CF: A5 59
+    beq Main_WriteGameMode_C4D5                 ; ROM $0004D1: F0 12
+; Routine: Main_WriteGameMode_C4C3
+; Global: Reachable code entry at CPU $C4C3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteGameMode_C4C3:
+    lda #$00                         ; ROM $0004D3: A9 00
+    sta $B5                          ; ROM $0004D5: 85 B5
+    inc $B0                          ; ROM $0004D7: E6 B0
+    lda $B0                          ; ROM $0004D9: A5 B0
+    and #$03                         ; ROM $0004DB: 29 03
+    beq Main_Dispatch_C4D2                 ; ROM $0004DD: F0 03
+    jmp Main_UpdateAudioChannelPath_C34A                 ; ROM $0004DF: 4C 4A C3
+; Routine: Main_Dispatch_C4D2
+; Global: Reachable code entry at CPU $C4D2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_Dispatch_C4D2:
+    jmp Main_WriteZpDB_C33C                 ; ROM $0004E2: 4C 3C C3
+; Routine: Main_WriteGameMode_C4D5
+; Global: Reachable code entry at CPU $C4D5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteGameMode_C4D5:
+    lda #$0A                         ; ROM $0004E5: A9 0A
+    sta $B5                          ; ROM $0004E7: 85 B5
+    jsr Main_ReadGameMode_C60B                 ; ROM $0004E9: 20 0B C6
+    inc $68                          ; ROM $0004EC: E6 68
+    inc $58                          ; ROM $0004EE: E6 58
+    ldy #$00                         ; ROM $0004F0: A0 00
+    lda $58                          ; ROM $0004F2: A5 58
+    cmp #$33                         ; ROM $0004F4: C9 33
+    bne Main_AdvanceIndexY_C4EB                 ; ROM $0004F6: D0 03
+    jmp Main_WriteObjectX_C56C                 ; ROM $0004F8: 4C 6C C5
+; Routine: Main_AdvanceIndexY_C4EB
+; Global: Reachable code entry at CPU $C4EB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_AdvanceIndexY_C4EB:
+    iny                              ; ROM $0004FB: C8
+    sec                              ; ROM $0004FC: 38
+    sbc #$05                         ; ROM $0004FD: E9 05
+    bcs Main_AdvanceIndexY_C4EB                 ; ROM $0004FF: B0 FA
+    dey                              ; ROM $000501: 88
+    cpy #$08                         ; ROM $000502: C0 08
+    bcc Main_WriteZp7E_C4F8                 ; ROM $000504: 90 02
+    ldy #$08                         ; ROM $000506: A0 08
+; Routine: Main_WriteZp7E_C4F8
+; Global: Reachable code entry at CPU $C4F8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp7E_C4F8:
+    sty $7E                          ; ROM $000508: 84 7E
+    adc #$05                         ; ROM $00050A: 69 05
+    cmp #$01                         ; ROM $00050C: C9 01
+    beq Main_WriteNmiWorkPending_C503                 ; ROM $00050E: F0 03
+    jmp Main_WriteZpB1_C410                 ; ROM $000510: 4C 10 C4
+; Routine: Main_WriteNmiWorkPending_C503
+; Global: Reachable code entry at CPU $C503 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteNmiWorkPending_C503:
+    lda #$00                         ; ROM $000513: A9 00
+    sta $60                          ; ROM $000515: 85 60
+    jsr Menu_WriteZp0E_DE53                 ; ROM $000517: 20 53 DE
+    lda #$02                         ; ROM $00051A: A9 02
+    sta $B5                          ; ROM $00051C: 85 B5
+    jsr Main_ReadGameMode_C60B                 ; ROM $00051E: 20 0B C6
+    jsr Ppu_HandleControl_C2B9                 ; ROM $000521: 20 B9 C2
+    jsr Gameplay_WriteTransferPointer_CA72                 ; ROM $000524: 20 72 CA
+    jsr Main_WriteObjectType_C5CE                 ; ROM $000527: 20 CE C5
+    jsr Main_CallHelper_C5FF                 ; ROM $00052A: 20 FF C5
+    jsr Gameplay_HandleControl_CBC5                 ; ROM $00052D: 20 C5 CB
+    lda #$06                         ; ROM $000530: A9 06
+    sta $B5                          ; ROM $000532: 85 B5
+    lda #$01                         ; ROM $000534: A9 01
+    sta $7A                          ; ROM $000536: 85 7A
+    sta $7D                          ; ROM $000538: 85 7D
+    lda #$1E                         ; ROM $00053A: A9 1E
+    sta $93                          ; ROM $00053C: 85 93
+; Routine: Main_ReadZp93_C52E
+; Global: Reachable code entry at CPU $C52E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadZp93_C52E:
+    jsr Main_WriteStageCounter_C613                 ; ROM $00053E: 20 13 C6
+    lda $93                          ; ROM $000541: A5 93
+    beq Main_WriteGameMode_C55C                 ; ROM $000543: F0 27
+    jsr HideAllSprites                 ; ROM $000545: 20 68 C2
+    jsr Gameplay_HandleControl_C8ED                 ; ROM $000548: 20 ED C8
+    jsr Frame_ReadZp7D_CC36                 ; ROM $00054B: 20 36 CC
+    jsr Gameplay_HandleControl_C96A                 ; ROM $00054E: 20 6A C9
+    jsr Frame_ReadObjectIndex_CE5B                 ; ROM $000551: 20 5B CE
+    jsr Object_WriteStageProgress_CFB0                 ; ROM $000554: 20 B0 CF
+    jsr Gameplay_HandleControl_CA1B                 ; ROM $000557: 20 1B CA
+    jsr Main_ReadZp33_C65F                 ; ROM $00055A: 20 5F C6
+    lda $33                          ; ROM $00055D: A5 33
+    and #$01                         ; ROM $00055F: 29 01
+    bne Main_ReadZp93_C52E                 ; ROM $000561: D0 DB
+    jsr GameplayUpdate                 ; ROM $000563: 20 9D C7
+    jsr Main_HandleControl_C66C                 ; ROM $000566: 20 6C C6
+    jmp Main_ReadZp93_C52E                 ; ROM $000569: 4C 2E C5
+; Routine: Main_WriteGameMode_C55C
+; Global: Reachable code entry at CPU $C55C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteGameMode_C55C:
+    lda #$0A                         ; ROM $00056C: A9 0A
+    sta $B5                          ; ROM $00056E: 85 B5
+    jsr Main_ReadGameMode_C60B                 ; ROM $000570: 20 0B C6
+    lda #$00                         ; ROM $000573: A9 00
+    sta $7D                          ; ROM $000575: 85 7D
+    sta $7A                          ; ROM $000577: 85 7A
+    jmp Main_WriteZpB1_C410                 ; ROM $000579: 4C 10 C4
+; Routine: Main_WriteObjectX_C56C
+; Global: Reachable code entry at CPU $C56C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteObjectX_C56C:
+    jsr InitializeVideoSystem                 ; ROM $00057C: 20 F2 C1
+    jsr Menu_WriteWorkValue_DBF9                 ; ROM $00057F: 20 F9 DB
+    jsr Gameplay_WriteTransferPointer_CA72                 ; ROM $000582: 20 72 CA
+    lda #$08                         ; ROM $000585: A9 08
+    sta $29                          ; ROM $000587: 85 29
+    sta $2B                          ; ROM $000589: 85 2B
+    lda #$00                         ; ROM $00058B: A9 00
+    sta $60                          ; ROM $00058D: 85 60
+    sta $28                          ; ROM $00058F: 85 28
+    lda #$09                         ; ROM $000591: A9 09
+    sta $2A                          ; ROM $000593: 85 2A
+    lda #$07                         ; ROM $000595: A9 07
+    sta $B5                          ; ROM $000597: 85 B5
+    jsr Ppu_HandleControl_C262                 ; ROM $000599: 20 62 C2
+    jsr EnableNmiInPpuControl                 ; ROM $00059C: 20 B0 C2
+; Routine: Main_WriteStageCounter_C58F
+; Global: Reachable code entry at CPU $C58F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteStageCounter_C58F:
+    jsr WaitForNmiFrameHandoff                 ; ROM $00059F: 20 FB CB
+    lda #$01                         ; ROM $0005A2: A9 01
+    sta $39                          ; ROM $0005A4: 85 39
+    jsr HideAllSprites                 ; ROM $0005A6: 20 68 C2
+    jsr Frame_ReadObjectIndex_CE5B                 ; ROM $0005A9: 20 5B CE
+    lda $33                          ; ROM $0005AC: A5 33
+    ror a                            ; ROM $0005AE: 6A
+    bcs Main_ReadObjectType_C5A4                 ; ROM $0005AF: B0 03
+    jsr Frame_ReadObjectX_CDD4                 ; ROM $0005B1: 20 D4 CD
+; Routine: Main_ReadObjectType_C5A4
+; Global: Reachable code entry at CPU $C5A4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadObjectType_C5A4:
+    lda $28                          ; ROM $0005B4: A5 28
+    cmp #$08                         ; ROM $0005B6: C9 08
+    bne Main_WriteStageCounter_C58F                 ; ROM $0005B8: D0 E5
+; Routine: Main_WriteStageCounter_C5AA
+; Global: Reachable code entry at CPU $C5AA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteStageCounter_C5AA:
+    jsr WaitForNmiFrameHandoff                 ; ROM $0005BA: 20 FB CB
+    lda #$01                         ; ROM $0005BD: A9 01
+    sta $39                          ; ROM $0005BF: 85 39
+    jsr HideAllSprites                 ; ROM $0005C1: 20 68 C2
+    jsr Frame_ReadZp2D_CEA7                 ; ROM $0005C4: 20 A7 CE
+    lda $33                          ; ROM $0005C7: A5 33
+    ror a                            ; ROM $0005C9: 6A
+    bcs Main_ReadGameMode_C5BF                 ; ROM $0005CA: B0 03
+    jsr Frame_ReadObjectX_CDD4                 ; ROM $0005CC: 20 D4 CD
+; Routine: Main_ReadGameMode_C5BF
+; Global: Reachable code entry at CPU $C5BF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameMode_C5BF:
+    lda $B5                          ; ROM $0005CF: A5 B5
+    bne Main_WriteStageCounter_C5AA                 ; ROM $0005D1: D0 E7
+; Routine: Main_WriteZp58_C5C3
+; Global: Reachable code entry at CPU $C5C3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp58_C5C3:
+    lda ControllerState1                          ; ROM $0005D3: A5 12
+    beq Main_WriteZp58_C5C3                 ; ROM $0005D5: F0 FC
+    lda #$01                         ; ROM $0005D7: A9 01
+    sta $58                          ; ROM $0005D9: 85 58
+    jmp Main_WriteZpB1_C410                 ; ROM $0005DB: 4C 10 C4
+; Routine: Main_WriteObjectType_C5CE
+; Global: Reachable code entry at CPU $C5CE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteObjectType_C5CE:
+    lda #$01                         ; ROM $0005DE: A9 01
+    sta $28                          ; ROM $0005E0: 85 28
+    sta $2A                          ; ROM $0005E2: 85 2A
+    lda #$08                         ; ROM $0005E4: A9 08
+    sta $29                          ; ROM $0005E6: 85 29
+    sta $2B                          ; ROM $0005E8: 85 2B
+    lda #$00                         ; ROM $0005EA: A9 00
+    sta $2C                          ; ROM $0005EC: 85 2C
+    sta $5D                          ; ROM $0005EE: 85 5D
+    sta $5C                          ; ROM $0005F0: 85 5C
+    sta $5E                          ; ROM $0005F2: 85 5E
+    jsr Gameplay_HandleControl_CBC5                 ; ROM $0005F4: 20 C5 CB
+    jsr Stage_ReadZp58_D69A                 ; ROM $0005F7: 20 9A D6
+    jsr Gameplay_WriteWorkValue_CB06                 ; ROM $0005FA: 20 06 CB
+    jsr WaitForVBlankTransition                 ; ROM $0005FD: 20 8B C2
+    jsr UploadSystemPalette                 ; ROM $000600: 20 C3 C2
+    ldx $58                          ; ROM $000603: A6 58
+    lda $CC03,x                      ; ROM $000605: BD 03 CC
+    sta $5B                          ; ROM $000608: 85 5B
+    lda #$01                         ; ROM $00060A: A9 01
+    sta $60                          ; ROM $00060C: 85 60
+    rts                              ; ROM $00060E: 60
+; Routine: Main_CallHelper_C5FF
+; Global: Reachable code entry at CPU $C5FF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_CallHelper_C5FF:
+    jsr HideAllSprites                 ; ROM $00060F: 20 68 C2
+    jsr EnableNmiInPpuControl                 ; ROM $000612: 20 B0 C2
+    jsr Ppu_CallHelper_C23B                 ; ROM $000615: 20 3B C2
+    jmp Ppu_HandleControl_C262                 ; ROM $000618: 4C 62 C2
+; Routine: Main_ReadGameMode_C60B
+; Global: Reachable code entry at CPU $C60B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadGameMode_C60B:
+    lda $B5                          ; ROM $00061B: A5 B5
+    bne Main_ReadGameMode_C60B                 ; ROM $00061D: D0 FC
+    rts                              ; ROM $00061F: 60
+; Routine: Main_Dispatch_C610
+; Global: Reachable code entry at CPU $C610 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_Dispatch_C610:
+    jmp Main_WriteGameMode_C4C3                 ; ROM $000620: 4C C3 C4
+; Routine: Main_WriteStageCounter_C613
+; Global: Reachable code entry at CPU $C613 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteStageCounter_C613:
+    jsr WaitForNmiFrameHandoff                 ; ROM $000623: 20 FB CB
+    lda #$01                         ; ROM $000626: A9 01
+    sta $39                          ; ROM $000628: 85 39
+    lda ControllerState1                          ; ROM $00062A: A5 12
+    and #$10                         ; ROM $00062C: 29 10
+    beq Main_ReturnToCaller_C643                 ; ROM $00062E: F0 23
+    lda $59                          ; ROM $000630: A5 59
+    bne Main_Dispatch_C610                 ; ROM $000632: D0 EC
+    lda #$01                         ; ROM $000634: A9 01
+    sta $B2                          ; ROM $000636: 85 B2
+    lda #$06                         ; ROM $000638: A9 06
+    sta $DF                          ; ROM $00063A: 85 DF
+    jsr WaitForFrameBoundary                 ; ROM $00063C: 20 07 C3
+; Routine: Main_WriteSoundCommandState_C62F
+; Global: Reachable code entry at CPU $C62F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteSoundCommandState_C62F:
+    lda ControllerState1                          ; ROM $00063F: A5 12
+    and #$10                         ; ROM $000641: 29 10
+    beq Main_WriteSoundCommandState_C62F                 ; ROM $000643: F0 FA
+    lda #$06                         ; ROM $000645: A9 06
+    sta $DF                          ; ROM $000647: 85 DF
+    lda #$00                         ; ROM $000649: A9 00
+    sta $B2                          ; ROM $00064B: 85 B2
+    jsr WaitForFrameBoundary                 ; ROM $00064D: 20 07 C3
+    jmp WaitForNmiFrameHandoff                 ; ROM $000650: 4C FB CB
+; Routine: Main_ReturnToCaller_C643
+; Global: Reachable code entry at CPU $C643 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReturnToCaller_C643:
+    rts                              ; ROM $000653: 60
+; Routine: Main_ReadZp33_C644
+; Global: Reachable code entry at CPU $C644 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadZp33_C644:
+    lda $33                          ; ROM $000654: A5 33
+    and #$3F                         ; ROM $000656: 29 3F
+    bne Main_ReturnToCaller_C65E                 ; ROM $000658: D0 14
+    lda $93                          ; ROM $00065A: A5 93
+    cmp #$FF                         ; ROM $00065C: C9 FF
+    beq Main_ReturnToCaller_C65E                 ; ROM $00065E: F0 0E
+    dec $93                          ; ROM $000660: C6 93
+    bne Main_ReturnToCaller_C65E                 ; ROM $000662: D0 0A
+    jsr Gameplay_HandleControl_CBD7                 ; ROM $000664: 20 D7 CB
+    lda #$08                         ; ROM $000667: A9 08
+    sta $7E                          ; ROM $000669: 85 7E
+    jmp Gameplay_HandleControl_C8ED                 ; ROM $00066B: 4C ED C8
+; Routine: Main_ReturnToCaller_C65E
+; Global: Reachable code entry at CPU $C65E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReturnToCaller_C65E:
+    rts                              ; ROM $00066E: 60
+; Routine: Main_ReadZp33_C65F
+; Global: Reachable code entry at CPU $C65F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadZp33_C65F:
+    lda $33                          ; ROM $00066F: A5 33
+    and #$3F                         ; ROM $000671: 29 3F
+    bne Main_ReturnToCaller_C65E                 ; ROM $000673: D0 F9
+    lda $93                          ; ROM $000675: A5 93
+    beq Main_ReturnToCaller_C65E                 ; ROM $000677: F0 F5
+    dec $93                          ; ROM $000679: C6 93
+    rts                              ; ROM $00067B: 60
+; Routine: Main_HandleControl_C66C
+; Global: Reachable code entry at CPU $C66C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_HandleControl_C66C:
+    ldx #$4F                         ; ROM $00067C: A2 4F
+; Routine: Main_ReadRam03E6_C66E
+; Global: Reachable code entry at CPU $C66E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadRam03E6_C66E:
+    lda $03E6,x                      ; ROM $00067E: BD E6 03
+    beq Main_Dispatch_C6CD                 ; ROM $000681: F0 5A
+    bpl Main_ReadRam0436_C688                 ; ROM $000683: 10 13
+    and #$7F                         ; ROM $000685: 29 7F
+    tay                              ; ROM $000687: A8
+    lda $0436,x                      ; ROM $000688: BD 36 04
+    sta $1F                          ; ROM $00068B: 85 1F
+    lda $0486,x                      ; ROM $00068D: BD 86 04
+    sta $20                          ; ROM $000690: 85 20
+    lda $C75D,y                      ; ROM $000692: B9 5D C7
+    jmp Main_ReadZp5C_C6DA                 ; ROM $000695: 4C DA C6
+; Routine: Main_ReadRam0436_C688
+; Global: Reachable code entry at CPU $C688 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadRam0436_C688:
+    lda $0436,x                      ; ROM $000698: BD 36 04
+    sta $1F                          ; ROM $00069B: 85 1F
+    lda $0486,x                      ; ROM $00069D: BD 86 04
+    sta $20                          ; ROM $0006A0: 85 20
+    lda $0526,x                      ; ROM $0006A2: BD 26 05
+    and #$78                         ; ROM $0006A5: 29 78
+    beq Main_Dispatch_C6CD                 ; ROM $0006A7: F0 34
+    lda $0526,x                      ; ROM $0006A9: BD 26 05
+    bpl Main_WriteZp32_C6B2                 ; ROM $0006AC: 10 14
+    and #$07                         ; ROM $0006AE: 29 07
+    sta $32                          ; ROM $0006B0: 85 32
+    lda $0526,x                      ; ROM $0006B2: BD 26 05
+    lsr a                            ; ROM $0006B5: 4A
+    and #$3C                         ; ROM $0006B6: 29 3C
+    clc                              ; ROM $0006B8: 18
+    adc $32                          ; ROM $0006B9: 65 32
+    tay                              ; ROM $0006BB: A8
+    lda $C778,y                      ; ROM $0006BC: B9 78 C7
+    jmp Main_ReadZp5C_C6DA                 ; ROM $0006BF: 4C DA C6
+; Routine: Main_WriteZp32_C6B2
+; Global: Reachable code entry at CPU $C6B2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_WriteZp32_C6B2:
+    and #$07                         ; ROM $0006C2: 29 07
+    beq Main_ReadRam0526_C6D0                 ; ROM $0006C4: F0 1A
+    and #$01                         ; ROM $0006C6: 29 01
+    eor #$01                         ; ROM $0006C8: 49 01
+    sta $32                          ; ROM $0006CA: 85 32
+    lda $0526,x                      ; ROM $0006CC: BD 26 05
+    lsr a                            ; ROM $0006CF: 4A
+    lsr a                            ; ROM $0006D0: 4A
+    and #$1E                         ; ROM $0006D1: 29 1E
+    clc                              ; ROM $0006D3: 18
+    adc $32                          ; ROM $0006D4: 65 32
+    clc                              ; ROM $0006D6: 18
+    adc #$07                         ; ROM $0006D7: 69 07
+    tay                              ; ROM $0006D9: A8
+    jmp Main_ReadRamC764_C6D6                 ; ROM $0006DA: 4C D6 C6
+; Routine: Main_Dispatch_C6CD
+; Global: Reachable code entry at CPU $C6CD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_Dispatch_C6CD:
+    jmp Main_RetreatIndexX_C756                 ; ROM $0006DD: 4C 56 C7
+; Routine: Main_ReadRam0526_C6D0
+; Global: Reachable code entry at CPU $C6D0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadRam0526_C6D0:
+    lda $0526,x                      ; ROM $0006E0: BD 26 05
+    lsr a                            ; ROM $0006E3: 4A
+    lsr a                            ; ROM $0006E4: 4A
+    lsr a                            ; ROM $0006E5: 4A
+; Routine: Main_ReadRamC764_C6D6
+; Global: Reachable code entry at CPU $C6D6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadRamC764_C6D6:
+    tay                              ; ROM $0006E6: A8
+    lda $C764,y                      ; ROM $0006E7: B9 64 C7
+; Routine: Main_ReadZp5C_C6DA
+; Global: Reachable code entry at CPU $C6DA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadZp5C_C6DA:
+    and #$FF                         ; ROM $0006EA: 29 FF
+    beq Main_CallHelper_C753                 ; ROM $0006EC: F0 75
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $0006EE: 20 FC D8
+    lda $5C                          ; ROM $0006F1: A5 5C
+    bne Main_HandleControl_C705                 ; ROM $0006F3: D0 20
+    lda $79                          ; ROM $0006F5: A5 79
+    bne Main_HandleControl_C705                 ; ROM $0006F7: D0 1C
+    lda $7A                          ; ROM $0006F9: A5 7A
+    bne Main_HandleControl_C705                 ; ROM $0006FB: D0 18
+    lda $28                          ; ROM $0006FD: A5 28
+    cmp $1F                          ; ROM $0006FF: C5 1F
+    bne Main_HandleControl_C705                 ; ROM $000701: D0 12
+    lda $2A                          ; ROM $000703: A5 2A
+    cmp $20                          ; ROM $000705: C5 20
+    bne Main_HandleControl_C705                 ; ROM $000707: D0 0C
+    lda #$05                         ; ROM $000709: A9 05
+    sta $DF                          ; ROM $00070B: 85 DF
+    lda #$01                         ; ROM $00070D: A9 01
+    sta $5C                          ; ROM $00070F: 85 5C
+    lda #$0C                         ; ROM $000711: A9 0C
+    sta $2C                          ; ROM $000713: 85 2C
+; Routine: Main_HandleControl_C705
+; Global: Reachable code entry at CPU $C705 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_HandleControl_C705:
+    ldy #$09                         ; ROM $000715: A0 09
+; Routine: Main_ReadRam0576_C707
+; Global: Reachable code entry at CPU $C707 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReadRam0576_C707:
+    lda $0576,y                      ; ROM $000717: B9 76 05
+    beq Main_RetreatIndexY_C74E                 ; ROM $00071A: F0 42
+    cmp #$09                         ; ROM $00071C: C9 09
+    bcs Main_RetreatIndexY_C74E                 ; ROM $00071E: B0 3E
+    lda $0580,y                      ; ROM $000720: B9 80 05
+    cmp $1F                          ; ROM $000723: C5 1F
+    bne Main_RetreatIndexY_C74E                 ; ROM $000725: D0 37
+    lda $0594,y                      ; ROM $000727: B9 94 05
+    cmp $20                          ; ROM $00072A: C5 20
+    bne Main_RetreatIndexY_C74E                 ; ROM $00072C: D0 30
+    inc $9E                          ; ROM $00072E: E6 9E
+    lda #$00                         ; ROM $000730: A9 00
+    sta $A0                          ; ROM $000732: 85 A0
+    sta $A1                          ; ROM $000734: 85 A1
+    sta $A2                          ; ROM $000736: 85 A2
+    sta $A3                          ; ROM $000738: 85 A3
+    lda #$64                         ; ROM $00073A: A9 64
+    sta $05C6,y                      ; ROM $00073C: 99 C6 05
+    lda $0576,y                      ; ROM $00073F: B9 76 05
+    sta $05D0,y                      ; ROM $000742: 99 D0 05
+    lda $6A                          ; ROM $000745: A5 6A
+    sta $05DA,y                      ; ROM $000747: 99 DA 05
+    inc $6A                          ; ROM $00074A: E6 6A
+    lda #$09                         ; ROM $00074C: A9 09
+    sta $0576,y                      ; ROM $00074E: 99 76 05
+    lda $05A8,y                      ; ROM $000751: B9 A8 05
+    lsr a                            ; ROM $000754: 4A
+    lsr a                            ; ROM $000755: 4A
+    and #$07                         ; ROM $000756: 29 07
+    clc                              ; ROM $000758: 18
+    adc #$20                         ; ROM $000759: 69 20
+    sta $05A8,y                      ; ROM $00075B: 99 A8 05
+; Routine: Main_RetreatIndexY_C74E
+; Global: Reachable code entry at CPU $C74E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_RetreatIndexY_C74E:
+    dey                              ; ROM $00075E: 88
+    bpl Main_ReadRam0576_C707                 ; ROM $00075F: 10 B6
+    bmi Main_RetreatIndexX_C756                 ; ROM $000761: 30 03
+; Routine: Main_CallHelper_C753
+; Global: Reachable code entry at CPU $C753 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_CallHelper_C753:
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $000763: 20 FC D8
+; Routine: Main_RetreatIndexX_C756
+; Global: Reachable code entry at CPU $C756 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_RetreatIndexX_C756:
+    dex                              ; ROM $000766: CA
+    bmi Main_ReturnToCaller_C75C                 ; ROM $000767: 30 03
+    jmp Main_ReadRam03E6_C66E                 ; ROM $000769: 4C 6E C6
+; Routine: Main_ReturnToCaller_C75C
+; Global: Reachable code entry at CPU $C75C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Main_ReturnToCaller_C75C:
+    rts                              ; ROM $00076C: 60
+
+; Data region: CPU $C75D-$C79C; unreachable by direct recursive trace.
+MainStateDispatchTable:
+    .byte $27, $03, $04, $05, $06, $07, $00, $00, $0B, $0C, $0D, $0E, $0D, $0C, $0B, $00 ; ROM $00076D: 27 03 04 05 06 07 00 00 0B 0C 0D 0E 0D 0C 0B 00
+    .byte $0F, $10, $11, $12, $13, $14, $15, $16, $13, $14, $11, $12, $0F, $10, $00, $00 ; ROM $00077D: 0F 10 11 12 13 14 15 16 13 14 11 12 0F 10 00 00
+    .byte $17, $18, $19, $1A, $1B, $1C, $1D, $1E, $1F, $20, $21, $22, $23, $24, $25, $26 ; ROM $00078D: 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26
+    .byte $1F, $20, $21, $22, $1B, $1C, $1D, $1E, $17, $18, $19, $1A, $00, $00, $00, $00 ; ROM $00079D: 1F 20 21 22 1B 1C 1D 1E 17 18 19 1A 00 00 00 00
+; Routine: GameplayUpdate
+; Global: Reachable code entry at CPU $C79D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+GameplayUpdate:
+    ldx #$4F                         ; ROM $0007AD: A2 4F
+; Routine: Gameplay_ReadRam03E6_C79F
+; Global: Reachable code entry at CPU $C79F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam03E6_C79F:
+    lda $03E6,x                      ; ROM $0007AF: BD E6 03
+    bne Gameplay_ReadRam0486_C7A7                 ; ROM $0007B2: D0 03
+; Routine: Gameplay_Dispatch_C7A4
+; Global: Reachable code entry at CPU $C7A4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_Dispatch_C7A4:
+    jmp Gameplay_RetreatIndexX_C8A6                 ; ROM $0007B4: 4C A6 C8
+; Routine: Gameplay_ReadRam0486_C7A7
+; Global: Reachable code entry at CPU $C7A7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam0486_C7A7:
+    pha                              ; ROM $0007B7: 48
+    ldy $0486,x                      ; ROM $0007B8: BC 86 04
+    sty $20                          ; ROM $0007BB: 84 20
+    jsr Gameplay_ReadRamE2A3_CBEB                 ; ROM $0007BD: 20 EB CB
+    ldy $0436,x                      ; ROM $0007C0: BC 36 04
+    sty $1F                          ; ROM $0007C3: 84 1F
+    pla                              ; ROM $0007C5: 68
+    bpl Gameplay_ReadTransferPointer_C7CB                 ; ROM $0007C6: 10 13
+    inc $03E6,x                      ; ROM $0007C8: FE E6 03
+    lda $03E6,x                      ; ROM $0007CB: BD E6 03
+    cmp #$87                         ; ROM $0007CE: C9 87
+    bne Gameplay_Dispatch_C7A4                 ; ROM $0007D0: D0 E2
+    lda #$00                         ; ROM $0007D2: A9 00
+    sta $03E6,x                      ; ROM $0007D4: 9D E6 03
+    sta ($34),y                      ; ROM $0007D7: 91 34
+    beq Gameplay_Dispatch_C7A4                 ; ROM $0007D9: F0 D9
+; Routine: Gameplay_ReadTransferPointer_C7CB
+; Global: Reachable code entry at CPU $C7CB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadTransferPointer_C7CB:
+    lda ($34),y                      ; ROM $0007DB: B1 34
+    tay                              ; ROM $0007DD: A8
+    beq Gameplay_ReadRam0526_C838                 ; ROM $0007DE: F0 68
+    cpy #$02                         ; ROM $0007E0: C0 02
+    bne Gameplay_ReadRam04D6_C7DE                 ; ROM $0007E2: D0 0A
+    inc $A4                          ; ROM $0007E4: E6 A4
+    lda #$80                         ; ROM $0007E6: A9 80
+    sta $03E6,x                      ; ROM $0007E8: 9D E6 03
+    jmp Gameplay_RetreatIndexX_C8A6                 ; ROM $0007EB: 4C A6 C8
+; Routine: Gameplay_ReadRam04D6_C7DE
+; Global: Reachable code entry at CPU $C7DE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam04D6_C7DE:
+    cpy #$03                         ; ROM $0007EE: C0 03
+    bne Gameplay_ReadWorkIndex_C7EE                 ; ROM $0007F0: D0 0C
+    lda $04D6,x                      ; ROM $0007F2: BD D6 04
+    ora #$10                         ; ROM $0007F5: 09 10
+    ldy $1F                          ; ROM $0007F7: A4 1F
+    sta ($34),y                      ; ROM $0007F9: 91 34
+    jmp Gameplay_WriteRam03E6_C830                 ; ROM $0007FB: 4C 30 C8
+; Routine: Gameplay_ReadWorkIndex_C7EE
+; Global: Reachable code entry at CPU $C7EE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadWorkIndex_C7EE:
+    cpy #$04                         ; ROM $0007FE: C0 04
+    bne Gameplay_ReadWorkIndex_C800                 ; ROM $000800: D0 0E
+    ldy $1F                          ; ROM $000802: A4 1F
+    lda #$08                         ; ROM $000804: A9 08
+    sta ($34),y                      ; ROM $000806: 91 34
+    lda #$28                         ; ROM $000808: A9 28
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $00080A: 20 FC D8
+    jmp Gameplay_WriteRam03E6_C830                 ; ROM $00080D: 4C 30 C8
+; Routine: Gameplay_ReadWorkIndex_C800
+; Global: Reachable code entry at CPU $C800 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadWorkIndex_C800:
+    cpy #$05                         ; ROM $000810: C0 05
+    bne Gameplay_ReadWorkIndex_C815                 ; ROM $000812: D0 11
+    ldy $1F                          ; ROM $000814: A4 1F
+    lda #$06                         ; ROM $000816: A9 06
+    sta ($34),y                      ; ROM $000818: 91 34
+    lda #$28                         ; ROM $00081A: A9 28
+    clc                              ; ROM $00081C: 18
+    adc $5B                          ; ROM $00081D: 65 5B
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $00081F: 20 FC D8
+    jmp Gameplay_WriteRam03E6_C830                 ; ROM $000822: 4C 30 C8
+; Routine: Gameplay_ReadWorkIndex_C815
+; Global: Reachable code entry at CPU $C815 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadWorkIndex_C815:
+    cpy #$08                         ; ROM $000825: C0 08
+    beq Gameplay_IncrementBonusTimer_C828                 ; ROM $000827: F0 0F
+    cpy #$06                         ; ROM $000829: C0 06
+    bne Gameplay_WriteRam03E6_C830                 ; ROM $00082B: D0 13
+    ldy $1F                          ; ROM $00082D: A4 1F
+    lda #$00                         ; ROM $00082F: A9 00
+    sta ($34),y                      ; ROM $000831: 91 34
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $000833: 20 FC D8
+    dec $A7                          ; ROM $000836: C6 A7
+; Routine: Gameplay_IncrementBonusTimer_C828
+; Global: Reachable code entry at CPU $C828 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_IncrementBonusTimer_C828:
+    inc $A7                          ; ROM $000838: E6 A7
+    jsr Gameplay_HandleControl_C8AD                 ; ROM $00083A: 20 AD C8
+    jmp Gameplay_WriteRam03E6_C830                 ; ROM $00083D: 4C 30 C8
+; Routine: Gameplay_WriteRam03E6_C830
+; Global: Reachable code entry at CPU $C830 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam03E6_C830:
+    lda #$00                         ; ROM $000840: A9 00
+    sta $03E6,x                      ; ROM $000842: 9D E6 03
+; Routine: Gameplay_Dispatch_C835
+; Global: Reachable code entry at CPU $C835 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_Dispatch_C835:
+    jmp Gameplay_RetreatIndexX_C8A6                 ; ROM $000845: 4C A6 C8
+; Routine: Gameplay_ReadRam0526_C838
+; Global: Reachable code entry at CPU $C838 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam0526_C838:
+    lda $0526,x                      ; ROM $000848: BD 26 05
+    clc                              ; ROM $00084B: 18
+    adc #$08                         ; ROM $00084C: 69 08
+    sta $0526,x                      ; ROM $00084E: 9D 26 05
+    and #$7F                         ; ROM $000851: 29 7F
+    cmp #$48                         ; ROM $000853: C9 48
+    bcs Gameplay_ReadWorkIndex_C7EE                 ; ROM $000855: B0 A7
+    lda $04D6,x                      ; ROM $000857: BD D6 04
+    sta $36                          ; ROM $00085A: 85 36
+    and #$07                         ; ROM $00085C: 29 07
+    beq Gameplay_Dispatch_C835                 ; ROM $00085E: F0 E5
+    tay                              ; ROM $000860: A8
+    lda #$00                         ; ROM $000861: A9 00
+    sta $04D6,x                      ; ROM $000863: 9D D6 04
+    lda $0436,x                      ; ROM $000866: BD 36 04
+    clc                              ; ROM $000869: 18
+    adc $CA16,y                      ; ROM $00086A: 79 16 CA
+    sta $1F                          ; ROM $00086D: 85 1F
+    lda $0486,x                      ; ROM $00086F: BD 86 04
+    clc                              ; ROM $000872: 18
+    adc $CA11,y                      ; ROM $000873: 79 11 CA
+    sta $20                          ; ROM $000876: 85 20
+    ldy #$4F                         ; ROM $000878: A0 4F
+    jsr Gameplay_ReadRam03E6_CBE5                 ; ROM $00087A: 20 E5 CB
+    bne Gameplay_RetreatIndexX_C8A6                 ; ROM $00087D: D0 37
+    lda $1F                          ; ROM $00087F: A5 1F
+    sta $0436,y                      ; ROM $000881: 99 36 04
+    lda $20                          ; ROM $000884: A5 20
+    sta $0486,y                      ; ROM $000886: 99 86 04
+    lda #$01                         ; ROM $000889: A9 01
+    sta $03E6,y                      ; ROM $00088B: 99 E6 03
+    lda $36                          ; ROM $00088E: A5 36
+    and #$07                         ; ROM $000890: 29 07
+    sta $0526,y                      ; ROM $000892: 99 26 05
+    lda $36                          ; ROM $000895: A5 36
+    clc                              ; ROM $000897: 18
+    adc #$10                         ; ROM $000898: 69 10
+    cmp $73                          ; ROM $00089A: C5 73
+    bcc Gameplay_WriteRam04D6_C89E                 ; ROM $00089C: 90 10
+    lda #$00                         ; ROM $00089E: A9 00
+    sta $03E6,y                      ; ROM $0008A0: 99 E6 03
+    lda $0526,x                      ; ROM $0008A3: BD 26 05
+    ora #$80                         ; ROM $0008A6: 09 80
+    sta $0526,x                      ; ROM $0008A8: 9D 26 05
+    jmp Gameplay_WriteRam04D6_C8A1                 ; ROM $0008AB: 4C A1 C8
+; Routine: Gameplay_WriteRam04D6_C89E
+; Global: Reachable code entry at CPU $C89E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam04D6_C89E:
+    sta $04D6,y                      ; ROM $0008AE: 99 D6 04
+; Routine: Gameplay_WriteRam04D6_C8A1
+; Global: Reachable code entry at CPU $C8A1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam04D6_C8A1:
+    lda #$00                         ; ROM $0008B1: A9 00
+    sta $04D6,x                      ; ROM $0008B3: 9D D6 04
+; Routine: Gameplay_RetreatIndexX_C8A6
+; Global: Reachable code entry at CPU $C8A6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexX_C8A6:
+    dex                              ; ROM $0008B6: CA
+    bmi Gameplay_ReturnToCaller_C8AC                 ; ROM $0008B7: 30 03
+    jmp Gameplay_ReadRam03E6_C79F                 ; ROM $0008B9: 4C 9F C7
+; Routine: Gameplay_ReturnToCaller_C8AC
+; Global: Reachable code entry at CPU $C8AC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_C8AC:
+    rts                              ; ROM $0008BC: 60
+; Routine: Gameplay_HandleControl_C8AD
+; Global: Reachable code entry at CPU $C8AD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_C8AD:
+    ldy #$09                         ; ROM $0008BD: A0 09
+; Routine: Gameplay_ReadRam0576_C8AF
+; Global: Reachable code entry at CPU $C8AF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam0576_C8AF:
+    lda $0576,y                      ; ROM $0008BF: B9 76 05
+    bne Gameplay_RetreatIndexY_C8E9                 ; ROM $0008C2: D0 35
+    lda $5B                          ; ROM $0008C4: A5 5B
+    sta $0576,y                      ; ROM $0008C6: 99 76 05
+    sta $05A8,y                      ; ROM $0008C9: 99 A8 05
+    lda #$08                         ; ROM $0008CC: A9 08
+    sta $058A,y                      ; ROM $0008CE: 99 8A 05
+    sta $059E,y                      ; ROM $0008D1: 99 9E 05
+    jsr AdvanceRandomState                 ; ROM $0008D4: 20 70 D6
+    and #$03                         ; ROM $0008D7: 29 03
+    clc                              ; ROM $0008D9: 18
+    adc #$01                         ; ROM $0008DA: 69 01
+    sta $05D0,y                      ; ROM $0008DC: 99 D0 05
+    lda $1F                          ; ROM $0008DF: A5 1F
+    sta $0580,y                      ; ROM $0008E1: 99 80 05
+    lda $20                          ; ROM $0008E4: A5 20
+    sta $0594,y                      ; ROM $0008E6: 99 94 05
+    lda #$00                         ; ROM $0008E9: A9 00
+    sta $05DA,y                      ; ROM $0008EB: 99 DA 05
+    sta $05C6,y                      ; ROM $0008EE: 99 C6 05
+    sta $05E4,y                      ; ROM $0008F1: 99 E4 05
+    lda #$1E                         ; ROM $0008F4: A9 1E
+    sta $05B2,y                      ; ROM $0008F6: 99 B2 05
+; Routine: Gameplay_RetreatIndexY_C8E9
+; Global: Reachable code entry at CPU $C8E9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexY_C8E9:
+    dey                              ; ROM $0008F9: 88
+    bpl Gameplay_ReadRam0576_C8AF                 ; ROM $0008FA: 10 C3
+    rts                              ; ROM $0008FC: 60
+; Routine: Gameplay_HandleControl_C8ED
+; Global: Reachable code entry at CPU $C8ED traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_C8ED:
+    ldy #$09                         ; ROM $0008FD: A0 09
+; Routine: Gameplay_ReadRam0576_C8EF
+; Global: Reachable code entry at CPU $C8EF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam0576_C8EF:
+    lda $0576,y                      ; ROM $0008FF: B9 76 05
+    bne Gameplay_RetreatIndexY_C935                 ; ROM $000902: D0 41
+    lda $7E                          ; ROM $000904: A5 7E
+    sta $0576,y                      ; ROM $000906: 99 76 05
+    sec                              ; ROM $000909: 38
+    sbc #$01                         ; ROM $00090A: E9 01
+    asl a                            ; ROM $00090C: 0A
+    asl a                            ; ROM $00090D: 0A
+    sta $05A8,y                      ; ROM $00090E: 99 A8 05
+    lda #$08                         ; ROM $000911: A9 08
+    sta $058A,y                      ; ROM $000913: 99 8A 05
+    sta $059E,y                      ; ROM $000916: 99 9E 05
+    jsr AdvanceRandomState                 ; ROM $000919: 20 70 D6
+    and #$03                         ; ROM $00091C: 29 03
+    clc                              ; ROM $00091E: 18
+    adc #$01                         ; ROM $00091F: 69 01
+    sta $05D0,y                      ; ROM $000921: 99 D0 05
+    sty $5A                          ; ROM $000924: 84 5A
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $000926: 20 CF CA
+    ldy $5A                          ; ROM $000929: A4 5A
+    lda $24                          ; ROM $00092B: A5 24
+    sta $0580,y                      ; ROM $00092D: 99 80 05
+    lda $25                          ; ROM $000930: A5 25
+    sta $0594,y                      ; ROM $000932: 99 94 05
+    lda #$00                         ; ROM $000935: A9 00
+    sta $05DA,y                      ; ROM $000937: 99 DA 05
+    sta $05C6,y                      ; ROM $00093A: 99 C6 05
+    sta $05E4,y                      ; ROM $00093D: 99 E4 05
+    lda #$1E                         ; ROM $000940: A9 1E
+    sta $05B2,y                      ; ROM $000942: 99 B2 05
+; Routine: Gameplay_RetreatIndexY_C935
+; Global: Reachable code entry at CPU $C935 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexY_C935:
+    dey                              ; ROM $000945: 88
+    bpl Gameplay_ReadRam0576_C8EF                 ; ROM $000946: 10 B7
+    rts                              ; ROM $000948: 60
+; Routine: Gameplay_HandleControl_C939
+; Global: Reachable code entry at CPU $C939 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_C939:
+    ldx #$09                         ; ROM $000949: A2 09
+; Routine: Gameplay_ReadRam03A0_C93B
+; Global: Reachable code entry at CPU $C93B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam03A0_C93B:
+    lda $03A0,x                      ; ROM $00094B: BD A0 03
+    beq Gameplay_RetreatIndexX_C966                 ; ROM $00094E: F0 26
+    ldy $03B4,x                      ; ROM $000950: BC B4 03
+    lda $E2A3,y                      ; ROM $000953: B9 A3 E2
+    sta $34                          ; ROM $000956: 85 34
+    lda $E2B0,y                      ; ROM $000958: B9 B0 E2
+    sta $35                          ; ROM $00095B: 85 35
+    sty $20                          ; ROM $00095D: 84 20
+    ldy $03AA,x                      ; ROM $00095F: BC AA 03
+    sty $1F                          ; ROM $000962: 84 1F
+    lda #$00                         ; ROM $000964: A9 00
+    jsr Gameplay_WriteZp2F_C9B6                 ; ROM $000966: 20 B6 C9
+    jsr Gameplay_WriteDisplayMode_CBF6                 ; ROM $000969: 20 F6 CB
+    lda #$00                         ; ROM $00096C: A9 00
+    sta ($34),y                      ; ROM $00096E: 91 34
+    lda #$00                         ; ROM $000970: A9 00
+    sta $03A0,x                      ; ROM $000972: 9D A0 03
+    rts                              ; ROM $000975: 60
+; Routine: Gameplay_RetreatIndexX_C966
+; Global: Reachable code entry at CPU $C966 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexX_C966:
+    dex                              ; ROM $000976: CA
+    bpl Gameplay_ReadRam03A0_C93B                 ; ROM $000977: 10 D2
+    rts                              ; ROM $000979: 60
+; Routine: Gameplay_HandleControl_C96A
+; Global: Reachable code entry at CPU $C96A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_C96A:
+    ldx #$09                         ; ROM $00097A: A2 09
+; Routine: Gameplay_ReadRam03A0_C96C
+; Global: Reachable code entry at CPU $C96C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam03A0_C96C:
+    lda $03A0,x                      ; ROM $00097C: BD A0 03
+    beq Gameplay_RetreatIndexX_C9B2                 ; ROM $00097F: F0 41
+    ldy $03B4,x                      ; ROM $000981: BC B4 03
+    lda $E2A3,y                      ; ROM $000984: B9 A3 E2
+    sta $34                          ; ROM $000987: 85 34
+    lda $E2B0,y                      ; ROM $000989: B9 B0 E2
+    sta $35                          ; ROM $00098C: 85 35
+    sty $20                          ; ROM $00098E: 84 20
+    ldy $03AA,x                      ; ROM $000990: BC AA 03
+    sty $1F                          ; ROM $000993: 84 1F
+    lda ($34),y                      ; ROM $000995: B1 34
+    cmp #$03                         ; ROM $000997: C9 03
+    bne Gameplay_ReadFlamePass_C999                 ; ROM $000999: D0 0E
+    inc $03D2,x                      ; ROM $00099B: FE D2 03
+    lda $77                          ; ROM $00099E: A5 77
+    bne Gameplay_RetreatIndexX_C9B2                 ; ROM $0009A0: D0 20
+    dec $03BE,x                      ; ROM $0009A2: DE BE 03
+    bne Gameplay_RetreatIndexX_C9B2                 ; ROM $0009A5: D0 1B
+    lda #$00                         ; ROM $0009A7: A9 00
+; Routine: Gameplay_ReadFlamePass_C999
+; Global: Reachable code entry at CPU $C999 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadFlamePass_C999:
+    and #$07                         ; ROM $0009A9: 29 07
+    jsr Gameplay_WriteZp2F_C9B6                 ; ROM $0009AB: 20 B6 C9
+    lda $A5                          ; ROM $0009AE: A5 A5
+    cmp #$FF                         ; ROM $0009B0: C9 FF
+    beq Gameplay_WriteTransferPointer_C9A6                 ; ROM $0009B2: F0 02
+    inc $A5                          ; ROM $0009B4: E6 A5
+; Routine: Gameplay_WriteTransferPointer_C9A6
+; Global: Reachable code entry at CPU $C9A6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteTransferPointer_C9A6:
+    jsr Gameplay_WriteDisplayMode_CBF6                 ; ROM $0009B6: 20 F6 CB
+    lda #$00                         ; ROM $0009B9: A9 00
+    sta ($34),y                      ; ROM $0009BB: 91 34
+    lda #$00                         ; ROM $0009BD: A9 00
+    sta $03A0,x                      ; ROM $0009BF: 9D A0 03
+; Routine: Gameplay_RetreatIndexX_C9B2
+; Global: Reachable code entry at CPU $C9B2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexX_C9B2:
+    dex                              ; ROM $0009C2: CA
+    bpl Gameplay_ReadRam03A0_C96C                 ; ROM $0009C3: 10 B7
+; Routine: Gameplay_ReturnToCaller_C9B5
+; Global: Reachable code entry at CPU $C9B5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_C9B5:
+    rts                              ; ROM $0009C5: 60
+; Routine: Gameplay_WriteZp2F_C9B6
+; Global: Reachable code entry at CPU $C9B6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteZp2F_C9B6:
+    stx $2F                          ; ROM $0009C6: 86 2F
+    sty $30                          ; ROM $0009C8: 84 30
+    tay                              ; ROM $0009CA: A8
+    lda $C9DE,y                      ; ROM $0009CB: B9 DE C9
+    sta $2E                          ; ROM $0009CE: 85 2E
+    lda #$01                         ; ROM $0009D0: A9 01
+    jsr Gameplay_TestZp2E_C9E3                 ; ROM $0009D2: 20 E3 C9
+    lda #$02                         ; ROM $0009D5: A9 02
+    jsr Gameplay_TestZp2E_C9E3                 ; ROM $0009D7: 20 E3 C9
+    lda #$03                         ; ROM $0009DA: A9 03
+    jsr Gameplay_TestZp2E_C9E3                 ; ROM $0009DC: 20 E3 C9
+    lda #$04                         ; ROM $0009DF: A9 04
+    jsr Gameplay_TestZp2E_C9E3                 ; ROM $0009E1: 20 E3 C9
+    lda #$00                         ; ROM $0009E4: A9 00
+    jsr Gameplay_TestZp2E_C9E3                 ; ROM $0009E6: 20 E3 C9
+    ldx $2F                          ; ROM $0009E9: A6 2F
+    ldy $30                          ; ROM $0009EB: A4 30
+    rts                              ; ROM $0009ED: 60
+
+; Data region: CPU $C9DE-$C9E2; unreachable by direct recursive trace.
+GameplayDirectionDeltaTable:
+    .byte $FF, $03, $04, $01, $02                                                        ; ROM $0009EE: FF 03 04 01 02
+; Routine: Gameplay_TestZp2E_C9E3
+; Global: Reachable code entry at CPU $C9E3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_TestZp2E_C9E3:
+    cmp $2E                          ; ROM $0009F3: C5 2E
+    beq Gameplay_ReturnToCaller_C9B5                 ; ROM $0009F5: F0 CE
+    sta $31                          ; ROM $0009F7: 85 31
+    tax                              ; ROM $0009F9: AA
+    ldy #$4F                         ; ROM $0009FA: A0 4F
+    jsr Gameplay_ReadRam03E6_CBE5                 ; ROM $0009FC: 20 E5 CB
+    bmi Gameplay_ReturnToCaller_CA10                 ; ROM $0009FF: 30 1F
+    lda $20                          ; ROM $000A01: A5 20
+    clc                              ; ROM $000A03: 18
+    adc $CA11,x                      ; ROM $000A04: 7D 11 CA
+    sta $0486,y                      ; ROM $000A07: 99 86 04
+    lda $1F                          ; ROM $000A0A: A5 1F
+    clc                              ; ROM $000A0C: 18
+    adc $CA16,x                      ; ROM $000A0D: 7D 16 CA
+    sta $0436,y                      ; ROM $000A10: 99 36 04
+    lda $31                          ; ROM $000A13: A5 31
+    sta $04D6,y                      ; ROM $000A15: 99 D6 04
+    sta $0526,y                      ; ROM $000A18: 99 26 05
+    lda #$01                         ; ROM $000A1B: A9 01
+    sta $03E6,y                      ; ROM $000A1D: 99 E6 03
+; Routine: Gameplay_ReturnToCaller_CA10
+; Global: Reachable code entry at CPU $CA10 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_CA10:
+    rts                              ; ROM $000A20: 60
+
+; Data region: CPU $CA11-$CA1A; unreachable by direct recursive trace.
+GameplayObjectClassTable:
+    .byte $00, $00, $FF, $00, $01, $00, $01, $00, $FF, $00                               ; ROM $000A21: 00 00 FF 00 01 00 01 00 FF 00
+; Routine: Gameplay_HandleControl_CA1B
+; Global: Reachable code entry at CPU $CA1B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_CA1B:
+    ldx #$09                         ; ROM $000A2B: A2 09
+; Routine: Gameplay_ReadRam03A0_CA1D
+; Global: Reachable code entry at CPU $CA1D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam03A0_CA1D:
+    lda $03A0,x                      ; ROM $000A2D: BD A0 03
+    beq Gameplay_RetreatIndexX_CA43                 ; ROM $000A30: F0 21
+    lda $03AA,x                      ; ROM $000A32: BD AA 03
+    sta $1F                          ; ROM $000A35: 85 1F
+    lda $03B4,x                      ; ROM $000A37: BD B4 03
+    sta $20                          ; ROM $000A3A: 85 20
+    lda $03D2,x                      ; ROM $000A3C: BD D2 03
+    and #$0F                         ; ROM $000A3F: 29 0F
+    bne Gameplay_RetreatIndexX_CA43                 ; ROM $000A41: D0 10
+    lda $03D2,x                      ; ROM $000A43: BD D2 03
+    lsr a                            ; ROM $000A46: 4A
+    lsr a                            ; ROM $000A47: 4A
+    lsr a                            ; ROM $000A48: 4A
+    lsr a                            ; ROM $000A49: 4A
+    and #$03                         ; ROM $000A4A: 29 03
+    tay                              ; ROM $000A4C: A8
+    lda $CA47,y                      ; ROM $000A4D: B9 47 CA
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $000A50: 20 FC D8
+; Routine: Gameplay_RetreatIndexX_CA43
+; Global: Reachable code entry at CPU $CA43 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexX_CA43:
+    dex                              ; ROM $000A53: CA
+    bpl Gameplay_ReadRam03A0_CA1D                 ; ROM $000A54: 10 D7
+    rts                              ; ROM $000A56: 60
+
+; Data region: CPU $CA47-$CA4A; unreachable by direct recursive trace.
+GameplayObjectAttributeTable:
+    .byte $09, $0A, $09, $08                                                             ; ROM $000A57: 09 0A 09 08
+; Routine: Gameplay_WriteTransferPointer_CA4B
+; Global: Reachable code entry at CPU $CA4B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteTransferPointer_CA4B:
+    jsr Gameplay_WriteTransferPointer_CA72                 ; ROM $000A5B: 20 72 CA
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $000A5E: 20 CF CA
+    lda #$04                         ; ROM $000A61: A9 04
+    sta ($34),y                      ; ROM $000A63: 91 34
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $000A65: 20 CF CA
+    lda #$05                         ; ROM $000A68: A9 05
+    sta ($34),y                      ; ROM $000A6A: 91 34
+    lda #$32                         ; ROM $000A6C: A9 32
+    clc                              ; ROM $000A6E: 18
+    adc $58                          ; ROM $000A6F: 65 58
+    clc                              ; ROM $000A71: 18
+    adc $58                          ; ROM $000A72: 65 58
+    sta $1F                          ; ROM $000A74: 85 1F
+; Routine: Gameplay_WriteTransferPointer_CA66
+; Global: Reachable code entry at CPU $CA66 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteTransferPointer_CA66:
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $000A76: 20 CF CA
+    lda #$02                         ; ROM $000A79: A9 02
+    sta ($34),y                      ; ROM $000A7B: 91 34
+    dec $1F                          ; ROM $000A7D: C6 1F
+    bne Gameplay_WriteTransferPointer_CA66                 ; ROM $000A7F: D0 F5
+    rts                              ; ROM $000A81: 60
+; Routine: Gameplay_WriteTransferPointer_CA72
+; Global: Reachable code entry at CPU $CA72 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteTransferPointer_CA72:
+    lda #$00                         ; ROM $000A82: A9 00
+    sta $34                          ; ROM $000A84: 85 34
+    lda #$02                         ; ROM $000A86: A9 02
+    sta $35                          ; ROM $000A88: 85 35
+    ldy #$00                         ; ROM $000A8A: A0 00
+    ldx #$00                         ; ROM $000A8C: A2 00
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000A8E: 20 BA CA
+    ldx #$20                         ; ROM $000A91: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000A93: 20 BA CA
+    ldx #$40                         ; ROM $000A96: A2 40
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000A98: 20 BA CA
+    ldx #$20                         ; ROM $000A9B: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000A9D: 20 BA CA
+    ldx #$40                         ; ROM $000AA0: A2 40
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AA2: 20 BA CA
+    ldx #$20                         ; ROM $000AA5: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AA7: 20 BA CA
+    ldx #$40                         ; ROM $000AAA: A2 40
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AAC: 20 BA CA
+    ldx #$20                         ; ROM $000AAF: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AB1: 20 BA CA
+    ldx #$40                         ; ROM $000AB4: A2 40
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AB6: 20 BA CA
+    ldx #$20                         ; ROM $000AB9: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000ABB: 20 BA CA
+    ldx #$40                         ; ROM $000ABE: A2 40
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AC0: 20 BA CA
+    ldx #$20                         ; ROM $000AC3: A2 20
+    jsr Gameplay_WriteObjectWorkX_CABA                 ; ROM $000AC5: 20 BA CA
+    ldx #$00                         ; ROM $000AC8: A2 00
+; Routine: Gameplay_WriteObjectWorkX_CABA
+; Global: Reachable code entry at CPU $CABA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteObjectWorkX_CABA:
+    lda #$20                         ; ROM $000ACA: A9 20
+    sta $24                          ; ROM $000ACC: 85 24
+; Routine: Gameplay_ReadRamE243_CABE
+; Global: Reachable code entry at CPU $CABE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRamE243_CABE:
+    lda $E243,x                      ; ROM $000ACE: BD 43 E2
+    sta ($34),y                      ; ROM $000AD1: 91 34
+    inc $34                          ; ROM $000AD3: E6 34
+    bne Gameplay_DecrementObjectWorkX_CAC9                 ; ROM $000AD5: D0 02
+    inc $35                          ; ROM $000AD7: E6 35
+; Routine: Gameplay_DecrementObjectWorkX_CAC9
+; Global: Reachable code entry at CPU $CAC9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_DecrementObjectWorkX_CAC9:
+    inx                              ; ROM $000AD9: E8
+    dec $24                          ; ROM $000ADA: C6 24
+    bne Gameplay_ReadRamE243_CABE                 ; ROM $000ADC: D0 F0
+    rts                              ; ROM $000ADE: 60
+; Routine: Gameplay_WriteObjectWorkX_CACF
+; Global: Reachable code entry at CPU $CACF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteObjectWorkX_CACF:
+    jsr AdvanceRandomState                 ; ROM $000ADF: 20 70 D6
+    ror a                            ; ROM $000AE2: 6A
+    ror a                            ; ROM $000AE3: 6A
+    and #$1F                         ; ROM $000AE4: 29 1F
+    beq Gameplay_WriteObjectWorkX_CACF                 ; ROM $000AE6: F0 F7
+    sta $24                          ; ROM $000AE8: 85 24
+; Routine: Gameplay_WriteObjectWorkY_CADA
+; Global: Reachable code entry at CPU $CADA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteObjectWorkY_CADA:
+    jsr AdvanceRandomState                 ; ROM $000AEA: 20 70 D6
+    ror a                            ; ROM $000AED: 6A
+    ror a                            ; ROM $000AEE: 6A
+    ror a                            ; ROM $000AEF: 6A
+    and #$0F                         ; ROM $000AF0: 29 0F
+    beq Gameplay_WriteObjectWorkY_CADA                 ; ROM $000AF2: F0 F6
+    cmp #$0C                         ; ROM $000AF4: C9 0C
+    bcs Gameplay_WriteObjectWorkY_CADA                 ; ROM $000AF6: B0 F2
+    sta $25                          ; ROM $000AF8: 85 25
+    tay                              ; ROM $000AFA: A8
+    lda $E2A3,y                      ; ROM $000AFB: B9 A3 E2
+    sta $34                          ; ROM $000AFE: 85 34
+    lda $E2B0,y                      ; ROM $000B00: B9 B0 E2
+    sta $35                          ; ROM $000B03: 85 35
+    ldy $24                          ; ROM $000B05: A4 24
+    lda ($34),y                      ; ROM $000B07: B1 34
+    bne Gameplay_WriteObjectWorkX_CACF                 ; ROM $000B09: D0 D4
+    cpy #$03                         ; ROM $000B0B: C0 03
+    bcs Gameplay_ReturnToCaller_CB05                 ; ROM $000B0D: B0 06
+    lda $25                          ; ROM $000B0F: A5 25
+    cmp #$03                         ; ROM $000B11: C9 03
+    bcc Gameplay_WriteObjectWorkX_CACF                 ; ROM $000B13: 90 CA
+; Routine: Gameplay_ReturnToCaller_CB05
+; Global: Reachable code entry at CPU $CB05 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_CB05:
+    rts                              ; ROM $000B15: 60
+; Routine: Gameplay_WriteWorkValue_CB06
+; Global: Reachable code entry at CPU $CB06 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteWorkValue_CB06:
+    jsr DisableRendering                 ; ROM $000B16: 20 57 C2
+    lda #$00                         ; ROM $000B19: A9 00
+    sta $20                          ; ROM $000B1B: 85 20
+    lda #$00                         ; ROM $000B1D: A9 00
+    sta $26                          ; ROM $000B1F: 85 26
+    lda #$02                         ; ROM $000B21: A9 02
+    sta $27                          ; ROM $000B23: 85 27
+    ldy #$00                         ; ROM $000B25: A0 00
+; Routine: Gameplay_WriteWorkIndex_CB17
+; Global: Reachable code entry at CPU $CB17 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteWorkIndex_CB17:
+    lda #$00                         ; ROM $000B27: A9 00
+    sta $1F                          ; ROM $000B29: 85 1F
+; Routine: Gameplay_ReadZp94_CB1B
+; Global: Reachable code entry at CPU $CB1B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZp94_CB1B:
+    lda $94                          ; ROM $000B2B: A5 94
+    beq Gameplay_ReadDataPointer_CB24                 ; ROM $000B2D: F0 05
+    lda ($26),y                      ; ROM $000B2F: B1 26
+    jmp Gameplay_IncrementZp27_CB30                 ; ROM $000B31: 4C 30 CB
+; Routine: Gameplay_ReadDataPointer_CB24
+; Global: Reachable code entry at CPU $CB24 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadDataPointer_CB24:
+    lda ($26),y                      ; ROM $000B34: B1 26
+    cmp #$04                         ; ROM $000B36: C9 04
+    beq Gameplay_HandleControl_CB2E                 ; ROM $000B38: F0 04
+    cmp #$05                         ; ROM $000B3A: C9 05
+    bne Gameplay_IncrementZp27_CB30                 ; ROM $000B3C: D0 02
+; Routine: Gameplay_HandleControl_CB2E
+; Global: Reachable code entry at CPU $CB2E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_CB2E:
+    lda #$02                         ; ROM $000B3E: A9 02
+; Routine: Gameplay_IncrementZp27_CB30
+; Global: Reachable code entry at CPU $CB30 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_IncrementZp27_CB30:
+    jsr Gameplay_WriteObjectWorkY_CB4E                 ; ROM $000B40: 20 4E CB
+    iny                              ; ROM $000B43: C8
+    bne Gameplay_IncrementWorkIndex_CB38                 ; ROM $000B44: D0 02
+    inc $27                          ; ROM $000B46: E6 27
+; Routine: Gameplay_IncrementWorkIndex_CB38
+; Global: Reachable code entry at CPU $CB38 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_IncrementWorkIndex_CB38:
+    inc $1F                          ; ROM $000B48: E6 1F
+    lda $1F                          ; ROM $000B4A: A5 1F
+    and #$20                         ; ROM $000B4C: 29 20
+    beq Gameplay_ReadZp94_CB1B                 ; ROM $000B4E: F0 DB
+    inc $20                          ; ROM $000B50: E6 20
+    lda $20                          ; ROM $000B52: A5 20
+    cmp #$0D                         ; ROM $000B54: C9 0D
+    bne Gameplay_WriteWorkIndex_CB17                 ; ROM $000B56: D0 CF
+    jsr Menu_HandleControl_DDC7                 ; ROM $000B58: 20 C7 DD
+    jmp CommitPpuStateAndScroll                 ; ROM $000B5B: 4C 96 C2
+; Routine: Gameplay_WriteObjectWorkY_CB4E
+; Global: Reachable code entry at CPU $CB4E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteObjectWorkY_CB4E:
+    sty $25                          ; ROM $000B5E: 84 25
+    jsr Stage_WriteZp1A_D924                 ; ROM $000B60: 20 24 D9
+    ldx #$00                         ; ROM $000B63: A2 00
+; Routine: Gameplay_ReadZp17_CB55
+; Global: Reachable code entry at CPU $CB55 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZp17_CB55:
+    lda $17,x                        ; ROM $000B65: B5 17
+    sta $0600,x                      ; ROM $000B67: 9D 00 06
+    inx                              ; ROM $000B6A: E8
+    cpx #$08                         ; ROM $000B6B: E0 08
+    bne Gameplay_ReadZp17_CB55                 ; ROM $000B6D: D0 F6
+    jsr Gameplay_TransferVramData_CB65                 ; ROM $000B6F: 20 65 CB
+    ldy $25                          ; ROM $000B72: A4 25
+    rts                              ; ROM $000B74: 60
+; Routine: Gameplay_TransferVramData_CB65
+; Global: Reachable code entry at CPU $CB65 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_TransferVramData_CB65:
+    lda $0602                        ; ROM $000B75: AD 02 06
+    ora $0600                        ; ROM $000B78: 0D 00 06
+    pha                              ; ROM $000B7B: 48
+    sta PPUADDR                      ; ROM $000B7C: 8D 06 20
+    ldx $0601                        ; ROM $000B7F: AE 01 06
+    stx PPUADDR                      ; ROM $000B82: 8E 06 20
+    ldx $0603                        ; ROM $000B85: AE 03 06
+    lda $D9C6,x                      ; ROM $000B88: BD C6 D9
+    sta PPUDATA                      ; ROM $000B8B: 8D 07 20
+    lda $D9C7,x                      ; ROM $000B8E: BD C7 D9
+    sta PPUDATA                      ; ROM $000B91: 8D 07 20
+    pla                              ; ROM $000B94: 68
+    sta PPUADDR                      ; ROM $000B95: 8D 06 20
+    lda $0601                        ; ROM $000B98: AD 01 06
+    clc                              ; ROM $000B9B: 18
+    adc #$20                         ; ROM $000B9C: 69 20
+    sta PPUADDR                      ; ROM $000B9E: 8D 06 20
+    lda $D9C8,x                      ; ROM $000BA1: BD C8 D9
+    sta PPUDATA                      ; ROM $000BA4: 8D 07 20
+    lda $D9C9,x                      ; ROM $000BA7: BD C9 D9
+    sta PPUDATA                      ; ROM $000BAA: 8D 07 20
+    lda #$23                         ; ROM $000BAD: A9 23
+    ora $0600                        ; ROM $000BAF: 0D 00 06
+    pha                              ; ROM $000BB2: 48
+    sta PPUADDR                      ; ROM $000BB3: 8D 06 20
+    lda $0604                        ; ROM $000BB6: AD 04 06
+    sta PPUADDR                      ; ROM $000BB9: 8D 06 20
+    tax                              ; ROM $000BBC: AA
+    lda PPUDATA                      ; ROM $000BBD: AD 07 20
+    lda PPUDATA                      ; ROM $000BC0: AD 07 20
+    and $0606                        ; ROM $000BC3: 2D 06 06
+    ora $0607                        ; ROM $000BC6: 0D 07 06
+    tay                              ; ROM $000BC9: A8
+    pla                              ; ROM $000BCA: 68
+    sta PPUADDR                      ; ROM $000BCB: 8D 06 20
+    stx PPUADDR                      ; ROM $000BCE: 8E 06 20
+    sty PPUDATA                      ; ROM $000BD1: 8C 07 20
+    rts                              ; ROM $000BD4: 60
+; Routine: Gameplay_HandleControl_CBC5
+; Global: Reachable code entry at CPU $CBC5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_CBC5:
+    ldx #$09                         ; ROM $000BD5: A2 09
+    lda #$00                         ; ROM $000BD7: A9 00
+; Routine: Gameplay_WriteRam03A0_CBC9
+; Global: Reachable code entry at CPU $CBC9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam03A0_CBC9:
+    sta $03A0,x                      ; ROM $000BD9: 9D A0 03
+    dex                              ; ROM $000BDC: CA
+    bpl Gameplay_WriteRam03A0_CBC9                 ; ROM $000BDD: 10 FA
+    ldx #$4F                         ; ROM $000BDF: A2 4F
+; Routine: Gameplay_WriteRam03E6_CBD1
+; Global: Reachable code entry at CPU $CBD1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam03E6_CBD1:
+    sta $03E6,x                      ; ROM $000BE1: 9D E6 03
+    dex                              ; ROM $000BE4: CA
+    bpl Gameplay_WriteRam03E6_CBD1                 ; ROM $000BE5: 10 FA
+; Routine: Gameplay_HandleControl_CBD7
+; Global: Reachable code entry at CPU $CBD7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_CBD7:
+    lda #$00                         ; ROM $000BE7: A9 00
+    ldx #$09                         ; ROM $000BE9: A2 09
+; Routine: Gameplay_WriteRam0576_CBDB
+; Global: Reachable code entry at CPU $CBDB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteRam0576_CBDB:
+    sta $0576,x                      ; ROM $000BEB: 9D 76 05
+    dex                              ; ROM $000BEE: CA
+    bpl Gameplay_WriteRam0576_CBDB                 ; ROM $000BEF: 10 FA
+    rts                              ; ROM $000BF1: 60
+; Routine: Gameplay_RetreatIndexY_CBE2
+; Global: Reachable code entry at CPU $CBE2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexY_CBE2:
+    dey                              ; ROM $000BF2: 88
+    bmi Gameplay_ReturnToCaller_CBEA                 ; ROM $000BF3: 30 05
+; Routine: Gameplay_ReadRam03E6_CBE5
+; Global: Reachable code entry at CPU $CBE5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRam03E6_CBE5:
+    lda $03E6,y                      ; ROM $000BF5: B9 E6 03
+    bne Gameplay_RetreatIndexY_CBE2                 ; ROM $000BF8: D0 F8
+; Routine: Gameplay_ReturnToCaller_CBEA
+; Global: Reachable code entry at CPU $CBEA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_CBEA:
+    rts                              ; ROM $000BFA: 60
+; Routine: Gameplay_ReadRamE2A3_CBEB
+; Global: Reachable code entry at CPU $CBEB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRamE2A3_CBEB:
+    lda $E2A3,y                      ; ROM $000BFB: B9 A3 E2
+    sta $34                          ; ROM $000BFE: 85 34
+    lda $E2B0,y                      ; ROM $000C00: B9 B0 E2
+    sta $35                          ; ROM $000C03: 85 35
+    rts                              ; ROM $000C05: 60
+; Routine: Gameplay_WriteDisplayMode_CBF6
+; Global: Reachable code entry at CPU $CBF6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteDisplayMode_CBF6:
+    lda #$01                         ; ROM $000C06: A9 01
+    sta $38                          ; ROM $000C08: 85 38
+    rts                              ; ROM $000C0A: 60
+; Routine: WaitForNmiFrameHandoff
+; Global: Reachable code entry at CPU $CBFB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+WaitForNmiFrameHandoff:
+    lda FrameSyncFlag                          ; ROM $000C0B: A5 0B
+    bne WaitForNmiFrameHandoff                 ; ROM $000C0D: D0 FC
+    lda #$01                         ; ROM $000C0F: A9 01
+    sta FrameSyncFlag                          ; ROM $000C11: 85 0B
+    rts                              ; ROM $000C13: 60
+
+; Data region: CPU $CC04-$CC35; unreachable by direct recursive trace.
+FrameAnimationSequenceTable:
+    .byte $02, $01, $05, $03, $01, $01, $02, $05, $06, $04, $01, $01, $05, $06, $02, $04 ; ROM $000C14: 02 01 05 03 01 01 02 05 06 04 01 01 05 06 02 04
+    .byte $01, $06, $01, $05, $06, $05, $01, $05, $06, $08, $02, $01, $05, $07, $04, $01 ; ROM $000C24: 01 06 01 05 06 05 01 05 06 08 02 01 05 07 04 01
+    .byte $05, $08, $06, $07, $05, $02, $04, $08, $05, $04, $06, $05, $08, $04, $06, $05 ; ROM $000C34: 05 08 06 07 05 02 04 08 05 04 06 05 08 04 06 05
+    .byte $07, $08                                                                       ; ROM $000C44: 07 08
+; Routine: Frame_ReadZp7D_CC36
+; Global: Reachable code entry at CPU $CC36 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadZp7D_CC36:
+    lda $7D                          ; ROM $000C46: A5 7D
+    bne Frame_ReadZp5C_CC4C                 ; ROM $000C48: D0 12
+    lda $7A                          ; ROM $000C4A: A5 7A
+    beq Frame_ReadZp5C_CC4C                 ; ROM $000C4C: F0 0E
+    lda $33                          ; ROM $000C4E: A5 33
+    and #$07                         ; ROM $000C50: 29 07
+    bne Frame_ReadZp5C_CC4C                 ; ROM $000C52: D0 08
+    dec $7A                          ; ROM $000C54: C6 7A
+    bne Frame_ReadZp5C_CC4C                 ; ROM $000C56: D0 04
+    lda #$03                         ; ROM $000C58: A9 03
+    sta $B5                          ; ROM $000C5A: 85 B5
+; Routine: Frame_ReadZp5C_CC4C
+; Global: Reachable code entry at CPU $CC4C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadZp5C_CC4C:
+    lda $5C                          ; ROM $000C5C: A5 5C
+    beq Frame_ReadObjectX_CC63                 ; ROM $000C5E: F0 13
+    lda $33                          ; ROM $000C60: A5 33
+    and #$0F                         ; ROM $000C62: 29 0F
+    bne Frame_ReturnToCaller_CC62                 ; ROM $000C64: D0 0C
+    inc $2C                          ; ROM $000C66: E6 2C
+    lda $2C                          ; ROM $000C68: A5 2C
+    cmp #$14                         ; ROM $000C6A: C9 14
+    bne Frame_ReturnToCaller_CC62                 ; ROM $000C6C: D0 04
+    lda #$01                         ; ROM $000C6E: A9 01
+    sta $5D                          ; ROM $000C70: 85 5D
+; Routine: Frame_ReturnToCaller_CC62
+; Global: Reachable code entry at CPU $CC62 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CC62:
+    rts                              ; ROM $000C72: 60
+; Routine: Frame_ReadObjectX_CC63
+; Global: Reachable code entry at CPU $CC63 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectX_CC63:
+    lda $29                          ; ROM $000C73: A5 29
+    cmp #$08                         ; ROM $000C75: C9 08
+    bne Frame_ReadObjectFlags_CCA4                 ; ROM $000C77: D0 3B
+    lda $2B                          ; ROM $000C79: A5 2B
+    cmp #$08                         ; ROM $000C7B: C9 08
+    bne Frame_ReadObjectFlags_CCA4                 ; ROM $000C7D: D0 35
+    ldy $2A                          ; ROM $000C7F: A4 2A
+    sty $20                          ; ROM $000C81: 84 20
+    lda $E2A3,y                      ; ROM $000C83: B9 A3 E2
+    sta $34                          ; ROM $000C86: 85 34
+    lda $E2B0,y                      ; ROM $000C88: B9 B0 E2
+    sta $35                          ; ROM $000C8B: 85 35
+    ldy $28                          ; ROM $000C8D: A4 28
+    sty $1F                          ; ROM $000C8F: 84 1F
+    lda ($34),y                      ; ROM $000C91: B1 34
+    cmp #$08                         ; ROM $000C93: C9 08
+    beq Frame_IncrementBombCapacity_CC95                 ; ROM $000C95: F0 0E
+    cmp #$06                         ; ROM $000C97: C9 06
+    bne Frame_ReadObjectFlags_CCA4                 ; ROM $000C99: D0 19
+    lda #$00                         ; ROM $000C9B: A9 00
+    sta ($34),y                      ; ROM $000C9D: 91 34
+    jsr Stage_WriteObjectWorkX_D8FC                 ; ROM $000C9F: 20 FC D8
+    jmp Frame_WriteSoundCommandState_CEE9                 ; ROM $000CA2: 4C E9 CE
+; Routine: Frame_IncrementBombCapacity_CC95
+; Global: Reachable code entry at CPU $CC95 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_IncrementBombCapacity_CC95:
+    inc $9F                          ; ROM $000CA5: E6 9F
+    lda #$00                         ; ROM $000CA7: A9 00
+    sta $A6                          ; ROM $000CA9: 85 A6
+    lda $9C                          ; ROM $000CAB: A5 9C
+    bne Frame_ReadObjectFlags_CCA4                 ; ROM $000CAD: D0 05
+    lda #$01                         ; ROM $000CAF: A9 01
+    sta $5E                          ; ROM $000CB1: 85 5E
+; Routine: Frame_ReturnToCaller_CCA3
+; Global: Reachable code entry at CPU $CCA3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CCA3:
+    rts                              ; ROM $000CB3: 60
+; Routine: Frame_ReadObjectFlags_CCA4
+; Global: Reachable code entry at CPU $CCA4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectFlags_CCA4:
+    lda $75                          ; ROM $000CB4: A5 75
+    bne Frame_WriteInvincibilityTimer_CCAE                 ; ROM $000CB6: D0 06
+    lda $33                          ; ROM $000CB8: A5 33
+    and #$03                         ; ROM $000CBA: 29 03
+    beq Frame_ReturnToCaller_CCA3                 ; ROM $000CBC: F0 F5
+; Routine: Frame_WriteInvincibilityTimer_CCAE
+; Global: Reachable code entry at CPU $CCAE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteInvincibilityTimer_CCAE:
+    jsr Object_ReadGameState_CF87                 ; ROM $000CBE: 20 87 CF
+    bne Frame_CopyAToX_CCB7                 ; ROM $000CC1: D0 04
+    sta $A6                          ; ROM $000CC3: 85 A6
+    sta $7B                          ; ROM $000CC5: 85 7B
+; Routine: Frame_CopyAToX_CCB7
+; Global: Reachable code entry at CPU $CCB7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_CopyAToX_CCB7:
+    tax                              ; ROM $000CC7: AA
+    and #$01                         ; ROM $000CC8: 29 01
+    beq Frame_CopyXToA_CCBF                 ; ROM $000CCA: F0 03
+    jsr Frame_ReadObjectX_CDD4                 ; ROM $000CCC: 20 D4 CD
+; Routine: Frame_CopyXToA_CCBF
+; Global: Reachable code entry at CPU $CCBF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_CopyXToA_CCBF:
+    txa                              ; ROM $000CCF: 8A
+    and #$02                         ; ROM $000CD0: 29 02
+    beq Frame_CopyXToA_CCC7                 ; ROM $000CD2: F0 03
+    jsr Frame_ReadObjectX_CDA3                 ; ROM $000CD4: 20 A3 CD
+; Routine: Frame_CopyXToA_CCC7
+; Global: Reachable code entry at CPU $CCC7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_CopyXToA_CCC7:
+    txa                              ; ROM $000CD7: 8A
+    and #$08                         ; ROM $000CD8: 29 08
+    beq Frame_CopyXToA_CCCF                 ; ROM $000CDA: F0 03
+    jsr Frame_ReadObjectY_CD70                 ; ROM $000CDC: 20 70 CD
+; Routine: Frame_CopyXToA_CCCF
+; Global: Reachable code entry at CPU $CCCF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_CopyXToA_CCCF:
+    txa                              ; ROM $000CDF: 8A
+    and #$04                         ; ROM $000CE0: 29 04
+    beq Frame_ReadObjectSubtype_CCD7                 ; ROM $000CE2: F0 03
+    jsr Frame_ReadObjectY_CD39                 ; ROM $000CE4: 20 39 CD
+; Routine: Frame_ReadObjectSubtype_CCD7
+; Global: Reachable code entry at CPU $CCD7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectSubtype_CCD7:
+    txa                              ; ROM $000CE7: 8A
+    and #$80                         ; ROM $000CE8: 29 80
+    bne Frame_ReadObjectState_CCEF                 ; ROM $000CEA: D0 13
+    lda $77                          ; ROM $000CEC: A5 77
+    beq Frame_ReturnToCaller_CCEE                 ; ROM $000CEE: F0 0E
+    lda $7B                          ; ROM $000CF0: A5 7B
+    bne Frame_ReturnToCaller_CCEE                 ; ROM $000CF2: D0 0A
+    txa                              ; ROM $000CF4: 8A
+    and #$40                         ; ROM $000CF5: 29 40
+    beq Frame_ReturnToCaller_CCEE                 ; ROM $000CF7: F0 05
+    sta $7B                          ; ROM $000CF9: 85 7B
+    jsr Gameplay_HandleControl_C939                 ; ROM $000CFB: 20 39 C9
+; Routine: Frame_ReturnToCaller_CCEE
+; Global: Reachable code entry at CPU $CCEE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CCEE:
+    rts                              ; ROM $000CFE: 60
+; Routine: Frame_ReadObjectState_CCEF
+; Global: Reachable code entry at CPU $CCEF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectState_CCEF:
+    ldy $2A                          ; ROM $000CFF: A4 2A
+    lda $E2A3,y                      ; ROM $000D01: B9 A3 E2
+    sta $34                          ; ROM $000D04: 85 34
+    lda $E2B0,y                      ; ROM $000D06: B9 B0 E2
+    sta $35                          ; ROM $000D09: 85 35
+    ldy $28                          ; ROM $000D0B: A4 28
+    lda ($34),y                      ; ROM $000D0D: B1 34
+    bne Frame_ReturnToCaller_CCEE                 ; ROM $000D0F: D0 ED
+    jsr Frame_ReadObjectX_CE10                 ; ROM $000D11: 20 10 CE
+    jsr Frame_ReadObjectY_CE1F                 ; ROM $000D14: 20 1F CE
+    ldx $74                          ; ROM $000D17: A6 74
+; Routine: Frame_ReadRam03A0_CD09
+; Global: Reachable code entry at CPU $CD09 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadRam03A0_CD09:
+    lda $03A0,x                      ; ROM $000D19: BD A0 03
+    beq Frame_WriteTransferPointer_CD12                 ; ROM $000D1C: F0 04
+    dex                              ; ROM $000D1E: CA
+    bpl Frame_ReadRam03A0_CD09                 ; ROM $000D1F: 10 F8
+    rts                              ; ROM $000D21: 60
+; Routine: Frame_WriteTransferPointer_CD12
+; Global: Reachable code entry at CPU $CD12 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteTransferPointer_CD12:
+    lda #$03                         ; ROM $000D22: A9 03
+    sta ($34),y                      ; ROM $000D24: 91 34
+    lda $28                          ; ROM $000D26: A5 28
+    sta $03AA,x                      ; ROM $000D28: 9D AA 03
+    lda $2A                          ; ROM $000D2B: A5 2A
+    sta $03B4,x                      ; ROM $000D2D: 9D B4 03
+    lda #$00                         ; ROM $000D30: A9 00
+    sta $03D2,x                      ; ROM $000D32: 9D D2 03
+    lda #$00                         ; ROM $000D35: A9 00
+    sta $03C8,x                      ; ROM $000D37: 9D C8 03
+    lda #$A0                         ; ROM $000D3A: A9 A0
+    sta $03BE,x                      ; ROM $000D3C: 9D BE 03
+    lda #$01                         ; ROM $000D3F: A9 01
+    sta $03A0,x                      ; ROM $000D41: 9D A0 03
+    lda #$03                         ; ROM $000D44: A9 03
+    sta $DF                          ; ROM $000D46: 85 DF
+    rts                              ; ROM $000D48: 60
+; Routine: Frame_ReadObjectY_CD39
+; Global: Reachable code entry at CPU $CD39 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectY_CD39:
+    lda $2B                          ; ROM $000D49: A5 2B
+    cmp #$08                         ; ROM $000D4B: C9 08
+    bcs Frame_ReadObjectState_CD44                 ; ROM $000D4D: B0 05
+    inc $2B                          ; ROM $000D4F: E6 2B
+    jmp Frame_HandleControl_CD69                 ; ROM $000D51: 4C 69 CD
+; Routine: Frame_ReadObjectState_CD44
+; Global: Reachable code entry at CPU $CD44 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectState_CD44:
+    ldy $2A                          ; ROM $000D54: A4 2A
+    iny                              ; ROM $000D56: C8
+    lda $E2A3,y                      ; ROM $000D57: B9 A3 E2
+    sta $34                          ; ROM $000D5A: 85 34
+    lda $E2B0,y                      ; ROM $000D5C: B9 B0 E2
+    sta $35                          ; ROM $000D5F: 85 35
+    ldy $28                          ; ROM $000D61: A4 28
+    jsr Object_ReadTransferPointer_CF60                 ; ROM $000D63: 20 60 CF
+    bne Frame_HandleControl_CD69                 ; ROM $000D66: D0 11
+    jsr Frame_ReadObjectX_CE10                 ; ROM $000D68: 20 10 CE
+    inc $2B                          ; ROM $000D6B: E6 2B
+    lda $2B                          ; ROM $000D6D: A5 2B
+    cmp #$10                         ; ROM $000D6F: C9 10
+    bne Frame_HandleControl_CD69                 ; ROM $000D71: D0 06
+    lda #$00                         ; ROM $000D73: A9 00
+    sta $2B                          ; ROM $000D75: 85 2B
+    inc $2A                          ; ROM $000D77: E6 2A
+; Routine: Frame_HandleControl_CD69
+; Global: Reachable code entry at CPU $CD69 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_HandleControl_CD69:
+    lda #$04                         ; ROM $000D79: A9 04
+    ldy #$07                         ; ROM $000D7B: A0 07
+    jmp Frame_ReadZp33_CE2E                 ; ROM $000D7D: 4C 2E CE
+; Routine: Frame_ReadObjectY_CD70
+; Global: Reachable code entry at CPU $CD70 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectY_CD70:
+    lda $2B                          ; ROM $000D80: A5 2B
+    cmp #$09                         ; ROM $000D82: C9 09
+    bcc Frame_ReadObjectState_CD7B                 ; ROM $000D84: 90 05
+    dec $2B                          ; ROM $000D86: C6 2B
+    jmp Frame_HandleControl_CD9C                 ; ROM $000D88: 4C 9C CD
+; Routine: Frame_ReadObjectState_CD7B
+; Global: Reachable code entry at CPU $CD7B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectState_CD7B:
+    ldy $2A                          ; ROM $000D8B: A4 2A
+    dey                              ; ROM $000D8D: 88
+    lda $E2A3,y                      ; ROM $000D8E: B9 A3 E2
+    sta $34                          ; ROM $000D91: 85 34
+    lda $E2B0,y                      ; ROM $000D93: B9 B0 E2
+    sta $35                          ; ROM $000D96: 85 35
+    ldy $28                          ; ROM $000D98: A4 28
+    jsr Object_ReadTransferPointer_CF60                 ; ROM $000D9A: 20 60 CF
+    bne Frame_HandleControl_CD9C                 ; ROM $000D9D: D0 0D
+    jsr Frame_ReadObjectX_CE10                 ; ROM $000D9F: 20 10 CE
+    dec $2B                          ; ROM $000DA2: C6 2B
+    bpl Frame_HandleControl_CD9C                 ; ROM $000DA4: 10 06
+    lda #$0F                         ; ROM $000DA6: A9 0F
+    sta $2B                          ; ROM $000DA8: 85 2B
+    dec $2A                          ; ROM $000DAA: C6 2A
+; Routine: Frame_HandleControl_CD9C
+; Global: Reachable code entry at CPU $CD9C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_HandleControl_CD9C:
+    lda #$08                         ; ROM $000DAC: A9 08
+    ldy #$0B                         ; ROM $000DAE: A0 0B
+    jmp Frame_ReadZp33_CE2E                 ; ROM $000DB0: 4C 2E CE
+; Routine: Frame_ReadObjectX_CDA3
+; Global: Reachable code entry at CPU $CDA3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectX_CDA3:
+    lda $29                          ; ROM $000DB3: A5 29
+    cmp #$09                         ; ROM $000DB5: C9 09
+    bcc Frame_ReadObjectState_CDAE                 ; ROM $000DB7: 90 05
+    dec $29                          ; ROM $000DB9: C6 29
+    jmp Frame_HandleControl_CDCF                 ; ROM $000DBB: 4C CF CD
+; Routine: Frame_ReadObjectState_CDAE
+; Global: Reachable code entry at CPU $CDAE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectState_CDAE:
+    ldy $2A                          ; ROM $000DBE: A4 2A
+    lda $E2A3,y                      ; ROM $000DC0: B9 A3 E2
+    sta $34                          ; ROM $000DC3: 85 34
+    lda $E2B0,y                      ; ROM $000DC5: B9 B0 E2
+    sta $35                          ; ROM $000DC8: 85 35
+    ldy $28                          ; ROM $000DCA: A4 28
+    dey                              ; ROM $000DCC: 88
+    jsr Object_ReadTransferPointer_CF60                 ; ROM $000DCD: 20 60 CF
+    bne Frame_HandleControl_CDCF                 ; ROM $000DD0: D0 0D
+    jsr Frame_ReadObjectY_CE1F                 ; ROM $000DD2: 20 1F CE
+    dec $29                          ; ROM $000DD5: C6 29
+    bpl Frame_HandleControl_CDCF                 ; ROM $000DD7: 10 06
+    lda #$0F                         ; ROM $000DD9: A9 0F
+    sta $29                          ; ROM $000DDB: 85 29
+    dec $28                          ; ROM $000DDD: C6 28
+; Routine: Frame_HandleControl_CDCF
+; Global: Reachable code entry at CPU $CDCF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_HandleControl_CDCF:
+    lda #$00                         ; ROM $000DDF: A9 00
+    jmp Frame_WriteZp2D_CE06                 ; ROM $000DE1: 4C 06 CE
+; Routine: Frame_ReadObjectX_CDD4
+; Global: Reachable code entry at CPU $CDD4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectX_CDD4:
+    lda $29                          ; ROM $000DE4: A5 29
+    cmp #$08                         ; ROM $000DE6: C9 08
+    bcs Frame_ReadObjectState_CDDF                 ; ROM $000DE8: B0 05
+    inc $29                          ; ROM $000DEA: E6 29
+    jmp Frame_HandleControl_CE04                 ; ROM $000DEC: 4C 04 CE
+; Routine: Frame_ReadObjectState_CDDF
+; Global: Reachable code entry at CPU $CDDF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectState_CDDF:
+    ldy $2A                          ; ROM $000DEF: A4 2A
+    lda $E2A3,y                      ; ROM $000DF1: B9 A3 E2
+    sta $34                          ; ROM $000DF4: 85 34
+    lda $E2B0,y                      ; ROM $000DF6: B9 B0 E2
+    sta $35                          ; ROM $000DF9: 85 35
+    ldy $28                          ; ROM $000DFB: A4 28
+    iny                              ; ROM $000DFD: C8
+    jsr Object_ReadTransferPointer_CF60                 ; ROM $000DFE: 20 60 CF
+    bne Frame_HandleControl_CE04                 ; ROM $000E01: D0 11
+    jsr Frame_ReadObjectY_CE1F                 ; ROM $000E03: 20 1F CE
+    inc $29                          ; ROM $000E06: E6 29
+    lda $29                          ; ROM $000E08: A5 29
+    cmp #$10                         ; ROM $000E0A: C9 10
+    bne Frame_HandleControl_CE04                 ; ROM $000E0C: D0 06
+    lda #$00                         ; ROM $000E0E: A9 00
+    sta $29                          ; ROM $000E10: 85 29
+    inc $28                          ; ROM $000E12: E6 28
+; Routine: Frame_HandleControl_CE04
+; Global: Reachable code entry at CPU $CE04 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_HandleControl_CE04:
+    lda #$40                         ; ROM $000E14: A9 40
+; Routine: Frame_WriteZp2D_CE06
+; Global: Reachable code entry at CPU $CE06 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteZp2D_CE06:
+    sta $2D                          ; ROM $000E16: 85 2D
+    lda #$00                         ; ROM $000E18: A9 00
+    ldy #$03                         ; ROM $000E1A: A0 03
+    jmp Frame_ReadZp33_CE2E                 ; ROM $000E1C: 4C 2E CE
+
+; Data region: CPU $CE0F-$CE0F; unreachable by direct recursive trace.
+FrameSingleByteConstant:
+    .byte $60                                                                            ; ROM $000E1F: 60
+; Routine: Frame_ReadObjectX_CE10
+; Global: Reachable code entry at CPU $CE10 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectX_CE10:
+    lda $29                          ; ROM $000E20: A5 29
+    cmp #$08                         ; ROM $000E22: C9 08
+    bcc Frame_IncrementObjectX_CE1B                 ; ROM $000E24: 90 05
+    beq Frame_ReturnToCaller_CE1E                 ; ROM $000E26: F0 06
+    dec $29                          ; ROM $000E28: C6 29
+    rts                              ; ROM $000E2A: 60
+; Routine: Frame_IncrementObjectX_CE1B
+; Global: Reachable code entry at CPU $CE1B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_IncrementObjectX_CE1B:
+    inc $29                          ; ROM $000E2B: E6 29
+    rts                              ; ROM $000E2D: 60
+; Routine: Frame_ReturnToCaller_CE1E
+; Global: Reachable code entry at CPU $CE1E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CE1E:
+    rts                              ; ROM $000E2E: 60
+; Routine: Frame_ReadObjectY_CE1F
+; Global: Reachable code entry at CPU $CE1F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectY_CE1F:
+    lda $2B                          ; ROM $000E2F: A5 2B
+    cmp #$08                         ; ROM $000E31: C9 08
+    bcc Frame_IncrementObjectY_CE2A                 ; ROM $000E33: 90 05
+    beq Frame_ReturnToCaller_CE2D                 ; ROM $000E35: F0 06
+    dec $2B                          ; ROM $000E37: C6 2B
+    rts                              ; ROM $000E39: 60
+; Routine: Frame_IncrementObjectY_CE2A
+; Global: Reachable code entry at CPU $CE2A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_IncrementObjectY_CE2A:
+    inc $2B                          ; ROM $000E3A: E6 2B
+    rts                              ; ROM $000E3C: 60
+; Routine: Frame_ReturnToCaller_CE2D
+; Global: Reachable code entry at CPU $CE2D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CE2D:
+    rts                              ; ROM $000E3D: 60
+; Routine: Frame_ReadZp33_CE2E
+; Global: Reachable code entry at CPU $CE2E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadZp33_CE2E:
+    pha                              ; ROM $000E3E: 48
+    lda $33                          ; ROM $000E3F: A5 33
+    and #$03                         ; ROM $000E41: 29 03
+    cmp #$02                         ; ROM $000E43: C9 02
+    bne Frame_RestoreAccumulator_CE59                 ; ROM $000E45: D0 22
+    lda $33                          ; ROM $000E47: A5 33
+    pla                              ; ROM $000E49: 68
+    inc $A6                          ; ROM $000E4A: E6 A6
+    inc $2C                          ; ROM $000E4C: E6 2C
+    cmp $2C                          ; ROM $000E4E: C5 2C
+    bcc Frame_TestObjectIndex_CE45                 ; ROM $000E50: 90 03
+    sta $2C                          ; ROM $000E52: 85 2C
+    rts                              ; ROM $000E54: 60
+; Routine: Frame_TestObjectIndex_CE45
+; Global: Reachable code entry at CPU $CE45 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_TestObjectIndex_CE45:
+    cpy $2C                          ; ROM $000E55: C4 2C
+    bcc Frame_WriteObjectIndex_CE4A                 ; ROM $000E57: 90 01
+    rts                              ; ROM $000E59: 60
+; Routine: Frame_WriteObjectIndex_CE4A
+; Global: Reachable code entry at CPU $CE4A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteObjectIndex_CE4A:
+    sta $2C                          ; ROM $000E5A: 85 2C
+    cmp #$04                         ; ROM $000E5C: C9 04
+    bcc Frame_HandleControl_CE54                 ; ROM $000E5E: 90 04
+    lda #$02                         ; ROM $000E60: A9 02
+    bne Frame_WriteSoundCommandState_CE56                 ; ROM $000E62: D0 02
+; Routine: Frame_HandleControl_CE54
+; Global: Reachable code entry at CPU $CE54 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_HandleControl_CE54:
+    lda #$01                         ; ROM $000E64: A9 01
+; Routine: Frame_WriteSoundCommandState_CE56
+; Global: Reachable code entry at CPU $CE56 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteSoundCommandState_CE56:
+    sta $DF                          ; ROM $000E66: 85 DF
+    rts                              ; ROM $000E68: 60
+; Routine: Frame_RestoreAccumulator_CE59
+; Global: Reachable code entry at CPU $CE59 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_RestoreAccumulator_CE59:
+    pla                              ; ROM $000E69: 68
+; Routine: Frame_ReturnToCaller_CE5A
+; Global: Reachable code entry at CPU $CE5A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReturnToCaller_CE5A:
+    rts                              ; ROM $000E6A: 60
+; Routine: Frame_ReadObjectIndex_CE5B
+; Global: Reachable code entry at CPU $CE5B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadObjectIndex_CE5B:
+    lda $2C                          ; ROM $000E6B: A5 2C
+    cmp #$13                         ; ROM $000E6D: C9 13
+    bcs Frame_ReturnToCaller_CE5A                 ; ROM $000E6F: B0 F9
+    lda $2D                          ; ROM $000E71: A5 2D
+    sta $3D                          ; ROM $000E73: 85 3D
+    ldy #$00                         ; ROM $000E75: A0 00
+    sty $3C                          ; ROM $000E77: 84 3C
+    lda $28                          ; ROM $000E79: A5 28
+    cmp #$08                         ; ROM $000E7B: C9 08
+    bcc Frame_WriteZp0E_CE80                 ; ROM $000E7D: 90 11
+    ldy #$F0                         ; ROM $000E7F: A0 F0
+    cmp #$17                         ; ROM $000E81: C9 17
+    bcs Frame_WriteZp0E_CE80                 ; ROM $000E83: B0 0B
+    asl a                            ; ROM $000E85: 0A
+    asl a                            ; ROM $000E86: 0A
+    asl a                            ; ROM $000E87: 0A
+    asl a                            ; ROM $000E88: 0A
+    clc                              ; ROM $000E89: 18
+    adc $29                          ; ROM $000E8A: 65 29
+    sec                              ; ROM $000E8C: 38
+    sbc #$80                         ; ROM $000E8D: E9 80
+    tay                              ; ROM $000E8F: A8
+; Routine: Frame_WriteZp0E_CE80
+; Global: Reachable code entry at CPU $CE80 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteZp0E_CE80:
+    sty $0E                          ; ROM $000E90: 84 0E
+    lda $28                          ; ROM $000E92: A5 28
+    asl a                            ; ROM $000E94: 0A
+    asl a                            ; ROM $000E95: 0A
+    asl a                            ; ROM $000E96: 0A
+    asl a                            ; ROM $000E97: 0A
+    clc                              ; ROM $000E98: 18
+    adc $29                          ; ROM $000E99: 65 29
+    sec                              ; ROM $000E9B: 38
+    sbc #$08                         ; ROM $000E9C: E9 08
+    sbc $0E                          ; ROM $000E9E: E5 0E
+    sta $3A                          ; ROM $000EA0: 85 3A
+    lda $2A                          ; ROM $000EA2: A5 2A
+    asl a                            ; ROM $000EA4: 0A
+    asl a                            ; ROM $000EA5: 0A
+    asl a                            ; ROM $000EA6: 0A
+    asl a                            ; ROM $000EA7: 0A
+    clc                              ; ROM $000EA8: 18
+    adc $2B                          ; ROM $000EA9: 65 2B
+    adc #$17                         ; ROM $000EAB: 69 17
+    sta $3B                          ; ROM $000EAD: 85 3B
+    ldx $2C                          ; ROM $000EAF: A6 2C
+    lda $CED6,x                      ; ROM $000EB1: BD D6 CE
+    jmp Stage_WriteZp3F_D5F2                 ; ROM $000EB4: 4C F2 D5
+; Routine: Frame_ReadZp2D_CEA7
+; Global: Reachable code entry at CPU $CEA7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_ReadZp2D_CEA7:
+    lda $2D                          ; ROM $000EB7: A5 2D
+    sta $3D                          ; ROM $000EB9: 85 3D
+    ldy #$03                         ; ROM $000EBB: A0 03
+    sty $3C                          ; ROM $000EBD: 84 3C
+    lda $28                          ; ROM $000EBF: A5 28
+    asl a                            ; ROM $000EC1: 0A
+    asl a                            ; ROM $000EC2: 0A
+    asl a                            ; ROM $000EC3: 0A
+    asl a                            ; ROM $000EC4: 0A
+    clc                              ; ROM $000EC5: 18
+    adc $29                          ; ROM $000EC6: 65 29
+    sec                              ; ROM $000EC8: 38
+    sbc #$08                         ; ROM $000EC9: E9 08
+    sta $3A                          ; ROM $000ECB: 85 3A
+    lda $2A                          ; ROM $000ECD: A5 2A
+    asl a                            ; ROM $000ECF: 0A
+    asl a                            ; ROM $000ED0: 0A
+    asl a                            ; ROM $000ED1: 0A
+    asl a                            ; ROM $000ED2: 0A
+    clc                              ; ROM $000ED3: 18
+    adc $2B                          ; ROM $000ED4: 65 2B
+    adc #$17                         ; ROM $000ED6: 69 17
+    sta $3B                          ; ROM $000ED8: 85 3B
+    ldx $2C                          ; ROM $000EDA: A6 2C
+    lda $CED2,x                      ; ROM $000EDC: BD D2 CE
+    jmp Stage_WriteZp3F_D5F2                 ; ROM $000EDF: 4C F2 D5
+
+; Data region: CPU $CED2-$CEE8; unreachable by direct recursive trace.
+FrameObjectOffsetTable:
+    .byte $10, $11, $12, $11, $00, $01, $02, $01, $03, $04, $05, $04, $06, $07, $08, $07 ; ROM $000EE2: 10 11 12 11 00 01 02 01 03 04 05 04 06 07 08 07
+    .byte $09, $0A, $0B, $0C, $0D, $0E, $0F                                              ; ROM $000EF2: 09 0A 0B 0C 0D 0E 0F
+; Routine: Frame_WriteSoundCommandState_CEE9
+; Global: Reachable code entry at CPU $CEE9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Frame_WriteSoundCommandState_CEE9:
+    lda #$04                         ; ROM $000EF9: A9 04
+    sta $DF                          ; ROM $000EFB: 85 DF
+    lda #$0A                         ; ROM $000EFD: A9 0A
+    jsr Menu_WriteObjectWorkX_DD83                 ; ROM $000EFF: 20 83 DD
+    ldx $5B                          ; ROM $000F02: A6 5B
+    dex                              ; ROM $000F04: CA
+    beq Object_ReadObjectTimer_CF0D                 ; ROM $000F05: F0 16
+    dex                              ; ROM $000F07: CA
+    beq Object_ReadObjectMode_CF1A                 ; ROM $000F08: F0 20
+    dex                              ; ROM $000F0A: CA
+    beq Object_WriteObjectFlags_CF2A                 ; ROM $000F0B: F0 2D
+    dex                              ; ROM $000F0D: CA
+    beq Object_WriteObjectPhase_CF33                 ; ROM $000F0E: F0 33
+    dex                              ; ROM $000F10: CA
+    beq Object_WriteObjectSubtype_CF3C                 ; ROM $000F11: F0 39
+    dex                              ; ROM $000F13: CA
+    beq Object_WriteObjectDirection_CF45                 ; ROM $000F14: F0 3F
+    dex                              ; ROM $000F16: CA
+    beq Object_WriteObjectSpeed_CF4E                 ; ROM $000F17: F0 45
+    dex                              ; ROM $000F19: CA
+    beq Object_WriteObjectCounter_CF57                 ; ROM $000F1A: F0 4B
+    rts                              ; ROM $000F1C: 60
+; Routine: Object_ReadObjectTimer_CF0D
+; Global: Reachable code entry at CPU $CF0D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadObjectTimer_CF0D:
+    lda $74                          ; ROM $000F1D: A5 74
+    cmp #$09                         ; ROM $000F1F: C9 09
+    beq Object_WriteGameMode_CF15                 ; ROM $000F21: F0 02
+    inc $74                          ; ROM $000F23: E6 74
+; Routine: Object_WriteGameMode_CF15
+; Global: Reachable code entry at CPU $CF15 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteGameMode_CF15:
+    lda #$04                         ; ROM $000F25: A9 04
+    sta $B5                          ; ROM $000F27: 85 B5
+    rts                              ; ROM $000F29: 60
+; Routine: Object_ReadObjectMode_CF1A
+; Global: Reachable code entry at CPU $CF1A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadObjectMode_CF1A:
+    lda $73                          ; ROM $000F2A: A5 73
+    cmp #$50                         ; ROM $000F2C: C9 50
+    beq Object_WriteGameMode_CF25                 ; ROM $000F2E: F0 05
+    clc                              ; ROM $000F30: 18
+    adc #$10                         ; ROM $000F31: 69 10
+    sta $73                          ; ROM $000F33: 85 73
+; Routine: Object_WriteGameMode_CF25
+; Global: Reachable code entry at CPU $CF25 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteGameMode_CF25:
+    lda #$04                         ; ROM $000F35: A9 04
+    sta $B5                          ; ROM $000F37: 85 B5
+    rts                              ; ROM $000F39: 60
+; Routine: Object_WriteObjectFlags_CF2A
+; Global: Reachable code entry at CPU $CF2A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectFlags_CF2A:
+    lda #$01                         ; ROM $000F3A: A9 01
+    sta $75                          ; ROM $000F3C: 85 75
+    lda #$04                         ; ROM $000F3E: A9 04
+    sta $B5                          ; ROM $000F40: 85 B5
+    rts                              ; ROM $000F42: 60
+; Routine: Object_WriteObjectPhase_CF33
+; Global: Reachable code entry at CPU $CF33 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectPhase_CF33:
+    lda #$01                         ; ROM $000F43: A9 01
+    sta $76                          ; ROM $000F45: 85 76
+    lda #$04                         ; ROM $000F47: A9 04
+    sta $B5                          ; ROM $000F49: 85 B5
+    rts                              ; ROM $000F4B: 60
+; Routine: Object_WriteObjectSubtype_CF3C
+; Global: Reachable code entry at CPU $CF3C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectSubtype_CF3C:
+    lda #$01                         ; ROM $000F4C: A9 01
+    sta $77                          ; ROM $000F4E: 85 77
+    lda #$04                         ; ROM $000F50: A9 04
+    sta $B5                          ; ROM $000F52: 85 B5
+    rts                              ; ROM $000F54: 60
+; Routine: Object_WriteObjectDirection_CF45
+; Global: Reachable code entry at CPU $CF45 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectDirection_CF45:
+    lda #$01                         ; ROM $000F55: A9 01
+    sta $78                          ; ROM $000F57: 85 78
+    lda #$04                         ; ROM $000F59: A9 04
+    sta $B5                          ; ROM $000F5B: 85 B5
+    rts                              ; ROM $000F5D: 60
+; Routine: Object_WriteObjectSpeed_CF4E
+; Global: Reachable code entry at CPU $CF4E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectSpeed_CF4E:
+    lda #$01                         ; ROM $000F5E: A9 01
+    sta $79                          ; ROM $000F60: 85 79
+    lda #$05                         ; ROM $000F62: A9 05
+    sta $B5                          ; ROM $000F64: 85 B5
+    rts                              ; ROM $000F66: 60
+; Routine: Object_WriteObjectCounter_CF57
+; Global: Reachable code entry at CPU $CF57 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectCounter_CF57:
+    lda #$FF                         ; ROM $000F67: A9 FF
+    sta $7A                          ; ROM $000F69: 85 7A
+    lda #$05                         ; ROM $000F6B: A9 05
+    sta $B5                          ; ROM $000F6D: 85 B5
+    rts                              ; ROM $000F6F: 60
+; Routine: Object_ReadTransferPointer_CF60
+; Global: Reachable code entry at CPU $CF60 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadTransferPointer_CF60:
+    lda ($34),y                      ; ROM $000F70: B1 34
+    beq Object_ReturnToCaller_CF7C                 ; ROM $000F72: F0 18
+    cmp #$08                         ; ROM $000F74: C9 08
+    beq Object_ReturnToCaller_CF7C                 ; ROM $000F76: F0 14
+    cmp #$06                         ; ROM $000F78: C9 06
+    beq Object_ReturnToCaller_CF7C                 ; ROM $000F7A: F0 10
+    cmp #$02                         ; ROM $000F7C: C9 02
+    beq Object_ReadObjectPhase_CF7D                 ; ROM $000F7E: F0 0D
+    cmp #$04                         ; ROM $000F80: C9 04
+    beq Object_ReadObjectPhase_CF7D                 ; ROM $000F82: F0 09
+    cmp #$05                         ; ROM $000F84: C9 05
+    beq Object_ReadObjectPhase_CF7D                 ; ROM $000F86: F0 05
+    cmp #$03                         ; ROM $000F88: C9 03
+    beq Object_ReadObjectDirection_CF82                 ; ROM $000F8A: F0 06
+; Routine: Object_ReturnToCaller_CF7C
+; Global: Reachable code entry at CPU $CF7C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_CF7C:
+    rts                              ; ROM $000F8C: 60
+; Routine: Object_ReadObjectPhase_CF7D
+; Global: Reachable code entry at CPU $CF7D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadObjectPhase_CF7D:
+    lda $76                          ; ROM $000F8D: A5 76
+    eor #$01                         ; ROM $000F8F: 49 01
+    rts                              ; ROM $000F91: 60
+; Routine: Object_ReadObjectDirection_CF82
+; Global: Reachable code entry at CPU $CF82 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadObjectDirection_CF82:
+    lda $78                          ; ROM $000F92: A5 78
+    eor #$01                         ; ROM $000F94: 49 01
+    rts                              ; ROM $000F96: 60
+; Routine: Object_ReadGameState_CF87
+; Global: Reachable code entry at CPU $CF87 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadGameState_CF87:
+    lda $59                          ; ROM $000F97: A5 59
+    beq Object_MergeZp13_CFA4                 ; ROM $000F99: F0 19
+    lda $AF                          ; ROM $000F9B: A5 AF
+    dec $AE                          ; ROM $000F9D: C6 AE
+    bne Object_ReturnToCaller_CFA3                 ; ROM $000F9F: D0 12
+    pha                              ; ROM $000FA1: 48
+    ldy #$00                         ; ROM $000FA2: A0 00
+    lda ($AC),y                      ; ROM $000FA4: B1 AC
+    sta $AE                          ; ROM $000FA6: 85 AE
+    jsr Object_IncrementZpAC_CFA9                 ; ROM $000FA8: 20 A9 CF
+    lda ($AC),y                      ; ROM $000FAB: B1 AC
+    sta $AF                          ; ROM $000FAD: 85 AF
+    jsr Object_IncrementZpAC_CFA9                 ; ROM $000FAF: 20 A9 CF
+    pla                              ; ROM $000FB2: 68
+; Routine: Object_ReturnToCaller_CFA3
+; Global: Reachable code entry at CPU $CFA3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_CFA3:
+    rts                              ; ROM $000FB3: 60
+; Routine: Object_MergeZp13_CFA4
+; Global: Reachable code entry at CPU $CFA4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_MergeZp13_CFA4:
+    lda ControllerState1                          ; ROM $000FB4: A5 12
+    ora $13                          ; ROM $000FB6: 05 13
+    rts                              ; ROM $000FB8: 60
+; Routine: Object_IncrementZpAC_CFA9
+; Global: Reachable code entry at CPU $CFA9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_IncrementZpAC_CFA9:
+    inc $AC                          ; ROM $000FB9: E6 AC
+    bne Object_ReturnToCaller_CFAF                 ; ROM $000FBB: D0 02
+    inc $AD                          ; ROM $000FBD: E6 AD
+; Routine: Object_ReturnToCaller_CFAF
+; Global: Reachable code entry at CPU $CFAF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_CFAF:
+    rts                              ; ROM $000FBF: 60
+; Routine: Object_WriteStageProgress_CFB0
+; Global: Reachable code entry at CPU $CFB0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteStageProgress_CFB0:
+    lda #$00                         ; ROM $000FC0: A9 00
+    sta $9C                          ; ROM $000FC2: 85 9C
+    lda #$C0                         ; ROM $000FC4: A9 C0
+    sta $6B                          ; ROM $000FC6: 85 6B
+    ldx #$09                         ; ROM $000FC8: A2 09
+; Routine: Object_ReadRam0576_CFBA
+; Global: Reachable code entry at CPU $CFBA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadRam0576_CFBA:
+    lda $0576,x                      ; ROM $000FCA: BD 76 05
+    beq Object_RetreatIndexX_CFE9                 ; ROM $000FCD: F0 2A
+    cmp #$09                         ; ROM $000FCF: C9 09
+    bcs Object_ReadRam05B2_CFC5                 ; ROM $000FD1: B0 02
+    inc $9C                          ; ROM $000FD3: E6 9C
+; Routine: Object_ReadRam05B2_CFC5
+; Global: Reachable code entry at CPU $CFC5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadRam05B2_CFC5:
+    ldy $05B2,x                      ; ROM $000FD5: BC B2 05
+    beq Object_ReadRamD245_CFCF                 ; ROM $000FD8: F0 05
+    dec $05B2,x                      ; ROM $000FDA: DE B2 05
+    bne Object_RetreatIndexX_CFE9                 ; ROM $000FDD: D0 1A
+; Routine: Object_ReadRamD245_CFCF
+; Global: Reachable code entry at CPU $CFCF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadRamD245_CFCF:
+    asl a                            ; ROM $000FDF: 0A
+    tay                              ; ROM $000FE0: A8
+    jsr Object_WriteZp4D_D1C8                 ; ROM $000FE1: 20 C8 D1
+    lda #$CF                         ; ROM $000FE4: A9 CF
+    pha                              ; ROM $000FE6: 48
+    lda #$E2                         ; ROM $000FE7: A9 E2
+    pha                              ; ROM $000FE9: 48
+    lda $D245,y                      ; ROM $000FEA: B9 45 D2
+    pha                              ; ROM $000FED: 48
+    lda $D244,y                      ; ROM $000FEE: B9 44 D2
+    pha                              ; ROM $000FF1: 48
+    rts                              ; ROM $000FF2: 60
+
+; Data region: CPU $CFE3-$CFE8; unreachable by direct recursive trace.
+ObjectPositionLimitTable:
+    .byte $20, $07, $D2, $20, $06, $D0                                                   ; ROM $000FF3: 20 07 D2 20 06 D0
+; Routine: Object_RetreatIndexX_CFE9
+; Global: Reachable code entry at CPU $CFE9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_RetreatIndexX_CFE9:
+    dex                              ; ROM $000FF9: CA
+    bpl Object_ReadRam0576_CFBA                 ; ROM $000FFA: 10 CE
+; Routine: Object_ReturnToCaller_CFEC
+; Global: Reachable code entry at CPU $CFEC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_CFEC:
+    rts                              ; ROM $000FFC: 60
+; Routine: Object_ReadStageIndex_CFED
+; Global: Reachable code entry at CPU $CFED traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadStageIndex_CFED:
+    lda $9D                          ; ROM $000FFD: A5 9D
+    clc                              ; ROM $000FFF: 18
+    adc #$2C                         ; ROM $001000: 69 2C
+    sta $46                          ; ROM $001002: 85 46
+    lda $AA                          ; ROM $001004: A5 AA
+    sta $42                          ; ROM $001006: 85 42
+    lda $AB                          ; ROM $001008: A5 AB
+    sta $44                          ; ROM $00100A: 85 44
+    lda #$08                         ; ROM $00100C: A9 08
+    sta $43                          ; ROM $00100E: 85 43
+    sta $45                          ; ROM $001010: 85 45
+    lda #$00                         ; ROM $001012: A9 00
+    beq Object_WriteZp3D_D010                 ; ROM $001014: F0 0A
+    lda $41                          ; ROM $001016: A5 41
+    beq Object_ReturnToCaller_CFEC                 ; ROM $001018: F0 E2
+    cmp #$0B                         ; ROM $00101A: C9 0B
+    beq Object_WriteZp3D_D08C                 ; ROM $00101C: F0 7E
+    lda $48                          ; ROM $00101E: A5 48
+; Routine: Object_WriteZp3D_D010
+; Global: Reachable code entry at CPU $D010 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteZp3D_D010:
+    sta $3D                          ; ROM $001020: 85 3D
+    ldy #$00                         ; ROM $001022: A0 00
+    sty $50                          ; ROM $001024: 84 50
+    lda $42                          ; ROM $001026: A5 42
+    asl a                            ; ROM $001028: 0A
+    asl a                            ; ROM $001029: 0A
+    asl a                            ; ROM $00102A: 0A
+    asl a                            ; ROM $00102B: 0A
+    rol $50                          ; ROM $00102C: 26 50
+    clc                              ; ROM $00102E: 18
+    adc $43                          ; ROM $00102F: 65 43
+    sta $4F                          ; ROM $001031: 85 4F
+    lda $50                          ; ROM $001033: A5 50
+    adc #$00                         ; ROM $001035: 69 00
+    sta $50                          ; ROM $001037: 85 50
+    lda $4F                          ; ROM $001039: A5 4F
+    sec                              ; ROM $00103B: 38
+    sbc #$08                         ; ROM $00103C: E9 08
+    sta $4F                          ; ROM $00103E: 85 4F
+    lda $50                          ; ROM $001040: A5 50
+    sbc #$00                         ; ROM $001042: E9 00
+    sta $50                          ; ROM $001044: 85 50
+    lda $4F                          ; ROM $001046: A5 4F
+    sec                              ; ROM $001048: 38
+    sbc $0E                          ; ROM $001049: E5 0E
+    sta $4F                          ; ROM $00104B: 85 4F
+    lda $50                          ; ROM $00104D: A5 50
+    sbc #$00                         ; ROM $00104F: E9 00
+    bne Object_ReturnToCaller_D08B                 ; ROM $001051: D0 48
+    lda $4F                          ; ROM $001053: A5 4F
+    cmp #$F8                         ; ROM $001055: C9 F8
+    bcs Object_ReturnToCaller_D08B                 ; ROM $001057: B0 42
+    sta $3A                          ; ROM $001059: 85 3A
+    lda $44                          ; ROM $00105B: A5 44
+    asl a                            ; ROM $00105D: 0A
+    asl a                            ; ROM $00105E: 0A
+    asl a                            ; ROM $00105F: 0A
+    asl a                            ; ROM $001060: 0A
+    clc                              ; ROM $001061: 18
+    adc $45                          ; ROM $001062: 65 45
+    adc #$17                         ; ROM $001064: 69 17
+    sta $3B                          ; ROM $001066: 85 3B
+    ldy $46                          ; ROM $001068: A4 46
+    lda $D186,y                      ; ROM $00106A: B9 86 D1
+    sta $3C                          ; ROM $00106D: 85 3C
+    lda $D154,y                      ; ROM $00106F: B9 54 D1
+    jsr Stage_WriteZp3F_D5F2                 ; ROM $001072: 20 F2 D5
+    lda $46                          ; ROM $001075: A5 46
+    cmp #$20                         ; ROM $001077: C9 20
+    bcs Object_ReturnToCaller_D08B                 ; ROM $001079: B0 20
+    lda $5C                          ; ROM $00107B: A5 5C
+    bne Object_ReturnToCaller_D08B                 ; ROM $00107D: D0 1C
+    lda $7A                          ; ROM $00107F: A5 7A
+    bne Object_ReturnToCaller_D08B                 ; ROM $001081: D0 18
+    lda $42                          ; ROM $001083: A5 42
+    cmp $28                          ; ROM $001085: C5 28
+    bne Object_ReturnToCaller_D08B                 ; ROM $001087: D0 12
+    lda $44                          ; ROM $001089: A5 44
+    cmp $2A                          ; ROM $00108B: C5 2A
+    bne Object_ReturnToCaller_D08B                 ; ROM $00108D: D0 0C
+    lda #$05                         ; ROM $00108F: A9 05
+    sta $DF                          ; ROM $001091: 85 DF
+    lda #$01                         ; ROM $001093: A9 01
+    sta $5C                          ; ROM $001095: 85 5C
+    lda #$0C                         ; ROM $001097: A9 0C
+    sta $2C                          ; ROM $001099: 85 2C
+; Routine: Object_ReturnToCaller_D08B
+; Global: Reachable code entry at CPU $D08B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_D08B:
+    rts                              ; ROM $00109B: 60
+; Routine: Object_WriteZp3D_D08C
+; Global: Reachable code entry at CPU $D08C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteZp3D_D08C:
+    txa                              ; ROM $00109C: 8A
+    pha                              ; ROM $00109D: 48
+    lda #$00                         ; ROM $00109E: A9 00
+    sta $3D                          ; ROM $0010A0: 85 3D
+    ldy #$00                         ; ROM $0010A2: A0 00
+    sty $50                          ; ROM $0010A4: 84 50
+    lda $42                          ; ROM $0010A6: A5 42
+    asl a                            ; ROM $0010A8: 0A
+    asl a                            ; ROM $0010A9: 0A
+    asl a                            ; ROM $0010AA: 0A
+    asl a                            ; ROM $0010AB: 0A
+    rol $50                          ; ROM $0010AC: 26 50
+    clc                              ; ROM $0010AE: 18
+    adc $43                          ; ROM $0010AF: 65 43
+    sta $4F                          ; ROM $0010B1: 85 4F
+    lda $50                          ; ROM $0010B3: A5 50
+    adc #$00                         ; ROM $0010B5: 69 00
+    sta $50                          ; ROM $0010B7: 85 50
+    lda $4F                          ; ROM $0010B9: A5 4F
+    sec                              ; ROM $0010BB: 38
+    sbc #$08                         ; ROM $0010BC: E9 08
+    sta $4F                          ; ROM $0010BE: 85 4F
+    lda $50                          ; ROM $0010C0: A5 50
+    sbc #$00                         ; ROM $0010C2: E9 00
+    sta $50                          ; ROM $0010C4: 85 50
+    lda $4F                          ; ROM $0010C6: A5 4F
+    sec                              ; ROM $0010C8: 38
+    sbc $0E                          ; ROM $0010C9: E5 0E
+    sta $4F                          ; ROM $0010CB: 85 4F
+    lda $50                          ; ROM $0010CD: A5 50
+    sbc #$00                         ; ROM $0010CF: E9 00
+    bne Object_RestoreAccumulator_D0F7                 ; ROM $0010D1: D0 34
+    lda $4F                          ; ROM $0010D3: A5 4F
+    cmp #$F8                         ; ROM $0010D5: C9 F8
+    bcs Object_RestoreAccumulator_D0F7                 ; ROM $0010D7: B0 2E
+    sta $3A                          ; ROM $0010D9: 85 3A
+    lda $44                          ; ROM $0010DB: A5 44
+    asl a                            ; ROM $0010DD: 0A
+    asl a                            ; ROM $0010DE: 0A
+    asl a                            ; ROM $0010DF: 0A
+    asl a                            ; ROM $0010E0: 0A
+    clc                              ; ROM $0010E1: 18
+    adc $45                          ; ROM $0010E2: 65 45
+    adc #$1B                         ; ROM $0010E4: 69 1B
+    sta $3B                          ; ROM $0010E6: 85 3B
+    lda $4B                          ; ROM $0010E8: A5 4B
+    clc                              ; ROM $0010EA: 18
+    adc $4A                          ; ROM $0010EB: 65 4A
+    cmp #$10                         ; ROM $0010ED: C9 10
+    bcc Object_WriteObjectWorkX_D0E3                 ; ROM $0010EF: 90 02
+    lda #$10                         ; ROM $0010F1: A9 10
+; Routine: Object_WriteObjectWorkX_D0E3
+; Global: Reachable code entry at CPU $D0E3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteObjectWorkX_D0E3:
+    sta $24                          ; ROM $0010F3: 85 24
+    asl a                            ; ROM $0010F5: 0A
+    clc                              ; ROM $0010F6: 18
+    adc $24                          ; ROM $0010F7: 65 24
+    tax                              ; ROM $0010F9: AA
+    ldy $6B                          ; ROM $0010FA: A4 6B
+    jsr Object_ReadRamD121_D0FA                 ; ROM $0010FC: 20 FA D0
+    jsr Object_ReadRamD121_D0FA                 ; ROM $0010FF: 20 FA D0
+    jsr Object_ReadRamD121_D0FA                 ; ROM $001102: 20 FA D0
+    sty $6B                          ; ROM $001105: 84 6B
+; Routine: Object_RestoreAccumulator_D0F7
+; Global: Reachable code entry at CPU $D0F7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_RestoreAccumulator_D0F7:
+    pla                              ; ROM $001107: 68
+    tax                              ; ROM $001108: AA
+    rts                              ; ROM $001109: 60
+; Routine: Object_ReadRamD121_D0FA
+; Global: Reachable code entry at CPU $D0FA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReadRamD121_D0FA:
+    lda $D121,x                      ; ROM $00110A: BD 21 D1
+    beq Object_AdvanceIndexX_D11C                 ; ROM $00110D: F0 1D
+    pha                              ; ROM $00110F: 48
+    lda $3B                          ; ROM $001110: A5 3B
+    sta $0700,y                      ; ROM $001112: 99 00 07
+    iny                              ; ROM $001115: C8
+    pla                              ; ROM $001116: 68
+    sta $0700,y                      ; ROM $001117: 99 00 07
+    iny                              ; ROM $00111A: C8
+    lda #$01                         ; ROM $00111B: A9 01
+    sta $0700,y                      ; ROM $00111D: 99 00 07
+    iny                              ; ROM $001120: C8
+    lda $3A                          ; ROM $001121: A5 3A
+    sta $0700,y                      ; ROM $001123: 99 00 07
+    iny                              ; ROM $001126: C8
+    clc                              ; ROM $001127: 18
+    adc #$08                         ; ROM $001128: 69 08
+    sta $3A                          ; ROM $00112A: 85 3A
+; Routine: Object_AdvanceIndexX_D11C
+; Global: Reachable code entry at CPU $D11C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_AdvanceIndexX_D11C:
+    inx                              ; ROM $00112C: E8
+    iny                              ; ROM $00112D: C8
+    dey                              ; ROM $00112E: 88
+    bne Object_ReturnToCaller_D123                 ; ROM $00112F: D0 02
+    ldy #$FC                         ; ROM $001131: A0 FC
+; Routine: Object_ReturnToCaller_D123
+; Global: Reachable code entry at CPU $D123 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_ReturnToCaller_D123:
+    rts                              ; ROM $001133: 60
+
+; Data region: CPU $D124-$D1C7; unreachable by direct recursive trace.
+ObjectMovementParameterTable:
+    .byte $EC, $46, $00, $ED, $46, $00, $EE, $46, $00, $EF, $46, $00, $FC, $46, $00, $FD ; ROM $001134: EC 46 00 ED 46 00 EE 46 00 EF 46 00 FC 46 00 FD
+    .byte $46, $00, $FE, $46, $00, $FF, $46, $00, $EC, $46, $46, $ED, $46, $46, $EE, $46 ; ROM $001144: 46 00 FE 46 00 FF 46 00 EC 46 46 ED 46 46 EE 46
+    .byte $46, $EF, $46, $46, $FC, $46, $46, $FD, $46, $46, $FE, $46, $46, $FF, $46, $46 ; ROM $001154: 46 EF 46 46 FC 46 46 FD 46 46 FE 46 46 FF 46 46
+    .byte $18, $19, $1A, $19, $1C, $1D, $1E, $1D, $20, $21, $22, $21, $24, $25, $26, $25 ; ROM $001164: 18 19 1A 19 1C 1D 1E 1D 20 21 22 21 24 25 26 25
+    .byte $28, $29, $2A, $29, $2C, $2D, $2E, $2D, $30, $31, $32, $31, $34, $35, $36, $35 ; ROM $001174: 28 29 2A 29 2C 2D 2E 2D 30 31 32 31 34 35 36 35
+    .byte $1B, $1F, $23, $27, $2B, $2F, $33, $37, $14, $15, $16, $17, $38, $39, $3A, $3B ; ROM $001184: 1B 1F 23 27 2B 2F 33 37 14 15 16 17 38 39 3A 3B
+    .byte $3C, $3D, $01, $01, $01, $01, $03, $03, $03, $03, $02, $02, $02, $02, $01, $01 ; ROM $001194: 3C 3D 01 01 01 01 03 03 03 03 02 02 02 02 01 01
+    .byte $01, $01, $03, $03, $03, $03, $02, $02, $02, $02, $01, $01, $01, $01, $01, $02 ; ROM $0011A4: 01 01 03 03 03 03 02 02 02 02 01 01 01 01 01 02
+    .byte $01, $02, $01, $03, $02, $01, $03, $02, $01, $01, $01, $01, $01, $01, $01, $00 ; ROM $0011B4: 01 02 01 03 02 01 03 02 01 01 01 01 01 01 01 00
+    .byte $01, $02, $03, $01, $01, $02, $04, $08, $0A, $14, $28, $50, $64, $C8, $02, $04 ; ROM $0011C4: 01 02 03 01 01 02 04 08 0A 14 28 50 64 C8 02 04
+    .byte $05, $0A, $14, $28                                                             ; ROM $0011D4: 05 0A 14 28
+; Routine: Object_WriteZp4D_D1C8
+; Global: Reachable code entry at CPU $D1C8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Object_WriteZp4D_D1C8:
+    stx $4D                          ; ROM $0011D8: 86 4D
+    lda $0576,x                      ; ROM $0011DA: BD 76 05
+    sta $41                          ; ROM $0011DD: 85 41
+    lda $0580,x                      ; ROM $0011DF: BD 80 05
+    sta $42                          ; ROM $0011E2: 85 42
+    lda $058A,x                      ; ROM $0011E4: BD 8A 05
+    sta $43                          ; ROM $0011E7: 85 43
+    lda $0594,x                      ; ROM $0011E9: BD 94 05
+    sta $44                          ; ROM $0011EC: 85 44
+    lda $059E,x                      ; ROM $0011EE: BD 9E 05
+    sta $45                          ; ROM $0011F1: 85 45
+    lda $05A8,x                      ; ROM $0011F3: BD A8 05
+    sta $46                          ; ROM $0011F6: 85 46
+    lda $05B2,x                      ; ROM $0011F8: BD B2 05
+    sta $47                          ; ROM $0011FB: 85 47
+    lda $05BC,x                      ; ROM $0011FD: BD BC 05
+    sta $48                          ; ROM $001200: 85 48
+    lda $05C6,x                      ; ROM $001202: BD C6 05
+    sta $49                          ; ROM $001205: 85 49
+    lda $05D0,x                      ; ROM $001207: BD D0 05
+    sta $4A                          ; ROM $00120A: 85 4A
+    lda $05DA,x                      ; ROM $00120C: BD DA 05
+    sta $4B                          ; ROM $00120F: 85 4B
+    lda $05E4,x                      ; ROM $001211: BD E4 05
+    sta $4C                          ; ROM $001214: 85 4C
+    rts                              ; ROM $001216: 60
+
+; Data region: CPU $D207-$D5F1; unreachable by direct recursive trace.
+ObjectAndStageLookupTables:
+    .byte $A6, $4D, $A5, $41, $9D, $76, $05, $A5, $42, $9D, $80, $05, $A5, $43, $9D, $8A ; ROM $001217: A6 4D A5 41 9D 76 05 A5 42 9D 80 05 A5 43 9D 8A
+    .byte $05, $A5, $44, $9D, $94, $05, $A5, $45, $9D, $9E, $05, $A5, $46, $9D, $A8, $05 ; ROM $001227: 05 A5 44 9D 94 05 A5 45 9D 9E 05 A5 46 9D A8 05
+    .byte $A5, $47, $9D, $B2, $05, $A5, $48, $9D, $BC, $05, $A5, $49, $9D, $C6, $05, $A5 ; ROM $001237: A5 47 9D B2 05 A5 48 9D BC 05 A5 49 9D C6 05 A5
+    .byte $4A, $9D, $D0, $05, $A5, $4B, $9D, $DA, $05, $A5, $4C, $9D, $E4, $05, $60, $20 ; ROM $001247: 4A 9D D0 05 A5 4B 9D DA 05 A5 4C 9D E4 05 60 20
+    .byte $D3, $E7, $D2, $C8, $D2, $05, $D3, $B4, $D2, $19, $D3, $A0, $D3, $8A, $D3, $A2 ; ROM $001257: D3 E7 D2 C8 D2 05 D3 B4 D2 19 D3 A0 D3 8A D3 A2
+    .byte $D2, $64, $D2, $5B, $D2, $C6, $49, $D0, $42, $A9, $00, $85, $41, $60, $C6, $49 ; ROM $001267: D2 64 D2 5B D2 C6 49 D0 42 A9 00 85 41 60 C6 49
+    .byte $D0, $39, $A9, $0A, $85, $49, $E6, $46, $A5, $46, $C9, $2C, $D0, $2D, $A5, $4B ; ROM $001277: D0 39 A9 0A 85 49 E6 46 A5 46 C9 2C D0 2D A5 4B
+    .byte $18, $65, $4A, $A8, $C0, $0B, $90, $15, $C0, $10, $90, $02, $A0, $10, $B9, $B7 ; ROM $001287: 18 65 4A A8 C0 0B 90 15 C0 10 90 02 A0 10 B9 B7
+    .byte $D1, $AA, $A9, $C8, $20, $83, $DD, $CA, $D0, $F8, $4C, $9A, $D2, $B9, $B7, $D1 ; ROM $001297: D1 AA A9 C8 20 83 DD CA D0 F8 4C 9A D2 B9 B7 D1
+    .byte $20, $83, $DD, $A9, $0B, $85, $41, $A9, $64, $85, $49, $60, $C6, $49, $D0, $0C ; ROM $0012A7: 20 83 DD A9 0B 85 41 A9 64 85 49 60 C6 49 D0 0C
+    .byte $A9, $0A, $85, $41, $A9, $28, $85, $46, $A9, $14, $85, $49, $60, $60, $A9, $10 ; ROM $0012B7: A9 0A 85 41 A9 28 85 46 A9 14 85 49 60 60 A9 10
+    .byte $A0, $13, $20, $DA, $D5, $20, $7E, $D3, $A5, $33, $29, $03, $D0, $EF, $4C, $10 ; ROM $0012C7: A0 13 20 DA D5 20 7E D3 A5 33 29 03 D0 EF 4C 10
+    .byte $D3, $60, $A9, $08, $A0, $0B, $20, $DA, $D5, $20, $7E, $D3, $A5, $33, $29, $03 ; ROM $0012D7: D3 60 A9 08 A0 0B 20 DA D5 20 7E D3 A5 33 29 03
+    .byte $F0, $EF, $C6, $4C, $A5, $4C, $C9, $96, $B0, $03, $20, $26, $D4, $4C, $3F, $D3 ; ROM $0012E7: F0 EF C6 4C A5 4C C9 96 B0 03 20 26 D4 4C 3F D3
+    .byte $60, $A9, $04, $A0, $07, $20, $DA, $D5, $20, $7E, $D3, $A5, $33, $29, $03, $F0 ; ROM $0012F7: 60 A9 04 A0 07 20 DA D5 20 7E D3 A5 33 29 03 F0
+    .byte $EF, $C6, $4C, $A5, $4C, $C9, $96, $B0, $03, $20, $3D, $D4, $4C, $3F, $D3, $A9 ; ROM $001307: EF C6 4C A5 4C C9 96 B0 03 20 3D D4 4C 3F D3 A9
+    .byte $0C, $A0, $0F, $20, $DA, $D5, $20, $7E, $D3, $C6, $4C, $A5, $4C, $C9, $C8, $4C ; ROM $001317: 0C A0 0F 20 DA D5 20 7E D3 C6 4C A5 4C C9 C8 4C
+    .byte $37, $D3, $60, $A9, $14, $A0, $17, $4C, $25, $D3, $A9, $00, $A0, $03, $20, $DA ; ROM $001327: 37 D3 60 A9 14 A0 17 4C 25 D3 A9 00 A0 03 20 DA
+    .byte $D5, $20, $7E, $D3, $A5, $33, $29, $01, $F0, $E8, $C6, $4C, $A5, $4C, $C9, $14 ; ROM $001337: D5 20 7E D3 A5 33 29 01 F0 E8 C6 4C A5 4C C9 14
+    .byte $B0, $06, $20, $3D, $D4, $20, $26, $D4, $A5, $49, $F0, $22, $C6, $49, $A5, $4A ; ROM $001347: B0 06 20 3D D4 20 26 D4 A5 49 F0 22 C6 49 A5 4A
+    .byte $20, $DE, $D4, $F0, $18, $C9, $03, $90, $10, $A4, $4A, $B9, $12, $D4, $85, $4A ; ROM $001357: 20 DE D4 F0 18 C9 03 90 10 A4 4A B9 12 D4 85 4A
+    .byte $A9, $00, $85, $4C, $A9, $60, $85, $49, $60, $A9, $00, $85, $49, $60, $20, $70 ; ROM $001367: A9 00 85 4C A9 60 85 49 60 A9 00 85 49 60 20 70
+    .byte $D6, $48, $29, $18, $0A, $0A, $18, $69, $20, $85, $49, $68, $2A, $2A, $2A, $29 ; ROM $001377: D6 48 29 18 0A 0A 18 69 20 85 49 68 2A 2A 2A 29
+    .byte $03, $18, $69, $01, $85, $4A, $60, $A0, $00, $A5, $4A, $C9, $03, $90, $02, $A0 ; ROM $001387: 03 18 69 01 85 4A 60 A0 00 A5 4A C9 03 90 02 A0
+    .byte $40, $84, $48, $60, $A9, $1C, $A0, $1F, $20, $DA, $D5, $A0, $00, $A5, $46, $C9 ; ROM $001397: 40 84 48 60 A9 1C A0 1F 20 DA D5 A0 00 A5 46 C9
+    .byte $1D, $D0, $02, $A0, $40, $84, $48, $4C, $AB, $D3, $A9, $18, $A0, $1B, $20, $DA ; ROM $0013A7: 1D D0 02 A0 40 84 48 4C AB D3 A9 18 A0 1B 20 DA
+    .byte $D5, $20, $7E, $D3, $A5, $4C, $F0, $05, $C6, $4C, $D0, $07, $60, $20, $3D, $D4 ; ROM $0013B7: D5 20 7E D3 A5 4C F0 05 C6 4C D0 07 60 20 3D D4
+    .byte $20, $26, $D4, $A5, $4A, $0A, $05, $4B, $A8, $B9, $17, $D4, $85, $53, $A8, $B9 ; ROM $0013C7: 20 26 D4 A5 4A 0A 05 4B A8 B9 17 D4 85 53 A8 B9
+    .byte $21, $D4, $85, $52, $20, $54, $D4, $25, $52, $F0, $0E, $A5, $53, $85, $4A, $A9 ; ROM $0013D7: 21 D4 85 52 20 54 D4 25 52 F0 0E A5 53 85 4A A9
+    .byte $01, $45, $4B, $85, $4B, $A9, $00, $85, $49, $E6, $49, $A5, $49, $C9, $1F, $90 ; ROM $0013E7: 01 45 4B 85 4B A9 00 85 49 E6 49 A5 49 C9 1F 90
+    .byte $06, $A9, $01, $45, $4B, $85, $4B, $A5, $4A, $20, $DE, $D4, $F0, $10, $C9, $03 ; ROM $0013F7: 06 A9 01 45 4B 85 4B A5 4A 20 DE D4 F0 10 C9 03
+    .byte $B0, $0D, $E6, $4A, $A5, $4A, $C9, $05, $D0, $04, $A9, $01, $85, $4A, $60, $A9 ; ROM $001407: B0 0D E6 4A A5 4A C9 05 D0 04 A9 01 85 4A 60 A9
+    .byte $60, $85, $4C, $A4, $4A, $B9, $12, $D4, $85, $4A, $60, $00, $03, $04, $01, $02 ; ROM $001417: 60 85 4C A4 4A B9 12 D4 85 4A 60 00 03 04 01 02
+    .byte $01, $04, $04, $02, $01, $03, $02, $04, $03, $01, $00, $01, $02, $04, $08, $A5 ; ROM $001427: 01 04 04 02 01 03 02 04 03 01 00 01 02 04 08 A5
+    .byte $5C, $D0, $12, $A5, $44, $C5, $2A, $D0, $0C, $A5, $42, $C5, $28, $A9, $01, $90 ; ROM $001437: 5C D0 12 A5 44 C5 2A D0 0C A5 42 C5 28 A9 01 90
+    .byte $02, $A9, $03, $85, $4A, $60, $A5, $5C, $D0, $FB, $A5, $42, $C5, $28, $D0, $0C ; ROM $001447: 02 A9 03 85 4A 60 A5 5C D0 FB A5 42 C5 28 D0 0C
+    .byte $A5, $44, $C5, $2A, $A9, $04, $90, $02, $A9, $02, $85, $4A, $60, $A9, $00, $85 ; ROM $001457: A5 44 C5 2A A9 04 90 02 A9 02 85 4A 60 A9 00 85
+    .byte $51, $A5, $43, $C9, $08, $D0, $04, $A5, $45, $C9, $08, $D0, $59, $A4, $44, $B9 ; ROM $001467: 51 A5 43 C9 08 D0 04 A5 45 C9 08 D0 59 A4 44 B9
+    .byte $A3, $E2, $85, $34, $B9, $B0, $E2, $85, $35, $A4, $42, $C8, $20, $C0, $D4, $D0 ; ROM $001477: A3 E2 85 34 B9 B0 E2 85 35 A4 42 C8 20 C0 D4 D0
+    .byte $04, $A9, $01, $85, $51, $88, $88, $20, $C0, $D4, $D0, $06, $A9, $04, $05, $51 ; ROM $001487: 04 A9 01 85 51 88 88 20 C0 D4 D0 06 A9 04 05 51
+    .byte $85, $51, $A4, $44, $88, $B9, $A3, $E2, $85, $34, $B9, $B0, $E2, $85, $35, $A4 ; ROM $001497: 85 51 A4 44 88 B9 A3 E2 85 34 B9 B0 E2 85 35 A4
+    .byte $42, $20, $C0, $D4, $D0, $06, $A9, $02, $05, $51, $85, $51, $A4, $44, $C8, $B9 ; ROM $0014A7: 42 20 C0 D4 D0 06 A9 02 05 51 85 51 A4 44 C8 B9
+    .byte $A3, $E2, $85, $34, $B9, $B0, $E2, $85, $35, $A4, $42, $20, $C0, $D4, $D0, $06 ; ROM $0014B7: A3 E2 85 34 B9 B0 E2 85 35 A4 42 20 C0 D4 D0 06
+    .byte $A9, $08, $05, $51, $85, $51, $A5, $51, $60, $B1, $34, $F0, $FB, $C9, $08, $F0 ; ROM $0014C7: A9 08 05 51 85 51 A5 51 60 B1 34 F0 FB C9 08 F0
+    .byte $F7, $C9, $06, $F0, $F3, $C9, $02, $F0, $01, $60, $A5, $41, $C9, $05, $F0, $E8 ; ROM $0014D7: F7 C9 06 F0 F3 C9 02 F0 01 60 A5 41 C9 05 F0 E8
+    .byte $C9, $06, $F0, $E4, $C9, $08, $60, $A2, $00, $86, $4E, $AA, $C9, $01, $D0, $03 ; ROM $0014E7: C9 06 F0 E4 C9 08 60 A2 00 86 4E AA C9 01 D0 03
+    .byte $20, $8D, $D5, $8A, $C9, $03, $D0, $03, $20, $62, $D5, $8A, $C9, $02, $D0, $03 ; ROM $0014F7: 20 8D D5 8A C9 03 D0 03 20 62 D5 8A C9 02 D0 03
+    .byte $20, $37, $D5, $8A, $C9, $04, $D0, $03, $20, $05, $D5, $A5, $4E, $60, $A5, $45 ; ROM $001507: 20 37 D5 8A C9 04 D0 03 20 05 D5 A5 4E 60 A5 45
+    .byte $C9, $08, $B0, $03, $E6, $45, $60, $A4, $44, $C8, $B9, $A3, $E2, $85, $34, $B9 ; ROM $001517: C9 08 B0 03 E6 45 60 A4 44 C8 B9 A3 E2 85 34 B9
+    .byte $B0, $E2, $85, $35, $A4, $42, $20, $C0, $D4, $D0, $12, $20, $BC, $D5, $E6, $45 ; ROM $001527: B0 E2 85 35 A4 42 20 C0 D4 D0 12 20 BC D5 E6 45
+    .byte $A5, $45, $C9, $10, $D0, $06, $A9, $00, $85, $45, $E6, $44, $60, $85, $4E, $60 ; ROM $001537: A5 45 C9 10 D0 06 A9 00 85 45 E6 44 60 85 4E 60
+    .byte $A5, $45, $C9, $09, $90, $03, $C6, $45, $60, $A4, $44, $88, $B9, $A3, $E2, $85 ; ROM $001547: A5 45 C9 09 90 03 C6 45 60 A4 44 88 B9 A3 E2 85
+    .byte $34, $B9, $B0, $E2, $85, $35, $A4, $42, $20, $C0, $D4, $D0, $E0, $20, $BC, $D5 ; ROM $001557: 34 B9 B0 E2 85 35 A4 42 20 C0 D4 D0 E0 20 BC D5
+    .byte $C6, $45, $10, $06, $A9, $0F, $85, $45, $C6, $44, $60, $A5, $43, $C9, $09, $90 ; ROM $001567: C6 45 10 06 A9 0F 85 45 C6 44 60 A5 43 C9 09 90
+    .byte $03, $C6, $43, $60, $A4, $44, $B9, $A3, $E2, $85, $34, $B9, $B0, $E2, $85, $35 ; ROM $001577: 03 C6 43 60 A4 44 B9 A3 E2 85 34 B9 B0 E2 85 35
+    .byte $A4, $42, $88, $20, $C0, $D4, $D0, $B5, $20, $CB, $D5, $C6, $43, $10, $06, $A9 ; ROM $001587: A4 42 88 20 C0 D4 D0 B5 20 CB D5 C6 43 10 06 A9
+    .byte $0F, $85, $43, $C6, $42, $60, $A5, $43, $C9, $08, $B0, $03, $E6, $43, $60, $A4 ; ROM $001597: 0F 85 43 C6 42 60 A5 43 C9 08 B0 03 E6 43 60 A4
+    .byte $44, $B9, $A3, $E2, $85, $34, $B9, $B0, $E2, $85, $35, $A4, $42, $C8, $20, $C0 ; ROM $0015A7: 44 B9 A3 E2 85 34 B9 B0 E2 85 35 A4 42 C8 20 C0
+    .byte $D4, $D0, $8A, $20, $CB, $D5, $E6, $43, $A5, $43, $C9, $10, $D0, $06, $A9, $00 ; ROM $0015B7: D4 D0 8A 20 CB D5 E6 43 A5 43 C9 10 D0 06 A9 00
+    .byte $85, $43, $E6, $42, $60, $A5, $43, $C9, $08, $90, $05, $F0, $06, $C6, $43, $60 ; ROM $0015C7: 85 43 E6 42 60 A5 43 C9 08 90 05 F0 06 C6 43 60
+    .byte $E6, $43, $60, $60, $A5, $45, $C9, $08, $90, $05, $F0, $06, $C6, $45, $60, $E6 ; ROM $0015D7: E6 43 60 60 A5 45 C9 08 90 05 F0 06 C6 45 60 E6
+    .byte $45, $60, $60, $48, $A5, $33, $29, $07, $D0, $0F, $68, $E6, $46, $C5, $46, $90 ; ROM $0015E7: 45 60 60 48 A5 33 29 07 D0 0F 68 E6 46 C5 46 90
+    .byte $03, $85, $46, $60, $C4, $46, $90, $F9, $60, $68, $60                          ; ROM $0015F7: 03 85 46 60 C4 46 90 F9 60 68 60
+; Routine: Stage_WriteZp3F_D5F2
+; Global: Reachable code entry at CPU $D5F2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteZp3F_D5F2:
+    stx $3F                          ; ROM $001602: 86 3F
+    sty $40                          ; ROM $001604: 84 40
+    asl a                            ; ROM $001606: 0A
+    pha                              ; ROM $001607: 48
+    and #$0E                         ; ROM $001608: 29 0E
+    sta $3E                          ; ROM $00160A: 85 3E
+    pla                              ; ROM $00160C: 68
+    asl a                            ; ROM $00160D: 0A
+    and #$E0                         ; ROM $00160E: 29 E0
+    ora $3E                          ; ROM $001610: 05 3E
+    sta $3E                          ; ROM $001612: 85 3E
+    lda $39                          ; ROM $001614: A5 39
+    inc $39                          ; ROM $001616: E6 39
+    clc                              ; ROM $001618: 18
+    adc $DB                          ; ROM $001619: 65 DB
+    cmp #$0C                         ; ROM $00161B: C9 0C
+    bcc Stage_ReadZp3D_D611                 ; ROM $00161D: 90 02
+    sbc #$0A                         ; ROM $00161F: E9 0A
+; Routine: Stage_ReadZp3D_D611
+; Global: Reachable code entry at CPU $D611 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp3D_D611:
+    asl a                            ; ROM $001621: 0A
+    asl a                            ; ROM $001622: 0A
+    asl a                            ; ROM $001623: 0A
+    asl a                            ; ROM $001624: 0A
+    tay                              ; ROM $001625: A8
+    lda $3D                          ; ROM $001626: A5 3D
+    bne Stage_IncrementZp3E_D622                 ; ROM $001628: D0 08
+    jsr Stage_ReadPositionHi_D631                 ; ROM $00162A: 20 31 D6
+    inc $3E                          ; ROM $00162D: E6 3E
+    jmp Stage_ReadZp3F_D629                 ; ROM $00162F: 4C 29 D6
+; Routine: Stage_IncrementZp3E_D622
+; Global: Reachable code entry at CPU $D622 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_IncrementZp3E_D622:
+    inc $3E                          ; ROM $001632: E6 3E
+    jsr Stage_ReadPositionHi_D631                 ; ROM $001634: 20 31 D6
+    dec $3E                          ; ROM $001637: C6 3E
+; Routine: Stage_ReadZp3F_D629
+; Global: Reachable code entry at CPU $D629 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp3F_D629:
+    jsr Stage_ReadPositionHi_D631                 ; ROM $001639: 20 31 D6
+    ldx $3F                          ; ROM $00163C: A6 3F
+    ldy $40                          ; ROM $00163E: A4 40
+    rts                              ; ROM $001640: 60
+; Routine: Stage_ReadPositionHi_D631
+; Global: Reachable code entry at CPU $D631 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadPositionHi_D631:
+    lda $3B                          ; ROM $001641: A5 3B
+    sta $0700,y                      ; ROM $001643: 99 00 07
+    lda $3E                          ; ROM $001646: A5 3E
+    pha                              ; ROM $001648: 48
+    sta $0701,y                      ; ROM $001649: 99 01 07
+    lda $3C                          ; ROM $00164C: A5 3C
+    ora $3D                          ; ROM $00164E: 05 3D
+    sta $0702,y                      ; ROM $001650: 99 02 07
+    lda $3A                          ; ROM $001653: A5 3A
+    sta $0703,y                      ; ROM $001655: 99 03 07
+    lda $3B                          ; ROM $001658: A5 3B
+    clc                              ; ROM $00165A: 18
+    adc #$08                         ; ROM $00165B: 69 08
+    sta $0704,y                      ; ROM $00165D: 99 04 07
+    pla                              ; ROM $001660: 68
+    clc                              ; ROM $001661: 18
+    adc #$10                         ; ROM $001662: 69 10
+    sta $0705,y                      ; ROM $001664: 99 05 07
+    lda $3C                          ; ROM $001667: A5 3C
+    ora $3D                          ; ROM $001669: 05 3D
+    sta $0706,y                      ; ROM $00166B: 99 06 07
+    lda $3A                          ; ROM $00166E: A5 3A
+    sta $0707,y                      ; ROM $001670: 99 07 07
+    tya                              ; ROM $001673: 98
+    clc                              ; ROM $001674: 18
+    adc #$08                         ; ROM $001675: 69 08
+    tay                              ; ROM $001677: A8
+    lda $3A                          ; ROM $001678: A5 3A
+    clc                              ; ROM $00167A: 18
+    adc #$08                         ; ROM $00167B: 69 08
+    sta $3A                          ; ROM $00167D: 85 3A
+    rts                              ; ROM $00167F: 60
+; Routine: AdvanceRandomState
+; Global: Reachable code entry at CPU $D670 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+AdvanceRandomState:
+    lda RandomState0                          ; ROM $001680: A5 54
+    rol a                            ; ROM $001682: 2A
+    rol a                            ; ROM $001683: 2A
+    eor #$41                         ; ROM $001684: 49 41
+    rol a                            ; ROM $001686: 2A
+    rol a                            ; ROM $001687: 2A
+    eor #$93                         ; ROM $001688: 49 93
+    adc RandomState1                          ; ROM $00168A: 65 55
+    sta RandomState0                          ; ROM $00168C: 85 54
+    rol a                            ; ROM $00168E: 2A
+    rol a                            ; ROM $00168F: 2A
+    eor #$12                         ; ROM $001690: 49 12
+    rol a                            ; ROM $001692: 2A
+    rol a                            ; ROM $001693: 2A
+    adc RandomState2                          ; ROM $001694: 65 56
+    sta RandomState1                          ; ROM $001696: 85 55
+    adc RandomState0                          ; ROM $001698: 65 54
+    inc RandomState2                          ; ROM $00169A: E6 56
+    bne Stage_ToggleRandomState3_D697                 ; ROM $00169C: D0 09
+    pha                              ; ROM $00169E: 48
+    lda RandomState3                          ; ROM $00169F: A5 57
+    clc                              ; ROM $0016A1: 18
+    adc #$1D                         ; ROM $0016A2: 69 1D
+    sta RandomState3                          ; ROM $0016A4: 85 57
+    pla                              ; ROM $0016A6: 68
+; Routine: Stage_ToggleRandomState3_D697
+; Global: Reachable code entry at CPU $D697 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ToggleRandomState3_D697:
+    eor $57                          ; ROM $0016A7: 45 57
+    rts                              ; ROM $0016A9: 60
+; Routine: Stage_ReadZp58_D69A
+; Global: Reachable code entry at CPU $D69A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp58_D69A:
+    lda $58                          ; ROM $0016AA: A5 58
+    cmp #$1A                         ; ROM $0016AC: C9 1A
+    bcc Stage_HandleControl_D6A8                 ; ROM $0016AE: 90 08
+    sbc #$19                         ; ROM $0016B0: E9 19
+    ldx #$02                         ; ROM $0016B2: A2 02
+    ldy #$D8                         ; ROM $0016B4: A0 D8
+    bne Stage_WriteZp97_D6AC                 ; ROM $0016B6: D0 04
+; Routine: Stage_HandleControl_D6A8
+; Global: Reachable code entry at CPU $D6A8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_HandleControl_D6A8:
+    ldx #$08                         ; ROM $0016B8: A2 08
+    ldy #$D7                         ; ROM $0016BA: A0 D7
+; Routine: Stage_WriteZp97_D6AC
+; Global: Reachable code entry at CPU $D6AC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteZp97_D6AC:
+    stx $97                          ; ROM $0016BC: 86 97
+    sty $98                          ; ROM $0016BE: 84 98
+    sec                              ; ROM $0016C0: 38
+    sbc #$01                         ; ROM $0016C1: E9 01
+    asl a                            ; ROM $0016C3: 0A
+    sta $24                          ; ROM $0016C4: 85 24
+    asl a                            ; ROM $0016C6: 0A
+    asl a                            ; ROM $0016C7: 0A
+    clc                              ; ROM $0016C8: 18
+    adc $24                          ; ROM $0016C9: 65 24
+    tay                              ; ROM $0016CB: A8
+    ldx #$09                         ; ROM $0016CC: A2 09
+; Routine: Stage_ReadZp97_D6BE
+; Global: Reachable code entry at CPU $D6BE traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp97_D6BE:
+    lda ($97),y                      ; ROM $0016CE: B1 97
+    sta $0576,x                      ; ROM $0016D0: 9D 76 05
+    beq Stage_AdvanceIndexY_D703                 ; ROM $0016D3: F0 3E
+    sec                              ; ROM $0016D5: 38
+    sbc #$01                         ; ROM $0016D6: E9 01
+    asl a                            ; ROM $0016D8: 0A
+    asl a                            ; ROM $0016D9: 0A
+    sta $05A8,x                      ; ROM $0016DA: 9D A8 05
+    lda #$08                         ; ROM $0016DD: A9 08
+    sta $058A,x                      ; ROM $0016DF: 9D 8A 05
+    sta $059E,x                      ; ROM $0016E2: 9D 9E 05
+    jsr AdvanceRandomState                 ; ROM $0016E5: 20 70 D6
+    and #$03                         ; ROM $0016E8: 29 03
+    clc                              ; ROM $0016EA: 18
+    adc #$01                         ; ROM $0016EB: 69 01
+    sta $05D0,x                      ; ROM $0016ED: 9D D0 05
+    sty $5A                          ; ROM $0016F0: 84 5A
+; Routine: Stage_ReadObjectWorkX_D6E2
+; Global: Reachable code entry at CPU $D6E2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadObjectWorkX_D6E2:
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $0016F2: 20 CF CA
+    lda $24                          ; ROM $0016F5: A5 24
+    cmp #$05                         ; ROM $0016F7: C9 05
+    bcc Stage_ReadObjectWorkX_D6E2                 ; ROM $0016F9: 90 F7
+    sta $0580,x                      ; ROM $0016FB: 9D 80 05
+    lda $25                          ; ROM $0016FE: A5 25
+    sta $0594,x                      ; ROM $001700: 9D 94 05
+    lda #$00                         ; ROM $001703: A9 00
+    sta $05B2,x                      ; ROM $001705: 9D B2 05
+    sta $05DA,x                      ; ROM $001708: 9D DA 05
+    sta $05C6,x                      ; ROM $00170B: 9D C6 05
+    sta $05E4,x                      ; ROM $00170E: 9D E4 05
+    ldy $5A                          ; ROM $001711: A4 5A
+; Routine: Stage_AdvanceIndexY_D703
+; Global: Reachable code entry at CPU $D703 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_AdvanceIndexY_D703:
+    iny                              ; ROM $001713: C8
+    dex                              ; ROM $001714: CA
+    bpl Stage_ReadZp97_D6BE                 ; ROM $001715: 10 B7
+    rts                              ; ROM $001717: 60
+
+; Data region: CPU $D708-$D8FB; unreachable by direct recursive trace.
+GameplayParameterTables:
+    .byte $01, $01, $01, $01, $01, $01, $00, $00, $00, $00, $01, $01, $01, $02, $02, $02 ; ROM $001718: 01 01 01 01 01 01 00 00 00 00 01 01 01 02 02 02
+    .byte $00, $00, $00, $00, $01, $01, $02, $02, $03, $03, $00, $00, $00, $00, $01, $02 ; ROM $001728: 00 00 00 00 01 01 02 02 03 03 00 00 00 00 01 02
+    .byte $03, $03, $04, $04, $00, $00, $00, $00, $02, $02, $02, $02, $03, $03, $03, $00 ; ROM $001738: 03 03 04 04 00 00 00 00 02 02 02 02 03 03 03 00
+    .byte $00, $00, $02, $02, $03, $03, $03, $04, $04, $00, $00, $00, $02, $02, $03, $03 ; ROM $001748: 00 00 02 02 03 03 03 04 04 00 00 00 02 02 03 03
+    .byte $03, $05, $05, $00, $00, $00, $02, $03, $03, $04, $04, $04, $04, $00, $00, $00 ; ROM $001758: 03 05 05 00 00 00 02 03 03 04 04 04 04 00 00 00
+    .byte $02, $03, $04, $04, $04, $04, $06, $00, $00, $00, $02, $03, $04, $05, $06, $06 ; ROM $001768: 02 03 04 04 04 04 06 00 00 00 02 03 04 05 06 06
+    .byte $06, $00, $00, $00, $02, $03, $03, $04, $04, $04, $05, $06, $00, $00, $02, $03 ; ROM $001778: 06 00 00 00 02 03 03 04 04 04 05 06 00 00 02 03
+    .byte $04, $05, $06, $06, $06, $06, $00, $00, $03, $03, $03, $04, $04, $04, $06, $06 ; ROM $001788: 04 05 06 06 06 06 00 00 03 03 03 04 04 04 06 06
+    .byte $00, $00, $05, $05, $05, $05, $05, $05, $05, $07, $00, $00, $03, $04, $04, $04 ; ROM $001798: 00 00 05 05 05 05 05 05 05 07 00 00 03 04 04 04
+    .byte $06, $06, $06, $07, $00, $00, $04, $04, $04, $06, $06, $06, $06, $07, $00, $00 ; ROM $0017A8: 06 06 06 07 00 00 04 04 04 06 06 06 06 07 00 00
+    .byte $03, $03, $03, $03, $03, $06, $06, $07, $00, $00, $01, $01, $01, $02, $02, $02 ; ROM $0017B8: 03 03 03 03 03 06 06 07 00 00 01 01 01 02 02 02
+    .byte $07, $07, $00, $00, $01, $02, $03, $03, $03, $05, $07, $07, $00, $00, $02, $03 ; ROM $0017C8: 07 07 00 00 01 02 03 03 03 05 07 07 00 00 02 03
+    .byte $04, $05, $06, $06, $07, $07, $00, $00, $05, $05, $05, $06, $06, $06, $06, $07 ; ROM $0017D8: 04 05 06 06 07 07 00 00 05 05 05 06 06 06 06 07
+    .byte $07, $00, $03, $03, $03, $03, $04, $04, $04, $06, $07, $00, $03, $03, $04, $04 ; ROM $0017E8: 07 00 03 03 03 03 04 04 04 06 07 00 03 03 04 04
+    .byte $05, $05, $06, $06, $07, $00, $03, $04, $05, $06, $06, $05, $06, $06, $07, $00 ; ROM $0017F8: 05 05 06 06 07 00 03 04 05 06 06 05 06 06 07 00
+    .byte $02, $02, $03, $04, $05, $05, $06, $06, $07, $00, $01, $02, $03, $04, $05, $05 ; ROM $001808: 02 02 03 04 05 05 06 06 07 00 01 02 03 04 05 05
+    .byte $06, $06, $07, $00, $01, $02, $06, $06, $06, $05, $06, $06, $07, $00, $02, $03 ; ROM $001818: 06 06 07 00 01 02 06 06 06 05 06 06 07 00 02 03
+    .byte $03, $03, $04, $04, $04, $06, $07, $00, $05, $05, $05, $05, $05, $06, $07, $06 ; ROM $001828: 03 03 04 04 04 06 07 00 05 05 05 05 05 06 07 06
+    .byte $07, $00, $03, $03, $03, $04, $04, $05, $05, $06, $07, $00, $02, $02, $03, $03 ; ROM $001838: 07 00 03 03 03 04 04 05 05 06 07 00 02 02 03 03
+    .byte $04, $04, $05, $05, $06, $06, $02, $03, $04, $04, $04, $06, $06, $06, $06, $07 ; ROM $001848: 04 04 05 05 06 06 02 03 04 04 04 06 06 06 06 07
+    .byte $03, $03, $04, $04, $05, $06, $06, $07, $06, $07, $03, $03, $04, $04, $04, $06 ; ROM $001858: 03 03 04 04 05 06 06 07 06 07 03 03 04 04 04 06
+    .byte $06, $07, $06, $07, $03, $03, $04, $05, $00, $06, $06, $07, $06, $07, $03, $03 ; ROM $001868: 06 07 06 07 03 03 04 05 00 06 06 07 06 07 03 03
+    .byte $04, $04, $06, $06, $07, $06, $07, $07, $03, $03, $04, $05, $06, $06, $07, $06 ; ROM $001878: 04 04 06 06 07 06 07 07 03 03 04 05 06 06 07 06
+    .byte $07, $07, $03, $03, $04, $04, $06, $06, $07, $06, $07, $07, $03, $04, $05, $05 ; ROM $001888: 07 07 03 03 04 04 06 06 07 06 07 07 03 04 05 05
+    .byte $06, $07, $06, $07, $07, $07, $03, $04, $04, $06, $06, $07, $06, $07, $07, $07 ; ROM $001898: 06 07 06 07 07 07 03 04 04 06 06 07 06 07 07 07
+    .byte $03, $04, $05, $06, $06, $06, $07, $07, $07, $07, $04, $05, $06, $06, $07, $06 ; ROM $0018A8: 03 04 05 06 06 06 07 07 07 07 04 05 06 06 07 06
+    .byte $07, $07, $07, $07, $04, $05, $06, $07, $06, $07, $07, $07, $07, $07, $04, $05 ; ROM $0018B8: 07 07 07 07 04 05 06 07 06 07 07 07 07 07 04 05
+    .byte $06, $07, $06, $07, $07, $07, $07, $07, $05, $06, $05, $06, $07, $07, $07, $07 ; ROM $0018C8: 06 07 06 07 07 07 07 07 05 06 05 06 07 07 07 07
+    .byte $07, $07, $05, $06, $05, $06, $07, $07, $07, $07, $07, $07, $06, $05, $05, $06 ; ROM $0018D8: 07 07 05 06 05 06 07 07 07 07 07 07 06 05 05 06
+    .byte $07, $07, $07, $07, $07, $07, $06, $05, $06, $07, $07, $07, $07, $07, $07, $08 ; ROM $0018E8: 07 07 07 07 07 07 06 05 06 07 07 07 07 07 07 08
+    .byte $05, $05, $06, $07, $07, $07, $07, $07, $07, $08, $05, $05, $06, $07, $07, $07 ; ROM $0018F8: 05 05 06 07 07 07 07 07 07 08 05 05 06 07 07 07
+    .byte $07, $07, $08, $08                                                             ; ROM $001908: 07 07 08 08
+; Routine: Stage_WriteObjectWorkX_D8FC
+; Global: Reachable code entry at CPU $D8FC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteObjectWorkX_D8FC:
+    stx $24                          ; ROM $00190C: 86 24
+    sty $25                          ; ROM $00190E: 84 25
+    pha                              ; ROM $001910: 48
+; Routine: Stage_ReadZp14_D901
+; Global: Reachable code entry at CPU $D901 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp14_D901:
+    lda $14                          ; ROM $001911: A5 14
+    sec                              ; ROM $001913: 38
+    sbc $15                          ; ROM $001914: E5 15
+    cmp #$08                         ; ROM $001916: C9 08
+    beq Stage_ReadZp14_D901                 ; ROM $001918: F0 F7
+    pla                              ; ROM $00191A: 68
+    jsr Stage_WriteZp1A_D924                 ; ROM $00191B: 20 24 D9
+    ldy $15                          ; ROM $00191E: A4 15
+    ldx #$00                         ; ROM $001920: A2 00
+; Routine: Stage_ReadZp17_D912
+; Global: Reachable code entry at CPU $D912 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReadZp17_D912:
+    lda $17,x                        ; ROM $001922: B5 17
+    sta $0600,y                      ; ROM $001924: 99 00 06
+    iny                              ; ROM $001927: C8
+    inx                              ; ROM $001928: E8
+    cpx #$08                         ; ROM $001929: E0 08
+    bne Stage_ReadZp17_D912                 ; ROM $00192B: D0 F5
+    sty $15                          ; ROM $00192D: 84 15
+    ldx $24                          ; ROM $00192F: A6 24
+    ldy $25                          ; ROM $001931: A4 25
+    rts                              ; ROM $001933: 60
+; Routine: Stage_WriteZp1A_D924
+; Global: Reachable code entry at CPU $D924 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteZp1A_D924:
+    tay                              ; ROM $001934: A8
+    asl a                            ; ROM $001935: 0A
+    asl a                            ; ROM $001936: 0A
+    sta $1A                          ; ROM $001937: 85 1A
+    lda $D994,y                      ; ROM $001939: B9 94 D9
+    sta $1E                          ; ROM $00193C: 85 1E
+    ldy #$00                         ; ROM $00193E: A0 00
+    lda $1F                          ; ROM $001940: A5 1F
+    cmp #$10                         ; ROM $001942: C9 10
+    bcc Stage_WriteZp17_D93A                 ; ROM $001944: 90 04
+    ldy #$04                         ; ROM $001946: A0 04
+    sbc #$10                         ; ROM $001948: E9 10
+; Routine: Stage_WriteZp17_D93A
+; Global: Reachable code entry at CPU $D93A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteZp17_D93A:
+    sty $17                          ; ROM $00194A: 84 17
+    asl a                            ; ROM $00194C: 0A
+    sta $21                          ; ROM $00194D: 85 21
+    lda $20                          ; ROM $00194F: A5 20
+    clc                              ; ROM $001951: 18
+    adc #$02                         ; ROM $001952: 69 02
+    asl a                            ; ROM $001954: 0A
+    sta $22                          ; ROM $001955: 85 22
+    and #$FC                         ; ROM $001957: 29 FC
+    asl a                            ; ROM $001959: 0A
+    sta $1B                          ; ROM $00195A: 85 1B
+    lda $21                          ; ROM $00195C: A5 21
+    lsr a                            ; ROM $00195E: 4A
+    lsr a                            ; ROM $00195F: 4A
+    clc                              ; ROM $001960: 18
+    adc $1B                          ; ROM $001961: 65 1B
+    clc                              ; ROM $001963: 18
+    adc #$C0                         ; ROM $001964: 69 C0
+    sta $1B                          ; ROM $001966: 85 1B
+    lda #$23                         ; ROM $001968: A9 23
+    sta $1C                          ; ROM $00196A: 85 1C
+    lda #$02                         ; ROM $00196C: A9 02
+    and $22                          ; ROM $00196E: 25 22
+    sta $23                          ; ROM $001970: 85 23
+    lda $21                          ; ROM $001972: A5 21
+    and #$03                         ; ROM $001974: 29 03
+    lsr a                            ; ROM $001976: 4A
+    clc                              ; ROM $001977: 18
+    adc $23                          ; ROM $001978: 65 23
+    asl a                            ; ROM $00197A: 0A
+    pha                              ; ROM $00197B: 48
+    lda #$FC                         ; ROM $00197C: A9 FC
+    sta $1D                          ; ROM $00197E: 85 1D
+    pla                              ; ROM $001980: 68
+    tax                              ; ROM $001981: AA
+    beq Stage_WriteZp19_D97C                 ; ROM $001982: F0 08
+; Routine: Stage_ShiftLeftZp1E_D974
+; Global: Reachable code entry at CPU $D974 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ShiftLeftZp1E_D974:
+    asl $1E                          ; ROM $001984: 06 1E
+    sec                              ; ROM $001986: 38
+    rol $1D                          ; ROM $001987: 26 1D
+    dex                              ; ROM $001989: CA
+    bne Stage_ShiftLeftZp1E_D974                 ; ROM $00198A: D0 F8
+; Routine: Stage_WriteZp19_D97C
+; Global: Reachable code entry at CPU $D97C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_WriteZp19_D97C:
+    lda #$01                         ; ROM $00198C: A9 01
+    sta $19                          ; ROM $00198E: 85 19
+    lda $22                          ; ROM $001990: A5 22
+    ldx #$05                         ; ROM $001992: A2 05
+; Routine: Stage_RotateLeftZp19_D984
+; Global: Reachable code entry at CPU $D984 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_RotateLeftZp19_D984:
+    asl a                            ; ROM $001994: 0A
+    rol $19                          ; ROM $001995: 26 19
+    dex                              ; ROM $001997: CA
+    bne Stage_RotateLeftZp19_D984                 ; ROM $001998: D0 FA
+    clc                              ; ROM $00199A: 18
+    adc $21                          ; ROM $00199B: 65 21
+    sta $18                          ; ROM $00199D: 85 18
+    bcc Stage_ReturnToCaller_D993                 ; ROM $00199F: 90 02
+    inc $19                          ; ROM $0019A1: E6 19
+; Routine: Stage_ReturnToCaller_D993
+; Global: Reachable code entry at CPU $D993 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Stage_ReturnToCaller_D993:
+    rts                              ; ROM $0019A3: 60
+
+; Data region: CPU $D994-$DA8D; unreachable by direct recursive trace.
+StageLayoutPointerData:
+    .byte $00, $00, $00, $01, $01, $01, $01, $01, $00, $00, $00, $01, $01, $01, $01, $01 ; ROM $0019A4: 00 00 00 01 01 01 01 01 00 00 00 01 01 01 01 01
+    .byte $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01 ; ROM $0019B4: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
+    .byte $01, $01, $01, $01, $01, $01, $01, $01, $03, $02, $02, $02, $02, $02, $02, $02 ; ROM $0019C4: 01 01 01 01 01 01 01 01 03 02 02 02 02 02 02 02
+    .byte $02, $03, $5F, $5F, $5F, $5F, $64, $65, $66, $67, $68, $69, $6A, $6B, $6C, $6D ; ROM $0019D4: 02 03 5F 5F 5F 5F 64 65 66 67 68 69 6A 6B 6C 6D
+    .byte $6E, $6F, $70, $71, $72, $73, $74, $75, $76, $77, $78, $79, $7A, $7B, $7C, $7D ; ROM $0019E4: 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D
+    .byte $7E, $7F, $80, $81, $82, $83, $84, $85, $86, $87, $88, $89, $8A, $8B, $8C, $8D ; ROM $0019F4: 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D
+    .byte $8E, $8F, $90, $91, $92, $93, $94, $95, $96, $97, $98, $99, $9A, $9B, $20, $20 ; ROM $001A04: 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 20 20
+    .byte $21, $21, $22, $23, $22, $23, $24, $24, $25, $25, $26, $27, $26, $27, $28, $28 ; ROM $001A14: 21 21 22 23 22 23 24 24 25 25 26 27 26 27 28 28
+    .byte $29, $29, $2A, $2B, $2A, $2B, $2C, $2C, $2D, $2D, $2E, $2F, $2E, $2F, $20, $9D ; ROM $001A24: 29 29 2A 2B 2A 2B 2C 2C 2D 2D 2E 2F 2E 2F 20 9D
+    .byte $21, $9F, $9C, $9D, $22, $23, $9C, $20, $9E, $21, $22, $23, $9E, $9F, $24, $A1 ; ROM $001A34: 21 9F 9C 9D 22 23 9C 20 9E 21 22 23 9E 9F 24 A1
+    .byte $25, $A3, $A0, $A1, $26, $27, $A0, $24, $A2, $25, $26, $27, $A2, $A3, $28, $A5 ; ROM $001A44: 25 A3 A0 A1 26 27 A0 24 A2 25 26 27 A2 A3 28 A5
+    .byte $29, $A7, $A4, $A5, $2A, $2B, $A4, $28, $A6, $29, $2A, $2B, $A6, $A7, $2C, $A9 ; ROM $001A54: 29 A7 A4 A5 2A 2B A4 28 A6 29 2A 2B A6 A7 2C A9
+    .byte $2D, $AB, $A8, $A9, $2E, $2F, $A8, $2C, $AA, $2D, $2E, $2F, $AA, $AB, $68, $69 ; ROM $001A64: 2D AB A8 A9 2E 2F A8 2C AA 2D 2E 2F AA AB 68 69
+    .byte $6A, $6B, $3C, $3D, $3E, $3F, $00, $01, $10, $11, $02, $03, $12, $13, $04, $05 ; ROM $001A74: 6A 6B 3C 3D 3E 3F 00 01 10 11 02 03 12 13 04 05
+    .byte $14, $15, $06, $07, $16, $17, $08, $09, $18, $19, $0A, $0B, $1A, $1B, $0C, $0D ; ROM $001A84: 14 15 06 07 16 17 08 09 18 19 0A 0B 1A 1B 0C 0D
+    .byte $1C, $1D, $0E, $0F, $1E, $1F, $68, $69, $6A, $6B                               ; ROM $001A94: 1C 1D 0E 0F 1E 1F 68 69 6A 6B
+; Routine: RunMenuSelectionScreen
+; Global: Reachable code entry at CPU $DA8E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+RunMenuSelectionScreen:
+    jsr DisableRendering                 ; ROM $001A9E: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $001AA1: 20 B9 C2
+    jsr UploadMenuPalette                 ; ROM $001AA4: 20 27 DF
+    lda #$00                         ; ROM $001AA7: A9 00
+    sta $60                          ; ROM $001AA9: 85 60
+    sta $72                          ; ROM $001AAB: 85 72
+    sta $B5                          ; ROM $001AAD: 85 B5
+    ldy #$9F                         ; ROM $001AAF: A0 9F
+    lda #$20                         ; ROM $001AB1: A9 20
+    ldx #$E7                         ; ROM $001AB3: A2 E7
+    jsr Menu_CallHelper_DC41                 ; ROM $001AB5: 20 41 DC
+    jsr Ppu_CallHelper_C23B                 ; ROM $001AB8: 20 3B C2
+    lda #$06                         ; ROM $001ABB: A9 06
+    sta $1F                          ; ROM $001ABD: 85 1F
+    lda #$3A                         ; ROM $001ABF: A9 3A
+    sta $20                          ; ROM $001AC1: 85 20
+    ldy #$00                         ; ROM $001AC3: A0 00
+; Routine: Menu_TransferVramDataPath_DAB5
+; Global: Reachable code entry at CPU $DAB5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DAB5:
+    jsr WaitForVBlankTransition                 ; ROM $001AC5: 20 8B C2
+    lda #$22                         ; ROM $001AC8: A9 22
+    ldx $1F                          ; ROM $001ACA: A6 1F
+    jsr SetPpuAddress                 ; ROM $001ACC: 20 96 C1
+    lda $20                          ; ROM $001ACF: A5 20
+    sta PPUDATA                      ; ROM $001AD1: 8D 07 20
+    jsr CommitPpuStateAndScroll                 ; ROM $001AD4: 20 96 C2
+    ldx #$0A                         ; ROM $001AD7: A2 0A
+; Routine: Menu_TransferVramDataPath_DAC9
+; Global: Reachable code entry at CPU $DAC9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DAC9:
+    jsr WaitForVBlankTransition                 ; ROM $001AD9: 20 8B C2
+    lda ControllerState1                          ; ROM $001ADC: A5 12
+    and #$8F                         ; ROM $001ADE: 29 8F
+    bne Menu_UpdateAudioChannelPath_DAF8                 ; ROM $001AE0: D0 26
+    dex                              ; ROM $001AE2: CA
+    bne Menu_TransferVramDataPath_DAC9                 ; ROM $001AE3: D0 F4
+    jsr WaitForVBlankTransition                 ; ROM $001AE5: 20 8B C2
+    lda #$22                         ; ROM $001AE8: A9 22
+    ldx $1F                          ; ROM $001AEA: A6 1F
+    jsr SetPpuAddress                 ; ROM $001AEC: 20 96 C1
+    lda #$3B                         ; ROM $001AEF: A9 3B
+    sta PPUDATA                      ; ROM $001AF1: 8D 07 20
+    jsr CommitPpuStateAndScroll                 ; ROM $001AF4: 20 96 C2
+    ldx #$0A                         ; ROM $001AF7: A2 0A
+; Routine: Menu_CallHelper_DAE9
+; Global: Reachable code entry at CPU $DAE9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_CallHelper_DAE9:
+    jsr WaitForVBlankTransition                 ; ROM $001AF9: 20 8B C2
+    lda ControllerState1                          ; ROM $001AFC: A5 12
+    and #$8F                         ; ROM $001AFE: 29 8F
+    bne Menu_UpdateAudioChannelPath_DAF8                 ; ROM $001B00: D0 06
+    dex                              ; ROM $001B02: CA
+    bne Menu_CallHelper_DAE9                 ; ROM $001B03: D0 F4
+    jmp Menu_TransferVramDataPath_DAB5                 ; ROM $001B05: 4C B5 DA
+; Routine: Menu_UpdateAudioChannelPath_DAF8
+; Global: Reachable code entry at CPU $DAF8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_UpdateAudioChannelPath_DAF8:
+    bmi Menu_TransferVramDataPath_DB43                 ; ROM $001B08: 30 49
+    pha                              ; ROM $001B0A: 48
+    lda #$12                         ; ROM $001B0B: A9 12
+    sta APUPULSE1TIMERHI                        ; ROM $001B0D: 8D 03 40
+    pla                              ; ROM $001B10: 68
+    cmp #$01                         ; ROM $001B11: C9 01
+    beq Menu_ReadWorkValue_DB24                 ; ROM $001B13: F0 1F
+    lda $20                          ; ROM $001B15: A5 20
+    cmp #$3A                         ; ROM $001B17: C9 3A
+    bne Menu_ReadWorkValue_DB0F                 ; ROM $001B19: D0 04
+    lda #$51                         ; ROM $001B1B: A9 51
+    sta $20                          ; ROM $001B1D: 85 20
+; Routine: Menu_ReadWorkValue_DB0F
+; Global: Reachable code entry at CPU $DB0F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadWorkValue_DB0F:
+    lda $20                          ; ROM $001B1F: A5 20
+    cmp #$41                         ; ROM $001B21: C9 41
+    beq Menu_WriteWorkValue_DB1A                 ; ROM $001B23: F0 05
+    dec $20                          ; ROM $001B25: C6 20
+    jmp Menu_CallHelper_DB1E                 ; ROM $001B27: 4C 1E DB
+; Routine: Menu_WriteWorkValue_DB1A
+; Global: Reachable code entry at CPU $DB1A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteWorkValue_DB1A:
+    lda #$50                         ; ROM $001B2A: A9 50
+    sta $20                          ; ROM $001B2C: 85 20
+; Routine: Menu_CallHelper_DB1E
+; Global: Reachable code entry at CPU $DB1E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_CallHelper_DB1E:
+    jsr WaitForFrameBoundary                 ; ROM $001B2E: 20 07 C3
+    jmp Menu_TransferVramDataPath_DAB5                 ; ROM $001B31: 4C B5 DA
+; Routine: Menu_ReadWorkValue_DB24
+; Global: Reachable code entry at CPU $DB24 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadWorkValue_DB24:
+    lda $20                          ; ROM $001B34: A5 20
+    cmp #$3A                         ; ROM $001B36: C9 3A
+    bne Menu_ReadWorkValue_DB2E                 ; ROM $001B38: D0 04
+    lda #$40                         ; ROM $001B3A: A9 40
+    sta $20                          ; ROM $001B3C: 85 20
+; Routine: Menu_ReadWorkValue_DB2E
+; Global: Reachable code entry at CPU $DB2E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadWorkValue_DB2E:
+    lda $20                          ; ROM $001B3E: A5 20
+    cmp #$50                         ; ROM $001B40: C9 50
+    beq Menu_WriteWorkValue_DB39                 ; ROM $001B42: F0 05
+    inc $20                          ; ROM $001B44: E6 20
+    jmp Menu_CallHelper_DB3D                 ; ROM $001B46: 4C 3D DB
+; Routine: Menu_WriteWorkValue_DB39
+; Global: Reachable code entry at CPU $DB39 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteWorkValue_DB39:
+    lda #$41                         ; ROM $001B49: A9 41
+    sta $20                          ; ROM $001B4B: 85 20
+; Routine: Menu_CallHelper_DB3D
+; Global: Reachable code entry at CPU $DB3D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_CallHelper_DB3D:
+    jsr WaitForFrameBoundary                 ; ROM $001B4D: 20 07 C3
+; Routine: Menu_Dispatch_DB40
+; Global: Reachable code entry at CPU $DB40 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_Dispatch_DB40:
+    jmp Menu_TransferVramDataPath_DAB5                 ; ROM $001B50: 4C B5 DA
+; Routine: Menu_TransferVramDataPath_DB43
+; Global: Reachable code entry at CPU $DB43 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DB43:
+    lda #$11                         ; ROM $001B53: A9 11
+    sta APUPULSE1TIMERHI                        ; ROM $001B55: 8D 03 40
+    lda $20                          ; ROM $001B58: A5 20
+    cmp #$3A                         ; ROM $001B5A: C9 3A
+    beq Menu_Dispatch_DB40                 ; ROM $001B5C: F0 F2
+    and #$0F                         ; ROM $001B5E: 29 0F
+    tax                              ; ROM $001B60: AA
+    lda $DFA0,x                      ; ROM $001B61: BD A0 DF
+    sta $007F,y                      ; ROM $001B64: 99 7F 00
+    jsr WaitForVBlankTransition                 ; ROM $001B67: 20 8B C2
+    lda #$22                         ; ROM $001B6A: A9 22
+    ldx $1F                          ; ROM $001B6C: A6 1F
+    jsr SetPpuAddress                 ; ROM $001B6E: 20 96 C1
+    lda $20                          ; ROM $001B71: A5 20
+    sta PPUDATA                      ; ROM $001B73: 8D 07 20
+    jsr CommitPpuStateAndScroll                 ; ROM $001B76: 20 96 C2
+    lda #$3A                         ; ROM $001B79: A9 3A
+    sta $20                          ; ROM $001B7B: 85 20
+    inc $1F                          ; ROM $001B7D: E6 1F
+    iny                              ; ROM $001B7F: C8
+    cpy #$14                         ; ROM $001B80: C0 14
+    beq Menu_HandleControl_DB7A                 ; ROM $001B82: F0 06
+    jsr WaitForFrameBoundary                 ; ROM $001B84: 20 07 C3
+    jmp Menu_TransferVramDataPath_DAB5                 ; ROM $001B87: 4C B5 DA
+; Routine: Menu_HandleControl_DB7A
+; Global: Reachable code entry at CPU $DB7A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DB7A:
+    ldx #$00                         ; ROM $001B8A: A2 00
+    stx RandomState0                 ; ROM $001B8C: 86 54
+; Routine: Menu_ReadZp7F_DB7E
+; Global: Reachable code entry at CPU $DB7E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadZp7F_DB7E:
+    lda $7F,x                        ; ROM $001B8E: B5 7F
+    pha                              ; ROM $001B90: 48
+    clc                              ; ROM $001B91: 18
+    adc #$07                         ; ROM $001B92: 69 07
+    clc                              ; ROM $001B94: 18
+    adc RandomState0                          ; ROM $001B95: 65 54
+    and #$0F                         ; ROM $001B97: 29 0F
+    sta $7F,x                        ; ROM $001B99: 95 7F
+    pla                              ; ROM $001B9B: 68
+    sta RandomState0                          ; ROM $001B9C: 85 54
+    inx                              ; ROM $001B9E: E8
+    cpx #$14                         ; ROM $001B9F: E0 14
+    bne Menu_ReadZp7F_DB7E                 ; ROM $001BA1: D0 EB
+    ldx #$00                         ; ROM $001BA3: A2 00
+; Routine: Menu_HandleControl_DB95
+; Global: Reachable code entry at CPU $DB95 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DB95:
+    ldy #$04                         ; ROM $001BA5: A0 04
+    lda #$00                         ; ROM $001BA7: A9 00
+; Routine: Menu_AddToZp7F_DB99
+; Global: Reachable code entry at CPU $DB99 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_AddToZp7F_DB99:
+    clc                              ; ROM $001BA9: 18
+    adc $7F,x                        ; ROM $001BAA: 75 7F
+    inx                              ; ROM $001BAC: E8
+    dey                              ; ROM $001BAD: 88
+    bne Menu_AddToZp7F_DB99                 ; ROM $001BAE: D0 F9
+    and #$0F                         ; ROM $001BB0: 29 0F
+    cmp $7F,x                        ; ROM $001BB2: D5 7F
+    bne Menu_Dispatch_DBCC                 ; ROM $001BB4: D0 26
+    inx                              ; ROM $001BB6: E8
+    cpx #$0F                         ; ROM $001BB7: E0 0F
+    bne Menu_HandleControl_DB95                 ; ROM $001BB9: D0 EA
+    lda $83                          ; ROM $001BBB: A5 83
+    asl a                            ; ROM $001BBD: 0A
+    sta $1F                          ; ROM $001BBE: 85 1F
+    lda $88                          ; ROM $001BC0: A5 88
+    asl a                            ; ROM $001BC2: 0A
+    clc                              ; ROM $001BC3: 18
+    adc $1F                          ; ROM $001BC4: 65 1F
+    sta $1F                          ; ROM $001BC6: 85 1F
+    lda $8D                          ; ROM $001BC8: A5 8D
+    asl a                            ; ROM $001BCA: 0A
+    clc                              ; ROM $001BCB: 18
+    adc $1F                          ; ROM $001BCC: 65 1F
+    ldx #$04                         ; ROM $001BCE: A2 04
+; Routine: Menu_AddToZp8D_DBC0
+; Global: Reachable code entry at CPU $DBC0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_AddToZp8D_DBC0:
+    clc                              ; ROM $001BD0: 18
+    adc $8D,x                        ; ROM $001BD1: 75 8D
+    dex                              ; ROM $001BD3: CA
+    bne Menu_AddToZp8D_DBC0                 ; ROM $001BD4: D0 FA
+    and #$0F                         ; ROM $001BD6: 29 0F
+    cmp $92                          ; ROM $001BD8: C5 92
+    beq Menu_HandleControl_DBCF                 ; ROM $001BDA: F0 03
+; Routine: Menu_Dispatch_DBCC
+; Global: Reachable code entry at CPU $DBCC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_Dispatch_DBCC:
+    jmp RunMenuSelectionScreen                 ; ROM $001BDC: 4C 8E DA
+; Routine: Menu_HandleControl_DBCF
+; Global: Reachable code entry at CPU $DBCF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DBCF:
+    ldx #$00                         ; ROM $001BDF: A2 00
+    ldy #$00                         ; ROM $001BE1: A0 00
+; Routine: Menu_ReadRam007F_DBD3
+; Global: Reachable code entry at CPU $DBD3 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadRam007F_DBD3:
+    jsr Gameplay_ReadRamE360_E353                 ; ROM $001BE3: 20 53 E3
+    lda $007F,y                      ; ROM $001BE6: B9 7F 00
+    sty $25                          ; ROM $001BE9: 84 25
+    ldy #$00                         ; ROM $001BEB: A0 00
+    sta ($34),y                      ; ROM $001BED: 91 34
+    ldy $25                          ; ROM $001BEF: A4 25
+    iny                              ; ROM $001BF1: C8
+    cpy #$14                         ; ROM $001BF2: C0 14
+    bne Menu_ReadRam007F_DBD3                 ; ROM $001BF4: D0 ED
+    lda $DC                          ; ROM $001BF6: A5 DC
+    asl a                            ; ROM $001BF8: 0A
+    asl a                            ; ROM $001BF9: 0A
+    asl a                            ; ROM $001BFA: 0A
+    asl a                            ; ROM $001BFB: 0A
+    sta $73                          ; ROM $001BFC: 85 73
+    lda $DE                          ; ROM $001BFE: A5 DE
+    asl a                            ; ROM $001C00: 0A
+    asl a                            ; ROM $001C01: 0A
+    asl a                            ; ROM $001C02: 0A
+    asl a                            ; ROM $001C03: 0A
+    ora $DD                          ; ROM $001C04: 05 DD
+    sta $58                          ; ROM $001C06: 85 58
+    rts                              ; ROM $001C08: 60
+; Routine: Menu_WriteWorkValue_DBF9
+; Global: Reachable code entry at CPU $DBF9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteWorkValue_DBF9:
+    jsr DisableRendering                 ; ROM $001C09: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $001C0C: 20 B9 C2
+    jsr UploadMenuPalette                 ; ROM $001C0F: 20 27 DF
+    lda #$06                         ; ROM $001C12: A9 06
+    jsr Menu_SaveAccumulator_DD04                 ; ROM $001C14: 20 04 DD
+    ldy #$00                         ; ROM $001C17: A0 00
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C19: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C1C: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C1F: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C22: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C25: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C28: 20 39 DC
+    jsr Menu_ReadRamDC53_DC39                 ; ROM $001C2B: 20 39 DC
+    lda #$0A                         ; ROM $001C2E: A9 0A
+    sta $20                          ; ROM $001C30: 85 20
+    lda #$00                         ; ROM $001C32: A9 00
+    sta $1F                          ; ROM $001C34: 85 1F
+; Routine: Menu_IncrementWorkIndex_DC26
+; Global: Reachable code entry at CPU $DC26 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_IncrementWorkIndex_DC26:
+    lda #$31                         ; ROM $001C36: A9 31
+    jsr Gameplay_WriteObjectWorkY_CB4E                 ; ROM $001C38: 20 4E CB
+    inc $1F                          ; ROM $001C3B: E6 1F
+    lda $1F                          ; ROM $001C3D: A5 1F
+    cmp #$10                         ; ROM $001C3F: C9 10
+    bne Menu_IncrementWorkIndex_DC26                 ; ROM $001C41: D0 F3
+    jsr EnableNmiInPpuControl                 ; ROM $001C43: 20 B0 C2
+    jmp Ppu_CallHelper_C23B                 ; ROM $001C46: 4C 3B C2
+; Routine: Menu_ReadRamDC53_DC39
+; Global: Reachable code entry at CPU $DC39 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadRamDC53_DC39:
+    lda $DC53,y                      ; ROM $001C49: B9 53 DC
+    iny                              ; ROM $001C4C: C8
+    ldx $DC53,y                      ; ROM $001C4D: BE 53 DC
+    iny                              ; ROM $001C50: C8
+; Routine: Menu_CallHelper_DC41
+; Global: Reachable code entry at CPU $DC41 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_CallHelper_DC41:
+    jsr SetPpuAddress                 ; ROM $001C51: 20 96 C1
+; Routine: Menu_TransferVramDataPath_DC44
+; Global: Reachable code entry at CPU $DC44 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DC44:
+    lda $DC53,y                      ; ROM $001C54: B9 53 DC
+    iny                              ; ROM $001C57: C8
+    cmp #$00                         ; ROM $001C58: C9 00
+    beq Menu_ReturnToCaller_DC52                 ; ROM $001C5A: F0 06
+    sta PPUDATA                      ; ROM $001C5C: 8D 07 20
+    jmp Menu_TransferVramDataPath_DC44                 ; ROM $001C5F: 4C 44 DC
+; Routine: Menu_ReturnToCaller_DC52
+; Global: Reachable code entry at CPU $DC52 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReturnToCaller_DC52:
+    rts                              ; ROM $001C62: 60
+
+; Data region: CPU $DC53-$DD03; unreachable by direct recursive trace.
+MenuScreenConstructionData:
+    .byte $20, $88, $43, $4F, $4E, $47, $52, $41, $54, $55, $4C, $41, $54, $49, $4F, $4E ; ROM $001C63: 20 88 43 4F 4E 47 52 41 54 55 4C 41 54 49 4F 4E
+    .byte $53, $00, $20, $E4, $59, $4F, $55, $3A, $48, $41, $56, $45, $3A, $53, $55, $43 ; ROM $001C73: 53 00 20 E4 59 4F 55 3A 48 41 56 45 3A 53 55 43
+    .byte $43, $45, $45, $44, $45, $44, $3A, $49, $4E, $00, $21, $22, $48, $45, $4C, $50 ; ROM $001C83: 43 45 45 44 45 44 3A 49 4E 00 21 22 48 45 4C 50
+    .byte $49, $4E, $47, $3A, $42, $4F, $4D, $42, $45, $52, $4D, $41, $4E, $3A, $54, $4F ; ROM $001C93: 49 4E 47 3A 42 4F 4D 42 45 52 4D 41 4E 3A 54 4F
+    .byte $3A, $42, $45, $43, $4F, $4D, $45, $00, $21, $62, $41, $3A, $48, $55, $4D, $41 ; ROM $001CA3: 3A 42 45 43 4F 4D 45 00 21 62 41 3A 48 55 4D 41
+    .byte $4E, $3A, $42, $45, $49, $4E, $47, $00, $21, $A4, $4D, $41, $59, $42, $45, $3A ; ROM $001CB3: 4E 3A 42 45 49 4E 47 00 21 A4 4D 41 59 42 45 3A
+    .byte $59, $4F, $55, $3A, $43, $41, $4E, $3A, $52, $45, $43, $4F, $47, $4E, $49, $5A ; ROM $001CC3: 59 4F 55 3A 43 41 4E 3A 52 45 43 4F 47 4E 49 5A
+    .byte $45, $3A, $48, $49, $4D, $00, $21, $E2, $49, $4E, $3A, $41, $4E, $4F, $54, $48 ; ROM $001CD3: 45 3A 48 49 4D 00 21 E2 49 4E 3A 41 4E 4F 54 48
+    .byte $45, $52, $3A, $48, $55, $44, $53, $4F, $4E, $3A, $53, $4F, $46, $54, $3A, $47 ; ROM $001CE3: 45 52 3A 48 55 44 53 4F 4E 3A 53 4F 46 54 3A 47
+    .byte $41, $4D, $45, $00, $22, $4B, $47, $4F, $4F, $44, $3A, $42, $59, $45, $00, $45 ; ROM $001CF3: 41 4D 45 00 22 4B 47 4F 4F 44 3A 42 59 45 00 45
+    .byte $4E, $54, $45, $52, $3A, $53, $45, $43, $52, $45, $54, $3A, $43, $4F, $44, $45 ; ROM $001D03: 4E 54 45 52 3A 53 45 43 52 45 54 3A 43 4F 44 45
+    .byte $00                                                                            ; ROM $001D13: 00
+; Routine: Menu_SaveAccumulator_DD04
+; Global: Reachable code entry at CPU $DD04 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_SaveAccumulator_DD04:
+    pha                              ; ROM $001D14: 48
+    jsr WaitForVBlankTransition                 ; ROM $001D15: 20 8B C2
+    lda #$3F                         ; ROM $001D18: A9 3F
+    ldx #$1C                         ; ROM $001D1A: A2 1C
+    jsr SetPpuAddress                 ; ROM $001D1C: 20 96 C1
+    pla                              ; ROM $001D1F: 68
+    asl a                            ; ROM $001D20: 0A
+    asl a                            ; ROM $001D21: 0A
+    tax                              ; ROM $001D22: AA
+    ldy #$04                         ; ROM $001D23: A0 04
+; Routine: Menu_TransferVramDataPath_DD15
+; Global: Reachable code entry at CPU $DD15 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DD15:
+    lda $DD22,x                      ; ROM $001D25: BD 22 DD
+    sta PPUDATA                      ; ROM $001D28: 8D 07 20
+    inx                              ; ROM $001D2B: E8
+    dey                              ; ROM $001D2C: 88
+    bne Menu_TransferVramDataPath_DD15                 ; ROM $001D2D: D0 F6
+    jmp Ppu_SetVramAddress_C2D6                 ; ROM $001D2F: 4C D6 C2
+
+; Data region: CPU $DD22-$DD3D; unreachable by direct recursive trace.
+StatusScreenAddressTable:
+    .byte $0F, $00, $00, $00, $0F, $00, $00, $00, $0F, $00, $00, $00, $0F, $00, $00, $00 ; ROM $001D32: 0F 00 00 00 0F 00 00 00 0F 00 00 00 0F 00 00 00
+    .byte $0F, $00, $00, $00, $0F, $00, $00, $00, $0F, $15, $36, $21                     ; ROM $001D42: 0F 00 00 00 0F 00 00 00 0F 15 36 21
+; Routine: Menu_CallHelper_DD3E
+; Global: Reachable code entry at CPU $DD3E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_CallHelper_DD3E:
+    jsr DisableRendering                 ; ROM $001D4E: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $001D51: 20 B9 C2
+    jsr UploadMenuPalette                 ; ROM $001D54: 20 27 DF
+    lda #$21                         ; ROM $001D57: A9 21
+    ldx #$EA                         ; ROM $001D59: A2 EA
+    jsr SetPpuAddress                 ; ROM $001D5B: 20 96 C1
+    ldx #$08                         ; ROM $001D5E: A2 08
+; Routine: Menu_TransferVramDataPath_DD50
+; Global: Reachable code entry at CPU $DD50 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DD50:
+    lda $DD62,x                      ; ROM $001D60: BD 62 DD
+    sta PPUDATA                      ; ROM $001D63: 8D 07 20
+    dex                              ; ROM $001D66: CA
+    bpl Menu_TransferVramDataPath_DD50                 ; ROM $001D67: 10 F7
+    jsr Gameplay_ReadObjectMode_E2BD                 ; ROM $001D69: 20 BD E2
+    jsr EnableNmiInPpuControl                 ; ROM $001D6C: 20 B0 C2
+    jmp Ppu_CallHelper_C23B                 ; ROM $001D6F: 4C 3B C2
+
+; Data region: CPU $DD62-$DD6A; unreachable by direct recursive trace.
+StatusDigitTileTable:
+    .byte $52, $45, $56, $4F, $3A, $45, $4D, $41, $47                                    ; ROM $001D72: 52 45 56 4F 3A 45 4D 41 47
+; Routine: Menu_WriteObjectWorkX_DD6B
+; Global: Reachable code entry at CPU $DD6B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteObjectWorkX_DD6B:
+    stx $24                          ; ROM $001D7B: 86 24
+    sty $25                          ; ROM $001D7D: 84 25
+    ldx $59                          ; ROM $001D7F: A6 59
+    bne Menu_ReadObjectWorkX_DDC2                 ; ROM $001D81: D0 4F
+    ldx #$03                         ; ROM $001D83: A2 03
+    bne Menu_AddToZp61_DD8D                 ; ROM $001D85: D0 16
+; Routine: Menu_WriteObjectWorkX_DD77
+; Global: Reachable code entry at CPU $DD77 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteObjectWorkX_DD77:
+    stx $24                          ; ROM $001D87: 86 24
+    sty $25                          ; ROM $001D89: 84 25
+    ldx $59                          ; ROM $001D8B: A6 59
+    bne Menu_ReadObjectWorkX_DDC2                 ; ROM $001D8D: D0 43
+    ldx #$04                         ; ROM $001D8F: A2 04
+    bne Menu_AddToZp61_DD8D                 ; ROM $001D91: D0 0A
+; Routine: Menu_WriteObjectWorkX_DD83
+; Global: Reachable code entry at CPU $DD83 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteObjectWorkX_DD83:
+    stx $24                          ; ROM $001D93: 86 24
+    sty $25                          ; ROM $001D95: 84 25
+    ldx $59                          ; ROM $001D97: A6 59
+    bne Menu_ReadObjectWorkX_DDC2                 ; ROM $001D99: D0 37
+    ldx #$06                         ; ROM $001D9B: A2 06
+; Routine: Menu_AddToZp61_DD8D
+; Global: Reachable code entry at CPU $DD8D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_AddToZp61_DD8D:
+    ldy #$00                         ; ROM $001D9D: A0 00
+    clc                              ; ROM $001D9F: 18
+    adc $61,x                        ; ROM $001DA0: 75 61
+; Routine: Menu_WriteZp61_DD92
+; Global: Reachable code entry at CPU $DD92 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteZp61_DD92:
+    sta $61,x                        ; ROM $001DA2: 95 61
+    lda $61,x                        ; ROM $001DA4: B5 61
+    sec                              ; ROM $001DA6: 38
+    sbc #$0A                         ; ROM $001DA7: E9 0A
+    bcc Menu_WriteZp61_DD9E                 ; ROM $001DA9: 90 03
+    iny                              ; ROM $001DAB: C8
+    bne Menu_WriteZp61_DD92                 ; ROM $001DAC: D0 F4
+; Routine: Menu_WriteZp61_DD9E
+; Global: Reachable code entry at CPU $DD9E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteZp61_DD9E:
+    cpy #$00                         ; ROM $001DAE: C0 00
+    beq Menu_HandleControl_DDAA                 ; ROM $001DB0: F0 08
+    tya                              ; ROM $001DB2: 98
+    dex                              ; ROM $001DB3: CA
+    bpl Menu_AddToZp61_DD8D                 ; ROM $001DB4: 10 E7
+    lda #$09                         ; ROM $001DB6: A9 09
+    sta $61                          ; ROM $001DB8: 85 61
+; Routine: Menu_HandleControl_DDAA
+; Global: Reachable code entry at CPU $DDAA traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DDAA:
+    ldx #$00                         ; ROM $001DBA: A2 00
+; Routine: Menu_ReadZp61_DDAC
+; Global: Reachable code entry at CPU $DDAC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadZp61_DDAC:
+    lda $61,x                        ; ROM $001DBC: B5 61
+    cmp $01,x                        ; ROM $001DBE: D5 01
+    bcc Menu_ReadObjectWorkX_DDC2                 ; ROM $001DC0: 90 10
+    bne Menu_HandleControl_DDB9                 ; ROM $001DC2: D0 05
+    inx                              ; ROM $001DC4: E8
+    cpx #$08                         ; ROM $001DC5: E0 08
+    bne Menu_ReadZp61_DDAC                 ; ROM $001DC7: D0 F3
+; Routine: Menu_HandleControl_DDB9
+; Global: Reachable code entry at CPU $DDB9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DDB9:
+    ldx #$06                         ; ROM $001DC9: A2 06
+; Routine: Menu_ReadZp61_DDBB
+; Global: Reachable code entry at CPU $DDBB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadZp61_DDBB:
+    lda $61,x                        ; ROM $001DCB: B5 61
+    sta $01,x                        ; ROM $001DCD: 95 01
+    dex                              ; ROM $001DCF: CA
+    bpl Menu_ReadZp61_DDBB                 ; ROM $001DD0: 10 F9
+; Routine: Menu_ReadObjectWorkX_DDC2
+; Global: Reachable code entry at CPU $DDC2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_ReadObjectWorkX_DDC2:
+    ldx $24                          ; ROM $001DD2: A6 24
+    ldy $25                          ; ROM $001DD4: A4 25
+    rts                              ; ROM $001DD6: 60
+; Routine: Menu_HandleControl_DDC7
+; Global: Reachable code entry at CPU $DDC7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DDC7:
+    lda #$20                         ; ROM $001DD7: A9 20
+    ldx #$00                         ; ROM $001DD9: A2 00
+    jsr SetPpuAddress                 ; ROM $001DDB: 20 96 C1
+    ldx #$80                         ; ROM $001DDE: A2 80
+    lda #$3A                         ; ROM $001DE0: A9 3A
+; Routine: Menu_TransferVramDataPath_DDD2
+; Global: Reachable code entry at CPU $DDD2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DDD2:
+    sta PPUDATA                      ; ROM $001DE2: 8D 07 20
+    dex                              ; ROM $001DE5: CA
+    bne Menu_TransferVramDataPath_DDD2                 ; ROM $001DE6: D0 FA
+    lda #$20                         ; ROM $001DE8: A9 20
+    ldx #$41                         ; ROM $001DEA: A2 41
+    jsr SetPpuAddress                 ; ROM $001DEC: 20 96 C1
+    ldx #$03                         ; ROM $001DEF: A2 03
+; Routine: Menu_TransferVramDataPath_DDE1
+; Global: Reachable code entry at CPU $DDE1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DDE1:
+    lda $DE15,x                      ; ROM $001DF1: BD 15 DE
+    sta PPUDATA                      ; ROM $001DF4: 8D 07 20
+    dex                              ; ROM $001DF7: CA
+    bpl Menu_TransferVramDataPath_DDE1                 ; ROM $001DF8: 10 F7
+    lda #$3A                         ; ROM $001DFA: A9 3A
+    sta PPUDATA                      ; ROM $001DFC: 8D 07 20
+    lda #$20                         ; ROM $001DFF: A9 20
+    ldx #$52                         ; ROM $001E01: A2 52
+    jsr SetPpuAddress                 ; ROM $001E03: 20 96 C1
+    lda #$30                         ; ROM $001E06: A9 30
+    sta PPUDATA                      ; ROM $001E08: 8D 07 20
+    sta PPUDATA                      ; ROM $001E0B: 8D 07 20
+    lda #$20                         ; ROM $001E0E: A9 20
+    ldx #$58                         ; ROM $001E10: A2 58
+    jsr SetPpuAddress                 ; ROM $001E12: 20 96 C1
+    ldx #$03                         ; ROM $001E15: A2 03
+; Routine: Menu_TransferVramDataPath_DE07
+; Global: Reachable code entry at CPU $DE07 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DE07:
+    lda $DE19,x                      ; ROM $001E17: BD 19 DE
+    sta PPUDATA                      ; ROM $001E1A: 8D 07 20
+    dex                              ; ROM $001E1D: CA
+    bpl Menu_TransferVramDataPath_DE07                 ; ROM $001E1E: 10 F7
+    lda $68                          ; ROM $001E20: A5 68
+    jmp Menu_HandleControl_DF5D                 ; ROM $001E22: 4C 5D DF
+
+; Data region: CPU $DE15-$DE1C; unreachable by direct recursive trace.
+StatusScreenTextPointerTable:
+    .byte $45, $4D, $49, $54, $54, $46, $45, $4C                                         ; ROM $001E25: 45 4D 49 54 54 46 45 4C
+; Routine: Menu_WriteZp0E_DE1D
+; Global: Reachable code entry at CPU $DE1D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteZp0E_DE1D:
+    jsr DisableRendering                 ; ROM $001E2D: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $001E30: 20 B9 C2
+    lda #$00                         ; ROM $001E33: A9 00
+    sta $0E                          ; ROM $001E35: 85 0E
+    jsr UploadMenuPalette                 ; ROM $001E37: 20 27 DF
+    lda #$21                         ; ROM $001E3A: A9 21
+    ldx #$EA                         ; ROM $001E3C: A2 EA
+    jsr SetPpuAddress                 ; ROM $001E3E: 20 96 C1
+    ldx #$04                         ; ROM $001E41: A2 04
+; Routine: Menu_TransferVramDataPath_DE33
+; Global: Reachable code entry at CPU $DE33 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DE33:
+    lda $DE4E,x                      ; ROM $001E43: BD 4E DE
+    sta PPUDATA                      ; ROM $001E46: 8D 07 20
+    dex                              ; ROM $001E49: CA
+    bpl Menu_TransferVramDataPath_DE33                 ; ROM $001E4A: 10 F7
+    lda #$21                         ; ROM $001E4C: A9 21
+    ldx #$F0                         ; ROM $001E4E: A2 F0
+    jsr SetPpuAddress                 ; ROM $001E50: 20 96 C1
+    lda $58                          ; ROM $001E53: A5 58
+    jsr Menu_HandleControl_DF5D                 ; ROM $001E55: 20 5D DF
+    jsr EnableNmiInPpuControl                 ; ROM $001E58: 20 B0 C2
+    jmp Ppu_CallHelper_C23B                 ; ROM $001E5B: 4C 3B C2
+
+; Data region: CPU $DE4E-$DE52; unreachable by direct recursive trace.
+StatusScreenValueAddressTable:
+    .byte $45, $47, $41, $54, $53                                                        ; ROM $001E5E: 45 47 41 54 53
+; Routine: Menu_WriteZp0E_DE53
+; Global: Reachable code entry at CPU $DE53 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_WriteZp0E_DE53:
+    jsr DisableRendering                 ; ROM $001E63: 20 57 C2
+    jsr Ppu_HandleControl_C2B9                 ; ROM $001E66: 20 B9 C2
+    lda #$00                         ; ROM $001E69: A9 00
+    sta $0E                          ; ROM $001E6B: 85 0E
+    jsr UploadMenuPalette                 ; ROM $001E6D: 20 27 DF
+    lda #$21                         ; ROM $001E70: A9 21
+    ldx #$EA                         ; ROM $001E72: A2 EA
+    jsr SetPpuAddress                 ; ROM $001E74: 20 96 C1
+    ldx #$0A                         ; ROM $001E77: A2 0A
+; Routine: Menu_TransferVramDataPath_DE69
+; Global: Reachable code entry at CPU $DE69 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DE69:
+    lda $DE78,x                      ; ROM $001E79: BD 78 DE
+    sta PPUDATA                      ; ROM $001E7C: 8D 07 20
+    dex                              ; ROM $001E7F: CA
+    bpl Menu_TransferVramDataPath_DE69                 ; ROM $001E80: 10 F7
+    jsr EnableNmiInPpuControl                 ; ROM $001E82: 20 B0 C2
+    jmp Ppu_CallHelper_C23B                 ; ROM $001E85: 4C 3B C2
+
+; Data region: CPU $DE78-$DE82; unreachable by direct recursive trace.
+StatusScreenPaletteAddressTable:
+    .byte $45, $47, $41, $54, $53, $3A, $53, $55, $4E, $4F, $42                          ; ROM $001E88: 45 47 41 54 53 3A 53 55 4E 4F 42
+; Routine: ComposeStatusScreen
+; Global: Reachable code entry at CPU $DE83 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+ComposeStatusScreen:
+    jsr DisableRendering                 ; ROM $001E93: 20 57 C2
+    jsr Ppu_HandleControl_C215                 ; ROM $001E96: 20 15 C2
+    jsr WaitForVBlankTransition                 ; ROM $001E99: 20 8B C2
+    lda #$3F                         ; ROM $001E9C: A9 3F
+    ldx #$00                         ; ROM $001E9E: A2 00
+    jsr SetPpuAddress                 ; ROM $001EA0: 20 96 C1
+    ldx #$00                         ; ROM $001EA3: A2 00
+; Routine: Menu_TransferVramDataPath_DE95
+; Global: Reachable code entry at CPU $DE95 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DE95:
+    lda $DF90,x                      ; ROM $001EA5: BD 90 DF
+    sta PPUDATA                      ; ROM $001EA8: 8D 07 20
+    inx                              ; ROM $001EAB: E8
+    cpx #$10                         ; ROM $001EAC: E0 10
+    bne Menu_TransferVramDataPath_DE95                 ; ROM $001EAE: D0 F5
+    jsr Ppu_SetVramAddress_C2D6                 ; ROM $001EB0: 20 D6 C2
+    jsr RenderEncodedTextRecords                 ; ROM $001EB3: 20 C0 E1
+    lda #$20                         ; ROM $001EB6: A9 20
+    ldx #$00                         ; ROM $001EB8: A2 00
+    jsr SetPpuAddress                 ; ROM $001EBA: 20 96 C1
+    ldx #$40                         ; ROM $001EBD: A2 40
+    lda #$B0                         ; ROM $001EBF: A9 B0
+; Routine: Menu_TransferVramDataPath_DEB1
+; Global: Reachable code entry at CPU $DEB1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DEB1:
+    sta PPUDATA                      ; ROM $001EC1: 8D 07 20
+    dex                              ; ROM $001EC4: CA
+    bne Menu_TransferVramDataPath_DEB1                 ; ROM $001EC5: D0 FA
+    ldx #$00                         ; ROM $001EC7: A2 00
+; Routine: Menu_TransferVramDataPath_DEB9
+; Global: Reachable code entry at CPU $DEB9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DEB9:
+    lda $DFB0,x                      ; ROM $001EC9: BD B0 DF
+    sta PPUDATA                      ; ROM $001ECC: 8D 07 20
+    inx                              ; ROM $001ECF: E8
+    bne Menu_TransferVramDataPath_DEB9                 ; ROM $001ED0: D0 F7
+; Routine: Menu_TransferVramDataPath_DEC2
+; Global: Reachable code entry at CPU $DEC2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DEC2:
+    lda $E0B0,x                      ; ROM $001ED2: BD B0 E0
+    sta PPUDATA                      ; ROM $001ED5: 8D 07 20
+    inx                              ; ROM $001ED8: E8
+    bne Menu_TransferVramDataPath_DEC2                 ; ROM $001ED9: D0 F7
+    lda #$22                         ; ROM $001EDB: A9 22
+    ldx #$AE                         ; ROM $001EDD: A2 AE
+    jsr SetPpuAddress                 ; ROM $001EDF: 20 96 C1
+    ldx #$00                         ; ROM $001EE2: A2 00
+; Routine: Menu_TransferVramDataPath_DED4
+; Global: Reachable code entry at CPU $DED4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DED4:
+    lda $01,x                        ; ROM $001EE4: B5 01
+    bne Menu_TransferVramDataPath_DEE4                 ; ROM $001EE6: D0 0C
+    lda #$3A                         ; ROM $001EE8: A9 3A
+    sta PPUDATA                      ; ROM $001EEA: 8D 07 20
+    inx                              ; ROM $001EED: E8
+    cpx #$07                         ; ROM $001EEE: E0 07
+    bne Menu_TransferVramDataPath_DED4                 ; ROM $001EF0: D0 F2
+    beq Menu_TransferVramDataPath_DEF1                 ; ROM $001EF2: F0 0D
+; Routine: Menu_TransferVramDataPath_DEE4
+; Global: Reachable code entry at CPU $DEE4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DEE4:
+    lda $01,x                        ; ROM $001EF4: B5 01
+    clc                              ; ROM $001EF6: 18
+    adc #$30                         ; ROM $001EF7: 69 30
+    sta PPUDATA                      ; ROM $001EF9: 8D 07 20
+    inx                              ; ROM $001EFC: E8
+    cpx #$07                         ; ROM $001EFD: E0 07
+    bne Menu_TransferVramDataPath_DEE4                 ; ROM $001EFF: D0 F3
+; Routine: Menu_TransferVramDataPath_DEF1
+; Global: Reachable code entry at CPU $DEF1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DEF1:
+    lda #$30                         ; ROM $001F01: A9 30
+    sta PPUDATA                      ; ROM $001F03: 8D 07 20
+    sta PPUDATA                      ; ROM $001F06: 8D 07 20
+    lda #$23                         ; ROM $001F09: A9 23
+    ldx #$C0                         ; ROM $001F0B: A2 C0
+    jsr SetPpuAddress                 ; ROM $001F0D: 20 96 C1
+    ldx #$20                         ; ROM $001F10: A2 20
+    lda #$00                         ; ROM $001F12: A9 00
+; Routine: Menu_TransferVramDataPath_DF04
+; Global: Reachable code entry at CPU $DF04 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF04:
+    sta PPUDATA                      ; ROM $001F14: 8D 07 20
+    dex                              ; ROM $001F17: CA
+    bne Menu_TransferVramDataPath_DF04                 ; ROM $001F18: D0 FA
+    ldx #$08                         ; ROM $001F1A: A2 08
+    lda #$50                         ; ROM $001F1C: A9 50
+; Routine: Menu_TransferVramDataPath_DF0E
+; Global: Reachable code entry at CPU $DF0E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF0E:
+    sta PPUDATA                      ; ROM $001F1E: 8D 07 20
+    dex                              ; ROM $001F21: CA
+    bne Menu_TransferVramDataPath_DF0E                 ; ROM $001F22: D0 FA
+    ldx #$18                         ; ROM $001F24: A2 18
+    lda #$55                         ; ROM $001F26: A9 55
+; Routine: Menu_TransferVramDataPath_DF18
+; Global: Reachable code entry at CPU $DF18 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF18:
+    sta PPUDATA                      ; ROM $001F28: 8D 07 20
+    dex                              ; ROM $001F2B: CA
+    bne Menu_TransferVramDataPath_DF18                 ; ROM $001F2C: D0 FA
+    jsr CommitPpuStateAndScroll                 ; ROM $001F2E: 20 96 C2
+    jsr EnableNmiInPpuControl                 ; ROM $001F31: 20 B0 C2
+    jmp Ppu_CallHelper_C23B                 ; ROM $001F34: 4C 3B C2
+; Routine: UploadMenuPalette
+; Global: Reachable code entry at CPU $DF27 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+UploadMenuPalette:
+    lda #$00                         ; ROM $001F37: A9 00
+    sta $0E                          ; ROM $001F39: 85 0E
+    jsr WaitForVBlankTransition                 ; ROM $001F3B: 20 8B C2
+    lda #$3F                         ; ROM $001F3E: A9 3F
+    ldx #$00                         ; ROM $001F40: A2 00
+    jsr SetPpuAddress                 ; ROM $001F42: 20 96 C1
+    ldx #$00                         ; ROM $001F45: A2 00
+; Routine: Menu_TransferVramDataPath_DF37
+; Global: Reachable code entry at CPU $DF37 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF37:
+    lda $DF8C,x                      ; ROM $001F47: BD 8C DF
+    sta PPUDATA                      ; ROM $001F4A: 8D 07 20
+    inx                              ; ROM $001F4D: E8
+    cpx #$10                         ; ROM $001F4E: E0 10
+    bne Menu_TransferVramDataPath_DF37                 ; ROM $001F50: D0 F5
+    jsr Ppu_SetVramAddress_C2D6                 ; ROM $001F52: 20 D6 C2
+    jmp Ppu_HandleControl_C215                 ; ROM $001F55: 4C 15 C2
+; Routine: Menu_HandleControl_DF48
+; Global: Reachable code entry at CPU $DF48 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF48:
+    ldy #$30                         ; ROM $001F58: A0 30
+    sec                              ; ROM $001F5A: 38
+; Routine: Menu_HandleControl_DF4B
+; Global: Reachable code entry at CPU $DF4B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF4B:
+    sbc #$64                         ; ROM $001F5B: E9 64
+    bcc Menu_TransferVramDataPath_DF52                 ; ROM $001F5D: 90 03
+    iny                              ; ROM $001F5F: C8
+    bne Menu_HandleControl_DF4B                 ; ROM $001F60: D0 F9
+; Routine: Menu_TransferVramDataPath_DF52
+; Global: Reachable code entry at CPU $DF52 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF52:
+    adc #$64                         ; ROM $001F62: 69 64
+    cpy #$30                         ; ROM $001F64: C0 30
+    bne Menu_TransferVramDataPath_DF76                 ; ROM $001F66: D0 1E
+    ldy #$3A                         ; ROM $001F68: A0 3A
+    sty PPUDATA                      ; ROM $001F6A: 8C 07 20
+; Routine: Menu_HandleControl_DF5D
+; Global: Reachable code entry at CPU $DF5D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF5D:
+    ldy #$30                         ; ROM $001F6D: A0 30
+    sec                              ; ROM $001F6F: 38
+; Routine: Menu_HandleControl_DF60
+; Global: Reachable code entry at CPU $DF60 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF60:
+    sbc #$0A                         ; ROM $001F70: E9 0A
+    bcc Menu_HandleControl_DF67                 ; ROM $001F72: 90 03
+    iny                              ; ROM $001F74: C8
+    bne Menu_HandleControl_DF60                 ; ROM $001F75: D0 F9
+; Routine: Menu_HandleControl_DF67
+; Global: Reachable code entry at CPU $DF67 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF67:
+    adc #$3A                         ; ROM $001F77: 69 3A
+    cpy #$30                         ; ROM $001F79: C0 30
+    bne Menu_TransferVramDataPath_DF6F                 ; ROM $001F7B: D0 02
+    ldy #$3A                         ; ROM $001F7D: A0 3A
+; Routine: Menu_TransferVramDataPath_DF6F
+; Global: Reachable code entry at CPU $DF6F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF6F:
+    sty PPUDATA                      ; ROM $001F7F: 8C 07 20
+    sta PPUDATA                      ; ROM $001F82: 8D 07 20
+    rts                              ; ROM $001F85: 60
+; Routine: Menu_TransferVramDataPath_DF76
+; Global: Reachable code entry at CPU $DF76 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF76:
+    sty PPUDATA                      ; ROM $001F86: 8C 07 20
+    ldy #$30                         ; ROM $001F89: A0 30
+    sec                              ; ROM $001F8B: 38
+; Routine: Menu_HandleControl_DF7C
+; Global: Reachable code entry at CPU $DF7C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_HandleControl_DF7C:
+    sbc #$0A                         ; ROM $001F8C: E9 0A
+    bcc Menu_TransferVramDataPath_DF83                 ; ROM $001F8E: 90 03
+    iny                              ; ROM $001F90: C8
+    bne Menu_HandleControl_DF7C                 ; ROM $001F91: D0 F9
+; Routine: Menu_TransferVramDataPath_DF83
+; Global: Reachable code entry at CPU $DF83 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Menu_TransferVramDataPath_DF83:
+    adc #$3A                         ; ROM $001F93: 69 3A
+    sty PPUDATA                      ; ROM $001F95: 8C 07 20
+    sta PPUDATA                      ; ROM $001F98: 8D 07 20
+    rts                              ; ROM $001F9B: 60
+
+; Data region: CPU $DF8C-$E1BF; unreachable by direct recursive trace.
+MenuPaletteAndScreenData:
+    .byte $0F, $00, $0F, $30, $0F, $05, $30, $28, $0F, $00, $0F, $30, $0F, $06, $26, $37 ; ROM $001F9C: 0F 00 0F 30 0F 05 30 28 0F 00 0F 30 0F 06 26 37
+    .byte $0F, $0F, $0F, $0F, $05, $00, $09, $04, $0D, $07, $02, $06, $0A, $0F, $0C, $03 ; ROM $001FAC: 0F 0F 0F 0F 05 00 09 04 0D 07 02 06 0A 0F 0C 03
+    .byte $08, $0B, $0E, $01, $B0, $B0, $DF, $C0, $C1, $C1, $C2, $C0, $C1, $C1, $C1, $C2 ; ROM $001FBC: 08 0B 0E 01 B0 B0 DF C0 C1 C1 C2 C0 C1 C1 C1 C2
+    .byte $C0, $B6, $E9, $B8, $C2, $C0, $C1, $C1, $C2, $C0, $C1, $C1, $C2, $C0, $C1, $C1 ; ROM $001FCC: C0 B6 E9 B8 C2 C0 C1 C1 C2 C0 C1 C1 C2 C0 C1 C1
+    .byte $C2, $E9, $F8, $B0, $B0, $B0, $DF, $C1, $D9, $D3, $B3, $C1, $D9, $CB, $D3, $B3 ; ROM $001FDC: C2 E9 F8 B0 B0 B0 DF C1 D9 D3 B3 C1 D9 CB D3 B3
+    .byte $C1, $C5, $C6, $C1, $B3, $C1, $D9, $D3, $B3, $C1, $D9, $CB, $CB, $C1, $D9, $D3 ; ROM $001FEC: C1 C5 C6 C1 B3 C1 D9 D3 B3 C1 D9 CB CB C1 D9 D3
+    .byte $B3, $EE, $F8, $B0, $B0, $B0, $DF, $C1, $D0, $D1, $D2, $C1, $CF, $E9, $C4, $B3 ; ROM $001FFC: B3 EE F8 B0 B0 B0 DF C1 D0 D1 D2 C1 CF E9 C4 B3
+    .byte $C1, $D5, $D6, $D7, $B3, $C1, $D0, $D1, $D2, $C1, $D0, $DC, $E9, $C1, $D0, $D1 ; ROM $00200C: C1 D5 D6 D7 B3 C1 D0 D1 D2 C1 D0 DC E9 C1 D0 D1
+    .byte $D2, $EB, $F8, $B0, $B0, $B0, $DF, $C1, $E0, $E1, $E2, $C1, $CF, $E9, $C4, $B3 ; ROM $00201C: D2 EB F8 B0 B0 B0 DF C1 E0 E1 E2 C1 CF E9 C4 B3
+    .byte $C1, $B7, $E6, $E7, $B3, $C1, $E0, $E1, $E2, $C1, $E0, $F5, $EC, $C1, $E0, $E1 ; ROM $00202C: C1 B7 E6 E7 B3 C1 E0 E1 E2 C1 E0 F5 EC C1 E0 E1
+    .byte $E2, $EF, $F8, $B0, $B0, $B0, $DF, $C1, $E8, $DA, $B3, $C1, $CF, $E9, $C4, $B3 ; ROM $00203C: E2 EF F8 B0 B0 B0 DF C1 E8 DA B3 C1 CF E9 C4 B3
+    .byte $C1, $CF, $E5, $F0, $B3, $C1, $E8, $DA, $B3, $C1, $E8, $DB, $ED, $C1, $E8, $DA ; ROM $00204C: C1 CF E5 F0 B3 C1 E8 DA B3 C1 E8 DB ED C1 E8 DA
+    .byte $B3, $EB, $F8, $B0, $B0, $B0, $DF, $C1, $B5, $E3, $B3, $C1, $B5, $E9, $E3, $B3 ; ROM $00205C: B3 EB F8 B0 B0 B0 DF C1 B5 E3 B3 C1 B5 E9 E3 B3
+    .byte $C1, $CF, $E9, $C4, $B3, $C1, $B5, $E3, $B3, $C1, $B5, $E9, $E9, $C1, $CF, $C4 ; ROM $00206C: C1 CF E9 C4 B3 C1 B5 E3 B3 C1 B5 E9 E9 C1 CF C4
+    .byte $B3, $EB, $F8, $B0, $B0, $B0, $DF, $B1, $C1, $F1, $C3, $C7, $C1, $C1, $F1, $C3 ; ROM $00207C: B3 EB F8 B0 B0 B0 DF B1 C1 F1 C3 C7 C1 C1 F1 C3
+    .byte $B4, $CF, $E9, $B2, $C3, $C7, $C1, $F1, $C3, $C7, $C1, $C1, $C3, $B4, $CF, $B2 ; ROM $00208C: B4 CF E9 B2 C3 C7 C1 F1 C3 C7 C1 C1 C3 B4 CF B2
+    .byte $C3, $EB, $F8, $B0, $B0, $B0, $DF, $CA, $CB, $CB, $CB, $CE, $CB, $CB, $CB, $CB ; ROM $00209C: C3 EB F8 B0 B0 B0 DF CA CB CB CB CE CB CB CB CB
+    .byte $CE, $D8, $E9, $E9, $EA, $CE, $CB, $CB, $CB, $CE, $CB, $CB, $CB, $CE, $D8, $E9 ; ROM $0020AC: CE D8 E9 E9 EA CE CB CB CB CE CB CB CB CE D8 E9
+    .byte $EA, $CD, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C0, $B6 ; ROM $0020BC: EA CD F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C0 B6
+    .byte $E9, $B8, $C2, $C0, $C1, $C1, $C2, $C0, $BC, $E4, $C2, $E9, $E9, $E9, $E9, $E9 ; ROM $0020CC: E9 B8 C2 C0 C1 C1 C2 C0 BC E4 C2 E9 E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C1, $C5 ; ROM $0020DC: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C1 C5
+    .byte $C6, $C1, $B3, $C1, $D9, $D3, $B3, $C1, $BD, $C4, $B3, $EE, $FB, $FC, $E9, $E9 ; ROM $0020EC: C6 C1 B3 C1 D9 D3 B3 C1 BD C4 B3 EE FB FC E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C1, $D5 ; ROM $0020FC: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C1 D5
+    .byte $D6, $D7, $B3, $C1, $D0, $D1, $B3, $C1, $BE, $F2, $B3, $EB, $E9, $E9, $E9, $E9 ; ROM $00210C: D6 D7 B3 C1 D0 D1 B3 C1 BE F2 B3 EB E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C1, $B7 ; ROM $00211C: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C1 B7
+    .byte $E6, $E7, $B3, $C1, $E0, $E1, $B3, $C1, $B9, $BF, $B3, $EB, $E9, $E9, $E9, $E9 ; ROM $00212C: E6 E7 B3 C1 E0 E1 B3 C1 B9 BF B3 EB E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C1, $CF ; ROM $00213C: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C1 CF
+    .byte $E5, $F0, $B3, $C1, $E8, $DA, $B3, $C1, $BB, $C8, $B3, $EB, $E9, $E9, $E9, $E9 ; ROM $00214C: E5 F0 B3 C1 E8 DA B3 C1 BB C8 B3 EB E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $C1, $CF ; ROM $00215C: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 C1 CF
+    .byte $E9, $C4, $B3, $C1, $CF, $C4, $B3, $C1, $C9, $C1, $B3, $EB, $E9, $E9, $E9, $E9 ; ROM $00216C: E9 C4 B3 C1 CF C4 B3 C1 C9 C1 B3 EB E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $D4, $CF ; ROM $00217C: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 D4 CF
+    .byte $E9, $B2, $C3, $B4, $CF, $B2, $C3, $B4, $CF, $BA, $C3, $EB, $E9, $E9, $E9, $E9 ; ROM $00218C: E9 B2 C3 B4 CF B2 C3 B4 CF BA C3 EB E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $DF, $E9, $E9, $E9, $E9, $E9, $E9, $E9, $CA, $D8 ; ROM $00219C: E9 E9 F8 B0 B0 B0 DF E9 E9 E9 E9 E9 E9 E9 CA D8
+    .byte $E9, $E9, $EA, $CE, $D8, $E9, $EA, $CE, $D8, $F3, $CB, $CD, $E9, $E9, $E9, $E9 ; ROM $0021AC: E9 E9 EA CE D8 E9 EA CE D8 F3 CB CD E9 E9 E9 E9
+    .byte $E9, $E9, $F8, $B0, $B0, $B0, $F4, $F9, $F9, $F9, $F9, $F9, $F9, $F9, $F9, $F9 ; ROM $0021BC: E9 E9 F8 B0 B0 B0 F4 F9 F9 F9 F9 F9 F9 F9 F9 F9
+    .byte $F9, $F9, $F9, $F9                                                             ; ROM $0021CC: F9 F9 F9 F9
+; Routine: RenderEncodedTextRecords
+; Global: Reachable code entry at CPU $E1C0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+RenderEncodedTextRecords:
+    ldy #$00                         ; ROM $0021D0: A0 00
+    ldx #$05                         ; ROM $0021D2: A2 05
+; Routine: Gameplay_SetVramAddressPath_E1C4
+; Global: Reachable code entry at CPU $E1C4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_SetVramAddressPath_E1C4:
+    jsr Gameplay_ReadRamE1E5_E1E0                 ; ROM $0021D4: 20 E0 E1
+    sta PPUADDR                      ; ROM $0021D7: 8D 06 20
+    jsr Gameplay_ReadRamE1E5_E1E0                 ; ROM $0021DA: 20 E0 E1
+    sta PPUADDR                      ; ROM $0021DD: 8D 06 20
+; Routine: Gameplay_TransferVramDataPath_E1D0
+; Global: Reachable code entry at CPU $E1D0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_TransferVramDataPath_E1D0:
+    jsr Gameplay_ReadRamE1E5_E1E0                 ; ROM $0021E0: 20 E0 E1
+    cmp #$FF                         ; ROM $0021E3: C9 FF
+    beq Gameplay_RetreatIndexX_E1DC                 ; ROM $0021E5: F0 05
+    sta PPUDATA                      ; ROM $0021E7: 8D 07 20
+    bne Gameplay_TransferVramDataPath_E1D0                 ; ROM $0021EA: D0 F4
+; Routine: Gameplay_RetreatIndexX_E1DC
+; Global: Reachable code entry at CPU $E1DC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_RetreatIndexX_E1DC:
+    dex                              ; ROM $0021EC: CA
+    bne Gameplay_SetVramAddressPath_E1C4                 ; ROM $0021ED: D0 E5
+    rts                              ; ROM $0021EF: 60
+; Routine: Gameplay_ReadRamE1E5_E1E0
+; Global: Reachable code entry at CPU $E1E0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRamE1E5_E1E0:
+    lda $E1E5,y                      ; ROM $0021F0: B9 E5 E1
+    iny                              ; ROM $0021F3: C8
+    rts                              ; ROM $0021F4: 60
+
+; Data region: CPU $E1E5-$E2BC; unreachable by direct recursive trace.
+TitleAndCopyrightText:
+    .byte $22, $69, $53, $54, $41, $52, $54, $B0, $B0, $B0, $43, $4F, $4E, $54, $49, $4E ; ROM $0021F5: 22 69 53 54 41 52 54 B0 B0 B0 43 4F 4E 54 49 4E
+    .byte $55, $45, $FF, $22, $AA, $54, $4F, $50, $FF, $22, $E3, $54, $4D, $B0, $41, $4E ; ROM $002205: 55 45 FF 22 AA 54 4F 50 FF 22 E3 54 4D B0 41 4E
+    .byte $44, $B0, $FE, $B0, $31, $39, $38, $37, $B0, $48, $55, $44, $53, $4F, $4E, $B0 ; ROM $002215: 44 B0 FE B0 31 39 38 37 B0 48 55 44 53 4F 4E B0
+    .byte $53, $4F, $46, $54, $FF, $23, $2A, $4C, $49, $43, $45, $4E, $53, $45, $44, $B0 ; ROM $002225: 53 4F 46 54 FF 23 2A 4C 49 43 45 4E 53 45 44 B0
+    .byte $42, $59, $FF, $23, $64, $4E, $49, $4E, $54, $45, $4E, $44, $4F, $B0, $4F, $46 ; ROM $002235: 42 59 FF 23 64 4E 49 4E 54 45 4E 44 4F B0 4F 46
+    .byte $B0, $41, $4D, $45, $52, $49, $43, $41, $B0, $49, $4E, $43, $FD, $FF, $01, $01 ; ROM $002245: B0 41 4D 45 52 49 43 41 B0 49 4E 43 FD FF 01 01
+    .byte $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01 ; ROM $002255: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
+    .byte $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $01, $00 ; ROM $002265: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $002275: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $01, $01, $01, $00 ; ROM $002285: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 01 00
+    .byte $01, $00, $01, $00, $01, $00, $01, $00, $01, $00, $01, $00, $01, $00, $01, $00 ; ROM $002295: 01 00 01 00 01 00 01 00 01 00 01 00 01 00 01 00
+    .byte $01, $00, $01, $00, $01, $00, $01, $00, $01, $00, $01, $00, $01, $01, $00, $20 ; ROM $0022A5: 01 00 01 00 01 00 01 00 01 00 01 00 01 01 00 20
+    .byte $40, $60, $80, $A0, $C0, $E0, $00, $20, $40, $60, $80, $02, $02, $02, $02, $02 ; ROM $0022B5: 40 60 80 A0 C0 E0 00 20 40 60 80 02 02 02 02 02
+    .byte $02, $02, $02, $03, $03, $03, $03, $03                                         ; ROM $0022C5: 02 02 02 03 03 03 03 03
+; Routine: Gameplay_ReadObjectMode_E2BD
+; Global: Reachable code entry at CPU $E2BD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadObjectMode_E2BD:
+    lda $73                          ; ROM $0022CD: A5 73
+    lsr a                            ; ROM $0022CF: 4A
+    lsr a                            ; ROM $0022D0: 4A
+    lsr a                            ; ROM $0022D1: 4A
+    lsr a                            ; ROM $0022D2: 4A
+    sta $DC                          ; ROM $0022D3: 85 DC
+    lda $58                          ; ROM $0022D5: A5 58
+    and #$0F                         ; ROM $0022D7: 29 0F
+    sta $DD                          ; ROM $0022D9: 85 DD
+    lda $58                          ; ROM $0022DB: A5 58
+    lsr a                            ; ROM $0022DD: 4A
+    lsr a                            ; ROM $0022DE: 4A
+    lsr a                            ; ROM $0022DF: 4A
+    lsr a                            ; ROM $0022E0: 4A
+    sta $DE                          ; ROM $0022E1: 85 DE
+    ldy #$00                         ; ROM $0022E3: A0 00
+    ldx #$00                         ; ROM $0022E5: A2 00
+    lda #$03                         ; ROM $0022E7: A9 03
+    sta $1F                          ; ROM $0022E9: 85 1F
+; Routine: Gameplay_ReadObjectWorkX_E2DB
+; Global: Reachable code entry at CPU $E2DB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadObjectWorkX_E2DB:
+    jsr Gameplay_WriteWorkValue_E33C                 ; ROM $0022EB: 20 3C E3
+    jsr Gameplay_ReadRamE360_E353                 ; ROM $0022EE: 20 53 E3
+    lda $24                          ; ROM $0022F1: A5 24
+    sta ($34),y                      ; ROM $0022F3: 91 34
+    dec $1F                          ; ROM $0022F5: C6 1F
+    bne Gameplay_ReadObjectWorkX_E2DB                 ; ROM $0022F7: D0 F2
+    jsr Gameplay_WriteWorkValue_E33C                 ; ROM $0022F9: 20 3C E3
+    lda $99                          ; ROM $0022FC: A5 99
+    asl a                            ; ROM $0022FE: 0A
+    clc                              ; ROM $0022FF: 18
+    adc $24                          ; ROM $002300: 65 24
+    sta $24                          ; ROM $002302: 85 24
+    lda $9A                          ; ROM $002304: A5 9A
+    asl a                            ; ROM $002306: 0A
+    clc                              ; ROM $002307: 18
+    adc $24                          ; ROM $002308: 65 24
+    sta $24                          ; ROM $00230A: 85 24
+    lda $9B                          ; ROM $00230C: A5 9B
+    asl a                            ; ROM $00230E: 0A
+    clc                              ; ROM $00230F: 18
+    adc $24                          ; ROM $002310: 65 24
+    sta $95                          ; ROM $002312: 85 95
+    ldy #$00                         ; ROM $002314: A0 00
+    sty RandomState0                          ; ROM $002316: 84 54
+    ldx #$00                         ; ROM $002318: A2 00
+; Routine: Gameplay_ReadTransferPointer_E30A
+; Global: Reachable code entry at CPU $E30A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadTransferPointer_E30A:
+    jsr Gameplay_ReadRamE360_E353                 ; ROM $00231A: 20 53 E3
+    lda ($34),y                      ; ROM $00231D: B1 34
+    and #$0F                         ; ROM $00231F: 29 0F
+    sec                              ; ROM $002321: 38
+    sbc RandomState0                          ; ROM $002322: E5 54
+    sec                              ; ROM $002324: 38
+    sbc #$07                         ; ROM $002325: E9 07
+    and #$0F                         ; ROM $002327: 29 0F
+    sta $0180,x                      ; ROM $002329: 9D 80 01
+    sta RandomState0                          ; ROM $00232C: 85 54
+    cpx #$28                         ; ROM $00232E: E0 28
+    bne Gameplay_ReadTransferPointer_E30A                 ; ROM $002330: D0 E8
+    lda #$23                         ; ROM $002332: A9 23
+    ldx #$06                         ; ROM $002334: A2 06
+    jsr SetPpuAddress                 ; ROM $002336: 20 96 C1
+    ldx #$02                         ; ROM $002339: A2 02
+; Routine: Gameplay_TransferVramDataPath_E32B
+; Global: Reachable code entry at CPU $E32B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_TransferVramDataPath_E32B:
+    lda $0180,x                      ; ROM $00233B: BD 80 01
+    tay                              ; ROM $00233E: A8
+    lda $E388,y                      ; ROM $00233F: B9 88 E3
+    sta PPUDATA                      ; ROM $002342: 8D 07 20
+    inx                              ; ROM $002345: E8
+    inx                              ; ROM $002346: E8
+    cpx #$2A                         ; ROM $002347: E0 2A
+    bne Gameplay_TransferVramDataPath_E32B                 ; ROM $002349: D0 F0
+    rts                              ; ROM $00234B: 60
+; Routine: Gameplay_WriteWorkValue_E33C
+; Global: Reachable code entry at CPU $E33C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteWorkValue_E33C:
+    lda #$04                         ; ROM $00234C: A9 04
+    sta $20                          ; ROM $00234E: 85 20
+    lda #$00                         ; ROM $002350: A9 00
+    sta $24                          ; ROM $002352: 85 24
+; Routine: Gameplay_ReadTransferPointer_E344
+; Global: Reachable code entry at CPU $E344 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadTransferPointer_E344:
+    jsr Gameplay_ReadRamE360_E353                 ; ROM $002354: 20 53 E3
+    lda ($34),y                      ; ROM $002357: B1 34
+    clc                              ; ROM $002359: 18
+    adc $24                          ; ROM $00235A: 65 24
+    sta $24                          ; ROM $00235C: 85 24
+    dec $20                          ; ROM $00235E: C6 20
+    bne Gameplay_ReadTransferPointer_E344                 ; ROM $002360: D0 F2
+    rts                              ; ROM $002362: 60
+; Routine: Gameplay_ReadRamE360_E353
+; Global: Reachable code entry at CPU $E353 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRamE360_E353:
+    lda $E360,x                      ; ROM $002363: BD 60 E3
+    sta $34                          ; ROM $002366: 85 34
+    inx                              ; ROM $002368: E8
+    lda $E360,x                      ; ROM $002369: BD 60 E3
+    sta $35                          ; ROM $00236C: 85 35
+    inx                              ; ROM $00236E: E8
+    rts                              ; ROM $00236F: 60
+
+; Data region: CPU $E360-$E397; unreachable by direct recursive trace.
+GameplayScoreThresholdTable:
+    .byte $67, $00, $77, $00, $DD, $00, $61, $00, $99, $00, $66, $00, $DC, $00, $64, $00 ; ROM $002370: 67 00 77 00 DD 00 61 00 99 00 66 00 DC 00 64 00
+    .byte $79, $00, $9A, $00, $74, $00, $63, $00, $75, $00, $62, $00, $9B, $00, $65, $00 ; ROM $002380: 79 00 9A 00 74 00 63 00 75 00 62 00 9B 00 65 00
+    .byte $94, $00, $DE, $00, $76, $00, $95, $00, $41, $4F, $46, $4B, $43, $50, $47, $45 ; ROM $002390: 94 00 DE 00 76 00 95 00 41 4F 46 4B 43 50 47 45
+    .byte $4C, $42, $48, $4D, $4A, $44, $4E, $49                                         ; ROM $0023A0: 4C 42 48 4D 4A 44 4E 49
+; Routine: Gameplay_ReturnToCaller_E398
+; Global: Reachable code entry at CPU $E398 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_E398:
+    rts                              ; ROM $0023A8: 60
+; Routine: Gameplay_ReadStageProgress_E399
+; Global: Reachable code entry at CPU $E399 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadStageProgress_E399:
+    lda $9C                          ; ROM $0023A9: A5 9C
+    bne Gameplay_ReadPlayerState_E3A7                 ; ROM $0023AB: D0 0A
+    lda $B1                          ; ROM $0023AD: A5 B1
+    bne Gameplay_ReadPlayerState_E3A7                 ; ROM $0023AF: D0 06
+    inc $B1                          ; ROM $0023B1: E6 B1
+    lda #$06                         ; ROM $0023B3: A9 06
+    sta $DF                          ; ROM $0023B5: 85 DF
+; Routine: Gameplay_ReadPlayerState_E3A7
+; Global: Reachable code entry at CPU $E3A7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadPlayerState_E3A7:
+    lda $A8                          ; ROM $0023B7: A5 A8
+    beq Gameplay_ReadObjectType_E3E7                 ; ROM $0023B9: F0 3C
+    cmp #$02                         ; ROM $0023BB: C9 02
+    beq Gameplay_ReturnToCaller_E398                 ; ROM $0023BD: F0 E9
+    lda $33                          ; ROM $0023BF: A5 33
+    and #$01                         ; ROM $0023C1: 29 01
+    bne Gameplay_ReadZpAA_E3BD                 ; ROM $0023C3: D0 08
+    dec $A9                          ; ROM $0023C5: C6 A9
+    bne Gameplay_ReadZpAA_E3BD                 ; ROM $0023C7: D0 04
+    lda #$02                         ; ROM $0023C9: A9 02
+    sta $A8                          ; ROM $0023CB: 85 A8
+; Routine: Gameplay_ReadZpAA_E3BD
+; Global: Reachable code entry at CPU $E3BD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZpAA_E3BD:
+    jsr Object_ReadStageIndex_CFED                 ; ROM $0023CD: 20 ED CF
+    lda $AA                          ; ROM $0023D0: A5 AA
+    cmp $28                          ; ROM $0023D2: C5 28
+    bne Gameplay_ReturnToCaller_E3E6                 ; ROM $0023D4: D0 20
+    lda $2A                          ; ROM $0023D6: A5 2A
+    cmp $AB                          ; ROM $0023D8: C5 AB
+    bne Gameplay_ReturnToCaller_E3E6                 ; ROM $0023DA: D0 1A
+    lda #$04                         ; ROM $0023DC: A9 04
+    sta $DF                          ; ROM $0023DE: 85 DF
+    ldx $9D                          ; ROM $0023E0: A6 9D
+    lda $E4BC,x                      ; ROM $0023E2: BD BC E4
+    cmp #$64                         ; ROM $0023E5: C9 64
+    bcc Gameplay_CallHelper_E3DF                 ; ROM $0023E7: 90 06
+    jsr Menu_WriteObjectWorkX_DD6B                 ; ROM $0023E9: 20 6B DD
+    jmp Gameplay_WritePlayerState_E3E2                 ; ROM $0023EC: 4C E2 E3
+; Routine: Gameplay_CallHelper_E3DF
+; Global: Reachable code entry at CPU $E3DF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_CallHelper_E3DF:
+    jsr Menu_WriteObjectWorkX_DD77                 ; ROM $0023EF: 20 77 DD
+; Routine: Gameplay_WritePlayerState_E3E2
+; Global: Reachable code entry at CPU $E3E2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WritePlayerState_E3E2:
+    lda #$02                         ; ROM $0023F2: A9 02
+    sta $A8                          ; ROM $0023F4: 85 A8
+; Routine: Gameplay_ReturnToCaller_E3E6
+; Global: Reachable code entry at CPU $E3E6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_E3E6:
+    rts                              ; ROM $0023F6: 60
+; Routine: Gameplay_ReadObjectType_E3E7
+; Global: Reachable code entry at CPU $E3E7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadObjectType_E3E7:
+    lda $28                          ; ROM $0023F7: A5 28
+    cmp #$01                         ; ROM $0023F9: C9 01
+    bne Gameplay_ReadObjectState_E401                 ; ROM $0023FB: D0 14
+    lda $2A                          ; ROM $0023FD: A5 2A
+    cmp #$01                         ; ROM $0023FF: C9 01
+    bne Gameplay_IncrementRemoteControl_E3F8                 ; ROM $002401: D0 05
+    inc $A0                          ; ROM $002403: E6 A0
+    jmp Gameplay_ReadObjectType_E416                 ; ROM $002405: 4C 16 E4
+; Routine: Gameplay_IncrementRemoteControl_E3F8
+; Global: Reachable code entry at CPU $E3F8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_IncrementRemoteControl_E3F8:
+    cmp #$0B                         ; ROM $002408: C9 0B
+    bne Gameplay_ReadObjectState_E401                 ; ROM $00240A: D0 05
+    inc $A2                          ; ROM $00240C: E6 A2
+    jmp Gameplay_ReadObjectType_E416                 ; ROM $00240E: 4C 16 E4
+; Routine: Gameplay_ReadObjectState_E401
+; Global: Reachable code entry at CPU $E401 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadObjectState_E401:
+    cmp #$1D                         ; ROM $002411: C9 1D
+    bne Gameplay_ReadObjectType_E416                 ; ROM $002413: D0 11
+    lda $2A                          ; ROM $002415: A5 2A
+    cmp #$01                         ; ROM $002417: C9 01
+    bne Gameplay_IncrementWallPass_E410                 ; ROM $002419: D0 05
+    inc $A1                          ; ROM $00241B: E6 A1
+    jmp Gameplay_ReadObjectType_E416                 ; ROM $00241D: 4C 16 E4
+; Routine: Gameplay_IncrementWallPass_E410
+; Global: Reachable code entry at CPU $E410 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_IncrementWallPass_E410:
+    cmp #$0B                         ; ROM $002420: C9 0B
+    bne Gameplay_ReadObjectType_E416                 ; ROM $002422: D0 02
+    inc $A3                          ; ROM $002424: E6 A3
+; Routine: Gameplay_ReadObjectType_E416
+; Global: Reachable code entry at CPU $E416 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadObjectType_E416:
+    lda $28                          ; ROM $002426: A5 28
+    cmp #$01                         ; ROM $002428: C9 01
+    beq Gameplay_ReadStageIndex_E434                 ; ROM $00242A: F0 18
+    cmp #$1D                         ; ROM $00242C: C9 1D
+    beq Gameplay_ReadStageIndex_E434                 ; ROM $00242E: F0 14
+    lda $2A                          ; ROM $002430: A5 2A
+    cmp #$01                         ; ROM $002432: C9 01
+    beq Gameplay_ReadStageIndex_E434                 ; ROM $002434: F0 0E
+    cmp #$0B                         ; ROM $002436: C9 0B
+    beq Gameplay_ReadStageIndex_E434                 ; ROM $002438: F0 0A
+    lda #$00                         ; ROM $00243A: A9 00
+    sta $A0                          ; ROM $00243C: 85 A0
+    sta $A1                          ; ROM $00243E: 85 A1
+    sta $A2                          ; ROM $002440: 85 A2
+    sta $A3                          ; ROM $002442: 85 A3
+; Routine: Gameplay_ReadStageIndex_E434
+; Global: Reachable code entry at CPU $E434 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadStageIndex_E434:
+    ldx $9D                          ; ROM $002444: A6 9D
+    beq Gameplay_ReadPlayerLives_E448                 ; ROM $002446: F0 10
+    dex                              ; ROM $002448: CA
+    beq Gameplay_ReadStageProgress_E468                 ; ROM $002449: F0 2D
+    dex                              ; ROM $00244B: CA
+    beq Gameplay_ReadStageProgress_E47D                 ; ROM $00244C: F0 3F
+    dex                              ; ROM $00244E: CA
+    beq Gameplay_ReadFlamePass_E486                 ; ROM $00244F: F0 45
+    dex                              ; ROM $002451: CA
+    beq Gameplay_ReadBombCapacity_E48D                 ; ROM $002452: F0 49
+    dex                              ; ROM $002454: CA
+    beq Gameplay_ReadPlayerLives_E498                 ; ROM $002455: F0 51
+    rts                              ; ROM $002457: 60
+; Routine: Gameplay_ReadPlayerLives_E448
+; Global: Reachable code entry at CPU $E448 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadPlayerLives_E448:
+    lda $9E                          ; ROM $002458: A5 9E
+    bne Gameplay_ReturnToCaller_E467                 ; ROM $00245A: D0 1B
+    lda $9F                          ; ROM $00245C: A5 9F
+    beq Gameplay_ReturnToCaller_E467                 ; ROM $00245E: F0 17
+; Routine: Gameplay_ReadPlayerState_E450
+; Global: Reachable code entry at CPU $E450 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadPlayerState_E450:
+    lda $A8                          ; ROM $002460: A5 A8
+    bne Gameplay_ReturnToCaller_E467                 ; ROM $002462: D0 13
+    lda #$01                         ; ROM $002464: A9 01
+    sta $A8                          ; ROM $002466: 85 A8
+    lda #$00                         ; ROM $002468: A9 00
+    sta $A9                          ; ROM $00246A: 85 A9
+    jsr Gameplay_WriteObjectWorkX_CACF                 ; ROM $00246C: 20 CF CA
+    lda $24                          ; ROM $00246F: A5 24
+    sta $AA                          ; ROM $002471: 85 AA
+    lda $25                          ; ROM $002473: A5 25
+    sta $AB                          ; ROM $002475: 85 AB
+; Routine: Gameplay_ReturnToCaller_E467
+; Global: Reachable code entry at CPU $E467 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_E467:
+    rts                              ; ROM $002477: 60
+; Routine: Gameplay_ReadStageProgress_E468
+; Global: Reachable code entry at CPU $E468 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadStageProgress_E468:
+    lda $9C                          ; ROM $002478: A5 9C
+    bne Gameplay_ReturnToCaller_E467                 ; ROM $00247A: D0 FB
+    lda $A0                          ; ROM $00247C: A5 A0
+    beq Gameplay_ReturnToCaller_E467                 ; ROM $00247E: F0 F7
+    lda $A1                          ; ROM $002480: A5 A1
+    beq Gameplay_ReturnToCaller_E467                 ; ROM $002482: F0 F3
+    lda $A2                          ; ROM $002484: A5 A2
+    beq Gameplay_ReturnToCaller_E467                 ; ROM $002486: F0 EF
+    lda $A3                          ; ROM $002488: A5 A3
+    bne Gameplay_ReadPlayerState_E450                 ; ROM $00248A: D0 D4
+    rts                              ; ROM $00248C: 60
+; Routine: Gameplay_ReadStageProgress_E47D
+; Global: Reachable code entry at CPU $E47D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadStageProgress_E47D:
+    lda $9C                          ; ROM $00248D: A5 9C
+    bne Gameplay_ReturnToCaller_E467                 ; ROM $00248F: D0 E6
+    lda $A4                          ; ROM $002491: A5 A4
+    beq Gameplay_ReadPlayerState_E450                 ; ROM $002493: F0 CB
+    rts                              ; ROM $002495: 60
+; Routine: Gameplay_ReadFlamePass_E486
+; Global: Reachable code entry at CPU $E486 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadFlamePass_E486:
+    lda $A5                          ; ROM $002496: A5 A5
+    cmp #$F8                         ; ROM $002498: C9 F8
+    bcs Gameplay_ReadPlayerState_E450                 ; ROM $00249A: B0 C4
+    rts                              ; ROM $00249C: 60
+; Routine: Gameplay_ReadBombCapacity_E48D
+; Global: Reachable code entry at CPU $E48D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadBombCapacity_E48D:
+    lda $9F                          ; ROM $00249D: A5 9F
+    beq Gameplay_ReturnToCaller_E467                 ; ROM $00249F: F0 D6
+    lda $A6                          ; ROM $0024A1: A5 A6
+    cmp #$F8                         ; ROM $0024A3: C9 F8
+    bcs Gameplay_ReadPlayerState_E450                 ; ROM $0024A5: B0 B9
+    rts                              ; ROM $0024A7: 60
+; Routine: Gameplay_ReadPlayerLives_E498
+; Global: Reachable code entry at CPU $E498 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadPlayerLives_E498:
+    lda $9E                          ; ROM $0024A8: A5 9E
+    bne Gameplay_ReturnToCaller_E467                 ; ROM $0024AA: D0 CB
+    lda $58                          ; ROM $0024AC: A5 58
+    asl a                            ; ROM $0024AE: 0A
+    clc                              ; ROM $0024AF: 18
+    adc #$32                         ; ROM $0024B0: 69 32
+    cmp $A4                          ; ROM $0024B2: C5 A4
+    beq Gameplay_ReadBonusTimer_E4A8                 ; ROM $0024B4: F0 02
+    bcs Gameplay_ReturnToCaller_E467                 ; ROM $0024B6: B0 BF
+; Routine: Gameplay_ReadBonusTimer_E4A8
+; Global: Reachable code entry at CPU $E4A8 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadBonusTimer_E4A8:
+    lda $A7                          ; ROM $0024B8: A5 A7
+    cmp #$03                         ; ROM $0024BA: C9 03
+    beq Gameplay_ReadPlayerState_E450                 ; ROM $0024BC: F0 A2
+    rts                              ; ROM $0024BE: 60
+; Routine: Gameplay_ReadZp58_E4AF
+; Global: Reachable code entry at CPU $E4AF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZp58_E4AF:
+    lda $58                          ; ROM $0024BF: A5 58
+    and #$07                         ; ROM $0024C1: 29 07
+    cmp #$06                         ; ROM $0024C3: C9 06
+    bcc Gameplay_WriteStageIndex_E4B9                 ; ROM $0024C5: 90 02
+    and #$01                         ; ROM $0024C7: 29 01
+; Routine: Gameplay_WriteStageIndex_E4B9
+; Global: Reachable code entry at CPU $E4B9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteStageIndex_E4B9:
+    sta $9D                          ; ROM $0024C9: 85 9D
+    rts                              ; ROM $0024CB: 60
+
+; Data region: CPU $E4BC-$E4C1; unreachable by direct recursive trace.
+GameplayPowerupMaskTable:
+    .byte $01, $02, $64, $32, $03, $C8                                                   ; ROM $0024CC: 01 02 64 32 03 C8
+; Routine: Gameplay_WriteGameMode_E4C2
+; Global: Reachable code entry at CPU $E4C2 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteGameMode_E4C2:
+    lda #$00                         ; ROM $0024D2: A9 00
+    sta $B5                          ; ROM $0024D4: 85 B5
+; Routine: Gameplay_ReturnToCaller_E4C6
+; Global: Reachable code entry at CPU $E4C6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_E4C6:
+    rts                              ; ROM $0024D6: 60
+; Routine: Gameplay_ReadZpB2_E4C7
+; Global: Reachable code entry at CPU $E4C7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZpB2_E4C7:
+    lda $B2                          ; ROM $0024D7: A5 B2
+    bne Gameplay_ReturnToCaller_E4C6                 ; ROM $0024D9: D0 FB
+    lda $B5                          ; ROM $0024DB: A5 B5
+    beq Gameplay_ReturnToCaller_E4C6                 ; ROM $0024DD: F0 F7
+    bmi Gameplay_WriteSoundChannelIndex_E52A                 ; ROM $0024DF: 30 59
+    cmp #$0B                         ; ROM $0024E1: C9 0B
+    bcs Gameplay_WriteGameMode_E4C2                 ; ROM $0024E3: B0 ED
+    sta $B4                          ; ROM $0024E5: 85 B4
+    ora #$80                         ; ROM $0024E7: 09 80
+    sta $B5                          ; ROM $0024E9: 85 B5
+    dec $B4                          ; ROM $0024EB: C6 B4
+    lda $B4                          ; ROM $0024ED: A5 B4
+    asl a                            ; ROM $0024EF: 0A
+    asl a                            ; ROM $0024F0: 0A
+    asl a                            ; ROM $0024F1: 0A
+    tay                              ; ROM $0024F2: A8
+    ldx #$00                         ; ROM $0024F3: A2 00
+; Routine: Gameplay_ReadRamE87C_E4E5
+; Global: Reachable code entry at CPU $E4E5 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadRamE87C_E4E5:
+    lda $E87C,y                      ; ROM $0024F5: B9 7C E8
+    sta $BC,x                        ; ROM $0024F8: 95 BC
+    iny                              ; ROM $0024FA: C8
+    inx                              ; ROM $0024FB: E8
+    cpx #$06                         ; ROM $0024FC: E0 06
+    bne Gameplay_ReadRamE87C_E4E5                 ; ROM $0024FE: D0 F5
+    lda $E87C,y                      ; ROM $002500: B9 7C E8
+    sta $D3                          ; ROM $002503: 85 D3
+    lda $E87D,y                      ; ROM $002505: B9 7D E8
+    sta $D4                          ; ROM $002508: 85 D4
+    lda #$00                         ; ROM $00250A: A9 00
+    sta $C4                          ; ROM $00250C: 85 C4
+    sta $C5                          ; ROM $00250E: 85 C5
+    sta $C6                          ; ROM $002510: 85 C6
+    sta $D5                          ; ROM $002512: 85 D5
+    sta $CD                          ; ROM $002514: 85 CD
+    sta $CE                          ; ROM $002516: 85 CE
+    sta $CF                          ; ROM $002518: 85 CF
+    sta $D0                          ; ROM $00251A: 85 D0
+    sta $D1                          ; ROM $00251C: 85 D1
+    sta $D2                          ; ROM $00251E: 85 D2
+    lda #$01                         ; ROM $002520: A9 01
+    sta $B6                          ; ROM $002522: 85 B6
+    sta $B7                          ; ROM $002524: 85 B7
+    sta $B8                          ; ROM $002526: 85 B8
+    sta $B9                          ; ROM $002528: 85 B9
+    sta $BA                          ; ROM $00252A: 85 BA
+    sta $BB                          ; ROM $00252C: 85 BB
+    sta $D6                          ; ROM $00252E: 85 D6
+    sta $D7                          ; ROM $002530: 85 D7
+    sta $D8                          ; ROM $002532: 85 D8
+    lda #$08                         ; ROM $002534: A9 08
+    sta $D9                          ; ROM $002536: 85 D9
+    sta $DA                          ; ROM $002538: 85 DA
+; Routine: Gameplay_WriteSoundChannelIndex_E52A
+; Global: Reachable code entry at CPU $E52A traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteSoundChannelIndex_E52A:
+    lda #$02                         ; ROM $00253A: A9 02
+    sta $B3                          ; ROM $00253C: 85 B3
+; Routine: Gameplay_ReadSoundChannelIndex_E52E
+; Global: Reachable code entry at CPU $E52E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadSoundChannelIndex_E52E:
+    ldx $B3                          ; ROM $00253E: A6 B3
+    dec $B6,x                        ; ROM $002540: D6 B6
+    beq Gameplay_ReadZpBC_E539                 ; ROM $002542: F0 05
+; Routine: Gameplay_DecrementSoundChannelIndex_E534
+; Global: Reachable code entry at CPU $E534 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_DecrementSoundChannelIndex_E534:
+    dec $B3                          ; ROM $002544: C6 B3
+    bpl Gameplay_ReadSoundChannelIndex_E52E                 ; ROM $002546: 10 F6
+    rts                              ; ROM $002548: 60
+; Routine: Gameplay_ReadZpBC_E539
+; Global: Reachable code entry at CPU $E539 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZpBC_E539:
+    txa                              ; ROM $002549: 8A
+    asl a                            ; ROM $00254A: 0A
+    tax                              ; ROM $00254B: AA
+    lda $BC,x                        ; ROM $00254C: B5 BC
+    sta $C2                          ; ROM $00254E: 85 C2
+    lda $BD,x                        ; ROM $002550: B5 BD
+    sta $C3                          ; ROM $002552: 85 C3
+    ora $C2                          ; ROM $002554: 05 C2
+    beq Gameplay_DecrementSoundChannelIndex_E534                 ; ROM $002556: F0 EC
+    jsr Gameplay_ReadSoundChannelIndex_E54E                 ; ROM $002558: 20 4E E5
+    jmp Gameplay_DecrementSoundChannelIndex_E534                 ; ROM $00255B: 4C 34 E5
+; Routine: Gameplay_ReadSoundChannelIndex_E54E
+; Global: Reachable code entry at CPU $E54E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadSoundChannelIndex_E54E:
+    ldx $B3                          ; ROM $00255E: A6 B3
+    ldy $C4,x                        ; ROM $002560: B4 C4
+    lda ($C2),y                      ; ROM $002562: B1 C2
+    sta $B4                          ; ROM $002564: 85 B4
+    inc $C4,x                        ; ROM $002566: F6 C4
+    lda $B4                          ; ROM $002568: A5 B4
+    bmi Gameplay_ReadSoundTempo_E5C7                 ; ROM $00256A: 30 6B
+    lda $B9,x                        ; ROM $00256C: B5 B9
+    sta $B6,x                        ; ROM $00256E: 95 B6
+    cpx #$02                         ; ROM $002570: E0 02
+    beq Gameplay_HandleControl_E56E                 ; ROM $002572: F0 0A
+    lsr a                            ; ROM $002574: 4A
+    lsr a                            ; ROM $002575: 4A
+    cmp #$10                         ; ROM $002576: C9 10
+    bcc Gameplay_WriteZpD6_E573                 ; ROM $002578: 90 09
+    lda #$0F                         ; ROM $00257A: A9 0F
+    bne Gameplay_WriteZpD6_E573                 ; ROM $00257C: D0 05
+; Routine: Gameplay_HandleControl_E56E
+; Global: Reachable code entry at CPU $E56E traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_E56E:
+    asl a                            ; ROM $00257E: 0A
+    bpl Gameplay_WriteZpD6_E573                 ; ROM $00257F: 10 02
+    lda #$7F                         ; ROM $002581: A9 7F
+; Routine: Gameplay_WriteZpD6_E573
+; Global: Reachable code entry at CPU $E573 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_WriteZpD6_E573:
+    sta $D6,x                        ; ROM $002583: 95 D6
+    lda $D0,x                        ; ROM $002585: B5 D0
+    beq Gameplay_ReadSoundDelay0_E57B                 ; ROM $002587: F0 02
+    lsr $D6,x                        ; ROM $002589: 56 D6
+; Routine: Gameplay_ReadSoundDelay0_E57B
+; Global: Reachable code entry at CPU $E57B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadSoundDelay0_E57B:
+    ldy $E1,x                        ; ROM $00258B: B4 E1
+    bne Gameplay_ReturnToCaller_E5C6                 ; ROM $00258D: D0 47
+    lda $B4                          ; ROM $00258F: A5 B4
+    cmp #$00                         ; ROM $002591: C9 00
+    beq Gameplay_ReturnToCaller_E5C6                 ; ROM $002593: F0 41
+    txa                              ; ROM $002595: 8A
+    asl a                            ; ROM $002596: 0A
+    asl a                            ; ROM $002597: 0A
+    tay                              ; ROM $002598: A8
+    lda $CD,x                        ; ROM $002599: B5 CD
+    beq Gameplay_ReadZpD6_E59D                 ; ROM $00259B: F0 10
+    bpl Gameplay_HandleControl_E593                 ; ROM $00259D: 10 04
+    inc $CD,x                        ; ROM $00259F: F6 CD
+    beq Gameplay_ReadZpD6_E59D                 ; ROM $0025A1: F0 0A
+; Routine: Gameplay_HandleControl_E593
+; Global: Reachable code entry at CPU $E593 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_HandleControl_E593:
+    lda #$9F                         ; ROM $0025A3: A9 9F
+    cpx #$02                         ; ROM $0025A5: E0 02
+    bne Gameplay_UpdateAudioChannelPath_E5A1                 ; ROM $0025A7: D0 08
+    lda #$7F                         ; ROM $0025A9: A9 7F
+    bne Gameplay_UpdateAudioChannelPath_E5A1                 ; ROM $0025AB: D0 04
+; Routine: Gameplay_ReadZpD6_E59D
+; Global: Reachable code entry at CPU $E59D traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadZpD6_E59D:
+    lda $D6,x                        ; ROM $0025AD: B5 D6
+    ora $D3,x                        ; ROM $0025AF: 15 D3
+; Routine: Gameplay_UpdateAudioChannelPath_E5A1
+; Global: Reachable code entry at CPU $E5A1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_UpdateAudioChannelPath_E5A1:
+    sta APUPULSE1CTRL,y                      ; ROM $0025B1: 99 00 40
+    lda $CD,x                        ; ROM $0025B4: B5 CD
+    cmp #$02                         ; ROM $0025B6: C9 02
+    bne Gameplay_UpdateAudioChannelPath_E5AB                 ; ROM $0025B8: D0 01
+    rts                              ; ROM $0025BA: 60
+; Routine: Gameplay_UpdateAudioChannelPath_E5AB
+; Global: Reachable code entry at CPU $E5AB traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_UpdateAudioChannelPath_E5AB:
+    cpx #$02                         ; ROM $0025BB: E0 02
+    bcs Gameplay_UpdateAudioChannelPath_E5B4                 ; ROM $0025BD: B0 05
+    lda $D9,x                        ; ROM $0025BF: B5 D9
+    sta APUPULSE1SWEEP,y                      ; ROM $0025C1: 99 01 40
+; Routine: Gameplay_UpdateAudioChannelPath_E5B4
+; Global: Reachable code entry at CPU $E5B4 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_UpdateAudioChannelPath_E5B4:
+    lda $B4                          ; ROM $0025C4: A5 B4
+    asl a                            ; ROM $0025C6: 0A
+    tax                              ; ROM $0025C7: AA
+    lda $E7E2,x                      ; ROM $0025C8: BD E2 E7
+    sta APUPULSE1TIMERLO,y                      ; ROM $0025CB: 99 02 40
+    lda $E7E3,x                      ; ROM $0025CE: BD E3 E7
+    ora #$08                         ; ROM $0025D1: 09 08
+    sta APUPULSE1TIMERHI,y                      ; ROM $0025D3: 99 03 40
+; Routine: Gameplay_ReturnToCaller_E5C6
+; Global: Reachable code entry at CPU $E5C6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReturnToCaller_E5C6:
+    rts                              ; ROM $0025D6: 60
+; Routine: Gameplay_ReadSoundTempo_E5C7
+; Global: Reachable code entry at CPU $E5C7 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_ReadSoundTempo_E5C7:
+    and #$F0                         ; ROM $0025D7: 29 F0
+    cmp #$F0                         ; ROM $0025D9: C9 F0
+    beq Gameplay_SubtractFromSoundTempo_E5D6                 ; ROM $0025DB: F0 09
+    lda $B4                          ; ROM $0025DD: A5 B4
+    and #$7F                         ; ROM $0025DF: 29 7F
+    sta $B9,x                        ; ROM $0025E1: 95 B9
+    jmp Gameplay_ReadSoundChannelIndex_E54E                 ; ROM $0025E3: 4C 4E E5
+; Routine: Gameplay_SubtractFromSoundTempo_E5D6
+; Global: Reachable code entry at CPU $E5D6 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Gameplay_SubtractFromSoundTempo_E5D6:
+    sec                              ; ROM $0025E6: 38
+    lda #$FF                         ; ROM $0025E7: A9 FF
+    sbc $B4                          ; ROM $0025E9: E5 B4
+    asl a                            ; ROM $0025EB: 0A
+    tay                              ; ROM $0025EC: A8
+    lda $E5E7,y                      ; ROM $0025ED: B9 E7 E5
+    pha                              ; ROM $0025F0: 48
+    lda $E5E6,y                      ; ROM $0025F1: B9 E6 E5
+    pha                              ; ROM $0025F4: 48
+    rts                              ; ROM $0025F5: 60
+
+; Data region: CPU $E5E6-$E641; unreachable by direct recursive trace.
+GameplayAndSoundDataTables:
+    .byte $F5, $E5, $FA, $E5, $01, $E6, $0F, $E6, $1A, $E6, $2C, $E6, $33, $E6, $3A, $E6 ; ROM $0025F6: F5 E5 FA E5 01 E6 0F E6 1A E6 2C E6 33 E6 3A E6
+    .byte $A9, $00, $85, $B5, $60, $A9, $00, $95, $C4, $4C, $4E, $E5, $B4, $C4, $B1, $C2 ; ROM $002606: A9 00 85 B5 60 A9 00 95 C4 4C 4E E5 B4 C4 B1 C2
+    .byte $95, $CA, $C8, $94, $C4, $94, $C7, $4C, $4E, $E5, $D6, $CA, $F0, $04, $B5, $C7 ; ROM $002616: 95 CA C8 94 C4 94 C7 4C 4E E5 D6 CA F0 04 B5 C7
+    .byte $95, $C4, $4C, $4E, $E5, $B5, $CD, $F0, $07, $A9, $02, $95, $CD, $4C, $4E, $E5 ; ROM $002626: 95 C4 4C 4E E5 B5 CD F0 07 A9 02 95 CD 4C 4E E5
+    .byte $A9, $01, $95, $CD, $4C, $4E, $E5, $A9, $FF, $95, $CD, $4C, $4E, $E5, $A9, $FF ; ROM $002636: A9 01 95 CD 4C 4E E5 A9 FF 95 CD 4C 4E E5 A9 FF
+    .byte $95, $D0, $4C, $4E, $E5, $A9, $00, $95, $D0, $4C, $4E, $E5                     ; ROM $002646: 95 D0 4C 4E E5 A9 00 95 D0 4C 4E E5
+; Routine: InitializeApu
+; Global: Reachable code entry at CPU $E642 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+InitializeApu:
+    lda #$00                         ; ROM $002652: A9 00
+    sta APUDMCDIRECT                        ; ROM $002654: 8D 11 40
+    sta $E1                          ; ROM $002657: 85 E1
+    sta $E2                          ; ROM $002659: 85 E2
+    sta $E3                          ; ROM $00265B: 85 E3
+    sta APUPULSE1CTRL                        ; ROM $00265D: 8D 00 40
+    sta APUPULSE2CTRL                        ; ROM $002660: 8D 04 40
+    sta APUTRIANGLECTRL                        ; ROM $002663: 8D 08 40
+    sta APUNOISECTRL                        ; ROM $002666: 8D 0C 40
+    lda #$0F                         ; ROM $002669: A9 0F
+    sta APUSTATUS                    ; ROM $00266B: 8D 15 40
+    rts                              ; ROM $00266E: 60
+; Routine: SoundUpdate
+; Global: Reachable code entry at CPU $E65F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+SoundUpdate:
+    ldx #$02                         ; ROM $00266F: A2 02
+; Routine: Sound_ReadSoundDelay0_E661
+; Global: Reachable code entry at CPU $E661 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReadSoundDelay0_E661:
+    lda $E1,x                        ; ROM $002671: B5 E1
+    beq Sound_ReadSoundCommandState_E667                 ; ROM $002673: F0 02
+    dec $E1,x                        ; ROM $002675: D6 E1
+; Routine: Sound_ReadSoundCommandState_E667
+; Global: Reachable code entry at CPU $E667 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReadSoundCommandState_E667:
+    dex                              ; ROM $002677: CA
+    bpl Sound_ReadSoundDelay0_E661                 ; ROM $002678: 10 F7
+    lda $DF                          ; ROM $00267A: A5 DF
+    bmi Sound_ReadRamE6BC_E69C                 ; ROM $00267C: 30 2E
+    cmp #$07                         ; ROM $00267E: C9 07
+    bcs Sound_ReturnToCaller_E6AC                 ; ROM $002680: B0 3A
+    cmp #$03                         ; ROM $002682: C9 03
+    bcs Sound_WriteSoundCommandState_E681                 ; ROM $002684: B0 0B
+    ldx IndirectPtrLo                          ; ROM $002686: A6 E0
+    beq Sound_WriteSoundCommandState_E681                 ; ROM $002688: F0 07
+    txa                              ; ROM $00268A: 8A
+    ora #$80                         ; ROM $00268B: 09 80
+    sta $DF                          ; ROM $00268D: 85 DF
+    bne Sound_ReadRamE6BC_E69C                 ; ROM $00268F: D0 1B
+; Routine: Sound_WriteSoundCommandState_E681
+; Global: Reachable code entry at CPU $E681 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_WriteSoundCommandState_E681:
+    sta IndirectPtrLo                          ; ROM $002691: 85 E0
+    ora #$80                         ; ROM $002693: 09 80
+    sta $DF                          ; ROM $002695: 85 DF
+    lda #$00                         ; ROM $002697: A9 00
+    sta IndirectPtrHi                          ; ROM $002699: 85 E1
+    sta $E2                          ; ROM $00269B: 85 E2
+    sta $E3                          ; ROM $00269D: 85 E3
+    lda IndirectPtrLo                          ; ROM $00269F: A5 E0
+    asl a                            ; ROM $0026A1: 0A
+    tax                              ; ROM $0026A2: AA
+    lda $E6AE,x                      ; ROM $0026A3: BD AE E6
+    pha                              ; ROM $0026A6: 48
+    lda $E6AD,x                      ; ROM $0026A7: BD AD E6
+    pha                              ; ROM $0026AA: 48
+    rts                              ; ROM $0026AB: 60
+; Routine: Sound_ReadRamE6BC_E69C
+; Global: Reachable code entry at CPU $E69C traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReadRamE6BC_E69C:
+    lda IndirectPtrLo                          ; ROM $0026AC: A5 E0
+    cmp #$07                         ; ROM $0026AE: C9 07
+    bcs Sound_ReturnToCaller_E6AC                 ; ROM $0026B0: B0 0A
+    asl a                            ; ROM $0026B2: 0A
+    tax                              ; ROM $0026B3: AA
+    lda $E6BC,x                      ; ROM $0026B4: BD BC E6
+    pha                              ; ROM $0026B7: 48
+    lda $E6BB,x                      ; ROM $0026B8: BD BB E6
+    pha                              ; ROM $0026BB: 48
+; Routine: Sound_ReturnToCaller_E6AC
+; Global: Reachable code entry at CPU $E6AC traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReturnToCaller_E6AC:
+    rts                              ; ROM $0026BC: 60
+
+; Data region: CPU $E6AD-$E6C8; unreachable by direct recursive trace.
+SoundDispatchAddressTable:
+    .byte $41, $E6, $C8, $E6, $CC, $E6, $DE, $E6, $27, $E7, $66, $E7, $92, $E7, $AB, $E6 ; ROM $0026BD: 41 E6 C8 E6 CC E6 DE E6 27 E7 66 E7 92 E7 AB E6
+    .byte $AB, $E6, $AB, $E6, $0A, $E7, $33, $E7, $AB, $E6, $9E, $E7                     ; ROM $0026CD: AB E6 AB E6 0A E7 33 E7 AB E6 9E E7
+; Routine: ConfigureNoiseEffect
+; Global: Reachable code entry at CPU $E6C9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+ConfigureNoiseEffect:
+    lda #$04                         ; ROM $0026D9: A9 04
+    bne Sound_UpdateAudioChannelPath_E6CF                 ; ROM $0026DB: D0 02
+; Routine: Sound_HandleControl_E6CD
+; Global: Reachable code entry at CPU $E6CD traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_HandleControl_E6CD:
+    lda #$0C                         ; ROM $0026DD: A9 0C
+; Routine: Sound_UpdateAudioChannelPath_E6CF
+; Global: Reachable code entry at CPU $E6CF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E6CF:
+    sta APUNOISEPERIOD                        ; ROM $0026DF: 8D 0E 40
+    lda #$00                         ; ROM $0026E2: A9 00
+    sta IndirectPtrLo                          ; ROM $0026E4: 85 E0
+    sta APUNOISECTRL                        ; ROM $0026E6: 8D 0C 40
+    lda #$10                         ; ROM $0026E9: A9 10
+    sta APUNOISELENGTH                        ; ROM $0026EB: 8D 0F 40
+    rts                              ; ROM $0026EE: 60
+; Routine: Sound_UpdateAudioChannelPath_E6DF
+; Global: Reachable code entry at CPU $E6DF traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E6DF:
+    lda #$10                         ; ROM $0026EF: A9 10
+    sta $E2                          ; ROM $0026F1: 85 E2
+    lda #$01                         ; ROM $0026F3: A9 01
+    sta APUNOISECTRL                        ; ROM $0026F5: 8D 0C 40
+    lda #$0F                         ; ROM $0026F8: A9 0F
+    sta APUNOISEPERIOD                        ; ROM $0026FA: 8D 0E 40
+    lda #$10                         ; ROM $0026FD: A9 10
+    sta APUNOISELENGTH                        ; ROM $0026FF: 8D 0F 40
+    lda #$FF                         ; ROM $002702: A9 FF
+    sta APUPULSE2CTRL                        ; ROM $002704: 8D 04 40
+    lda #$84                         ; ROM $002707: A9 84
+    sta APUPULSE2SWEEP                        ; ROM $002709: 8D 05 40
+    lda #$00                         ; ROM $00270C: A9 00
+    sta APUPULSE2TIMERLO                        ; ROM $00270E: 8D 06 40
+    lda #$02                         ; ROM $002711: A9 02
+    sta APUPULSE2TIMERHI                        ; ROM $002713: 8D 07 40
+    lda #$04                         ; ROM $002716: A9 04
+    sta $E4                          ; ROM $002718: 85 E4
+    rts                              ; ROM $00271A: 60
+; Routine: Sound_UpdateAudioChannelPath_E70B
+; Global: Reachable code entry at CPU $E70B traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E70B:
+    dec RandomStateAlt              ; ROM $00271B: C6 E4
+    bne Sound_ReturnToCaller_E727                 ; ROM $00271D: D0 18
+    lda #$DF                         ; ROM $00271F: A9 DF
+    sta APUPULSE2CTRL                        ; ROM $002721: 8D 04 40
+    lda #$84                         ; ROM $002724: A9 84
+    sta APUPULSE2SWEEP                        ; ROM $002726: 8D 05 40
+    lda #$00                         ; ROM $002729: A9 00
+    sta APUPULSE2TIMERLO                        ; ROM $00272B: 8D 06 40
+    lda #$81                         ; ROM $00272E: A9 81
+    sta APUPULSE2TIMERHI                        ; ROM $002730: 8D 07 40
+    lda #$00                         ; ROM $002733: A9 00
+    sta IndirectPtrLo                          ; ROM $002735: 85 E0
+; Routine: Sound_ReturnToCaller_E727
+; Global: Reachable code entry at CPU $E727 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReturnToCaller_E727:
+    rts                              ; ROM $002737: 60
+; Routine: Sound_WriteSoundDelay1_E728
+; Global: Reachable code entry at CPU $E728 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_WriteSoundDelay1_E728:
+    lda #$FF                         ; ROM $002738: A9 FF
+    sta $E2                          ; ROM $00273A: 85 E2
+    lda #$00                         ; ROM $00273C: A9 00
+    sta $E4                          ; ROM $00273E: 85 E4
+    lda #$04                         ; ROM $002740: A9 04
+    sta $E5                          ; ROM $002742: 85 E5
+; Routine: Sound_ReadSoundEnvelopeCounter_E734
+; Global: Reachable code entry at CPU $E734 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReadSoundEnvelopeCounter_E734:
+    lda $E4                          ; ROM $002744: A5 E4
+    bne Sound_DecrementSoundEnvelopeCounter_E760                 ; ROM $002746: D0 28
+    lda $E5                          ; ROM $002748: A5 E5
+    bne Sound_UpdateAudioChannelPath_E743                 ; ROM $00274A: D0 07
+    lda #$00                         ; ROM $00274C: A9 00
+    sta IndirectPtrLo                ; ROM $00274E: 85 E0
+    sta $E2                          ; ROM $002750: 85 E2
+    rts                              ; ROM $002752: 60
+; Routine: Sound_UpdateAudioChannelPath_E743
+; Global: Reachable code entry at CPU $E743 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E743:
+    dec $E5                          ; ROM $002753: C6 E5
+    lda #$84                         ; ROM $002755: A9 84
+    sta APUPULSE2CTRL                        ; ROM $002757: 8D 04 40
+    lda #$8B                         ; ROM $00275A: A9 8B
+    sta APUPULSE2SWEEP                        ; ROM $00275C: 8D 05 40
+    ldx $E5                          ; ROM $00275F: A6 E5
+    lda SoundHandlerData,x           ; ROM $002761: BD 63 E7
+    sta APUPULSE2TIMERLO                        ; ROM $002764: 8D 06 40
+    lda #$10                         ; ROM $002767: A9 10
+    sta APUPULSE2TIMERHI                        ; ROM $002769: 8D 07 40
+    lda #$04                         ; ROM $00276C: A9 04
+    sta $E4                          ; ROM $00276E: 85 E4
+; Routine: Sound_DecrementSoundEnvelopeCounter_E760
+; Global: Reachable code entry at CPU $E760 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_DecrementSoundEnvelopeCounter_E760:
+    dec $E4                          ; ROM $002770: C6 E4
+    rts                              ; ROM $002772: 60
+
+; Data region: CPU $E763-$E766; unreachable by direct recursive trace.
+SoundHandlerData:
+    .byte $65, $87, $B4, $F0                                                             ; ROM $002773: 65 87 B4 F0
+; Routine: Sound_UpdateAudioChannelPath_E767
+; Global: Reachable code entry at CPU $E767 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E767:
+    lda #$30                         ; ROM $002777: A9 30
+    sta $E2                          ; ROM $002779: 85 E2
+    lda #$09                         ; ROM $00277B: A9 09
+    sta APUNOISECTRL                        ; ROM $00277D: 8D 0C 40
+    lda #$07                         ; ROM $002780: A9 07
+    sta APUNOISEPERIOD                        ; ROM $002782: 8D 0E 40
+    lda #$30                         ; ROM $002785: A9 30
+    sta APUNOISELENGTH                        ; ROM $002787: 8D 0F 40
+    lda #$1F                         ; ROM $00278A: A9 1F
+    sta APUPULSE2CTRL                        ; ROM $00278C: 8D 04 40
+    lda #$8F                         ; ROM $00278F: A9 8F
+    sta APUPULSE2SWEEP                        ; ROM $002791: 8D 05 40
+    lda #$00                         ; ROM $002794: A9 00
+    sta APUPULSE2TIMERLO                        ; ROM $002796: 8D 06 40
+    lda #$33                         ; ROM $002799: A9 33
+    sta APUPULSE2TIMERHI                        ; ROM $00279B: 8D 07 40
+    lda #$00                         ; ROM $00279E: A9 00
+    sta IndirectPtrLo                ; ROM $0027A0: 85 E0
+    rts                              ; ROM $0027A2: 60
+; Routine: Sound_WriteSoundEnvelopeCounter_E793
+; Global: Reachable code entry at CPU $E793 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_WriteSoundEnvelopeCounter_E793:
+    lda #$1D                         ; ROM $0027A3: A9 1D
+    sta $E4                          ; ROM $0027A5: 85 E4
+    lda #$FF                         ; ROM $0027A7: A9 FF
+    sta IndirectPtrHi                ; ROM $0027A9: 85 E1
+    sta $E2                          ; ROM $0027AB: 85 E2
+    sta $E3                          ; ROM $0027AD: 85 E3
+; Routine: Sound_UpdateAudioChannelPath_E79F
+; Global: Reachable code entry at CPU $E79F traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_UpdateAudioChannelPath_E79F:
+    dec $E4                          ; ROM $0027AF: C6 E4
+    beq Sound_HandleControl_E7D1                 ; ROM $0027B1: F0 2E
+    lda $E4                          ; ROM $0027B3: A5 E4
+    and #$03                         ; ROM $0027B5: 29 03
+    bne Sound_ReturnToCaller_E7D0                 ; ROM $0027B7: D0 27
+    lda $E4                          ; ROM $0027B9: A5 E4
+    lsr a                            ; ROM $0027BB: 4A
+    lsr a                            ; ROM $0027BC: 4A
+    and #$01                         ; ROM $0027BD: 29 01
+    tax                              ; ROM $0027BF: AA
+    lda $E7DE,x                      ; ROM $0027C0: BD DE E7
+    sta APUPULSE1TIMERLO                        ; ROM $0027C3: 8D 02 40
+    lda $E7E0,x                      ; ROM $0027C6: BD E0 E7
+    sta APUPULSE2TIMERLO                        ; ROM $0027C9: 8D 06 40
+    lda #$08                         ; ROM $0027CC: A9 08
+    sta APUPULSE1CTRL                        ; ROM $0027CE: 8D 00 40
+    sta APUPULSE2CTRL                        ; ROM $0027D1: 8D 04 40
+    sta APUPULSE1SWEEP                        ; ROM $0027D4: 8D 01 40
+    sta APUPULSE2SWEEP                        ; ROM $0027D7: 8D 05 40
+    sta APUPULSE1TIMERHI                        ; ROM $0027DA: 8D 03 40
+    sta APUPULSE2TIMERHI                        ; ROM $0027DD: 8D 07 40
+; Routine: Sound_ReturnToCaller_E7D0
+; Global: Reachable code entry at CPU $E7D0 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_ReturnToCaller_E7D0:
+    rts                              ; ROM $0027E0: 60
+; Routine: Sound_HandleControl_E7D1
+; Global: Reachable code entry at CPU $E7D1 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+Sound_HandleControl_E7D1:
+    lda #$20                         ; ROM $0027E1: A9 20
+    sta SoundDelay0                  ; ROM $0027E3: 85 E1
+    sta SoundDelay1                  ; ROM $0027E5: 85 E2
+    sta SoundDelay2                  ; ROM $0027E7: 85 E3
+    lda #$00                         ; ROM $0027E9: A9 00
+    sta SoundDispatchIndex           ; ROM $0027EB: 85 E0
+    rts                              ; ROM $0027ED: 60
+
+; Data region: CPU $E7DE-$FFF8; unreachable by direct recursive trace.
+SoundSequenceAndPaddingData:
+    .byte $A9, $A0, $6A, $64, $00, $00, $F0, $07, $7E, $07, $12, $07, $AE, $06, $4E, $06 ; ROM $0027EE: A9 A0 6A 64 00 00 F0 07 7E 07 12 07 AE 06 4E 06
+    .byte $F3, $05, $9F, $05, $4D, $05, $01, $05, $B9, $04, $75, $04, $35, $04, $F8, $03 ; ROM $0027FE: F3 05 9F 05 4D 05 01 05 B9 04 75 04 35 04 F8 03
+    .byte $BF, $03, $89, $03, $57, $03, $27, $03, $F9, $02, $CF, $02, $A6, $02, $80, $02 ; ROM $00280E: BF 03 89 03 57 03 27 03 F9 02 CF 02 A6 02 80 02
+    .byte $5C, $02, $3A, $02, $1A, $02, $FC, $01, $DF, $01, $C4, $01, $AB, $01, $93, $01 ; ROM $00281E: 5C 02 3A 02 1A 02 FC 01 DF 01 C4 01 AB 01 93 01
+    .byte $7C, $01, $67, $01, $52, $01, $3F, $01, $2D, $01, $1C, $01, $0C, $01, $FD, $00 ; ROM $00282E: 7C 01 67 01 52 01 3F 01 2D 01 1C 01 0C 01 FD 00
+    .byte $EE, $00, $E1, $00, $D4, $00, $C8, $00, $BD, $00, $B2, $00, $A8, $00, $9F, $00 ; ROM $00283E: EE 00 E1 00 D4 00 C8 00 BD 00 B2 00 A8 00 9F 00
+    .byte $96, $00, $8D, $00, $85, $00, $7E, $00, $76, $00, $70, $00, $69, $00, $63, $00 ; ROM $00284E: 96 00 8D 00 85 00 7E 00 76 00 70 00 69 00 63 00
+    .byte $5E, $00, $58, $00, $53, $00, $4F, $00, $4A, $00, $46, $00, $42, $00, $3E, $00 ; ROM $00285E: 5E 00 58 00 53 00 4F 00 4A 00 46 00 42 00 3E 00
+    .byte $3A, $00, $37, $00, $34, $00, $31, $00, $2E, $00, $2B, $00, $29, $00, $27, $00 ; ROM $00286E: 3A 00 37 00 34 00 31 00 2E 00 2B 00 29 00 27 00
+    .byte $24, $00, $22, $00, $20, $00, $1E, $00, $1C, $00, $1B, $00, $1A, $00, $17, $EB ; ROM $00287E: 24 00 22 00 20 00 1E 00 1C 00 1B 00 1A 00 17 EB
+    .byte $85, $EB, $EA, $EB, $80, $80, $BC, $EC, $DC, $EC, $FC, $EC, $40, $40, $00, $00 ; ROM $00288E: 85 EB EA EB 80 80 BC EC DC EC FC EC 40 40 00 00
+    .byte $00, $00, $9C, $ED, $80, $80, $4D, $ED, $7B, $ED, $18, $ED, $80, $80, $50, $EC ; ROM $00289E: 00 00 9C ED 80 80 4D ED 7B ED 18 ED 80 80 50 EC
+    .byte $7E, $EC, $AC, $EC, $80, $80, $27, $EA, $63, $EA, $9F, $EA, $80, $80, $CC, $E8 ; ROM $0028AE: 7E EC AC EC 80 80 27 EA 63 EA 9F EA 80 80 CC E8
+    .byte $1C, $E9, $70, $E9, $40, $00, $E1, $EA, $FF, $EA, $00, $00, $80, $80, $A2, $E9 ; ROM $0028BE: 1C E9 70 E9 40 00 E1 EA FF EA 00 00 80 80 A2 E9
+    .byte $D5, $E9, $FF, $E9, $80, $80, $03, $E9, $57, $E9, $88, $E9, $40, $00, $B0, $29 ; ROM $0028CE: D5 E9 FF E9 80 80 03 E9 57 E9 88 E9 40 00 B0 29
+    .byte $AA, $29, $86, $29, $A4, $30, $86, $30, $35, $F9, $8C, $2E, $F8, $98, $2D, $86 ; ROM $0028DE: AA 29 86 29 A4 30 86 30 35 F9 8C 2E F8 98 2D 86
+    .byte $2D, $2E, $8C, $2D, $C8, $2B, $86, $32, $33, $8C, $32, $B0, $30, $8C, $00, $26 ; ROM $0028EE: 2D 2E 8C 2D C8 2B 86 32 33 8C 32 B0 30 8C 00 26
+    .byte $28, $B0, $29, $AA, $29, $86, $29, $A4, $30, $86, $30, $35, $F9, $8C, $2E, $F8 ; ROM $0028FE: 28 B0 29 AA 29 86 29 A4 30 86 30 35 F9 8C 2E F8
+    .byte $98, $2D, $86, $2D, $2E, $8C, $2D, $2B, $32, $33, $30, $00, $92, $30, $83, $32 ; ROM $00290E: 98 2D 86 2D 2E 8C 2D 2B 32 33 30 00 92 30 83 32
+    .byte $34, $8C, $35, $00, $1D, $86, $1D, $1D, $8C, $1D, $00, $98, $00, $FF, $B0, $21 ; ROM $00291E: 34 8C 35 00 1D 86 1D 1D 8C 1D 00 98 00 FF B0 21
+    .byte $AA, $21, $86, $21, $A4, $2D, $86, $2D, $30, $F9, $8C, $29, $F8, $98, $29, $86 ; ROM $00292E: AA 21 86 21 A4 2D 86 2D 30 F9 8C 29 F8 98 29 86
+    .byte $24, $29, $8C, $24, $C8, $27, $86, $2E, $2B, $8C, $2E, $28, $92, $24, $86, $24 ; ROM $00293E: 24 29 8C 24 C8 27 86 2E 2B 8C 2E 28 92 24 86 24
+    .byte $8C, $24, $24, $24, $24, $B0, $21, $AA, $21, $86, $21, $A4, $2D, $86, $2D, $30 ; ROM $00294E: 8C 24 24 24 24 B0 21 AA 21 86 21 A4 2D 86 2D 30
+    .byte $F9, $8C, $29, $F8, $98, $29, $86, $24, $29, $8C, $29, $26, $2B, $2E, $28, $00 ; ROM $00295E: F9 8C 29 F8 98 29 86 24 29 8C 29 26 2B 2E 28 00
+    .byte $92, $28, $83, $29, $2B, $8C, $2D, $00, $11, $86, $11, $11, $8C, $11, $00, $98 ; ROM $00296E: 92 28 83 29 2B 8C 2D 00 11 86 11 11 8C 11 00 98
+    .byte $00, $FF, $F9, $FD, $02, $98, $1D, $1C, $1A, $18, $FC, $1B, $1A, $18, $16, $18 ; ROM $00297E: 00 FF F9 FD 02 98 1D 1C 1A 18 FC 1B 1A 18 16 18
+    .byte $18, $1A, $1C, $FD, $02, $1D, $1C, $1A, $18, $FC, $F8, $8C, $1F, $1D, $1B, $2B ; ROM $00298E: 18 1A 1C FD 02 1D 1C 1A 18 FC F8 8C 1F 1D 1B 2B
+    .byte $18, $00, $92, $18, $83, $18, $18, $8C, $29, $00, $11, $86, $11, $11, $8C, $11 ; ROM $00299E: 18 00 92 18 83 18 18 8C 29 00 11 86 11 11 8C 11
+    .byte $00, $98, $00, $FF, $98, $28, $92, $24, $86, $24, $98, $27, $92, $24, $86, $24 ; ROM $0029AE: 00 98 00 FF 98 28 92 24 86 24 98 27 92 24 86 24
+    .byte $28, $29, $2A, $2B, $F9, $8C, $28, $24, $F8, $98, $22, $29, $28, $92, $24, $86 ; ROM $0029BE: 28 29 2A 2B F9 8C 28 24 F8 98 22 29 28 92 24 86
+    .byte $24, $98, $27, $92, $24, $86, $24, $8C, $22, $84, $21, $20, $1F, $F9, $8C, $22 ; ROM $0029CE: 24 98 27 92 24 86 24 8C 22 84 21 20 1F F9 8C 22
+    .byte $23, $F8, $24, $00, $98, $00, $FF, $E0, $00, $86, $1F, $21, $22, $23, $F9, $8C ; ROM $0029DE: 23 F8 24 00 98 00 FF E0 00 86 1F 21 22 23 F9 8C
+    .byte $1F, $1C, $F8, $98, $1D, $22, $1F, $92, $1C, $86, $1C, $98, $1E, $92, $1B, $86 ; ROM $0029EE: 1F 1C F8 98 1D 22 1F 92 1C 86 1C 98 1E 92 1B 86
+    .byte $1E, $8C, $16, $84, $15, $14, $13, $F9, $8C, $16, $17, $F8, $18, $00, $0C, $00 ; ROM $0029FE: 1E 8C 16 84 15 14 13 F9 8C 16 17 F8 18 00 0C 00
+    .byte $FF, $8C, $18, $1F, $00, $1F, $18, $1F, $00, $1F, $18, $1F, $00, $1F, $14, $1B ; ROM $002A0E: FF 8C 18 1F 00 1F 18 1F 00 1F 18 1F 00 1F 14 1B
+    .byte $00, $1B, $18, $1F, $00, $1F, $14, $1B, $00, $1B, $16, $84, $15, $14, $13, $F9 ; ROM $002A1E: 00 1B 18 1F 00 1F 14 1B 00 1B 16 84 15 14 13 F9
+    .byte $8C, $16, $17, $F8, $18, $00, $0C, $00, $FF, $94, $00, $85, $2C, $2C, $33, $33 ; ROM $002A2E: 8C 16 17 F8 18 00 0C 00 FF 94 00 85 2C 2C 33 33
+    .byte $8A, $33, $00, $85, $2C, $2C, $33, $33, $32, $32, $30, $30, $2E, $2E, $29, $29 ; ROM $002A3E: 8A 33 00 85 2C 2C 33 33 32 32 30 30 2E 2E 29 29
+    .byte $26, $26, $24, $24, $94, $22, $00, $85, $31, $31, $36, $36, $8A, $36, $00, $85 ; ROM $002A4E: 26 26 24 24 94 22 00 85 31 31 36 36 8A 36 00 85
+    .byte $31, $31, $3A, $3A, $37, $37, $35, $35, $33, $33, $31, $31, $30, $30, $2E, $2E ; ROM $002A5E: 31 31 3A 3A 37 37 35 35 33 33 31 31 30 30 2E 2E
+    .byte $2C, $2C, $2B, $2B, $FE, $94, $00, $85, $24, $24, $30, $30, $8A, $30, $00, $85 ; ROM $002A6E: 2C 2C 2B 2B FE 94 00 85 24 24 30 30 8A 30 00 85
+    .byte $24, $24, $30, $30, $2E, $2E, $2D, $2D, $29, $29, $26, $26, $22, $22, $1D, $1D ; ROM $002A7E: 24 24 30 30 2E 2E 2D 2D 29 29 26 26 22 22 1D 1D
+    .byte $94, $1A, $00, $85, $2E, $2E, $31, $31, $8A, $31, $00, $85, $2E, $2E, $31, $31 ; ROM $002A8E: 94 1A 00 85 2E 2E 31 31 8A 31 00 85 2E 2E 31 31
+    .byte $33, $33, $31, $31, $30, $30, $2E, $2E, $2C, $2C, $2B, $2B, $24, $24, $22, $22 ; ROM $002A9E: 33 33 31 31 30 30 2E 2E 2C 2C 2B 2B 24 24 22 22
+    .byte $FE, $85, $14, $14, $20, $20, $2C, $2C, $20, $20, $14, $14, $20, $20, $2C, $2C ; ROM $002AAE: FE 85 14 14 20 20 2C 2C 20 20 14 14 20 20 2C 2C
+    .byte $20, $20, $16, $16, $22, $22, $2E, $2E, $22, $22, $16, $16, $22, $22, $16, $16 ; ROM $002ABE: 20 20 16 16 22 22 2E 2E 22 22 16 16 22 22 16 16
+    .byte $22, $22, $12, $12, $1E, $1E, $2A, $2A, $1E, $1E, $12, $12, $1E, $1E, $2A, $2A ; ROM $002ACE: 22 22 12 12 1E 1E 2A 2A 1E 1E 12 12 1E 1E 2A 2A
+    .byte $1E, $1E, $0F, $0F, $1B, $1B, $27, $27, $1B, $1B, $0F, $0F, $1B, $1B, $27, $27 ; ROM $002ADE: 1E 1E 0F 0F 1B 1B 27 27 1B 1B 0F 0F 1B 1B 27 27
+    .byte $25, $25, $FE, $83, $30, $2B, $24, $1F, $18, $13, $0C, $07, $18, $17, $16, $15 ; ROM $002AEE: 25 25 FE 83 30 2B 24 1F 18 13 0C 07 18 17 16 15
+    .byte $14, $15, $16, $17, $92, $18, $86, $18, $F9, $8C, $1B, $1B, $F8, $98, $18, $00 ; ROM $002AFE: 14 15 16 17 92 18 86 18 F9 8C 1B 1B F8 98 18 00
+    .byte $FF, $98, $00, $83, $0C, $0B, $0A, $09, $08, $09, $0A, $0B, $92, $0C, $86, $0C ; ROM $002B0E: FF 98 00 83 0C 0B 0A 09 08 09 0A 0B 92 0C 86 0C
+    .byte $F9, $8C, $0F, $0F, $F8, $98, $0C, $00, $FF, $87, $27, $33, $3F, $33, $36, $37 ; ROM $002B1E: F9 8C 0F 0F F8 98 0C 00 FF 87 27 33 3F 33 36 37
+    .byte $33, $31, $27, $33, $3F, $33, $36, $37, $33, $31, $16, $16, $F9, $8E, $16, $F8 ; ROM $002B2E: 33 31 27 33 3F 33 36 37 33 31 16 16 F9 8E 16 F8
+    .byte $87, $22, $22, $F9, $8E, $2E, $0D, $0F, $F8, $87, $38, $2E, $33, $38, $FD, $03 ; ROM $002B3E: 87 22 22 F9 8E 2E 0D 0F F8 87 38 2E 33 38 FD 03
+    .byte $F9, $8E, $37, $33, $32, $33, $F8, $9C, $2E, $87, $2C, $2E, $2A, $2B, $8E, $00 ; ROM $002B4E: F9 8E 37 33 32 33 F8 9C 2E 87 2C 2E 2A 2B 8E 00
+    .byte $3A, $00, $3A, $87, $33, $33, $F9, $8E, $33, $F8, $87, $38, $2E, $33, $38, $FC ; ROM $002B5E: 3A 00 3A 87 33 33 F9 8E 33 F8 87 38 2E 33 38 FC
+    .byte $F9, $8E, $37, $F8, $87, $32, $33, $2C, $2E, $F9, $8E, $2B, $F8, $87, $2C, $2C ; ROM $002B6E: F9 8E 37 F8 87 32 33 2C 2E F9 8E 2B F8 87 2C 2C
+    .byte $F9, $8E, $2C, $F8, $87, $2B, $2B, $F9, $8E, $2B, $27, $27, $00, $F8, $87, $25 ; ROM $002B7E: F9 8E 2C F8 87 2B 2B F9 8E 2B 27 27 00 F8 87 25
+    .byte $26, $8E, $27, $00, $9C, $00, $FF, $87, $1B, $27, $33, $27, $2A, $2B, $27, $25 ; ROM $002B8E: 26 8E 27 00 9C 00 FF 87 1B 27 33 27 2A 2B 27 25
+    .byte $1B, $27, $33, $27, $2A, $2B, $27, $25, $13, $13, $F9, $8E, $13, $F8, $87, $1F ; ROM $002B9E: 1B 27 33 27 2A 2B 27 25 13 13 F9 8E 13 F8 87 1F
+    .byte $1F, $F9, $8E, $2B, $01, $02, $F8, $87, $2C, $22, $27, $2C, $FD, $03, $F9, $8E ; ROM $002BAE: 1F F9 8E 2B 01 02 F8 87 2C 22 27 2C FD 03 F9 8E
+    .byte $31, $2E, $2A, $2B, $F8, $9C, $25, $00, $8E, $27, $22, $25, $2C, $9C, $2B, $87 ; ROM $002BBE: 31 2E 2A 2B F8 9C 25 00 8E 27 22 25 2C 9C 2B 87
+    .byte $35, $22, $30, $33, $FC, $F9, $8E, $33, $F8, $87, $2A, $2B, $26, $27, $F9, $8E ; ROM $002BCE: 35 22 30 33 FC F9 8E 33 F8 87 2A 2B 26 27 F9 8E
+    .byte $22, $F8, $87, $27, $27, $F9, $8E, $27, $F8, $87, $27, $27, $F9, $8E, $27, $1F ; ROM $002BDE: 22 F8 87 27 27 F9 8E 27 F8 87 27 27 F9 8E 27 1F
+    .byte $1F, $00, $F8, $87, $19, $1A, $8E, $1B, $00, $9C, $00, $FF, $87, $1B, $1B, $1B ; ROM $002BEE: 1F 00 F8 87 19 1A 8E 1B 00 9C 00 FF 87 1B 1B 1B
+    .byte $1B, $9C, $00, $87, $1B, $1B, $1B, $1B, $9C, $00, $87, $19, $19, $F9, $8E, $19 ; ROM $002BFE: 1B 9C 00 87 1B 1B 1B 1B 9C 00 87 19 19 F9 8E 19
+    .byte $F8, $87, $25, $25, $F9, $8E, $32, $F8, $B8, $00, $FD, $03, $87, $1B, $1B, $F9 ; ROM $002C0E: F8 87 25 25 F9 8E 32 F8 B8 00 FD 03 87 1B 1B F9
+    .byte $8E, $1B, $1E, $F8, $87, $1F, $22, $27, $1B, $1B, $1B, $1E, $F9, $8E, $1F, $F8 ; ROM $002C1E: 8E 1B 1E F8 87 1F 22 27 1B 1B 1B 1E F9 8E 1F F8
+    .byte $87, $18, $19, $19, $19, $25, $18, $1A, $8E, $16, $87, $25, $19, $19, $19, $9C ; ROM $002C2E: 87 18 19 19 19 25 18 1A 8E 16 87 25 19 19 19 9C
+    .byte $00, $FC, $F9, $8E, $2E, $F8, $87, $2D, $2E, $2A, $2B, $27, $22, $9C, $00, $87 ; ROM $002C3E: 00 FC F9 8E 2E F8 87 2D 2E 2A 2B 27 22 9C 00 87
+    .byte $23, $23, $F9, $8E, $23, $22, $22, $F8, $00, $87, $19, $1A, $8E, $1B, $00, $9C ; ROM $002C4E: 23 23 F9 8E 23 22 22 F8 00 87 19 1A 8E 1B 00 9C
+    .byte $00, $FF, $FD, $02, $90, $25, $88, $27, $29, $00, $29, $2B, $00, $FC, $C0, $00 ; ROM $002C5E: 00 FF FD 02 90 25 88 27 29 00 29 2B 00 FC C0 00
+    .byte $88, $22, $19, $22, $20, $1F, $19, $1F, $20, $FD, $02, $27, $29, $27, $2A, $00 ; ROM $002C6E: 88 22 19 22 20 1F 19 1F 20 FD 02 27 29 27 2A 00
+    .byte $29, $27, $00, $FC, $C0, $00, $88, $20, $17, $20, $1E, $1D, $17, $1D, $1F, $FE ; ROM $002C7E: 29 27 00 FC C0 00 88 20 17 20 1E 1D 17 1D 1F FE
+    .byte $FD, $02, $90, $22, $88, $24, $26, $00, $26, $27, $00, $FC, $FD, $02, $1B, $13 ; ROM $002C8E: FD 02 90 22 88 24 26 00 26 27 00 FC FD 02 1B 13
+    .byte $1B, $19, $18, $13, $18, $19, $FC, $FD, $02, $23, $25, $23, $27, $00, $25, $23 ; ROM $002C9E: 1B 19 18 13 18 19 FC FD 02 23 25 23 27 00 25 23
+    .byte $00, $FC, $FD, $02, $19, $11, $19, $17, $16, $11, $16, $19, $FC, $FE, $FD, $04 ; ROM $002CAE: 00 FC FD 02 19 11 19 17 16 11 16 19 FC FE FD 04
+    .byte $90, $1B, $1B, $1B, $1B, $FC, $FD, $04, $19, $19, $19, $19, $FC, $FE, $85, $33 ; ROM $002CBE: 90 1B 1B 1B 1B FC FD 04 19 19 19 19 FC FE 85 33
+    .byte $00, $32, $33, $32, $33, $32, $33, $2E, $00, $2D, $2E, $2D, $2E, $2D, $2E, $2B ; ROM $002CCE: 00 32 33 32 33 32 33 2E 00 2D 2E 2D 2E 2D 2E 2B
+    .byte $2C, $2D, $2E, $2B, $2C, $2D, $2E, $2B, $00, $27, $00, $94, $25, $FF, $85, $2B ; ROM $002CDE: 2C 2D 2E 2B 2C 2D 2E 2B 00 27 00 94 25 FF 85 2B
+    .byte $00, $2A, $2B, $2A, $2B, $2A, $2B, $27, $00, $26, $27, $26, $27, $26, $27, $27 ; ROM $002CEE: 00 2A 2B 2A 2B 2A 2B 27 00 26 27 26 27 26 27 27
+    .byte $29, $2A, $2B, $27, $29, $2A, $2B, $27, $00, $1F, $00, $94, $22, $FF, $F9, $8A ; ROM $002CFE: 29 2A 2B 27 29 2A 2B 27 00 1F 00 94 22 FF F9 8A
+    .byte $1B, $1B, $1F, $22, $1B, $1B, $1F, $22, $F8, $85, $22, $24, $26, $27, $22, $24 ; ROM $002D0E: 1B 1B 1F 22 1B 1B 1F 22 F8 85 22 24 26 27 22 24
+    .byte $26, $27, $F9, $8A, $22, $1B, $F8, $94, $16, $FF, $FD, $02, $87, $27, $27, $F9 ; ROM $002D1E: 26 27 F9 8A 22 1B F8 94 16 FF FD 02 87 27 27 F9
+    .byte $8E, $30, $31, $F8, $87, $22, $22, $F9, $8E, $2E, $30, $F8, $87, $31, $30, $F9 ; ROM $002D2E: 8E 30 31 F8 87 22 22 F9 8E 2E 30 F8 87 31 30 F9
+    .byte $8E, $2E, $F8, $FC, $FD, $02, $87, $25, $25, $F9, $8E, $2E, $2F, $F8, $87, $20 ; ROM $002D3E: 8E 2E F8 FC FD 02 87 25 25 F9 8E 2E 2F F8 87 20
+    .byte $20, $F9, $8E, $2C, $2E, $F8, $87, $2F, $2E, $F9, $8E, $2C, $F8, $FC, $FE, $9C ; ROM $002D4E: 20 F9 8E 2C 2E F8 87 2F 2E F9 8E 2C F8 FC FE 9C
+    .byte $00, $87, $25, $95, $00, $B8, $00, $9C, $00, $95, $27, $87, $27, $F9, $8E, $2C ; ROM $002D5E: 00 87 25 95 00 B8 00 9C 00 95 27 87 27 F9 8E 2C
+    .byte $2B, $F8, $27, $00, $9C, $00, $87, $23, $95, $00, $B8, $00, $9C, $00, $95, $25 ; ROM $002D6E: 2B F8 27 00 9C 00 87 23 95 00 B8 00 9C 00 95 25
+    .byte $87, $25, $F9, $8E, $2A, $F8, $87, $29, $2A, $8E, $25, $00, $FE, $9C, $00, $87 ; ROM $002D7E: 87 25 F9 8E 2A F8 87 29 2A 8E 25 00 FE 9C 00 87
+    .byte $1D, $95, $00, $B8, $00, $9C, $00, $87, $1D, $95, $00, $B8, $00, $9C, $00, $87 ; ROM $002D8E: 1D 95 00 B8 00 9C 00 87 1D 95 00 B8 00 9C 00 87
+    .byte $1B, $95, $00, $B8, $00, $9C, $00, $87, $1B, $95, $00, $B8, $00, $FE, $87, $27 ; ROM $002D9E: 1B 95 00 B8 00 9C 00 87 1B 95 00 B8 00 FE 87 27
+    .byte $27, $33, $27, $F9, $8E, $2A, $F8, $87, $2E, $30, $F9, $8E, $31, $31, $F8, $30 ; ROM $002DAE: 27 33 27 F9 8E 2A F8 87 2E 30 F9 8E 31 31 F8 30
+    .byte $00, $87, $25, $25, $31, $25, $F9, $8E, $29, $F8, $87, $2C, $2E, $F9, $8E, $2F ; ROM $002DBE: 00 87 25 25 31 25 F9 8E 29 F8 87 2C 2E F9 8E 2F
+    .byte $F8, $87, $2E, $2F, $25, $24, $F9, $8E, $25, $F8, $87, $22, $22, $2E, $22, $F9 ; ROM $002DCE: F8 87 2E 2F 25 24 F9 8E 25 F8 87 22 22 2E 22 F9
+    .byte $8E, $2C, $F8, $87, $2B, $2C, $F9, $8E, $22, $2E, $F8, $22, $00, $87, $22, $22 ; ROM $002DDE: 8E 2C F8 87 2B 2C F9 8E 22 2E F8 22 00 87 22 22
+    .byte $2E, $22, $F9, $8E, $2C, $F8, $87, $2B, $2C, $F9, $8E, $22, $2E, $F8, $87, $22 ; ROM $002DEE: 2E 22 F9 8E 2C F8 87 2B 2C F9 8E 22 2E F8 87 22
+    .byte $22, $24, $26, $FE, $3D, $01, $03, $81, $03, $80, $1B, $04, $06, $84, $1B, $04 ; ROM $002DFE: 22 24 26 FE 3D 01 03 81 03 80 1B 04 06 84 1B 04
+    .byte $02, $05, $34, $01, $08, $41, $13, $01, $01, $00, $06, $01, $01, $00, $0F, $01 ; ROM $002E0E: 02 05 34 01 08 41 13 01 01 00 06 01 01 00 0F 01
+    .byte $01, $00, $03, $01, $01, $00, $11, $01, $06, $81, $1B, $01, $03, $81, $0E, $01 ; ROM $002E1E: 01 00 03 01 01 00 11 01 06 81 1B 01 03 81 0E 01
+    .byte $1A, $00, $11, $01, $05, $81, $16, $01, $02, $00, $01, $01, $11, $04, $10, $00 ; ROM $002E2E: 1A 00 11 01 05 81 16 01 02 00 01 01 11 04 10 00
+    .byte $10, $40, $10, $00, $02, $04, $01, $00, $01, $04, $01, $00, $0E, $04, $01, $00 ; ROM $002E3E: 10 40 10 00 02 04 01 00 01 04 01 00 0E 04 01 00
+    .byte $02, $04, $01, $00, $01, $04, $38, $00, $1A, $04, $03, $00, $04, $02, $01, $00 ; ROM $002E4E: 02 04 01 00 01 04 38 00 1A 04 03 00 04 02 01 00
+    .byte $04, $80, $09, $00, $16, $02, $02, $00, $02, $04, $05, $02, $01, $00, $15, $04 ; ROM $002E5E: 04 80 09 00 16 02 02 00 02 04 05 02 01 00 15 04
+    .byte $3A, $00, $0A, $40, $17, $00, $0D, $04, $02, $00, $06, $80, $06, $00, $1D, $08 ; ROM $002E6E: 3A 00 0A 40 17 00 0D 04 02 00 06 80 06 00 1D 08
+    .byte $01, $00, $0C, $01, $02, $00, $09, $40, $0A, $00, $28, $02, $01, $00, $20, $02 ; ROM $002E7E: 01 00 0C 01 02 00 09 40 0A 00 28 02 01 00 20 02
+    .byte $1E, $04, $02, $84, $05, $80, $5D, $01, $06, $00, $1D, $02, $21, $08, $04, $00 ; ROM $002E8E: 1E 04 02 84 05 80 5D 01 06 00 1D 02 21 08 04 00
+    .byte $06, $80, $03, $00, $1A, $02, $02, $00, $0F, $08, $02, $00, $09, $40, $08, $00 ; ROM $002E9E: 06 80 03 00 1A 02 02 00 0F 08 02 00 09 40 08 00
+    .byte $08, $40, $14, $00, $0F, $08, $01, $00, $0D, $08, $01, $00, $01, $08, $01, $00 ; ROM $002EAE: 08 40 14 00 0F 08 01 00 0D 08 01 00 01 08 01 00
+    .byte $11, $08, $02, $00, $1E, $01, $06, $81, $15, $01, $05, $81, $19, $01, $06, $81 ; ROM $002EBE: 11 08 02 00 1E 01 06 81 15 01 05 81 19 01 06 81
+    .byte $06, $00, $1C, $04, $06, $84, $01, $81, $01, $01, $03, $00, $1B, $01, $01, $00 ; ROM $002ECE: 06 00 1C 04 06 84 01 81 01 01 03 00 1B 01 01 00
+    .byte $0E, $08, $01, $48, $08, $40, $17, $00, $0D, $04, $01, $84, $06, $80, $02, $00 ; ROM $002EDE: 0E 08 01 48 08 40 17 00 0D 04 01 84 06 80 02 00
+    .byte $1E, $02, $04, $82, $01, $80, $01, $00, $1F, $04, $05, $84, $1E, $04, $04, $84 ; ROM $002EEE: 1E 02 04 82 01 80 01 00 1F 04 05 84 1E 04 04 84
+    .byte $02, $80, $1C, $02, $02, $00, $0F, $08, $01, $00, $09, $40, $11, $00, $0F, $04 ; ROM $002EFE: 02 80 1C 02 02 00 0F 08 01 00 09 40 11 00 0F 04
+    .byte $01, $05, $01, $00, $04, $01, $09, $81, $14, $01, $06, $81, $19, $01, $01, $00 ; ROM $002F0E: 01 05 01 00 04 01 09 81 14 01 06 81 19 01 01 00
+    .byte $0E, $08, $03, $48, $01, $00, $06, $40, $14, $00, $06, $80, $02, $88, $04, $08 ; ROM $002F1E: 0E 08 03 48 01 00 06 40 14 00 06 80 02 88 04 08
+    .byte $01, $00, $08, $08, $01, $00, $03, $08, $02, $88, $01, $00, $02, $88, $01, $00 ; ROM $002F2E: 01 00 08 08 01 00 03 08 02 88 01 00 02 88 01 00
+    .byte $14, $08, $05, $88, $04, $08, $02, $00, $1B, $01, $07, $81, $18, $01, $06, $81 ; ROM $002F3E: 14 08 05 88 04 08 02 00 1B 01 07 81 18 01 06 81
+    .byte $15, $01, $02, $09, $10, $08, $0A, $40, $1A, $00, $0A, $04, $01, $00, $06, $04 ; ROM $002F4E: 15 01 02 09 10 08 0A 40 1A 00 0A 04 01 00 06 04
+    .byte $01, $00, $1E, $02, $06, $00, $10, $08, $03, $84, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002F5E: 01 00 1E 02 06 00 10 08 03 84 FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002F6E: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002F7E: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002F8E: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002F9E: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FAE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FBE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FCE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FDE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FEE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $002FFE: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $00, $00, $1F, $F0 ; ROM $00300E: FF FF FF FF FF FF FF FF FF FF FF FC 00 00 1F F0
+    .byte $00, $1F, $FE, $00, $00, $07, $FF, $FF, $FF, $30, $00, $00, $3F, $FF, $E0, $07 ; ROM $00301E: 00 1F FE 00 00 07 FF FF FF 30 00 00 3F FF E0 07
+    .byte $F0, $3F, $F8, $1F, $F0, $1F, $FF, $FF, $C0, $00, $03, $FF, $C0, $FF, $FF, $C0 ; ROM $00302E: F0 3F F8 1F F0 1F FF FF C0 00 03 FF C0 FF FF C0
+    .byte $7F, $C7, $FF, $00, $00, $00, $FF, $F0, $00, $1F, $FF, $FE, $00, $00, $00, $00 ; ROM $00303E: 7F C7 FF 00 00 00 FF F0 00 1F FF FE 00 00 00 00
+    .byte $00, $00, $00, $7F, $F0, $00, $07, $FF, $FF, $C0, $01, $80, $FF, $00, $02, $80 ; ROM $00304E: 00 00 00 7F F0 00 07 FF FF C0 01 80 FF 00 02 80
+    .byte $3F, $FF, $F8, $00, $03, $FF, $FF, $FF, $FE, $00, $00, $1F, $FF, $FF, $F0, $01 ; ROM $00305E: 3F FF F8 00 03 FF FF FF FE 00 00 1F FF FF F0 01
+    .byte $FF, $FF, $F0, $00, $0F, $FF, $FF, $FF, $00, $07, $FF, $F0, $00, $FB, $FF, $F8 ; ROM $00306E: FF FF F0 00 0F FF FF FF 00 07 FF F0 00 FB FF F8
+    .byte $FF, $FF, $00, $00, $00, $01, $FF, $FF, $FF, $C0, $3F, $F8, $00, $00, $00, $00 ; ROM $00307E: FF FF 00 00 00 01 FF FF FF C0 3F F8 00 00 00 00
+    .byte $7F, $FF, $FF, $FF, $FF, $FF, $FE, $00, $00, $00, $00, $0F, $FF, $F0, $00, $03 ; ROM $00308E: 7F FF FF FF FF FF FE 00 00 00 00 0F FF F0 00 03
+    .byte $FF, $FF, $FF, $E0, $00, $00, $03, $FF, $FF, $F8, $00, $00, $00, $FF, $FF, $FF ; ROM $00309E: FF FF FF E0 00 00 03 FF FF F8 00 00 00 FF FF FF
+    .byte $00, $00, $00, $00, $1F, $E0, $00, $00, $07, $FF, $FF, $FE, $00, $00, $01, $FF ; ROM $0030AE: 00 00 00 00 1F E0 00 00 07 FF FF FE 00 00 01 FF
+    .byte $FE, $00, $00, $07, $FF, $FF, $FF, $F8, $00, $00, $00, $1F, $FF, $FF, $E0, $00 ; ROM $0030BE: FE 00 00 07 FF FF FF F8 00 00 00 1F FF FF E0 00
+    .byte $00, $01, $FF, $FF, $FF, $FF, $FF, $C0, $00, $00, $00, $00, $0F, $FF, $FF, $FF ; ROM $0030CE: 00 01 FF FF FF FF FF C0 00 00 00 00 0F FF FF FF
+    .byte $FE, $00, $00, $07, $E0, $00, $00, $00, $00, $7F, $FF, $EF, $FF, $FF, $FF, $FF ; ROM $0030DE: FE 00 00 07 E0 00 00 00 00 7F FF EF FF FF FF FF
+    .byte $FF, $80, $00, $00, $3F, $FF, $C0, $00, $00, $00, $0F, $FF, $FF, $FC, $00, $FF ; ROM $0030EE: FF 80 00 00 3F FF C0 00 00 00 0F FF FF FC 00 FF
+    .byte $FF, $FE, $00, $00, $00, $7F, $FF, $FF, $FF, $C0, $00, $00, $00, $03, $FF, $FF ; ROM $0030FE: FF FE 00 00 00 7F FF FF FF C0 00 00 00 03 FF FF
+    .byte $FF, $C0, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FE, $00, $07, $FF, $00, $00 ; ROM $00310E: FF C0 00 00 00 1F FF FF FF FF FE 00 07 FF 00 00
+    .byte $0F, $FF, $FF, $FC, $00, $00, $00, $00, $3F, $FF, $FF, $F0, $00, $00, $00, $0F ; ROM $00311E: 0F FF FF FC 00 00 00 00 3F FF FF F0 00 00 00 0F
+    .byte $FE, $00, $00, $03, $FF, $FF, $C0, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF ; ROM $00312E: FE 00 00 03 FF FF C0 00 00 00 00 FF FF FF FF FF
+    .byte $80, $00, $01, $FF, $FF, $FF, $F0, $00, $00, $00, $00, $7F, $FF, $FF, $DA, $2E ; ROM $00313E: 80 00 01 FF FF FF F0 00 00 00 00 7F FF FF DA 2E
+    .byte $00, $00, $00, $7F, $FF, $FF, $FF, $FE, $00, $00, $FF, $80, $FF, $FC, $00, $00 ; ROM $00314E: 00 00 00 7F FF FF FF FE 00 00 FF 80 FF FC 00 00
+    .byte $00, $00, $03, $FF, $FF, $FF, $FF, $FF, $80, $00, $00, $0F, $FF, $FF, $F8, $00 ; ROM $00315E: 00 00 03 FF FF FF FF FF 80 00 00 0F FF FF F8 00
+    .byte $00, $00, $03, $FF, $FF, $FF, $C0, $00, $00, $00, $07, $FF, $FF, $FF, $FF, $80 ; ROM $00316E: 00 00 03 FF FF FF C0 00 00 00 07 FF FF FF FF 80
+    .byte $00, $00, $01, $FF, $FF, $00, $00, $00, $01, $FF, $FF, $FF, $FF, $FF, $FF, $00 ; ROM $00317E: 00 00 01 FF FF 00 00 00 01 FF FF FF FF FF FF 00
+    .byte $3F, $FF, $F0, $00, $00, $00, $07, $FF, $FF, $FF, $FE, $00, $03, $FF, $FE, $00 ; ROM $00318E: 3F FF F0 00 00 00 07 FF FF FF FE 00 03 FF FE 00
+    .byte $00, $07, $FF, $FF, $FF, $C0, $00, $00, $00, $00, $7F, $FF, $E0, $00, $00, $00 ; ROM $00319E: 00 07 FF FF FF C0 00 00 00 00 7F FF E0 00 00 00
+    .byte $03, $FF, $FF, $FF, $FF, $FF, $00, $00, $7C, $00, $00, $00, $0F, $FF, $FF, $FF ; ROM $0031AE: 03 FF FF FF FF FF 00 00 7C 00 00 00 0F FF FF FF
+    .byte $FF, $FF, $F8, $00, $00, $00, $3F, $FF, $FF, $FF, $C0, $00, $00, $07, $FF, $F0 ; ROM $0031BE: FF FF F8 00 00 00 3F FF FF FF C0 00 00 07 FF F0
+    .byte $00, $00, $7F, $FF, $80, $00, $07, $FC, $00, $FF, $FF, $FF, $FF, $00, $00, $00 ; ROM $0031CE: 00 00 7F FF 80 00 07 FC 00 FF FF FF FF 00 00 00
+    .byte $0F, $FF, $FF, $FF, $FE, $00, $00, $00, $3F, $FF, $FF, $F8, $00, $00, $00, $00 ; ROM $0031DE: 0F FF FF FF FE 00 00 00 3F FF FF F8 00 00 00 00
+    .byte $3F, $FF, $C0, $00, $00, $FF, $FF, $FF, $E0, $00, $00, $00, $1F, $FF, $FF, $FF ; ROM $0031EE: 3F FF C0 00 00 FF FF FF E0 00 00 00 1F FF FF FF
+    .byte $FC, $00, $00, $7F, $FF, $FF, $F8, $00, $00, $00, $3F, $FF, $FF, $FF, $00, $00 ; ROM $0031FE: FC 00 00 7F FF FF F8 00 00 00 3F FF FF FF 00 00
+    .byte $00, $00, $00, $FF, $FF, $FE, $11, $B0, $3F, $FF, $E0, $00, $00, $00, $00, $07 ; ROM $00320E: 00 00 00 FF FF FE 11 B0 3F FF E0 00 00 00 00 07
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $00, $00, $00, $00, $00, $00, $00 ; ROM $00321E: FF FF FF FF FF FF FF FF F8 00 00 00 00 00 00 00
+    .byte $0F, $FF, $FF, $FF, $FF, $FF, $80, $00, $00, $00, $03, $FF, $FE, $00, $0F, $FF ; ROM $00322E: 0F FF FF FF FF FF 80 00 00 00 03 FF FE 00 0F FF
+    .byte $FF, $80, $00, $00, $00, $FF, $FF, $FF, $FC, $00, $00, $00, $00, $FF, $FF, $FE ; ROM $00323E: FF 80 00 00 00 FF FF FF FC 00 00 00 00 FF FF FE
+    .byte $00, $07, $FF, $FF, $FF, $FF, $E0, $00, $00, $00, $00, $0F, $FF, $A0, $BF, $FF ; ROM $00324E: 00 07 FF FF FF FF E0 00 00 00 00 0F FF A0 BF FF
+    .byte $FF, $FE, $00, $00, $7F, $FC, $00, $00, $00, $7F, $FF, $FF, $E0, $00, $00, $00 ; ROM $00325E: FF FE 00 00 7F FC 00 00 00 7F FF FF E0 00 00 00
+    .byte $3F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $80, $00, $00, $00, $07, $F8, $00, $00 ; ROM $00326E: 3F FF FF FF FF FF FF FF 80 00 00 00 07 F8 00 00
+    .byte $00, $00, $03, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $01, $FF, $FF ; ROM $00327E: 00 00 03 FF FF FF FF FF 00 00 00 00 00 01 FF FF
+    .byte $FF, $F0, $00, $07, $FF, $FF, $FC, $00, $00, $00, $00, $3F, $FF, $FF, $FF, $FF ; ROM $00328E: FF F0 00 07 FF FF FC 00 00 00 00 3F FF FF FF FF
+    .byte $0F, $FF, $FF, $FE, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $F8, $00, $01 ; ROM $00329E: 0F FF FF FE 00 00 00 00 00 FF FF FF FF F8 00 01
+    .byte $FF, $FC, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $C0, $00, $00, $00, $00, $03 ; ROM $0032AE: FF FC 00 00 00 00 FF FF FF FF C0 00 00 00 00 03
+    .byte $FF, $FF, $80, $00, $00, $00, $00, $3F, $FF, $FF, $FF, $FF, $FF, $C0, $00, $3F ; ROM $0032BE: FF FF 80 00 00 00 00 3F FF FF FF FF FF C0 00 3F
+    .byte $FF, $FF, $FF, $F8, $00, $00, $02, $00, $00, $00, $00, $00, $07, $FF, $FF, $FF ; ROM $0032CE: FF FF FF F8 00 00 02 00 00 00 00 00 07 FF FF FF
+    .byte $FF, $FF, $FF, $FF, $E0, $B8, $00, $00, $00, $00, $00, $00, $3F, $FF, $FF, $FF ; ROM $0032DE: FF FF FF FF E0 B8 00 00 00 00 00 00 3F FF FF FF
+    .byte $FF, $FF, $F8, $00, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $80, $00, $00, $00 ; ROM $0032EE: FF FF F8 00 00 00 00 1F FF FF FF FF 80 00 00 00
+    .byte $00, $0F, $FF, $FF, $FF, $DF, $FF, $00, $00, $0F, $FF, $FF, $80, $00, $00, $00 ; ROM $0032FE: 00 0F FF FF FF DF FF 00 00 0F FF FF 80 00 00 00
+    .byte $03, $FF, $FF, $FF, $FF, $FF, $FF, $C0, $00, $00, $00, $01, $FF, $FF, $FF, $00 ; ROM $00330E: 03 FF FF FF FF FF FF C0 00 00 00 01 FF FF FF 00
+    .byte $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FF, $FF, $E0, $00, $FF, $00, $00, $00 ; ROM $00331E: 00 00 00 1F FF FF FF FF FF FF E0 00 FF 00 00 00
+    .byte $00, $00, $00, $01, $FF, $FF, $FF, $C0, $00, $00, $03, $FF, $FF, $FF, $FF, $FF ; ROM $00332E: 00 00 00 01 FF FF FF C0 00 00 03 FF FF FF FF FF
+    .byte $F0, $00, $00, $00, $00, $00, $07, $FF, $FF, $FF, $FF, $FF, $80, $00, $00, $00 ; ROM $00333E: F0 00 00 00 00 00 07 FF FF FF FF FF 80 00 00 00
+    .byte $00, $0F, $FF, $FF, $FF, $F0, $00, $3F, $FF, $FF, $00, $00, $17, $FB, $C8, $84 ; ROM $00334E: 00 0F FF FF FF F0 00 3F FF FF 00 00 17 FB C8 84
+    .byte $E5, $3F, $FF, $20, $00, $14, $19, $D9, $9F, $F6, $00, $00, $17, $FF, $FF, $FF ; ROM $00335E: E5 3F FF 20 00 14 19 D9 9F F6 00 00 17 FF FF FF
+    .byte $FF, $FE, $00, $00, $00, $00, $00, $03, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FE ; ROM $00336E: FF FE 00 00 00 00 00 03 FF FF FF FF FF FF FF FE
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $FF, $FF, $FF, $DC, $80, $00, $26, $FE ; ROM $00337E: 00 00 00 00 00 00 00 00 FF FF FF DC 80 00 26 FE
+    .byte $57, $FF, $FF, $80, $00, $00, $07, $FC, $C0, $3F, $FF, $FF, $7F, $BD, $C4, $61 ; ROM $00338E: 57 FF FF 80 00 00 07 FC C0 3F FF FF 7F BD C4 61
+    .byte $4E, $EE, $67, $20, $46, $64, $EF, $E6, $00, $00, $FD, $A0, $00, $00, $00, $00 ; ROM $00339E: 4E EE 67 20 46 64 EF E6 00 00 FD A0 00 00 00 00
+    .byte $07, $FF, $FF, $FF, $FF, $FF, $F0, $00, $00, $00, $00, $00, $7F, $FF, $FF, $FF ; ROM $0033AE: 07 FF FF FF FF FF F0 00 00 00 00 00 7F FF FF FF
+    .byte $FF, $C0, $00, $00, $00, $00, $0F, $7F, $F8, $DF, $FF, $FF, $C0, $03, $FB, $9F ; ROM $0033BE: FF C0 00 00 00 00 0F 7F F8 DF FF FF C0 03 FB 9F
+    .byte $AF, $FF, $FF, $80, $00, $00, $02, $F6, $A5, $6F, $FF, $FF, $FC, $00, $3F, $FF ; ROM $0033CE: AF FF FF 80 00 00 02 F6 A5 6F FF FF FC 00 3F FF
+    .byte $C0, $00, $00, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FF, $82, $00, $00, $00 ; ROM $0033DE: C0 00 00 00 00 00 1F FF FF FF FF FF 82 00 00 00
+    .byte $00, $00, $00, $03, $FF, $FF, $FF, $FF, $C0, $00, $00, $00, $00, $7F, $FF, $FF ; ROM $0033EE: 00 00 00 03 FF FF FF FF C0 00 00 00 00 7F FF FF
+    .byte $FF, $FE, $00, $00, $00, $00, $1E, $7B, $FF, $FF, $FF, $FF, $FF, $F8, $00, $BF ; ROM $0033FE: FF FE 00 00 00 00 1E 7B FF FF FF FF FF F8 00 BF
+    .byte $FF, $FF, $C0, $00, $00, $00, $00, $07, $FF, $FF, $FF, $FF, $FF, $FE, $00, $00 ; ROM $00340E: FF FF C0 00 00 00 00 07 FF FF FF FF FF FE 00 00
+    .byte $00, $00, $00, $00, $01, $FF, $FF, $FF, $88, $20, $0D, $FF, $F0, $00, $00, $00 ; ROM $00341E: 00 00 00 00 01 FF FF FF 88 20 0D FF F0 00 00 00
+    .byte $03, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $00, $00, $00, $00, $00, $00, $FF, $FF ; ROM $00342E: 03 FF FF FF FF FF FF F8 00 00 00 00 00 00 FF FF
+    .byte $FF, $FF, $FF, $F8, $00, $00, $3F, $FF, $FF, $80, $00, $00, $00, $00, $00, $01 ; ROM $00343E: FF FF FF F8 00 00 3F FF FF 80 00 00 00 00 00 01
+    .byte $FF, $FF, $FF, $FF, $FF, $FE, $00, $00, $00, $07, $FF, $FF, $FF, $FF, $FF, $00 ; ROM $00344E: FF FF FF FF FF FE 00 00 00 07 FF FF FF FF FF 00
+    .byte $00, $00, $00, $00, $00, $01, $FF, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00 ; ROM $00345E: 00 00 00 00 00 01 FF FF FF FF FF FF 00 00 00 00
+    .byte $00, $00, $07, $FF, $FF, $FF, $FF, $F6, $6F, $FF, $E0, $00, $00, $00, $00, $7F ; ROM $00346E: 00 00 07 FF FF FF FF F6 6F FF E0 00 00 00 00 7F
+    .byte $FF, $FF, $FE, $00, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FE, $00, $00, $00 ; ROM $00347E: FF FF FE 00 00 00 00 1F FF FF FF FF FE 00 00 00
+    .byte $00, $00, $06, $69, $43, $1A, $ED, $BF, $FF, $FF, $F0, $00, $00, $00, $00, $00 ; ROM $00348E: 00 00 06 69 43 1A ED BF FF FF F0 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F0, $00, $00, $00, $00, $1F, $FF, $FF, $FF ; ROM $00349E: FF FF FF FF FF FF FF F0 00 00 00 00 1F FF FF FF
+    .byte $FF, $C0, $00, $00, $00, $00, $00, $00, $17, $FF, $FF, $FF, $FF, $02, $29, $99 ; ROM $0034AE: FF C0 00 00 00 00 00 00 17 FF FF FF FF 02 29 99
+    .byte $DF, $FE, $A4, $26, $75, $AC, $61, $AF, $6D, $84, $44, $50, $9F, $BB, $79, $D9 ; ROM $0034BE: DF FE A4 26 75 AC 61 AF 6D 84 44 50 9F BB 79 D9
+    .byte $9B, $EC, $DB, $27, $FE, $00, $00, $00, $00, $07, $FF, $FF, $FF, $FC, $00, $00 ; ROM $0034CE: 9B EC DB 27 FE 00 00 00 00 07 FF FF FF FC 00 00
+    .byte $00, $00, $1F, $FF, $FF, $FF, $80, $00, $0F, $FF, $FF, $FF, $00, $00, $00, $00 ; ROM $0034DE: 00 00 1F FF FF FF 80 00 0F FF FF FF 00 00 00 00
+    .byte $1F, $FF, $FF, $80, $00, $00, $03, $DC, $DA, $FF, $FF, $FF, $FF, $00, $00, $00 ; ROM $0034EE: 1F FF FF 80 00 00 03 DC DA FF FF FF FF 00 00 00
+    .byte $00, $00, $00, $3F, $FF, $FF, $FF, $FF, $FF, $F0, $00, $00, $00, $1F, $FF, $FF ; ROM $0034FE: 00 00 00 3F FF FF FF FF FF F0 00 00 00 1F FF FF
+    .byte $FF, $FF, $F8, $00, $00, $00, $00, $00, $00, $5E, $FB, $EB, $AC, $C7, $EF, $BB ; ROM $00350E: FF FF F8 00 00 00 00 00 00 5E FB EB AC C7 EF BB
+    .byte $79, $BF, $FF, $E0, $00, $0F, $F8, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $00351E: 79 BF FF E0 00 0F F8 00 00 00 FF FF FF FF FF FF
+    .byte $FC, $00, $00, $00, $00, $00, $00, $3F, $FF, $FF, $F7, $FF, $FF, $FF, $FA, $10 ; ROM $00352E: FC 00 00 00 00 00 00 3F FF FF F7 FF FF FF FA 10
+    .byte $00, $00, $00, $00, $00, $00, $00, $00, $0F, $FC, $FB, $EE, $FF, $EA, $D9, $DF ; ROM $00353E: 00 00 00 00 00 00 00 00 0F FC FB EE FF EA D9 DF
+    .byte $CE, $7F, $FF, $FF, $80, $00, $00, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FF ; ROM $00354E: CE 7F FF FF 80 00 00 00 00 00 1F FF FF FF FF FF
+    .byte $FF, $E0, $00, $00, $00, $00, $00, $7F, $FF, $FF, $FF, $F8, $00, $00, $00, $00 ; ROM $00355E: FF E0 00 00 00 00 00 7F FF FF FF F8 00 00 00 00
+    .byte $00, $00, $0F, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $00, $00, $00, $00, $00, $00 ; ROM $00356E: 00 00 0F FF FF FF FF FF FF FC 00 00 00 00 00 00
+    .byte $00, $3F, $FF, $FF, $FF, $FF, $D3, $24, $25, $33, $CC, $C9, $20, $7F, $FF, $F0 ; ROM $00357E: 00 3F FF FF FF FF D3 24 25 33 CC C9 20 7F FF F0
+    .byte $00, $00, $00, $07, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $0F, $FF, $FF, $FF ; ROM $00358E: 00 00 00 07 FF FF FF FF 00 00 00 00 0F FF FF FF
+    .byte $FF, $FF, $C6, $30, $40, $04, $20, $08, $61, $00, $00, $00, $07, $FF, $FF, $FF ; ROM $00359E: FF FF C6 30 40 04 20 08 61 00 00 00 07 FF FF FF
+    .byte $FF, $FF, $FC, $00, $00, $00, $00, $00, $00, $00, $00, $01, $FF, $FF, $FF, $FF ; ROM $0035AE: FF FF FC 00 00 00 00 00 00 00 00 01 FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $62, $01, $00, $00, $80, $00, $00, $77, $5F, $FF ; ROM $0035BE: FF FF FF FF FF FF 62 01 00 00 80 00 00 77 5F FF
+    .byte $FD, $76, $EB, $5B, $7F, $FF, $FC, $00, $00, $00, $00, $00, $00, $3F, $FF, $FF ; ROM $0035CE: FD 76 EB 5B 7F FF FC 00 00 00 00 00 00 3F FF FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $FF ; ROM $0035DE: FF FF FF FF FF FF FF 00 00 00 00 00 00 00 00 FF
+    .byte $FF, $FF, $FF, $FF, $FF, $80, $00, $00, $00, $00, $00, $00, $1F, $FF, $FF, $FF ; ROM $0035EE: FF FF FF FF FF 80 00 00 00 00 00 00 1F FF FF FF
+    .byte $FF, $00, $80, $00, $85, $11, $9E, $CC, $CD, $DB, $DF, $F6, $DF, $FF, $FF, $C0 ; ROM $0035FE: FF 00 80 00 85 11 9E CC CD DB DF F6 DF FF FF C0
+    .byte $00, $00, $00, $00, $00, $0F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $80, $00 ; ROM $00360E: 00 00 00 00 00 0F FF FF FF FF FF FF FF FF 80 00
+    .byte $00, $00, $00, $00, $00, $00, $07, $FF, $FF, $FF, $FF, $FF, $FF, $F0, $00, $00 ; ROM $00361E: 00 00 00 00 00 00 07 FF FF FF FF FF FF F0 00 00
+    .byte $00, $00, $00, $00, $00, $00, $1F, $FF, $FF, $C0, $00, $07, $FF, $FF, $FF, $FF ; ROM $00362E: 00 00 00 00 00 00 1F FF FF C0 00 07 FF FF FF FF
+    .byte $F0, $06, $31, $66, $6B, $FD, $FE, $D9, $40, $00, $03, $FF, $FF, $FF, $FF, $FF ; ROM $00363E: F0 06 31 66 6B FD FE D9 40 00 03 FF FF FF FF FF
+    .byte $80, $00, $00, $00, $00, $00, $00, $00, $07, $FF, $FF, $FF, $FD, $F9, $88, $44 ; ROM $00364E: 80 00 00 00 00 00 00 00 07 FF FF FF FD F9 88 44
+    .byte $4A, $61, $4C, $CF, $6C, $E6, $7E, $EE, $69, $98, $4A, $CE, $B2, $61, $04, $66 ; ROM $00365E: 4A 61 4C CF 6C E6 7E EE 69 98 4A CE B2 61 04 66
+    .byte $64, $CE, $6D, $FF, $FF, $FE, $00, $00, $00, $00, $00, $01, $FF, $FF, $FF, $FF ; ROM $00366E: 64 CE 6D FF FF FE 00 00 00 00 00 01 FF FF FF FF
+    .byte $FE, $EF, $FF, $FF, $E6, $20, $80, $00, $00, $00, $00, $00, $00, $00, $01, $DB ; ROM $00367E: FE EF FF FF E6 20 80 00 00 00 00 00 00 00 01 DB
+    .byte $EF, $FF, $FF, $FF, $FF, $F9, $8A, $99, $8A, $4C, $99, $9B, $39, $BF, $FF, $C0 ; ROM $00368E: EF FF FF FF FF F9 8A 99 8A 4C 99 9B 39 BF FF C0
+    .byte $00, $00, $00, $00, $00, $03, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $00, $00 ; ROM $00369E: 00 00 00 00 00 03 FF FF FF FF FF FF FF FC 00 00
+    .byte $00, $00, $00, $00, $00, $2F, $FF, $DF, $FF, $FF, $FF, $F0, $00, $00, $00, $00 ; ROM $0036AE: 00 00 00 00 00 2F FF DF FF FF FF F0 00 00 00 00
+    .byte $00, $7F, $FF, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $3C, $A0, $00 ; ROM $0036BE: 00 7F FF FF FF FF FF FF 00 00 00 00 00 3C A0 00
+    .byte $00, $00, $1B, $7F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FC, $A0, $00, $00, $00 ; ROM $0036CE: 00 00 1B 7F FF FF FF FF FF FF FF FC A0 00 00 00
+    .byte $FF, $FF, $FE, $61, $00, $00, $00, $00, $00, $00, $00, $3F, $FF, $FF, $FF, $FF ; ROM $0036DE: FF FF FE 61 00 00 00 00 00 00 00 3F FF FF FF FF
+    .byte $FB, $DF, $FF, $FF, $FF, $CC, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; ROM $0036EE: FB DF FF FF FF CC 00 00 00 00 00 00 00 00 00 00
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F8, $00, $00, $00, $00, $00, $00 ; ROM $0036FE: FF FF FF FF FF FF FF FF FF F8 00 00 00 00 00 00
+    .byte $41, $AD, $26, $EF, $FF, $FF, $FF, $FF, $FF, $E0, $00, $00, $00, $00, $00, $00 ; ROM $00370E: 41 AD 26 EF FF FF FF FF FF E0 00 00 00 00 00 00
+    .byte $01, $5A, $FF, $FF, $6F, $FF, $FF, $FF, $00, $00, $00, $05, $FF, $FF, $FF, $FF ; ROM $00371E: 01 5A FF FF 6F FF FF FF 00 00 00 05 FF FF FF FF
+    .byte $FF, $FA, $28, $88, $10, $40, $00, $02, $10, $94, $66, $73, $36, $F7, $FF, $FF ; ROM $00372E: FF FA 28 88 10 40 00 02 10 94 66 73 36 F7 FF FF
+    .byte $FC, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $F8, $00, $00, $00, $0F, $B1 ; ROM $00373E: FC 00 00 00 00 FF FF FF FF FF F8 00 00 00 0F B1
+    .byte $44, $10, $00, $00, $65, $33, $DF, $FF, $FF, $F9, $9E, $FF, $FF, $FF, $FF, $FA ; ROM $00374E: 44 10 00 00 65 33 DF FF FF F9 9E FF FF FF FF FA
+    .byte $E4, $00, $00, $00, $00, $00, $00, $00, $00, $01, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $00375E: E4 00 00 00 00 00 00 00 00 01 FF FF FF FF FF FF
+    .byte $FF, $80, $00, $00, $00, $02, $FB, $DD, $B6, $B7, $77, $DA, $28, $99, $4A, $BF ; ROM $00376E: FF 80 00 00 00 02 FB DD B6 B7 77 DA 28 99 4A BF
+    .byte $FF, $C8, $00, $00, $00, $00, $00, $1F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00 ; ROM $00377E: FF C8 00 00 00 00 00 1F FF FF FF FF FF FF FF 00
+    .byte $00, $00, $00, $00, $00, $00, $0F, $FF, $FF, $FF, $FF, $FF, $FF, $C0, $00, $00 ; ROM $00378E: 00 00 00 00 00 00 0F FF FF FF FF FF FF C0 00 00
+    .byte $00, $00, $00, $00, $00, $20, $45, $6D, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $00379E: 00 00 00 00 00 20 45 6D FF FF FF FF FF FF FF FF
+    .byte $F4, $00, $00, $07, $BD, $FF, $BC, $C4, $80, $40, $00, $00, $00, $00, $06, $32 ; ROM $0037AE: F4 00 00 07 BD FF BC C4 80 40 00 00 00 00 06 32
+    .byte $EE, $CE, $B6, $DF, $7B, $BF, $BF, $F7, $DC, $EF, $FF, $F2, $00, $00, $00, $00 ; ROM $0037BE: EE CE B6 DF 7B BF BF F7 DC EF FF F2 00 00 00 00
+    .byte $00, $00, $0B, $FF, $FF, $FF, $FF, $FF, $FC, $00, $8F, $7F, $76, $CE, $52, $90 ; ROM $0037CE: 00 00 0B FF FF FF FF FF FC 00 8F 7F 76 CE 52 90
+    .byte $00, $00, $00, $7B, $62, $00, $00, $00, $00, $32, $23, $7F, $FF, $FF, $FF, $FF ; ROM $0037DE: 00 00 00 7B 62 00 00 00 00 32 23 7F FF FF FF FF
+    .byte $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $02, $6F, $FF, $FE, $EF, $32 ; ROM $0037EE: FF FF FF FF 00 00 00 00 00 00 02 6F FF FE EF 32
+    .byte $98, $8C, $25, $33, $5E, $F7, $BF, $F5, $99, $DF, $FF, $FE, $06, $6C, $48, $C4 ; ROM $0037FE: 98 8C 25 33 5E F7 BF F5 99 DF FF FE 06 6C 48 C4
+    .byte $89, $11, $04, $45, $14, $33, $BC, $88, $00, $00, $00, $00, $26, $6B, $5D, $FF ; ROM $00380E: 89 11 04 45 14 33 BC 88 00 00 00 00 26 6B 5D FF
+    .byte $FF, $FF, $FF, $FF, $FF, $FF, $F0, $04, $00, $00, $00, $08, $88, $C6, $66, $D6 ; ROM $00381E: FF FF FF FF FF FF F0 04 00 00 00 08 88 C6 66 D6
+    .byte $DD, $BB, $33, $67, $3B, $BB, $FF, $FD, $0A, $64, $90, $01, $00, $00, $8C, $AB ; ROM $00382E: DD BB 33 67 3B BB FF FD 0A 64 90 01 00 00 8C AB
+    .byte $BB, $FF, $FF, $FB, $FF, $5D, $CC, $CA, $53, $33, $14, $21, $08, $84, $11, $09 ; ROM $00383E: BB FF FF FB FF 5D CC CA 53 33 14 21 08 84 11 09
+    .byte $14, $45, $22, $4C, $66, $6B, $32, $10, $93, $BF, $FF, $FF, $FF, $FF, $FF, $C0 ; ROM $00384E: 14 45 22 4C 66 6B 32 10 93 BF FF FF FF FF FF C0
+    .byte $00, $00, $00, $00, $00, $BF, $FB, $F7, $77, $FF, $E4, $20, $42, $4C, $CD, $67 ; ROM $00385E: 00 00 00 00 00 BF FB F7 77 FF E4 20 42 4C CD 67
+    .byte $75, $EE, $CE, $7A, $D9, $9D, $B3, $31, $84, $82, $44, $8A, $65, $55, $9D, $B3 ; ROM $00386E: 75 EE CE 7A D9 9D B3 31 84 82 44 8A 65 55 9D B3
+    .byte $33, $5F, $B6, $DC, $A0, $00, $00, $00, $00, $03, $FF, $FF, $FF, $FF, $FF, $FF ; ROM $00387E: 33 5F B6 DC A0 00 00 00 00 03 FF FF FF FF FF FF
+    .byte $F9, $02, $00, $00, $00, $32, $88, $00, $12, $99, $9C, $EE, $F7, $FF, $FF, $FF ; ROM $00388E: F9 02 00 00 00 32 88 00 12 99 9C EE F7 FF FF FF
+    .byte $84, $00, $00, $04, $50, $8A, $FF, $FF, $FF, $FF, $FC, $00, $86, $7F, $FF, $FF ; ROM $00389E: 84 00 00 04 50 8A FF FF FF FF FC 00 86 7F FF FF
+    .byte $E0, $00, $00, $00, $00, $3F, $BF, $FB, $AE, $D9, $99, $D7, $28, $00, $00, $00 ; ROM $0038AE: E0 00 00 00 00 3F BF FB AE D9 99 D7 28 00 00 00
+    .byte $00, $00, $00, $7D, $FF, $FF, $FF, $FF, $FF, $FF, $E8, $48, $A4, $C6, $4D, $62 ; ROM $0038BE: 00 00 00 7D FF FF FF FF FF FF E8 48 A4 C6 4D 62
+    .byte $88, $45, $5F, $6C, $80, $00, $00, $01, $19, $9A, $DB, $BF, $FF, $FE, $FB, $33 ; ROM $0038CE: 88 45 5F 6C 80 00 00 01 19 9A DB BF FF FE FB 33
+    .byte $5E, $FF, $BF, $76, $DA, $E6, $64, $D6, $00, $00, $00, $00, $00, $00, $DB, $33 ; ROM $0038DE: 5E FF BF 76 DA E6 64 D6 00 00 00 00 00 00 DB 33
+    .byte $14, $22, $8C, $44, $18, $EF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $F0, $00, $00 ; ROM $0038EE: 14 22 8C 44 18 EF FF FF FF FF FF FF FF F0 00 00
+    .byte $00, $00, $00, $CE, $75, $9D, $9C, $E7, $99, $99, $9A, $6A, $64, $CC, $CC, $CC ; ROM $0038FE: 00 00 00 CE 75 9D 9C E7 99 99 9A 6A 64 CC CC CC
+    .byte $CD, $6B, $2A, $67, $35, $9B, $33, $19, $8C, $CC, $CC, $CA, $67, $7F, $F2, $00 ; ROM $00390E: CD 6B 2A 67 35 9B 33 19 8C CC CC CA 67 7F F2 00
+    .byte $02, $19, $DB, $B7, $5D, $FF, $FF, $FC, $20, $00, $00, $00, $00, $17, $F6, $33 ; ROM $00391E: 02 19 DB B7 5D FF FF FC 20 00 00 00 00 17 F6 33
+    .byte $3E, $FF, $FF, $FF, $FE, $F5, $8D, $9F, $4C, $00, $00, $00, $00, $00, $00, $00 ; ROM $00392E: 3E FF FF FF FE F5 8D 9F 4C 00 00 00 00 00 00 00
+    .byte $3F, $FF, $FF, $FF, $FF, $FF, $FF, $F4, $80, $00, $00, $00, $00, $7F, $FF, $E6 ; ROM $00393E: 3F FF FF FF FF FF FF F4 80 00 00 00 00 7F FF E6
+    .byte $50, $80, $00, $19, $FF, $FF, $FF, $FF, $FF, $EB, $33, $12, $00, $00, $81, $10 ; ROM $00394E: 50 80 00 19 FF FF FF FF FF EB 33 12 00 00 81 10
+    .byte $22, $33, $B5, $22, $12, $53, $5B, $5D, $7B, $F7, $EE, $BA, $CC, $CC, $CD, $99 ; ROM $00395E: 22 33 B5 22 12 53 5B 5D 7B F7 EE BA CC CC CD 99
+    .byte $98, $C6, $66, $71, $98, $88, $91, $8C, $4C, $FB, $52, $42, $52, $99, $DD, $D9 ; ROM $00396E: 98 C6 66 71 98 88 91 8C 4C FB 52 42 52 99 DD D9
+    .byte $9D, $BF, $BF, $CC, $44, $01, $01, $00, $00, $14, $EE, $FF, $FF, $FF, $FF, $FD ; ROM $00397E: 9D BF BF CC 44 01 01 00 00 14 EE FF FF FF FF FD
+    .byte $77, $7E, $42, $00, $40, $00, $00, $00, $00, $0A, $33, $3D, $FF, $FF, $FF, $FF ; ROM $00398E: 77 7E 42 00 40 00 00 00 00 0A 33 3D FF FF FF FF
+    .byte $FF, $FE, $66, $62, $22, $08, $41, $02, $13, $31, $84, $10, $09, $AF, $7B, $5C ; ROM $00399E: FF FE 66 62 22 08 41 02 13 31 84 10 09 AF 7B 5C
+    .byte $CC, $D6, $73, $39, $94, $B3, $BF, $FF, $FF, $FF, $EE, $D6, $66, $28, $A2, $08 ; ROM $0039AE: CC D6 73 39 94 B3 BF FF FF FF EE D6 66 28 A2 08
+    .byte $40, $10, $CA, $40, $00, $00, $10, $50, $CC, $CD, $BB, $F7, $F7, $FD, $FF, $7E ; ROM $0039BE: 40 10 CA 40 00 00 10 50 CC CD BB F7 F7 FD FF 7E
+    .byte $FA, $D5, $98, $C5, $33, $67, $AE, $75, $99, $4A, $10, $40, $81, $01, $00, $90 ; ROM $0039CE: FA D5 98 C5 33 67 AE 75 99 4A 10 40 81 01 00 90
+    .byte $51, $8C, $CD, $EF, $F5, $A9, $45, $12, $94, $CC, $C9, $9E, $F7, $FF, $FF, $FF ; ROM $0039DE: 51 8C CD EF F5 A9 45 12 94 CC C9 9E F7 FF FF FF
+    .byte $FF, $79, $D9, $CC, $E5, $48, $88, $84, $04, $08, $21, $11, $14, $E3, $1C, $D3 ; ROM $0039EE: FF 79 D9 CC E5 48 88 84 04 08 21 11 14 E3 1C D3
+    .byte $35, $99, $91, $00, $09, $36, $FF, $FF, $FF, $FD, $6B, $32, $28, $00, $81, $29 ; ROM $0039FE: 35 99 91 00 09 36 FF FF FF FD 6B 32 28 00 81 29
+    .byte $B7, $7B, $F7, $EB, $B5, $9B, $19, $4A, $24, $44, $42, $25, $59, $98, $81, $20 ; ROM $003A0E: B7 7B F7 EB B5 9B 19 4A 24 44 42 25 59 98 81 20
+    .byte $24, $46, $33, $33, $9E, $EE, $FB, $F7, $FF, $BE, $D9, $9C, $EF, $75, $ED, $EE ; ROM $003A1E: 24 46 33 33 9E EE FB F7 FF BE D9 9C EF 75 ED EE
+    .byte $D9, $84, $41, $04, $00, $81, $01, $09, $11, $14, $4C, $6A, $6B, $39, $CF, $BA ; ROM $003A2E: D9 84 41 04 00 81 01 09 11 14 4C 6A 6B 39 CF BA
+    .byte $E6, $B7, $7F, $DF, $66, $22, $00, $04, $65, $D7, $BF, $BE, $FF, $BD, $CE, $66 ; ROM $003A3E: E6 B7 7F DF 66 22 00 04 65 D7 BF BE FF BD CE 66
+    .byte $62, $94, $91, $42, $93, $AC, $C4, $00, $40, $20, $04, $08, $CD, $7F, $FF, $FF ; ROM $003A4E: 62 94 91 42 93 AC C4 00 40 20 04 08 CD 7F FF FF
+    .byte $F7, $FB, $EF, $76, $A4, $88, $84, $11, $23, $18, $C6, $62, $45, $18, $A4, $CC ; ROM $003A5E: F7 FB EF 76 A4 88 84 11 23 18 C6 62 45 18 A4 CC
+    .byte $D6, $77, $BE, $D9, $89, $21, $08, $A2, $98, $DA, $EB, $DB, $BB, $EF, $DE, $ED ; ROM $003A6E: D6 77 BE D9 89 21 08 A2 98 DA EB DB BB EF DE ED
+    .byte $99, $8A, $6B, $5B, $5D, $D6, $CC, $CC, $E7, $28, $00, $00, $00, $00, $00, $99 ; ROM $003A7E: 99 8A 6B 5B 5D D6 CC CC E7 28 00 00 00 00 00 99
+    .byte $33, $1C, $DB, $DE, $F7, $7F, $BF, $CE, $75, $9A, $CD, $93, $08, $A6, $67, $36 ; ROM $003A8E: 33 1C DB DE F7 7F BF CE 75 9A CD 93 08 A6 67 36
+    .byte $B6, $B6, $B3, $9C, $D9, $9B, $24, $10, $21, $02, $11, $46, $4C, $CD, $9C, $D9 ; ROM $003A9E: B6 B6 B3 9C D9 9B 24 10 21 02 11 46 4C CD 9C D9
+    .byte $D9, $CE, $BD, $FB, $B9, $94, $24, $22, $46, $32, $66, $6D, $75, $ED, $F7, $76 ; ROM $003AAE: D9 CE BD FB B9 94 24 22 46 32 66 6D 75 ED F7 76
+    .byte $CD, $B3, $33, $9A, $DB, $5A, $CD, $67, $30, $84, $21, $11, $04, $22, $10, $A3 ; ROM $003ABE: CD B3 33 9A DB 5A CD 67 30 84 21 11 04 22 10 A3
+    .byte $18, $CC, $DA, $D9, $92, $26, $67, $66, $67, $39, $D6, $EB, $D7, $BB, $BB, $9D ; ROM $003ACE: 18 CC DA D9 92 26 67 66 67 39 D6 EB D7 BB BB 9D
+    .byte $99, $99, $99, $9B, $32, $61, $49, $9D, $B3, $8C, $21, $11, $10, $51, $43, $1B ; ROM $003ADE: 99 99 99 9B 32 61 49 9D B3 8C 21 11 10 51 43 1B
+    .byte $3D, $FB, $FE, $FD, $EE, $E7, $66, $66, $29, $46, $22, $89, $14, $28, $4A, $14 ; ROM $003AEE: 3D FB FE FD EE E7 66 66 29 46 22 89 14 28 4A 14
+    .byte $A6, $53, $3B, $6C, $CC, $44, $08, $46, $67, $5F, $BF, $DF, $77, $BE, $FE, $E6 ; ROM $003AFE: A6 53 3B 6C CC 44 08 46 67 5F BF DF 77 BE FE E6
+    .byte $62, $28, $11, $08, $84, $82, $26, $6B, $AF, $7D, $FE, $DD, $66, $66, $33, $18 ; ROM $003B0E: 62 28 11 08 84 82 26 6B AF 7D FE DD 66 66 33 18
+    .byte $C5, $28, $C5, $31, $4C, $65, $25, $32, $A9, $99, $32, $66, $66, $66, $B3, $D6 ; ROM $003B1E: C5 28 C5 31 4C 65 25 32 A9 99 32 66 66 66 B3 D6
+    .byte $CC, $E7, $6E, $51, $22, $53, $67, $77, $7D, $73, $4A, $22, $96, $6C, $CC, $CA ; ROM $003B2E: CC E7 6E 51 22 53 67 77 7D 73 4A 22 96 6C CC CA
+    .byte $66, $33, $2C, $CC, $CC, $E6, $6B, $35, $99, $9A, $CB, $33, $32, $51, $24, $CB ; ROM $003B3E: 66 33 2C CC CC E6 6B 35 99 9A CB 33 32 51 24 CB
+    .byte $39, $D7, $39, $CC, $CC, $C6, $63, $0A, $48, $88, $93, $18, $93, $18, $CC, $CE ; ROM $003B4E: 39 D7 39 CC CC C6 63 0A 48 88 93 18 93 18 CC CE
+    .byte $73, $9B, $59, $CD, $75, $DD, $EE, $B3, $19, $66, $73, $6B, $67, $59, $CE, $66 ; ROM $003B5E: 73 9B 59 CD 75 DD EE B3 19 66 73 6B 67 59 CE 66
+    .byte $66, $E7, $9A, $62, $10, $01, $04, $67, $6D, $99, $33, $33, $9D, $AE, $76, $B6 ; ROM $003B6E: 66 E7 9A 62 10 01 04 67 6D 99 33 33 9D AE 76 B6
+    .byte $AC, $CC, $CE, $6C, $CA, $22, $08, $10, $44, $49, $12, $93, $3A, $FF, $7F, $AD ; ROM $003B7E: AC CC CE 6C CA 22 08 10 44 49 12 93 3A FF 7F AD
+    .byte $5A, $DA, $EB, $6B, $39, $CC, $D9, $99, $93, $26, $29, $29, $31, $46, $31, $94 ; ROM $003B8E: 5A DA EB 6B 39 CC D9 99 93 26 29 29 31 46 31 94
+    .byte $CC, $CC, $C6, $53, $99, $99, $AB, $35, $6C, $CE, $66, $CD, $9A, $E6, $CD, $99 ; ROM $003B9E: CC CC C6 53 99 99 AB 35 6C CE 66 CD 9A E6 CD 99
+    .byte $CD, $99, $B2, $B2, $99, $4C, $66, $31, $98, $CC, $CC, $CD, $99, $98, $D3, $58 ; ROM $003BAE: CD 99 B2 B2 99 4C 66 31 98 CC CC CD 99 98 D3 58
+    .byte $CA, $99, $9A, $DB, $29, $49, $14, $45, $26, $33, $35, $9B, $39, $B5, $DA, $DA ; ROM $003BBE: CA 99 9A DB 29 49 14 45 26 33 35 9B 39 B5 DA DA
+    .byte $EC, $E6, $CD, $66, $CC, $CC, $C9, $99, $8C, $99, $93, $18, $C9, $8A, $22, $94 ; ROM $003BCE: EC E6 CD 66 CC CC C9 99 8C 99 93 18 C9 8A 22 94
+    .byte $CD, $75, $EF, $75, $9A, $51, $14, $44, $89, $25, $29, $AC, $D9, $CC, $E6, $D6 ; ROM $003BDE: CD 75 EF 75 9A 51 14 44 89 25 29 AC D9 CC E6 D6
+    .byte $B9, $DB, $5C, $EB, $33, $33, $39, $D7, $6B, $9D, $9C, $E6, $66, $31, $8A, $46 ; ROM $003BEE: B9 DB 5C EB 33 33 39 D7 6B 9D 9C E6 66 31 8A 46
+    .byte $14, $48, $A2, $8C, $62, $63, $26, $66, $66, $D7, $66, $32, $64, $CC, $CF, $39 ; ROM $003BFE: 14 48 A2 8C 62 63 26 66 66 D7 66 32 64 CC CF 39
+    .byte $CE, $76, $73, $AD, $6B, $39, $B3, $33, $32, $66, $4C, $C9, $98, $CA, $63, $18 ; ROM $003C0E: CE 76 73 AD 6B 39 B3 33 32 66 4C C9 98 CA 63 18
+    .byte $CA, $66, $53, $33, $31, $99, $8C, $CC, $CC, $D6, $66, $B3, $33, $33, $39, $B3 ; ROM $003C1E: CA 66 53 33 31 99 8C CC CC D6 66 B3 33 33 39 B3
+    .byte $99, $B3, $94, $99, $32, $66, $29, $8C, $67, $5B, $5C, $CC, $CC, $DA, $E7, $5A ; ROM $003C2E: 99 B3 94 99 32 66 29 8C 67 5B 5C CC CC DA E7 5A
+    .byte $CC, $D6, $66, $63, $26, $31, $26, $56, $67, $3A, $DA, $CE, $66, $66, $4C, $63 ; ROM $003C3E: CC D6 66 63 26 31 26 56 67 3A DA CE 66 66 4C 63
+    .byte $18, $C6, $29, $46, $66, $33, $31, $99, $99, $CE, $73, $31, $85, $14, $CC, $D6 ; ROM $003C4E: 18 C6 29 46 66 33 31 99 99 CE 73 31 85 14 CC D6
+    .byte $EB, $AE, $EB, $D7, $6D, $6B, $36, $6B, $59, $89, $44, $93, $18, $CA, $52, $91 ; ROM $003C5E: EB AE EB D7 6D 6B 36 6B 59 89 44 93 18 CA 52 91
+    .byte $93, $32, $C6, $69, $9A, $CC, $D9, $9A, $CC, $D9, $99, $66, $73, $AD, $6E, $B9 ; ROM $003C6E: 93 32 C6 69 9A CC D9 9A CC D9 99 66 73 AD 6E B9
+    .byte $CC, $C6, $24, $44, $44, $89, $28, $A3, $13, $33, $5B, $AE, $EE, $B5, $CE, $75 ; ROM $003C7E: CC C6 24 44 44 89 28 A3 13 33 5B AE EE B5 CE 75
+    .byte $9B, $33, $8C, $CC, $B1, $8C, $CC, $66, $4C, $CA, $99, $99, $96, $66, $66, $66 ; ROM $003C8E: 9B 33 8C CC B1 8C CC 66 4C CA 99 99 96 66 66 66
+    .byte $6C, $9C, $CC, $CC, $E6, $CE, $73, $32, $52, $63, $4E, $66, $B3, $B7, $5C, $CC ; ROM $003C9E: 6C 9C CC CC E6 CE 73 32 52 63 4E 66 B3 B7 5C CC
+    .byte $C6, $18, $A2, $52, $99, $CD, $5A, $E7, $6D, $98, $C9, $93, $26, $6B, $36, $63 ; ROM $003CAE: C6 18 A2 52 99 CD 5A E7 6D 98 C9 93 26 6B 36 63
+    .byte $18, $92, $28, $8A, $66, $4C, $CA, $73, $39, $D7, $3D, $75, $B6, $73, $33, $36 ; ROM $003CBE: 18 92 28 8A 66 4C CA 73 39 D7 3D 75 B6 73 33 36
+    .byte $32, $98, $CC, $66, $66, $65, $33, $32, $99, $33, $33, $33, $33, $99, $9C, $CC ; ROM $003CCE: 32 98 CC 66 66 65 33 32 99 33 33 33 33 99 9C CC
+    .byte $D9, $66, $D6, $CC, $C9, $8C, $A6, $66, $6B, $35, $9B, $35, $9D, $63, $32, $95 ; ROM $003CDE: D9 66 D6 CC C9 8C A6 66 6B 35 9B 35 9D 63 32 95
+    .byte $33, $33, $33, $33, $32, $66, $53, $4C, $A9, $99, $99, $99, $8C, $4A, $63, $35 ; ROM $003CEE: 33 33 33 33 32 66 53 4C A9 99 99 99 8C 4A 63 35
+    .byte $9B, $39, $CC, $C6, $63, $32, $66, $66, $59, $99, $9A, $73, $9D, $66, $67, $39 ; ROM $003CFE: 9B 39 CC C6 63 32 66 66 59 99 9A 73 9D 66 67 39
+    .byte $CE, $73, $32, $63, $19, $99, $9B, $35, $9A, $D9, $CC, $C6, $14, $8A, $28, $C5 ; ROM $003D0E: CE 73 32 63 19 99 9B 35 9A D9 CC C6 14 8A 28 C5
+    .byte $26, $33, $19, $99, $9B, $33, $59, $B3, $AC, $E6, $CE, $67, $33, $99, $B3, $39 ; ROM $003D1E: 26 33 19 99 9B 33 59 B3 AC E6 CE 67 33 99 B3 39
+    .byte $99, $99, $99, $99, $94, $C5, $31, $AC, $CE, $6C, $CE, $66, $33, $19, $94, $C9 ; ROM $003D2E: 99 99 99 99 94 C5 31 AC CE 6C CE 66 33 19 94 C9
+    .byte $8C, $65, $29, $8C, $C6, $66, $73, $66, $65, $25, $33, $33, $39, $AD, $D6, $D6 ; ROM $003D3E: 8C 65 29 8C C6 66 73 66 65 25 33 33 39 AD D6 D6
+    .byte $B3, $59, $99, $99, $9B, $33, $33, $39, $9C, $E6, $C9, $9A, $66, $66, $26, $32 ; ROM $003D4E: B3 59 99 99 9B 33 33 39 9C E6 C9 9A 66 66 26 32
+    .byte $B2, $66, $9C, $CC, $CC, $CC, $C9, $93, $29, $8C, $A6, $66, $62, $51, $84, $94 ; ROM $003D5E: B2 66 9C CC CC CC C9 93 29 8C A6 66 62 51 84 94
+    .byte $A6, $66, $CE, $75, $B3, $9E, $73, $9C, $E7, $33, $99, $AC, $CB, $33, $33, $33 ; ROM $003D6E: A6 66 CE 75 B3 9E 73 9C E7 33 99 AC CB 33 33 33
+    .byte $33, $33, $33, $26, $66, $59, $99, $8C, $CC, $C9, $99, $99, $99, $99, $99, $99 ; ROM $003D7E: 33 33 33 26 66 59 99 8C CC C9 99 99 99 99 99 99
+    .byte $9A, $B3, $33, $33, $33, $33, $33, $66, $66, $64, $A6, $33, $33, $33, $26, $55 ; ROM $003D8E: 9A B3 33 33 33 33 33 66 66 64 A6 33 33 33 26 55
+    .byte $33, $33, $9C, $E6, $B3, $9A, $AC, $CC, $C6, $66, $66, $69, $99, $99, $99, $98 ; ROM $003D9E: 33 33 9C E6 B3 9A AC CC C6 66 66 69 99 99 99 98
+    .byte $CC, $C6, $63, $19, $99, $99, $4C, $CC, $CA, $99, $99, $9C, $CD, $54, $CC, $CC ; ROM $003DAE: CC C6 63 19 99 99 4C CC CA 99 99 9C CD 54 CC CC
+    .byte $CC, $E6, $73, $39, $AC, $E6, $66, $66, $53, $29, $99, $4C, $CC, $CC, $CE, $66 ; ROM $003DBE: CC E6 73 39 AC E6 66 66 53 29 99 4C CC CC CE 66
+    .byte $73, $35, $99, $CC, $CC, $CE, $67, $33, $19, $92, $A4, $CC, $6C, $CE, $73, $59 ; ROM $003DCE: 73 35 99 CC CC CE 67 33 19 92 A4 CC 6C CE 73 59
+    .byte $31, $88, $A4, $65, $33, $35, $9B, $33, $32, $6B, $33, $31, $93, $26, $B3, $36 ; ROM $003DDE: 31 88 A4 65 33 35 9B 33 32 6B 33 31 93 26 B3 36
+    .byte $67, $3B, $35, $99, $98, $CC, $A6, $55, $99, $CD, $6B, $59, $CC, $CD, $4E, $66 ; ROM $003DEE: 67 3B 35 99 98 CC A6 55 99 CD 6B 59 CC CD 4E 66
+    .byte $63, $31, $99, $AC, $CC, $E6, $66, $73, $33, $31, $99, $4C, $A6, $32, $99, $4C ; ROM $003DFE: 63 31 99 AC CC E6 66 73 33 31 99 4C A6 32 99 4C
+    .byte $99, $8C, $E5, $4C, $C9, $8C, $CC, $CD, $59, $99, $99, $99, $CC, $E6, $73, $39 ; ROM $003E0E: 99 8C E5 4C C9 8C CC CD 59 99 99 99 CC E6 73 39
+    .byte $9C, $E7, $33, $99, $4C, $99, $98, $CC, $99, $33, $33, $56, $67, $33, $59, $9B ; ROM $003E1E: 9C E7 33 99 4C 99 98 CC 99 33 33 56 67 33 59 9B
+    .byte $31, $A9, $99, $94, $CC, $CC, $66, $66, $53, $2A, $66, $4D, $33, $35, $59, $4C ; ROM $003E2E: 31 A9 99 94 CC CC 66 66 53 2A 66 4D 33 35 59 4C
+    .byte $CC, $CC, $D9, $99, $9A, $67, $36, $6C, $CC, $CC, $CA, $65, $4C, $CC, $CC, $CC ; ROM $003E3E: CC CC D9 99 9A 67 36 6C CC CC CA 65 4C CC CC CC
+    .byte $CD, $99, $AC, $D9, $9B, $33, $39, $99, $9B, $2A, $66, $54, $CC, $C6, $67, $33 ; ROM $003E4E: CD 99 AC D9 9B 33 39 99 9B 2A 66 54 CC C6 67 33
+    .byte $33, $33, $33, $19, $4C, $99, $4C, $94, $C6, $64, $CC, $66, $66, $55, $66, $35 ; ROM $003E5E: 33 33 33 19 4C 99 4C 94 C6 64 CC 66 66 55 66 35
+    .byte $99, $9A, $CC, $E7, $36, $67, $35, $66, $6B, $33, $66, $73, $5A, $72, $66, $59 ; ROM $003E6E: 99 9A CC E7 36 67 35 66 6B 33 66 73 5A 72 66 59
+    .byte $99, $9C, $E6, $63, $31, $8C, $C6, $33, $29, $99, $99, $54, $CC, $CC, $D9, $99 ; ROM $003E7E: 99 9C E6 63 31 8C C6 33 29 99 99 54 CC CC D9 99
+    .byte $99, $99, $99, $9A, $72, $CC, $CC, $CC, $A9, $9B, $26, $63, $14, $C6, $63, $33 ; ROM $003E8E: 99 99 99 9A 72 CC CC CC A9 9B 26 63 14 C6 63 33
+    .byte $33, $33, $33, $99, $9C, $D3, $33, $19, $93, $9A, $B3, $59, $99, $99, $9C, $CE ; ROM $003E9E: 33 33 33 99 9C D3 33 19 93 9A B3 59 99 99 9C CE
+    .byte $66, $67, $33, $59, $9C, $CC, $CE, $66, $66, $6B, $33, $29, $94, $CC, $CC, $D6 ; ROM $003EAE: 66 67 33 59 9C CC CE 66 66 6B 33 29 94 CC CC D6
+    .byte $66, $66, $66, $63, $33, $19, $32, $99, $4C, $66, $32, $99, $99, $8C, $CC, $CC ; ROM $003EBE: 66 66 66 63 33 19 32 99 4C 66 32 99 99 8C CC CC
+    .byte $CC, $CC, $CD, $99, $AC, $E6, $CC, $CC, $AA, $CC, $E6, $6C, $CE, $67, $34, $E5 ; ROM $003ECE: CC CC CD 99 AC E6 CC CC AA CC E6 6C CE 67 34 E5
+    .byte $99, $99, $99, $99, $99, $99, $93, $33, $33, $33, $26, $31, $8C, $C6, $66, $66 ; ROM $003EDE: 99 99 99 99 99 99 93 33 33 33 26 31 8C C6 66 66
+    .byte $73, $33, $33, $29, $99, $99, $99, $CB, $33, $33, $33, $66, $66, $65, $29, $96 ; ROM $003EEE: 73 33 33 29 99 99 99 CB 33 33 33 66 66 65 29 96
+    .byte $33, $99, $99, $9C, $CC, $E6, $66, $66, $66, $66, $66, $CC, $CC, $CC, $66, $4C ; ROM $003EFE: 33 99 99 9C CC E6 66 66 66 66 66 CC CC CC 66 4C
+    .byte $C9, $99, $99, $66, $66, $67, $33, $66, $66, $CC, $CC, $E6, $66, $71, $AA, $66 ; ROM $003F0E: C9 99 99 66 66 67 33 66 66 CC CC E6 66 71 AA 66
+    .byte $65, $8E, $67, $33, $94, $CC, $66, $65, $99, $4C, $CC, $A6, $65, $4C, $CC, $CC ; ROM $003F1E: 65 8E 67 33 94 CC 66 65 99 4C CC A6 65 4C CC CC
+    .byte $CC, $98, $C6, $4C, $D3, $95, $99, $99, $9C, $CD, $59, $AC, $CD, $99, $99, $B3 ; ROM $003F2E: CC 98 C6 4C D3 95 99 99 9C CD 59 AC CD 99 99 B3
+    .byte $39, $AB, $32, $66, $33, $19, $A6, $73, $2C, $CC, $CE, $66, $66, $67, $33, $33 ; ROM $003F3E: 39 AB 32 66 33 19 A6 73 2C CC CE 66 66 67 33 33
+    .byte $33, $26, $53, $18, $C9, $99, $99, $B3, $33, $33, $33, $33, $33, $33, $2A, $CC ; ROM $003F4E: 33 26 53 18 C9 99 99 B3 33 33 33 33 33 33 2A CC
+    .byte $CC, $CC, $CC, $D9, $99, $99, $65, $35, $99, $AC, $CC, $E6, $66, $99, $99, $99 ; ROM $003F5E: CC CC CC D9 99 99 65 35 99 AC CC E6 66 99 99 99
+    .byte $98, $C9, $98, $CA, $66, $66, $53, $53, $36, $55, $99, $99, $B3, $33, $33, $1A ; ROM $003F6E: 98 C9 98 CA 66 66 53 53 36 55 99 99 B3 33 33 1A
+    .byte $66, $66, $66, $66, $66, $6B, $35, $9B, $33, $39, $99, $B3, $59, $99, $9A, $CC ; ROM $003F7E: 66 66 66 66 66 6B 35 9B 33 39 99 B3 59 99 9A CC
+    .byte $A9, $CC, $66, $64, $CC, $A6, $65, $33, $26, $66, $4C, $C6, $66, $64, $CC, $CC ; ROM $003F8E: A9 CC 66 64 CC A6 65 33 26 66 4C C6 66 64 CC CC
+    .byte $CC, $CC, $CC, $CC, $CC, $CD, $99, $99, $99, $B3, $33, $33, $39, $99, $99, $B3 ; ROM $003F9E: CC CC CC CC CC CD 99 99 99 B3 33 33 39 99 99 B3
+    .byte $33, $33, $39, $99, $9A, $66, $53, $31, $99, $99, $39, $98, $CC, $CC, $CC, $CC ; ROM $003FAE: 33 33 39 99 9A 66 53 31 99 99 39 98 CC CC CC CC
+    .byte $CE, $66, $67, $35, $99, $93, $32, $99, $99, $99, $9A, $CC, $CC, $CC, $CC, $CC ; ROM $003FBE: CE 66 67 35 99 93 32 99 99 99 9A CC CC CC CC CC
+    .byte $CC, $B1, $98, $CC, $CC, $66, $66, $66, $66, $66, $66, $66, $66, $66, $69, $A7 ; ROM $003FCE: CC B1 98 CC CC 66 66 66 66 66 66 66 66 66 69 A7
+    .byte $33, $33, $33, $39, $99, $99, $CC, $CC, $D3, $54, $CC, $CB, $19, $99, $99, $99 ; ROM $003FDE: 33 33 33 39 99 99 CC CC D3 54 CC CB 19 99 99 99
+    .byte $99, $99, $AB, $33, $33, $33, $33, $33, $39, $99, $00, $00, $00, $00, $00, $00 ; ROM $003FEE: 99 99 AB 33 33 33 33 33 39 99 00 00 00 00 00 00
+    .byte $00, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF                          ; ROM $003FFE: 00 00 FF FF FF FF FF FF FF FF FF
+; Routine: IrqHandler
+; Global: Reachable code entry at CPU $FFF9 traced from the interrupt-root control-flow graph.
+; Local: Performs the instruction sequence below; semantic purpose remains provisional.
+; Parameters: Register and memory inputs are caller-dependent.
+; Returns: Determined by the terminating RTS, RTI, jump, or branch path.
+; Side effects: Registers, flags, memory, and hardware registers written below.
+; Confidence: High for reachability and encoding; semantic role provisional.
+IrqHandler:
+    rti                              ; ROM $004009: 40
+
+; Interrupt vectors at CPU $FFFA-$FFFF.
+Vectors:
+    .word NmiHandler                  ; ROM $00400A: 1A C0
+    .word Reset                       ; ROM $00400C: 00 C0
+    .word IrqHandler                  ; ROM $00400E: F9 FF
+
diff --git a/Bomberman (U)/copilot/reconstructed.lbl b/Bomberman (U)/copilot/reconstructed.lbl
new file mode 100644
index 0000000..eb393fb
--- /dev/null
+++ b/Bomberman (U)/copilot/reconstructed.lbl	
@@ -0,0 +1,467 @@
+al 000000 .InesHeader
+al 00FFFA .Vectors
+al 00FFF9 .IrqHandler
+al 00E7DE .SoundSequenceAndPaddingData
+al 00E7D0 .Sound_ReturnToCaller_E7D0
+al 00E7D1 .Sound_HandleControl_E7D1
+al 00E79F .Sound_UpdateAudioChannelPath_E79F
+al 00E793 .Sound_WriteSoundEnvelopeCounter_E793
+al 00E767 .Sound_UpdateAudioChannelPath_E767
+al 00E763 .SoundHandlerData
+al 00E743 .Sound_UpdateAudioChannelPath_E743
+al 00E760 .Sound_DecrementSoundEnvelopeCounter_E760
+al 00E734 .Sound_ReadSoundEnvelopeCounter_E734
+al 00E728 .Sound_WriteSoundDelay1_E728
+al 00E727 .Sound_ReturnToCaller_E727
+al 00E70B .Sound_UpdateAudioChannelPath_E70B
+al 00E6DF .Sound_UpdateAudioChannelPath_E6DF
+al 00E6CD .Sound_HandleControl_E6CD
+al 00E6CF .Sound_UpdateAudioChannelPath_E6CF
+al 00E6C9 .ConfigureNoiseEffect
+al 00E6AD .SoundDispatchAddressTable
+al 00E681 .Sound_WriteSoundCommandState_E681
+al 00E6AC .Sound_ReturnToCaller_E6AC
+al 00E69C .Sound_ReadRamE6BC_E69C
+al 00E667 .Sound_ReadSoundCommandState_E667
+al 00E661 .Sound_ReadSoundDelay0_E661
+al 00E5E6 .GameplayAndSoundDataTables
+al 00E5D6 .Gameplay_SubtractFromSoundTempo_E5D6
+al 00E5B4 .Gameplay_UpdateAudioChannelPath_E5B4
+al 00E5AB .Gameplay_UpdateAudioChannelPath_E5AB
+al 00E5A1 .Gameplay_UpdateAudioChannelPath_E5A1
+al 00E593 .Gameplay_HandleControl_E593
+al 00E59D .Gameplay_ReadZpD6_E59D
+al 00E5C6 .Gameplay_ReturnToCaller_E5C6
+al 00E57B .Gameplay_ReadSoundDelay0_E57B
+al 00E573 .Gameplay_WriteZpD6_E573
+al 00E56E .Gameplay_HandleControl_E56E
+al 00E5C7 .Gameplay_ReadSoundTempo_E5C7
+al 00E54E .Gameplay_ReadSoundChannelIndex_E54E
+al 00E534 .Gameplay_DecrementSoundChannelIndex_E534
+al 00E539 .Gameplay_ReadZpBC_E539
+al 00E52E .Gameplay_ReadSoundChannelIndex_E52E
+al 00E4E5 .Gameplay_ReadRamE87C_E4E5
+al 00E52A .Gameplay_WriteSoundChannelIndex_E52A
+al 00E4C6 .Gameplay_ReturnToCaller_E4C6
+al 00E4C2 .Gameplay_WriteGameMode_E4C2
+al 00E4BC .GameplayPowerupMaskTable
+al 00E4B9 .Gameplay_WriteStageIndex_E4B9
+al 00E4A8 .Gameplay_ReadBonusTimer_E4A8
+al 00E450 .Gameplay_ReadPlayerState_E450
+al 00E467 .Gameplay_ReturnToCaller_E467
+al 00E498 .Gameplay_ReadPlayerLives_E498
+al 00E48D .Gameplay_ReadBombCapacity_E48D
+al 00E486 .Gameplay_ReadFlamePass_E486
+al 00E47D .Gameplay_ReadStageProgress_E47D
+al 00E468 .Gameplay_ReadStageProgress_E468
+al 00E448 .Gameplay_ReadPlayerLives_E448
+al 00E434 .Gameplay_ReadStageIndex_E434
+al 00E410 .Gameplay_IncrementWallPass_E410
+al 00E416 .Gameplay_ReadObjectType_E416
+al 00E3F8 .Gameplay_IncrementRemoteControl_E3F8
+al 00E401 .Gameplay_ReadObjectState_E401
+al 00E3E2 .Gameplay_WritePlayerState_E3E2
+al 00E3DF .Gameplay_CallHelper_E3DF
+al 00E3E6 .Gameplay_ReturnToCaller_E3E6
+al 00E3BD .Gameplay_ReadZpAA_E3BD
+al 00E3E7 .Gameplay_ReadObjectType_E3E7
+al 00E3A7 .Gameplay_ReadPlayerState_E3A7
+al 00E398 .Gameplay_ReturnToCaller_E398
+al 00E360 .GameplayScoreThresholdTable
+al 00E344 .Gameplay_ReadTransferPointer_E344
+al 00E32B .Gameplay_TransferVramDataPath_E32B
+al 00E30A .Gameplay_ReadTransferPointer_E30A
+al 00E33C .Gameplay_WriteWorkValue_E33C
+al 00E2DB .Gameplay_ReadObjectWorkX_E2DB
+al 00E1E5 .TitleAndCopyrightText
+al 00E1DC .Gameplay_RetreatIndexX_E1DC
+al 00E1D0 .Gameplay_TransferVramDataPath_E1D0
+al 00E1E0 .Gameplay_ReadRamE1E5_E1E0
+al 00E1C4 .Gameplay_SetVramAddressPath_E1C4
+al 00DF8C .MenuPaletteAndScreenData
+al 00DF83 .Menu_TransferVramDataPath_DF83
+al 00DF7C .Menu_HandleControl_DF7C
+al 00DF6F .Menu_TransferVramDataPath_DF6F
+al 00DF67 .Menu_HandleControl_DF67
+al 00DF60 .Menu_HandleControl_DF60
+al 00DF76 .Menu_TransferVramDataPath_DF76
+al 00DF52 .Menu_TransferVramDataPath_DF52
+al 00DF4B .Menu_HandleControl_DF4B
+al 00DF37 .Menu_TransferVramDataPath_DF37
+al 00DF18 .Menu_TransferVramDataPath_DF18
+al 00DF0E .Menu_TransferVramDataPath_DF0E
+al 00DF04 .Menu_TransferVramDataPath_DF04
+al 00DEF1 .Menu_TransferVramDataPath_DEF1
+al 00DEE4 .Menu_TransferVramDataPath_DEE4
+al 00DED4 .Menu_TransferVramDataPath_DED4
+al 00DEC2 .Menu_TransferVramDataPath_DEC2
+al 00DEB9 .Menu_TransferVramDataPath_DEB9
+al 00DEB1 .Menu_TransferVramDataPath_DEB1
+al 00E1C0 .RenderEncodedTextRecords
+al 00DE95 .Menu_TransferVramDataPath_DE95
+al 00DE78 .StatusScreenPaletteAddressTable
+al 00DE69 .Menu_TransferVramDataPath_DE69
+al 00DE4E .StatusScreenValueAddressTable
+al 00DE33 .Menu_TransferVramDataPath_DE33
+al 00DE15 .StatusScreenTextPointerTable
+al 00DF5D .Menu_HandleControl_DF5D
+al 00DE07 .Menu_TransferVramDataPath_DE07
+al 00DDE1 .Menu_TransferVramDataPath_DDE1
+al 00DDD2 .Menu_TransferVramDataPath_DDD2
+al 00DDBB .Menu_ReadZp61_DDBB
+al 00DDB9 .Menu_HandleControl_DDB9
+al 00DDAC .Menu_ReadZp61_DDAC
+al 00DDAA .Menu_HandleControl_DDAA
+al 00DD9E .Menu_WriteZp61_DD9E
+al 00DD92 .Menu_WriteZp61_DD92
+al 00DD77 .Menu_WriteObjectWorkX_DD77
+al 00DD8D .Menu_AddToZp61_DD8D
+al 00DDC2 .Menu_ReadObjectWorkX_DDC2
+al 00DD6B .Menu_WriteObjectWorkX_DD6B
+al 00DD62 .StatusDigitTileTable
+al 00E2BD .Gameplay_ReadObjectMode_E2BD
+al 00DD50 .Menu_TransferVramDataPath_DD50
+al 00DD22 .StatusScreenAddressTable
+al 00DD15 .Menu_TransferVramDataPath_DD15
+al 00DC53 .MenuScreenConstructionData
+al 00DC52 .Menu_ReturnToCaller_DC52
+al 00DC44 .Menu_TransferVramDataPath_DC44
+al 00DC26 .Menu_IncrementWorkIndex_DC26
+al 00DC39 .Menu_ReadRamDC53_DC39
+al 00DD04 .Menu_SaveAccumulator_DD04
+al 00E353 .Gameplay_ReadRamE360_E353
+al 00DBD3 .Menu_ReadRam007F_DBD3
+al 00DBCF .Menu_HandleControl_DBCF
+al 00DBC0 .Menu_AddToZp8D_DBC0
+al 00DBCC .Menu_Dispatch_DBCC
+al 00DB99 .Menu_AddToZp7F_DB99
+al 00DB95 .Menu_HandleControl_DB95
+al 00DB7E .Menu_ReadZp7F_DB7E
+al 00DB7A .Menu_HandleControl_DB7A
+al 00DB40 .Menu_Dispatch_DB40
+al 00DB3D .Menu_CallHelper_DB3D
+al 00DB39 .Menu_WriteWorkValue_DB39
+al 00DB2E .Menu_ReadWorkValue_DB2E
+al 00DB1E .Menu_CallHelper_DB1E
+al 00DB1A .Menu_WriteWorkValue_DB1A
+al 00DB0F .Menu_ReadWorkValue_DB0F
+al 00DB24 .Menu_ReadWorkValue_DB24
+al 00DB43 .Menu_TransferVramDataPath_DB43
+al 00DAE9 .Menu_CallHelper_DAE9
+al 00DAF8 .Menu_UpdateAudioChannelPath_DAF8
+al 00DAC9 .Menu_TransferVramDataPath_DAC9
+al 00DAB5 .Menu_TransferVramDataPath_DAB5
+al 00DC41 .Menu_CallHelper_DC41
+al 00DF27 .UploadMenuPalette
+al 00D994 .StageLayoutPointerData
+al 00D993 .Stage_ReturnToCaller_D993
+al 00D984 .Stage_RotateLeftZp19_D984
+al 00D974 .Stage_ShiftLeftZp1E_D974
+al 00D97C .Stage_WriteZp19_D97C
+al 00D93A .Stage_WriteZp17_D93A
+al 00D912 .Stage_ReadZp17_D912
+al 00D901 .Stage_ReadZp14_D901
+al 00D708 .GameplayParameterTables
+al 00D6E2 .Stage_ReadObjectWorkX_D6E2
+al 00D703 .Stage_AdvanceIndexY_D703
+al 00D6BE .Stage_ReadZp97_D6BE
+al 00D6AC .Stage_WriteZp97_D6AC
+al 00D6A8 .Stage_HandleControl_D6A8
+al 00D697 .Stage_ToggleRandomState3_D697
+al 00D629 .Stage_ReadZp3F_D629
+al 00D631 .Stage_ReadPositionHi_D631
+al 00D622 .Stage_IncrementZp3E_D622
+al 00D611 .Stage_ReadZp3D_D611
+al 00D207 .ObjectAndStageLookupTables
+al 00D124 .ObjectMovementParameterTable
+al 00D123 .Object_ReturnToCaller_D123
+al 00D11C .Object_AdvanceIndexX_D11C
+al 00D0FA .Object_ReadRamD121_D0FA
+al 00D0E3 .Object_WriteObjectWorkX_D0E3
+al 00D0F7 .Object_RestoreAccumulator_D0F7
+al 00D08B .Object_ReturnToCaller_D08B
+al 00D08C .Object_WriteZp3D_D08C
+al 00D010 .Object_WriteZp3D_D010
+al 00CFED .Object_ReadStageIndex_CFED
+al 00CFEC .Object_ReturnToCaller_CFEC
+al 00CFE3 .ObjectPositionLimitTable
+al 00D1C8 .Object_WriteZp4D_D1C8
+al 00CFCF .Object_ReadRamD245_CFCF
+al 00CFC5 .Object_ReadRam05B2_CFC5
+al 00CFE9 .Object_RetreatIndexX_CFE9
+al 00CFBA .Object_ReadRam0576_CFBA
+al 00CFAF .Object_ReturnToCaller_CFAF
+al 00CFA9 .Object_IncrementZpAC_CFA9
+al 00CFA3 .Object_ReturnToCaller_CFA3
+al 00CFA4 .Object_MergeZp13_CFA4
+al 00CF82 .Object_ReadObjectDirection_CF82
+al 00CF7D .Object_ReadObjectPhase_CF7D
+al 00CF7C .Object_ReturnToCaller_CF7C
+al 00CF25 .Object_WriteGameMode_CF25
+al 00CF15 .Object_WriteGameMode_CF15
+al 00CF57 .Object_WriteObjectCounter_CF57
+al 00CF4E .Object_WriteObjectSpeed_CF4E
+al 00CF45 .Object_WriteObjectDirection_CF45
+al 00CF3C .Object_WriteObjectSubtype_CF3C
+al 00CF33 .Object_WriteObjectPhase_CF33
+al 00CF2A .Object_WriteObjectFlags_CF2A
+al 00CF1A .Object_ReadObjectMode_CF1A
+al 00CF0D .Object_ReadObjectTimer_CF0D
+al 00DD83 .Menu_WriteObjectWorkX_DD83
+al 00CED2 .FrameObjectOffsetTable
+al 00D5F2 .Stage_WriteZp3F_D5F2
+al 00CE80 .Frame_WriteZp0E_CE80
+al 00CE5A .Frame_ReturnToCaller_CE5A
+al 00CE56 .Frame_WriteSoundCommandState_CE56
+al 00CE54 .Frame_HandleControl_CE54
+al 00CE4A .Frame_WriteObjectIndex_CE4A
+al 00CE45 .Frame_TestObjectIndex_CE45
+al 00CE59 .Frame_RestoreAccumulator_CE59
+al 00CE2D .Frame_ReturnToCaller_CE2D
+al 00CE2A .Frame_IncrementObjectY_CE2A
+al 00CE1E .Frame_ReturnToCaller_CE1E
+al 00CE1B .Frame_IncrementObjectX_CE1B
+al 00CE0F .FrameSingleByteConstant
+al 00CE04 .Frame_HandleControl_CE04
+al 00CDDF .Frame_ReadObjectState_CDDF
+al 00CE06 .Frame_WriteZp2D_CE06
+al 00CDCF .Frame_HandleControl_CDCF
+al 00CDAE .Frame_ReadObjectState_CDAE
+al 00CD9C .Frame_HandleControl_CD9C
+al 00CD7B .Frame_ReadObjectState_CD7B
+al 00CE2E .Frame_ReadZp33_CE2E
+al 00CF60 .Object_ReadTransferPointer_CF60
+al 00CD69 .Frame_HandleControl_CD69
+al 00CD44 .Frame_ReadObjectState_CD44
+al 00CD12 .Frame_WriteTransferPointer_CD12
+al 00CD09 .Frame_ReadRam03A0_CD09
+al 00CE1F .Frame_ReadObjectY_CE1F
+al 00CE10 .Frame_ReadObjectX_CE10
+al 00CCEE .Frame_ReturnToCaller_CCEE
+al 00CCEF .Frame_ReadObjectState_CCEF
+al 00CD39 .Frame_ReadObjectY_CD39
+al 00CCD7 .Frame_ReadObjectSubtype_CCD7
+al 00CD70 .Frame_ReadObjectY_CD70
+al 00CCCF .Frame_CopyXToA_CCCF
+al 00CDA3 .Frame_ReadObjectX_CDA3
+al 00CCC7 .Frame_CopyXToA_CCC7
+al 00CCBF .Frame_CopyXToA_CCBF
+al 00CCB7 .Frame_CopyAToX_CCB7
+al 00CF87 .Object_ReadGameState_CF87
+al 00CCAE .Frame_WriteInvincibilityTimer_CCAE
+al 00CCA3 .Frame_ReturnToCaller_CCA3
+al 00CEE9 .Frame_WriteSoundCommandState_CEE9
+al 00CC95 .Frame_IncrementBombCapacity_CC95
+al 00CCA4 .Frame_ReadObjectFlags_CCA4
+al 00CC62 .Frame_ReturnToCaller_CC62
+al 00CC63 .Frame_ReadObjectX_CC63
+al 00CC4C .Frame_ReadZp5C_CC4C
+al 00CC04 .FrameAnimationSequenceTable
+al 00CBEA .Gameplay_ReturnToCaller_CBEA
+al 00CBE2 .Gameplay_RetreatIndexY_CBE2
+al 00CBDB .Gameplay_WriteRam0576_CBDB
+al 00CBD1 .Gameplay_WriteRam03E6_CBD1
+al 00CBC9 .Gameplay_WriteRam03A0_CBC9
+al 00CB65 .Gameplay_TransferVramData_CB65
+al 00CB55 .Gameplay_ReadZp17_CB55
+al 00D924 .Stage_WriteZp1A_D924
+al 00DDC7 .Menu_HandleControl_DDC7
+al 00CB38 .Gameplay_IncrementWorkIndex_CB38
+al 00CB4E .Gameplay_WriteObjectWorkY_CB4E
+al 00CB2E .Gameplay_HandleControl_CB2E
+al 00CB30 .Gameplay_IncrementZp27_CB30
+al 00CB24 .Gameplay_ReadDataPointer_CB24
+al 00CB1B .Gameplay_ReadZp94_CB1B
+al 00CB17 .Gameplay_WriteWorkIndex_CB17
+al 00CB05 .Gameplay_ReturnToCaller_CB05
+al 00CADA .Gameplay_WriteObjectWorkY_CADA
+al 00CAC9 .Gameplay_DecrementObjectWorkX_CAC9
+al 00CABE .Gameplay_ReadRamE243_CABE
+al 00CABA .Gameplay_WriteObjectWorkX_CABA
+al 00CA66 .Gameplay_WriteTransferPointer_CA66
+al 00CA47 .GameplayObjectAttributeTable
+al 00CA43 .Gameplay_RetreatIndexX_CA43
+al 00CA1D .Gameplay_ReadRam03A0_CA1D
+al 00CA11 .GameplayObjectClassTable
+al 00CA10 .Gameplay_ReturnToCaller_CA10
+al 00C9DE .GameplayDirectionDeltaTable
+al 00C9E3 .Gameplay_TestZp2E_C9E3
+al 00C9B5 .Gameplay_ReturnToCaller_C9B5
+al 00C9A6 .Gameplay_WriteTransferPointer_C9A6
+al 00C999 .Gameplay_ReadFlamePass_C999
+al 00C9B2 .Gameplay_RetreatIndexX_C9B2
+al 00C96C .Gameplay_ReadRam03A0_C96C
+al 00CBF6 .Gameplay_WriteDisplayMode_CBF6
+al 00C9B6 .Gameplay_WriteZp2F_C9B6
+al 00C966 .Gameplay_RetreatIndexX_C966
+al 00C93B .Gameplay_ReadRam03A0_C93B
+al 00C939 .Gameplay_HandleControl_C939
+al 00CACF .Gameplay_WriteObjectWorkX_CACF
+al 00C935 .Gameplay_RetreatIndexY_C935
+al 00C8EF .Gameplay_ReadRam0576_C8EF
+al 00C8E9 .Gameplay_RetreatIndexY_C8E9
+al 00C8AF .Gameplay_ReadRam0576_C8AF
+al 00C8AC .Gameplay_ReturnToCaller_C8AC
+al 00C8A1 .Gameplay_WriteRam04D6_C8A1
+al 00C89E .Gameplay_WriteRam04D6_C89E
+al 00CBE5 .Gameplay_ReadRam03E6_CBE5
+al 00C835 .Gameplay_Dispatch_C835
+al 00C8AD .Gameplay_HandleControl_C8AD
+al 00C828 .Gameplay_IncrementBonusTimer_C828
+al 00C815 .Gameplay_ReadWorkIndex_C815
+al 00C800 .Gameplay_ReadWorkIndex_C800
+al 00C830 .Gameplay_WriteRam03E6_C830
+al 00C7EE .Gameplay_ReadWorkIndex_C7EE
+al 00C7DE .Gameplay_ReadRam04D6_C7DE
+al 00C838 .Gameplay_ReadRam0526_C838
+al 00C7CB .Gameplay_ReadTransferPointer_C7CB
+al 00CBEB .Gameplay_ReadRamE2A3_CBEB
+al 00C8A6 .Gameplay_RetreatIndexX_C8A6
+al 00C7A4 .Gameplay_Dispatch_C7A4
+al 00C7A7 .Gameplay_ReadRam0486_C7A7
+al 00C79F .Gameplay_ReadRam03E6_C79F
+al 00C75D .MainStateDispatchTable
+al 00C75C .Main_ReturnToCaller_C75C
+al 00C74E .Main_RetreatIndexY_C74E
+al 00C707 .Main_ReadRam0576_C707
+al 00C705 .Main_HandleControl_C705
+al 00D8FC .Stage_WriteObjectWorkX_D8FC
+al 00C753 .Main_CallHelper_C753
+al 00C756 .Main_RetreatIndexX_C756
+al 00C6D6 .Main_ReadRamC764_C6D6
+al 00C6D0 .Main_ReadRam0526_C6D0
+al 00C6B2 .Main_WriteZp32_C6B2
+al 00C6DA .Main_ReadZp5C_C6DA
+al 00C688 .Main_ReadRam0436_C688
+al 00C6CD .Main_Dispatch_C6CD
+al 00C66E .Main_ReadRam03E6_C66E
+al 00CBD7 .Gameplay_HandleControl_CBD7
+al 00C65E .Main_ReturnToCaller_C65E
+al 00C62F .Main_WriteSoundCommandState_C62F
+al 00C643 .Main_ReturnToCaller_C643
+al 00C610 .Main_Dispatch_C610
+al 00CB06 .Gameplay_WriteWorkValue_CB06
+al 00D69A .Stage_ReadZp58_D69A
+al 00C5C3 .Main_WriteZp58_C5C3
+al 00C5BF .Main_ReadGameMode_C5BF
+al 00CEA7 .Frame_ReadZp2D_CEA7
+al 00C5AA .Main_WriteStageCounter_C5AA
+al 00CDD4 .Frame_ReadObjectX_CDD4
+al 00C5A4 .Main_ReadObjectType_C5A4
+al 00C58F .Main_WriteStageCounter_C58F
+al 00DBF9 .Menu_WriteWorkValue_DBF9
+al 00C65F .Main_ReadZp33_C65F
+al 00C8ED .Gameplay_HandleControl_C8ED
+al 00C55C .Main_WriteGameMode_C55C
+al 00C52E .Main_ReadZp93_C52E
+al 00CBC5 .Gameplay_HandleControl_CBC5
+al 00CA72 .Gameplay_WriteTransferPointer_CA72
+al 00DE53 .Menu_WriteZp0E_DE53
+al 00C503 .Main_WriteNmiWorkPending_C503
+al 00C4F8 .Main_WriteZp7E_C4F8
+al 00C56C .Main_WriteObjectX_C56C
+al 00C4EB .Main_AdvanceIndexY_C4EB
+al 00C4D2 .Main_Dispatch_C4D2
+al 00C4D5 .Main_WriteGameMode_C4D5
+al 00C4B8 .Main_HandleControl_C4B8
+al 00C4B4 .Main_WriteGameMode_C4B4
+al 00C4AA .Main_ReadGameMode_C4AA
+al 00DD3E .Menu_CallHelper_DD3E
+al 00C49F .Main_WriteNmiWorkPending_C49F
+al 00C4C3 .Main_WriteGameMode_C4C3
+al 00C66C .Main_HandleControl_C66C
+al 00C79D .GameplayUpdate
+al 00C4BF .Main_ReadGameState_C4BF
+al 00C481 .Main_ReadGameState_C481
+al 00E399 .Gameplay_ReadStageProgress_E399
+al 00C644 .Main_ReadZp33_C644
+al 00CA1B .Gameplay_HandleControl_CA1B
+al 00CFB0 .Object_WriteStageProgress_CFB0
+al 00CE5B .Frame_ReadObjectIndex_CE5B
+al 00C96A .Gameplay_HandleControl_C96A
+al 00CC36 .Frame_ReadZp7D_CC36
+al 00C613 .Main_WriteStageCounter_C613
+al 00C44F .Main_ReadZp5D_C44F
+al 00C5FF .Main_CallHelper_C5FF
+al 00E4AF .Gameplay_ReadZp58_E4AF
+al 00C5CE .Main_WriteObjectType_C5CE
+al 00CA4B .Gameplay_WriteTransferPointer_CA4B
+al 00C60B .Main_ReadGameMode_C60B
+al 00DE1D .Menu_WriteZp0E_DE1D
+al 00C410 .Main_WriteZpB1_C410
+al 00C3C2 .Main_WriteZp61_C3C2
+al 00C3C7 .Main_UpdateAudioChannelPath_C3C7
+al 00C40A .Main_WriteObjectDirection_C40A
+al 00C3B6 .Main_WriteZp58_C3B6
+al 00DA8E .RunMenuSelectionScreen
+al 00C3A3 .Main_WriteScreenState_C3A3
+al 00D670 .AdvanceRandomState
+al 00C38B .Main_DecrementSubDelay_C38B
+al 00C398 .Main_ReadGameState_C398
+al 00CBFB .WaitForNmiFrameHandoff
+al 00C370 .Main_ReadOptionState_C370
+al 00C36C .Main_WriteMainDelay_C36C
+al 00C368 .MainGameLoop
+al 00DE83 .ComposeStatusScreen
+al 00C34A .Main_UpdateAudioChannelPath_C34A
+al 00E642 .InitializeApu
+al 00C33C .Main_WriteZpDB_C33C
+al 00C333 .Main_WriteZp00_C333
+al 00C317 .Main_WriteSoundDispatchIndex_C317
+al 00C307 .WaitForFrameBoundary
+al 00C2E7 .SystemPaletteData
+al 00C2D6 .Ppu_SetVramAddress_C2D6
+al 00C2CC .Ppu_TransferVramDataPath_C2CC
+al 00C2BD .Ppu_UpdatePpuStatePath_C2BD
+al 00C290 .Ppu_WaitPpuStatusPath_C290
+al 00C26C .Ppu_WriteRam0700_C26C
+al 00C262 .Ppu_HandleControl_C262
+al 00C25F .Ppu_HandleControl_C25F
+al 00C2B0 .EnableNmiInPpuControl
+al 00C24C .Ppu_TransferSpriteDmaAndReturnA_C24C
+al 00C25C .Ppu_UpdatePpuState_C25C
+al 00C23B .Ppu_CallHelper_C23B
+al 00C234 .Ppu_TransferVramDataPath_C234
+al 00C220 .Ppu_TransferVramDataPath_C220
+al 00C215 .Ppu_HandleControl_C215
+al 00C2C3 .UploadSystemPalette
+al 00C28B .WaitForVBlankTransition
+al 00C268 .HideAllSprites
+al 00C2B9 .Ppu_HandleControl_C2B9
+al 00C257 .DisableRendering
+al 00C1F2 .InitializeVideoSystem
+al 00C1F0 .Ppu_RetreatIndexY_C1F0
+al 00C1DD .Ppu_ReadControllerPath_C1DD
+al 00C1EB .Ppu_HandleControl_C1EB
+al 00C1CC .Ppu_ReadControllerPath_C1CC
+al 00C1B8 .Ppu_WriteZp13_C1B8
+al 00C1BF .Ppu_ReadControllerAndReturnA_C1BF
+al 00C179 .Nmi_ReadPpuStatusPath_C179
+al 00C172 .Nmi_ReadPpuStatusPath_C172
+al 00C18A .Nmi_ToggleZpDB_C18A
+al 00C16E .Nmi_ReadNmiWorkPending_C16E
+al 00E65F .SoundUpdate
+al 00E4C7 .Gameplay_ReadZpB2_E4C7
+al 00C19D .Ppu_WriteZp10_C19D
+al 00C13E .Nmi_UpdateAudioChannelPath_C13E
+al 00C296 .CommitPpuStateAndScroll
+al 00DF48 .Menu_HandleControl_DF48
+al 00C123 .Nmi_CallHelper_C123
+al 00C114 .Nmi_ReadZp93_C114
+al 00C107 .Nmi_TransferVramDataPath_C107
+al 00C0F7 .Nmi_TransferVramDataPath_C0F7
+al 00C126 .Nmi_ReadPpuStatusPath_C126
+al 00C0DE .Nmi_TransferVramDataPath_C0DE
+al 00C0CC .Nmi_TransferVramDataPath_C0CC
+al 00C196 .SetPpuAddress
+al 00C0E4 .Nmi_ReadNmiWorkPending_C0E4
+al 00C0B9 .Nmi_ReadScreenState_C0B9
+al 00C049 .Nmi_TransferVramDataPath_C049
+al 00C0B3 .Nmi_ReadZp14_C0B3
+al 00C03E .Nmi_TransferSpriteDmaPath_C03E
+al 00C01A .NmiHandler
+al 00C30C .InitializeSystemAndRunMainLoop
+al 00C012 .WaitForSecondStartupVBlank
+al 00C00D .WaitForFirstStartupVBlank
+al 00C000 .Reset
+al 004010 .PatternTableGraphics
diff --git a/Bomberman (U)/copilot/reconstructed.map b/Bomberman (U)/copilot/reconstructed.map
new file mode 100644
index 0000000..83f1965
--- /dev/null
+++ b/Bomberman (U)/copilot/reconstructed.map	
@@ -0,0 +1,32 @@
+Modules list:
+-------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
+prg.o:
+    PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
+
+
+Segment list:
+-------------
+Name                   Start     End    Size  Align
+----------------------------------------------------
+HEADER                000000  00000F  000010  00001
+PRG                   000010  00400F  004000  00001
+CHR                   004010  00600F  002000  00001
+
+
+Exports list by name:
+---------------------
+
+
+
+Exports list by value:
+----------------------
+
+
+
+Imports list:
+-------------
+
diff --git a/Bomberman (U)/copilot/reconstructed.nes b/Bomberman (U)/copilot/reconstructed.nes
new file mode 100644
index 0000000..b7e9d48
Binary files /dev/null and b/Bomberman (U)/copilot/reconstructed.nes differ
diff --git a/Bomberman (U)/copilot/rom.nes b/Bomberman (U)/copilot/rom.nes
new file mode 120000
index 0000000..97d7a19
--- /dev/null
+++ b/Bomberman (U)/copilot/rom.nes	
@@ -0,0 +1 @@
+../bomberman.nes
\ No newline at end of file
diff --git a/Burger Time (U)/OVERVIEW.md b/Burger Time (U)/OVERVIEW.md
new file mode 100644
index 0000000..794688a
--- /dev/null
+++ b/Burger Time (U)/OVERVIEW.md	
@@ -0,0 +1,364 @@
+# Burger Time (U) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Burger Time (U) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `burger_time.nes`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Horizontal |
+| PRG bank start | CPU $C000 |
+| Source files | `copilot/prg.s` (9,323 lines), `copilot/header.s`, `copilot/chr.s` |
+| Output | `burger_time_rebuilt.nes` (24,592 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $FF7F | `NmiHandler` |
+| RESET | $FD24 | `ResetHandler` |
+| IRQ / BRK | $FD24 | `ResetHandler` (reused) |
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles `header.s`, `prg.s`, and `chr.s`, links them via `ld65`, and verifies the result against `burger_time.nes`.
+
+**Verification result: BYTE-IDENTICAL** — headers, CHR, and all PRG bytes match exactly.
+
+Note: the Makefile references `burger_time.nes`, while the actual ROM file is named `Burger Time (U) [!].nes`. A symlink `burger_time.nes → "../Burger Time (U) [!].nes"` is required before building.
+
+---
+
+## 3. Reset — CPU $FFFC → $FD24
+
+**`ResetHandler`** ($FD24)
+
+On power-on or reset:
+
+1. `sei` — disable maskable interrupts.
+2. `cld` — clear decimal mode.
+3. `lda #$00 / sta PPUCTRL / sta PPUMASK` — disable PPU rendering and NMI.
+4. **Wait for two VBlanks** — `Flow_FD2E` and `Flow_FD33` each poll `PPUSTATUS` ($2002) for the VBlank bit.
+5. `jsr SetDefaultScroll` ($FFEB) — set scroll to ($08, $00).
+6. `FrameCounter` ($14) = $00; `FrameCounterReload` ($13) = $08.
+7. `JOY2` ($4017) = $80 — select controller latch mode / disable IRQ.
+8. Stack pointer = $FF.
+9. `jsr InitializeRuntimeState` ($FD63) — clear NmiCompletedFlag ($0E), GameMode ($4C), PendingFrameTask ($8F), PlayerDeathFlag ($4F), StageCompleteFlag ($4E); set PPUCTRL shadow to $90; clear nametables; load initial palette; wait for NMI; set PPUMASK shadow to $1A.
+10. `jsr InitializeGameSystems` ($C00E) — process game state at $C76E and $CB53; set up initial OAM positions ($0700=$70, $0701=$10); clear $32; call `SetMainState` to enter the first state.
+11. Falls into **`Flow_FD4F`** ($FD4F) — the main loop.
+
+---
+
+## 4. Main Loop — State Machine at $FD4F
+
+**`Flow_FD4F`** ($FD4F) is the central main loop. Every iteration:
+
+1. `jsr WaitForNmi` ($FD9D) — block until NmiCompletedFlag ($0E) is set, then clear it.
+2. Load `MainGameState` ($16), multiply by 2, use as index into a pointer table:
+   - Low byte from `MainStateDispatchTable` ($C000)
+   - High byte from `LookupTable_C001` ($C001)
+   - The two tables are interleaved in the same $C000–$C00D region.
+3. Indirect jump (`jmp (DataPointerLo)`) to the state handler.
+
+### State Dispatch Table (CPU $C000–$C00D)
+
+The table is structured as alternating low/high bytes indexed by `MainGameState * 2`:
+
+| State | CPU Addr | Handler Routine | Purpose |
+|-------|----------|-----------------|---------|
+| 0 | $C3F8 | `RunFrameSynchronizedTask_C3F8` | Initial / boot frame task |
+| 1 | $C04E | `HandleTitleState` | Title screen |
+| 2 | $C12F | `HandleGameStartState` | Game start / level init |
+| 3 | $4DC2 | *(unmapped / bank-switched)* | *(state 3 entry)* |
+| 4 | $C24D | `Flow_C24D` | Stage transition / between-levels |
+| 5 | $C14F | `HandleGameplayState` | Main gameplay |
+| 6 | $C1AA | `HandlePlayerDeathState` | Player death sequence |
+| *(state 7+)* | *(from table)* | *(various)* | *(additional states)* |
+
+`SetMainState` ($FF7C) stores the accumulator into `MainGameState` ($16) and returns — used by every state handler to transition to the next state.
+
+---
+
+## 5. NMI / Frame Heartbeat — `NmiHandler` ($FF7F)
+
+The NMI fires once per frame and is the real-time driver:
+
+1. **Save registers** (A, X, Y on stack).
+2. **OAM DMA** — write $00 to OAMADDR ($2003), then $07 to OAMDMA ($4014) to DMA sprite data from $0700–$07FF.
+3. Set `NmiCompletedFlag` ($0E) = $01 — signals the main loop that a frame has elapsed.
+4. Read `PPUSTATUS` ($2002) to reset the address latch.
+5. **Stage complete handling** — if `StageCompleteFlag` ($4E) is set, `jsr ProcessGameState_CEA3` ($CEA3), then clear the flag.
+6. `jsr ProcessPendingFrameTask` ($C029) — if a frame task is pending, advance its counter.
+7. If `GameMode` ($4C) is nonzero, `jsr ProcessGameState_F493` ($F493) — per-frame gameplay/audio update.
+8. **Restore registers, `rti`.**
+
+---
+
+## 6. State Handlers
+
+### 6.1 Title State — `HandleTitleState` ($C04E)
+
+- Sets `GameMode` ($4C) = $00 and `Zp_57` ($57) = $00.
+- `jsr ProcessGameState_C7F7` ($C7F7) — title-specific game state processing.
+- `StateInitializedFlag` ($31) = $01.
+- `jsr ProcessGameState_CB53` ($CB53) and `jsr ProcessGameState_C81B` ($C81B).
+- `jsr EnableBackgroundAndSprites` ($C3EE) — enables rendering.
+- `jmp Flow_C233` ($C233) — clears stage state, sets `MainGameState` = 4, returns to main loop.
+
+### 6.2 Game Start State — `HandleGameStartState` ($C12F)
+
+- `jsr ProcessGameState_C7F7` ($C7F7).
+- `GameActiveFlag` ($4D) = $01; `StateInitializedFlag` ($31) = $01.
+- `jsr ClearNametable2000` ($FDD0) — clear nametable at $2000.
+- `jsr ProcessGameState_C81B` ($C81B) and `jsr ProcessGameState_C977` ($C977).
+- Decrement `Ram_0400` ($0400).
+- `jsr ClearNametable2000` again.
+- Set `MainGameState` = 6 → gameplay state.
+- Return to main loop via `Flow_FD4F`.
+
+### 6.3 Gameplay State — `HandleGameplayState` ($C14F)
+
+The core gameplay state. Checks `Zp_52` ($52):
+- If `Zp_52` is nonzero → `Flow_C161` (second-player / alternate player path).
+- If zero → `Flow_C153` (first player path).
+
+Checks `PlayerDeathFlag` ($4F):
+- Bit 0 = player 1 dead; bit 1 = player 2 dead.
+- If a player is dead → `Flow_C19E` → sets `MainGameState` = 5 (player death state).
+- Otherwise continues gameplay.
+
+When transitioning to death (`Flow_C177`):
+- Disable background/sprites, set state initialized, process game state, re-enable rendering.
+- Store pending sound command $03 (death sound), set GameMode = $01.
+- Run a frame-synchronized task at $CA80, store sound command $04.
+- Jump to `Flow_C233` → `MainGameState` = 4 (stage transition).
+
+### 6.4 Player Death State — `HandlePlayerDeathState` ($C1AA)
+
+- Disable rendering, clear nametable.
+- Loads player-specific data based on `CurrentPlayerIndex` ($50): X = $C1 (player 1) or $12 (player 2).
+- `jsr ProcessGameState_C715` ($C715) with player data.
+- Store player sprite Y at $0701.
+- Load palette, wait for NMI, set PPUCTRL/PPUMASK.
+- Run frame-synchronized task, clear nametable, process game state at $CEC8.
+- Set `MainGameState` = 5, return to main loop.
+
+### 6.5 Stage Complete / Between-Stage State — `HandleStageCompleteState` ($C22A) / `Flow_C233` ($C233)
+
+- Disable rendering, process game state, enable rendering.
+- `Flow_C233`: clear `Ram_046E`–$470, `Zp_2E`, `Zp_2F`, `Ram_045A`.
+- Set `MainGameState` = 4 → stage transition state.
+- Return to main loop.
+
+`Flow_C24D` ($C24D) — the stage transition update (runs every 8th frame via `Zp_15` counter):
+- Processes a long chain of game state routines: $C9F9, $D7D3, $D980, $E11E, $E0B7, $E71A, $E6AE.
+- If `GameMode` != 0: reads controllers for current player.
+- More game state processing: $D1C1, $D6BF, $CB6F, $DB45, $DBD7, $DC82, $DD61, $EA1A, $E7DE, $E81A.
+- If `GameMode` != 0: `ProcessGameState_C5FF` ($C5FF) — score/remaining-life logic.
+- Handles player lives (`Zp_1B` for player 1, `Zp_23` for player 2), wraps at 7.
+- Clears nametable, sets `MainGameState` = 5 or 6 depending on mode.
+
+---
+
+## 7. Core Gameplay Update Loop
+
+Every 8 frames (when `Zp_15 & $07 == 0`), `Flow_C258` ($C258) runs the primary gameplay update:
+
+| Routine | Address | Purpose |
+|---------|---------|---------|
+| `ProcessGameState_C9F9` | $C9F9 | Object/enemy movement |
+| `CalculateAndClampValue_D7D3` | $D7D3 | Value clamping |
+| `ProcessGameState_D980` | $D980 | Object processing |
+| `ProcessGameState_E11E` | $E11E | Collision / interaction |
+| `ProcessGameState_E0B7` | $E0B7 | State update |
+| `ProcessGameState_E71A` | $E71A | Animation |
+| `ProcessGameState_E6AE` | $E6AE | Object cleanup |
+| *(player input)* | — | Controller reading when GameMode != 0 |
+| `ProcessGameState_D1C1` | $D1C1 | Player movement |
+| `ProcessGameState_D6BF` | $D6BF | Player animation |
+| `ProcessGameState_CB6F` | $CB6F | Burger/part assembly |
+| `ProcessGameState_DB45` | $DB45 | Enemy AI |
+| `ProcessGameState_DBD7` | $DBD7 | Collision detection |
+| `ProcessGameState_DC82` | $DC82 | Score / points |
+| `ProcessGameState_DD61` | $DD61 | Bonus items |
+| `ProcessGameState_EA1A` | $EA1A | Pepper / power-up |
+| `ProcessGameState_E7DE` | $E7DE | Round timing |
+| `ProcessGameState_E81A` | $E81A | Level progression |
+| `ProcessGameState_C5FF` | $C5FF | Lives / continues (GameMode != 0) |
+
+---
+
+## 8. Audio Engine
+
+**`UpdateAudioEngine`** ($F478)
+
+Called from:
+- `Flow_C368` ($C368) — during title/transition states
+- `RunFrameSynchronizedTask_C3F8` ($C3F8) — during frame-synchronized tasks
+- `Flow_C615` ($C615) — during gameplay state
+- `Flow_C7D6` ($C7D6) — tail call from another path
+
+The audio engine:
+1. Clears audio RAM at $052F (167 bytes, X from $A7 down).
+2. Clears APU channel volume registers $4000–$400F (20 bytes).
+3. Writes $00 to SND_CHN ($4015) — disable all channels initially.
+4. Sets `Ram_05A3` ($05A3) = $38.
+5. Processes sound commands and music updates via subroutines at $F4B3, $F5B3, $F748, $F6E4.
+
+**`StorePendingSoundCommand`** ($C026) — stores a sound command in `PendingSoundCommand` ($90), processed by the NMI or audio engine.
+
+**`ProcessPendingFrameTask`** ($C029) — processes `PendingFrameTask` ($8F); if $FF, resets to $00 and advances; otherwise increments the task counter up to $F1.
+
+---
+
+## 9. PPU / Rendering
+
+### `EnableBackgroundAndSprites` ($C3EE)
+Waits for PPU VBlank, loads `PpuMaskShadow` ($11), ORs with $18 (enable background + sprites), calls `SetPpuMaskShadow`.
+
+### `DisableBackgroundAndSprites` ($C3E4)
+Waits for PPU VBlank, loads `PpuMaskShadow`, ANDs with $E7 (disable background + sprites).
+
+### `SetPpuControlShadow` ($C3D8) / `SetPpuMaskShadow` ($C3DE)
+Store accumulator to the shadow register ($0C/$0D) and to the corresponding PPU register ($2000/$2001).
+
+### `ClearNametables` ($FDAE)
+Clears both nametables ($2000 and $2800) via `ClearNametable2000` and `ClearNametable2800`.
+
+### `LoadPalette` ($FDF0)
+Waits for PPU VBlank, sets PPU address to $3F00 (palette), writes 16 bytes of palette data from a pointer in X/Y.
+
+### `SetDefaultScroll` ($FFEB)
+Writes $08 then $00 to PPUSCROLL ($2005).
+
+### `DecodeNametableStream` ($FE74)
+Decodes a run-length-encoded nametable stream from a pointer (X/Y) into PPU memory. Used extensively during screen initialization (`RunFrameSynchronizedTask_C3F8` calls it multiple times for different screen regions).
+
+---
+
+## 10. Controller Input
+
+**`ReadControllers`** ($FE2B)
+
+Reads both controller ports ($4016/$4017) by strobing JOY1, then shifting in 8 bits per controller. Results are packed into scratch variables:
+- `ScratchValue0` ($01), `ScratchValue1` ($02), `ScratchIndex` ($03) — raw button bits.
+- The result is processed into directional/button flags stored in `Zp_2F` ($2F), checked with `and #$0C` (start/select) and `and #$08` (specific button) throughout the code.
+
+---
+
+## 11. Key Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $0E | NmiCompletedFlag | NMI frame-sync flag |
+| $10 | PpuControlShadow | $2000 mirror |
+| $11 | PpuMaskShadow | $2001 mirror |
+| $13 | FrameCounterReload | Frame counter reload value |
+| $14 | FrameCounter | Frame tick counter |
+| $15 | Zp_15 | Frame divider (gameplay runs every 8 frames) |
+| $16 | MainGameState | Current state machine state |
+| $1B | Zp_1B | Player 1 lives counter |
+| $1F | Zp_1F | (unnamed) |
+| $23 | Zp_23 | Player 2 lives counter |
+| $2E–$2F | Zp_2E / Zp_2F | Controller/button state |
+| $31 | StateInitializedFlag | State init flag |
+| $32–$35 | Zp_32–$35 | Indirect pointers / coordinates |
+| $3F | Zp_3F | (unnamed) |
+| $44 | Zp_44 | (unnamed) |
+| $4C | GameMode | Game mode flag (0=title/demo, nonzero=gameplay) |
+| $4D | GameActiveFlag | Game active flag |
+| $4E | StageCompleteFlag | Stage completed flag |
+| $4F | PlayerDeathFlag | Player death flags (bit0=P1, bit1=P2) |
+| $50 | CurrentPlayerIndex | Current player (0 or 1) |
+| $52 | Zp_52 | Gameplay sub-state |
+| $56 | Zp_56 | (unnamed) |
+| $57 | Zp_57 | Title state variable |
+| $5A–$5B | Zp_5A / Zp_5B | (unnamed) |
+| $8F | PendingFrameTask | Pending frame task counter |
+| $90 | PendingSoundCommand | Pending sound command |
+| $95–$96 | DispatchPointerLo / DispatchPointerHi | State dispatch indirect pointer |
+| $0400 | Ram_0400 | (unnamed) |
+| $040D–$040F | Ram_040D–$040F | (unnamed) |
+| $045A–$045F | Ram_045A–$045F | (unnamed) |
+| $0460–$0467 | Ram_0460–$0467 | Object/enemy state |
+| $046E–$0470 | Ram_046E–$0470 | Stage state |
+| $04E0 | Ram_04E0 | (unnamed) |
+| $0500–$0535 | Ram_0500–$0535 | Object arrays |
+| $052F–$05A7 | Ram_052F–$05A7 | Audio engine state |
+| $0536 | CurrentObjectIndex | Current object being processed |
+| $0700–$07FF | Ram_0700–$07FF | OAM buffer + sprite data |
+
+---
+
+## 12. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+ResetHandler ($FD24) ───────────────────────────────┐
+    │ sei, cld, disable PPU, wait 2× VBlank          │
+    │ SetDefaultScroll, init frame counters          │
+    │ InitializeRuntimeState ($FD63)                 │
+    │   ├─ clear NmiCompletedFlag, GameMode, etc.    │
+    │   ├─ set PPUCTRL shadow=$90, clear nametables  │
+    │   ├─ load palette, wait NMI                    │
+    │   └─ set PPUMASK shadow=$1A                    │
+    │ InitializeGameSystems ($C00E)                  │
+    │   ├─ process game state ($C76E, $CB53)         │
+    │   ├─ set initial OAM ($0700=$70, $0701=$10)    │
+    │   └─ SetMainState → first state                │
+    ▼                                                │
+Flow_FD4F ($FD4F) ───────────────────────────────────┤
+    │                                                │
+    ├─ WaitForNmi ($FD9D)   ◄────── waits for NMI ───┘
+    │                                                │
+    ├─ MainGameState ($16) → dispatch table          │
+    │   ├─ State 0: $C3F8 (frame sync task)          │
+    │   ├─ State 1: $C04E (HandleTitleState)         │
+    │   ├─ State 2: $C12F (HandleGameStartState)     │
+    │   ├─ State 4: $C24D (stage transition)         │
+    │   ├─ State 5: $C1AA (HandlePlayerDeathState)   │
+    │   ├─ State 6: $C14F (HandleGameplayState)      │
+    │   └─ ...                                       │
+    │                                                │
+    └─ (state handler returns via SetMainState)      │
+              │                                      │
+              ▼                                      │
+   back to Flow_FD4F ◄───────────────────────────────┘
+
+NMI ($FF7F) [every frame]
+    ├─ OAM DMA from $0700 ($4014)
+    ├─ NmiCompletedFlag ($0E) = $01
+    ├─ StageCompleteFlag ($4E) handling ($CEA3)
+    ├─ ProcessPendingFrameTask ($C029)
+    ├─ if GameMode != 0: ProcessGameState_F493 ($F493)
+    └─ rti
+
+Gameplay Update (every 8 frames, Flow_C258 at $C258)
+    ├─ object movement & collision ($C9F9–$E6AE)
+    ├─ controller input (when GameMode != 0)
+    ├─ player movement & animation ($D1C1, $D6BF)
+    ├─ burger assembly, enemy AI ($CB6F, $DB45)
+    ├─ collision, score, bonus ($DBD7–$DD61)
+    ├─ pepper, round timing ($EA1A–$E81A)
+    └─ lives/continues ($C5FF)
+```
+
+---
+
+## 13. Notes
+
+- The disassembly is organized as a state machine driven by `MainGameState` ($16), with the dispatch table at CPU $C000–$C00D.
+- The NMI is the sole frame-sync source; the main loop (`Flow_FD4F`) blocks on `WaitForNmi` before dispatching to the current state handler.
+- Gameplay updates run on an 8-frame divider (`Zp_15` at $15), not every frame.
+- Audio is updated both from the NMI path (`ProcessGameState_F493` when `GameMode != 0`) and from state-specific code paths.
+- Many routines are named `Flow_Cxxx` or `ProcessGameState_Cxxx` based on their CPU address, reflecting the automated disassembly origins. Semantic names are provisional.
+- Build verification: `make` in `copilot/` produces `burger_time_rebuilt.nes` that is **byte-identical** to `burger_time.nes` (requires a symlink named `burger_time.nes` pointing to the actual ROM file due to spaces/special characters in the original filename).
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/Makefile b/Burger Time (U)/copilot/Makefile
index f14523c..7b0587a 100644
--- a/Burger Time (U)/copilot/Makefile	
+++ b/Burger Time (U)/copilot/Makefile	
@@ -1,16 +1,25 @@
 CA65 ?= ca65
 LD65 ?= ld65
-all: verify
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
 header.o: header.s
 	$(CA65) -g -o $@ $<
-prg.o: prg.s symbols.inc locals.inc burger_time.nes
+
+chr.o: chr.s
 	$(CA65) -g -o $@ $<
-chr.o: chr.s burger_time.nes
-	$(CA65) -g -o $@ $<
-burger_time_rebuilt.nes: header.o prg.o chr.o linker.cfg
-	$(LD65) -C linker.cfg -m burger_time.map -Ln burger_time.lbl -o $@ header.o prg.o chr.o
-verify: burger_time_rebuilt.nes
-	cmp burger_time.nes burger_time_rebuilt.nes
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
 	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f *.o burger_time_rebuilt.nes burger_time.map burger_time.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/burger_time.nes b/Burger Time (U)/copilot/burger_time.nes
new file mode 120000
index 0000000..7576474
--- /dev/null
+++ b/Burger Time (U)/copilot/burger_time.nes	
@@ -0,0 +1 @@
+../Burger Time (U) [!].nes
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/chr.bin b/Burger Time (U)/copilot/chr.bin
new file mode 100644
index 0000000..af6806d
Binary files /dev/null and b/Burger Time (U)/copilot/chr.bin differ
diff --git a/Burger Time (U)/copilot/chr.o b/Burger Time (U)/copilot/chr.o
new file mode 100644
index 0000000..5f87337
Binary files /dev/null and b/Burger Time (U)/copilot/chr.o differ
diff --git a/Burger Time (U)/copilot/chr.s b/Burger Time (U)/copilot/chr.s
index 91abab3..f6a8c21 100644
--- a/Burger Time (U)/copilot/chr.s	
+++ b/Burger Time (U)/copilot/chr.s	
@@ -1,2 +1,2 @@
 .segment "CHR"
-    .incbin "burger_time.nes", $4010, $2000
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/header.bin b/Burger Time (U)/copilot/header.bin
new file mode 100644
index 0000000..aee36c4
Binary files /dev/null and b/Burger Time (U)/copilot/header.bin differ
diff --git a/Burger Time (U)/copilot/header.o b/Burger Time (U)/copilot/header.o
new file mode 100644
index 0000000..55bcadd
Binary files /dev/null and b/Burger Time (U)/copilot/header.o differ
diff --git a/Burger Time (U)/copilot/header.s b/Burger Time (U)/copilot/header.s
index 6dbb8f6..37d1389 100644
--- a/Burger Time (U)/copilot/header.s	
+++ b/Burger Time (U)/copilot/header.s	
@@ -1,2 +1,2 @@
 .segment "HEADER"
-    .byte $4E,$45,$53,$1A,$01,$01,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/linker.cfg b/Burger Time (U)/copilot/linker.cfg
index 3f0404d..cfaf881 100644
--- a/Burger Time (U)/copilot/linker.cfg	
+++ b/Burger Time (U)/copilot/linker.cfg	
@@ -1,12 +1,10 @@
 MEMORY {
- HEADER: start=$0000, size=$0010, file=%O, fill=yes;
- PRG: start=$C000, size=$3FFA, file=%O, fill=yes;
- VECTORS: start=$FFFA, size=$0006, file=%O, fill=yes;
- CHR: start=$0000, size=$2000, file=%O, fill=yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
- HEADER: load=HEADER, type=ro;
- PRG: load=PRG, type=ro;
- VECTORS: load=VECTORS, type=ro;
- CHR: load=CHR, type=ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Burger Time (U)/copilot/prg.o b/Burger Time (U)/copilot/prg.o
new file mode 100644
index 0000000..6d99205
Binary files /dev/null and b/Burger Time (U)/copilot/prg.o differ
diff --git a/Burger Time (U)/copilot/prg.s b/Burger Time (U)/copilot/prg.s
index 27d8f4f..2f4097e 100644
--- a/Burger Time (U)/copilot/prg.s	
+++ b/Burger Time (U)/copilot/prg.s	
@@ -9317,7 +9317,6 @@ SetDefaultScroll:
     .byte $00,$FF,$FF,$FF ; PRG $3FF6 | CPU $FFF6
 
 ; Interrupt vectors
-.segment "VECTORS"
     .word NmiHandler             ; PRG $3FFA | CPU $FFFA | 7F FF
     .word ResetHandler           ; PRG $3FFC | CPU $FFFC | 24 FD
     .word ResetHandler           ; PRG $3FFE | CPU $FFFE | 24 FD
diff --git a/Burger Time (U)/copilot/reconstructed.lbl b/Burger Time (U)/copilot/reconstructed.lbl
new file mode 100644
index 0000000..9388142
--- /dev/null
+++ b/Burger Time (U)/copilot/reconstructed.lbl	
@@ -0,0 +1,634 @@
+al 00FFE8 .Flow_FFE8
+al 00FFD5 .Flow_FFD5
+al 00FFC6 .Flow_FFC6
+al 00FFA8 .Flow_FFA8
+al 00FF9E .Flow_FF9E
+al 00FF7F .NmiHandler
+al 00FF4A .Flow_FF4A
+al 00FF38 .Flow_FF38
+al 00FF3B .Flow_FF3B
+al 00FF1E .Flow_FF1E
+al 00FF2C .WriteRepeatedPpuValue
+al 00FF00 .Flow_FF00
+al 00FF10 .Flow_FF10
+al 00FEA9 .Flow_FEA9
+al 00FECC .Flow_FECC
+al 00FE95 .Flow_FE95
+al 00FE90 .Flow_FE90
+al 00FE55 .Flow_FE55
+al 00FE48 .Flow_FE48
+al 00FE3F .Flow_FE3F
+al 00FE38 .Flow_FE38
+al 00FE0A .Flow_FE0A
+al 00FE03 .Flow_FE03
+al 00FDE3 .Flow_FDE3
+al 00FDD6 .Flow_FDD6
+al 00FDB8 .Flow_FDB8
+al 00FDA7 .Flow_FDA7
+al 00FD63 .InitializeRuntimeState
+al 00FD33 .Flow_FD33
+al 00FD2E .Flow_FD2E
+al 00FD24 .ResetHandler
+al 00F939 .LookupTable_F939
+al 00F938 .ObjectHandlerDispatchTable
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+al 00C0BF .Flow_C0BF
+al 00C0C1 .Flow_C0C1
+al 00C096 .Flow_C096
+al 00C0B2 .Flow_C0B2
+al 00C0A5 .Flow_C0A5
+al 00C09B .Flow_C09B
+al 00C067 .Flow_C067
+al 00C233 .Flow_C233
+al 00C3EE .EnableBackgroundAndSprites
+al 00C81B .ProcessGameState_C81B
+al 00C7F7 .ProcessGameState_C7F7
+al 00C04E .HandleTitleState
+al 00C048 .Flow_C048
+al 00C035 .Flow_C035
+al 00C04C .Flow_C04C
+al 00C029 .ProcessPendingFrameTask
+al 00C026 .StorePendingSoundCommand
+al 00FF7C .SetMainState
+al 00CB53 .ProcessGameState_CB53
+al 00C76E .ProcessGameState_C76E
+al 00C00E .InitializeGameSystems
+al 00C001 .LookupTable_C001
+al 00C000 .MainStateDispatchTable
diff --git a/Burger Time (U)/copilot/reconstructed.map b/Burger Time (U)/copilot/reconstructed.map
new file mode 100644
index 0000000..1ad1cc6
--- /dev/null
+++ b/Burger Time (U)/copilot/reconstructed.map	
@@ -0,0 +1,32 @@
+Modules list:
+-------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
+prg.o:
+    PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
+
+
+Segment list:
+-------------
+Name                   Start     End    Size  Align
+----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
+PRG                   00C000  00FFFF  004000  00001
+
+
+Exports list by name:
+---------------------
+
+
+
+Exports list by value:
+----------------------
+
+
+
+Imports list:
+-------------
+
diff --git a/Burger Time (U)/copilot/reconstructed.nes b/Burger Time (U)/copilot/reconstructed.nes
new file mode 100644
index 0000000..6a1acfc
Binary files /dev/null and b/Burger Time (U)/copilot/reconstructed.nes differ
diff --git a/Burger Time (U)/copilot/rom.nes b/Burger Time (U)/copilot/rom.nes
new file mode 120000
index 0000000..7576474
--- /dev/null
+++ b/Burger Time (U)/copilot/rom.nes	
@@ -0,0 +1 @@
+../Burger Time (U) [!].nes
\ No newline at end of file
diff --git a/Defender 2 (U)/OVERVIEW.md b/Defender 2 (U)/OVERVIEW.md
new file mode 100644
index 0000000..d2ee5c2
--- /dev/null
+++ b/Defender 2 (U)/OVERVIEW.md	
@@ -0,0 +1,254 @@
+# Defender 2 (U) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Defender 2 (U) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `defender2.nes`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Vertical |
+| PRG bank start | CPU $C000 |
+| Source file | `copilot/prg.s` (11,905 lines) |
+| Output | `defender2_rebuilt.nes` (24,592 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $CAA1 | `NmiHandler` |
+| RESET | $C983 | `ResetHandler` |
+| IRQ / BRK | $CA9E | `IrqHandler` (self-loop `jmp $CA9E` — unused) |
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles `header.s`, `prg.s`, and `chr.s` with `ca65`, links with `ld65`, and verifies against `defender2.nes`.
+
+**Verification result: BYTE-IDENTICAL** — `defender2_rebuilt.nes` matches `defender2.nes` exactly (headers, CHR, and all PRG bytes).
+
+### Build fix applied
+
+The original source referenced `LookupTableEntry_FAF5` at a `bpl` instruction (CPU $FAB4), but the symbol was undefined. The branch target CPU $FAF5 falls in the middle of what the disassembler classified as `lda #$16` (A9 at $FAF4, 16 at $FAF5). The fix:
+
+- Replaced the symbolic `bpl LookupTableEntry_FAF5` with `bne *-$1B` at CPU $E811, which produces the exact original bytes `d0 e3` (the disassembler had mislabeled `bne` as `bpl`).
+- The build now produces a byte-identical ROM.
+
+---
+
+## 3. Reset — CPU $FFFC → $C983
+
+**`ResetHandler`** ($C983)
+
+On power-on or reset:
+
+1. `sei` — disable maskable interrupts.
+2. `cld` — clear decimal mode.
+3. `lda #$00 / sta PPUCTRL` — disable PPU rendering and NMI.
+4. `dex / txs` — initialize stack pointer to $FF.
+5. `UpdateSideScrollingGameplay_C98C` ($C98C): wait for VBlank (poll `PPUSTATUS` bit 7), then clear a block of PPU memory via `ConfigureHudAndPlayfieldPpu_C99D` ($C99D) using zero-page pointers $00/$01 and counter $01.
+6. Set PPUCTRL = $00, `PpuControlShadow` ($10) = $00, PPUMASK = $02, `PpuMaskShadow` ($11) = $02.
+7. Set scroll registers: `PPUSCROLL` = $00 twice, `HorizontalScroll` ($12) = $00, `VerticalScroll` ($13) = $00.
+8. Configure HUD and playfield PPU regions via repeated calls to `ConfigureHudAndPlayfieldPpu_C092` ($C092) with various source/destination parameters — uploads background tiles, HUD elements, and playfield data.
+9. Initialize game RAM variables: `Ram_03FB` = $80, `Ram_06AB` = $90, `Ram_06CB` = $94, `Ram_06EB` = $98, `Ram_05C0` = $03, `Ram_0580` = $04, `Ram_060B` = $68, `Ram_064B` = $70.
+10. `Zp_1D` ($1D) = $55; `SND_CHN` ($4015) = $0F (enable all APU channels); `Ram_0100` = $0F; `Zp_36` ($36) = $01.
+11. Enable NMI: `PpuControlShadow` ($10) \| $80, store to shadow and PPUCTRL.
+12. Falls into `UpdateSideScrollingGameplay_CA6A` ($CA6A) — the permanent main loop.
+
+---
+
+## 4. Main Loop — `UpdateSideScrollingGameplay_CA6A` ($CA6A)
+
+Once NMI is enabled, `ResetHandler` never returns. It enters the main loop:
+
+```
+UpdateSideScrollingGameplay_CA6A ($CA6A):
+    jsr UpdateSideScrollingGameplay_C40D   ; $CA6A: 20 0D C4
+    lda Zp_A2                              ; $CA6D: A5 A2
+    beq UpdateSideScrollingGameplay_CA6A   ; $CA6F: F0 F9   (spin while Zp_A2 == 0)
+    dec Zp_A2                              ; $CA71: C6 A2
+    jsr UpdateSideScrollingGameplay_E47A   ; $CA73: 20 7A E4
+    jsr UpdateSideScrollingGameplay_DC7B   ; $CA76: 20 7B DC
+    jsr UpdateSideScrollingGameplay_E6E1   ; $CA79: 20 E1 E6
+    jsr UpdateSideScrollingGameplay_D91A   ; $CA7C: 20 1A D9
+    jsr UpdateSideScrollingGameplay_E6D5   ; $CA7F: 20 D5 E6
+    jsr UpdateSideScrollingGameplay_E7AA   ; $CA82: 20 AA E7
+    jsr UpdateSideScrollingGameplay_E029   ; $CA85: 20 29 E0
+    jsr UpdateSideScrollingGameplay_DE78   ; $CA88: 20 78 DE
+    jmp UpdateSideScrollingGameplay_CA6A   ; $CA8B: 4C 6A CA   (loop forever)
+```
+
+The main loop spins waiting for `Zp_A2` ($A2) to become nonzero (set by the NMI), then decrements it and calls a chain of per-frame update routines covering flying entities, object updates, collisions, scrolling, and rendering. It then loops back to itself.
+
+---
+
+## 5. NMI / Frame Heartbeat — `NmiHandler` ($CAA1)
+
+The NMI fires once per frame and is the central real-time driver:
+
+1. **Save registers** (A, X, Y on stack).
+2. `ldx #$00` — X = 0 for buffer copy loop.
+3. `ConfigureHudAndPlayfieldPpu_CAA8` ($CAA8): copy 16 bytes from zero-page pointer $00,X into PPU registers (PPU command buffer upload), toggling `PpuControlShadow` bit 7.
+4. `jsr ConfigureHudAndPlayfieldPpu_D2CF` ($CAB9) — additional PPU configuration.
+5. `jsr TransferShipTargetOamBuffer` ($CABC) — OAM DMA: write $00 to OAMADDR ($2003), then $02 to OAMDMA ($4014).
+6. `jsr UpdateSideScrollingGameplay_C073` ($CABF) — configure HUD/playfield PPU and reset scroll.
+7. Restore PPU mask from `PpuMaskShadow` ($11).
+8. `jsr PollShipControllers` ($CAC7) — read controller ports $4016/$4017 into `PreviousControllerButtons` ($19) and `CurrentControllerButtons` ($1B).
+9. `jsr TransformFlightState_CEE8` ($CACA) — process ship flight state.
+10. If `Zp_3B` ($3B) != 0 → `UpdateSideScrollingGameplay_CAD4`; else → `UpdateSideScrollingGameplay_C3CC` ($CAD1).
+11. `UpdateSideScrollingGameplay_CAD4` ($CAD4): `jsr ReadShipControls_F880`, `jsr UpdateSideScrollingGameplay_CBD4`, then `jsr UpdateSideScrollingGameplay_D6D8` ($CADA).
+12. `ConfigureHudAndPlayfieldPpu_CADF` ($CADF): pop saved registers (Y, X, A) from the stack — restores the context saved at the start of NMI.
+13. Re-enable NMI: `PpuControlShadow` \| $80, store to shadow and PPUCTRL.
+14. `pla / rti` — restore A and return from interrupt.
+
+The NMI is the frame heartbeat: it handles PPU updates, OAM DMA, controller polling, and gameplay state updates, all during VBlank.
+
+---
+
+## 6. PPU / Rendering
+
+### `ConfigureHudAndPlayfieldPpu_C092` ($C092)
+- Reads PPUSTATUS to reset address latch.
+- Loads `PpuControlShadow` ($10), ANDs with $FB (disable sprite rendering bit), stores to PPUCTRL and shadow.
+- Sets up PPU address and writes tile runs to $2007 — used for HUD and playfield background updates.
+
+### `TransferShipTargetOamBuffer` ($C087)
+- Write $00 to OAMADDR ($2003), then $02 to OAMDMA ($4014) — DMA sprite data from $0200–$02FF.
+
+### `PollShipControllers` ($C434)
+- Reads both controller ports, tracking previous and current button states.
+
+### `UpdateSideScrollingGameplay_C073` ($C073)
+- Configures HUD/playfield PPU upload and resets scroll. Used during NMI and gameplay state transitions.
+
+---
+
+## 7. Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $00–$03 | ScratchValue0–3 | General scratch values |
+| $04–$05 | DataPointerLo/Hi | Data pointer |
+| $06–$07 | TemporaryPointerLo/Hi | Temporary pointer |
+| $08–$0D | Zp_08–Zp_0D | Zero-page scratch |
+| $0F | Zp_0F | Zero-page scratch |
+| $10 | PpuControlShadow | $2000 mirror |
+| $11 | PpuMaskShadow | $2001 mirror |
+| $12 | HorizontalScroll | Horizontal scroll value |
+| $13 | VerticalScroll | Vertical scroll value |
+| $14–$18 | Zp_14–Zp_18 | Zero-page scratch |
+| $19 | PreviousControllerButtons | Previous frame controller state |
+| $1A | Zp_1A | Zero-page scratch |
+| $1B | CurrentControllerButtons | Current frame controller state |
+| $1C–$1F | Zp_1C–Zp_1F | Zero-page scratch |
+| $20–$3F | Zp_20–Zp_3F | Zero-page scratch (extensive use) |
+| $36 | Zp_36 | Game flag |
+| $3B | Zp_3B | Gameplay branch flag |
+| $3F | Zp_3F | Zero-page scratch |
+| $40–$47 | Zp_40–Zp_47 | Zero-page scratch |
+| $4C | Zp_4C | Zero-page scratch |
+| $54–$5F | Zp_54–Zp_5F | Zero-page scratch |
+| $60–$61 | Zp_60–Zp_61 | Zero-page scratch |
+| $A0–$A7 | Zp_A0–Zp_A7 | Zero-page scratch ($A2 used as NMI frame sync) |
+| $A9–$AB | Zp_A9–Zp_AB | Zero-page scratch |
+| $AC–$AF | Zp_AC–Zp_AF | Zero-page scratch |
+| $B0–$B9 | Zp_B0–Zp_B9 | Zero-page scratch |
+| $BA–$BF | Zp_BA–Zp_BF | Zero-page scratch |
+| $C0–$C4 | Zp_C0–Zp_C4 | Zero-page scratch |
+| $D0–$D5 | Zp_D0–Zp_D5 | Zero-page scratch |
+| $D7–$DF | Zp_D7–Zp_DF | Zero-page scratch |
+| $E0–$EF | Zp_E0–Zp_EF | Zero-page scratch |
+| $F0–$F7 | Zp_F0–Zp_F7 | Zero-page scratch |
+| $FA–$FB | Zp_FA–Zp_FB | Zero-page scratch |
+| $FD–$FF | Zp_FD–Zp_FF | Zero-page scratch |
+| $0100 | Ram_0100 | APU/channel state |
+| $0200 | OamBuffer | Sprite DMA source |
+| $0201–$0203 | Ram_0201–Ram_0203 | RAM scratch |
+| $0214, $0244, $0299, $029C–$029D, $029F–$02FE | Ram_* | Game state RAM |
+| $0330–$0331 | Ram_0330–Ram_0331 | Gameplay state |
+| $0380–$03FF | Ram_0380–Ram_07FF | Extensive game state RAM (objects, entities, scores, etc.) |
+| $0540–$05FF | Ram_0540–Ram_05FF | Gameplay variables |
+| $0600–$06FF | Ram_0600–Ram_06FF | Entity/object arrays |
+| $0782–$07F2 | Ram_0782–Ram_07F2 | Late-game state |
+
+---
+
+## 8. Routine Naming Patterns
+
+The disassembly uses consistent name prefixes that indicate routine purpose:
+
+| Prefix | Example | Meaning |
+|--------|---------|---------|
+| `UpdateSideScrollingGameplay_*` | `UpdateSideScrollingGameplay_C073` | Side-scrolling gameplay logic |
+| `UpdateGameplayStateField_*` | `UpdateGameplayStateField_C1F7` | Gameplay state field updates |
+| `TransformFlightState_*` | `TransformFlightState_C109` | Ship flight/transform state |
+| `ConfigureHudAndPlayfieldPpu_*` | `ConfigureHudAndPlayfieldPpu_C092` | PPU HUD/playfield configuration |
+| `CalculateMovementAndClamp_*` | `CalculateMovementAndClamp_C183` | Movement calculation with clamping |
+| `UpdateFlyingEntity_*` | `UpdateFlyingEntity_CF11` | Flying entity (ship/enemy) updates |
+| `ReadShipControls_*` | `ReadShipControls_F880` | Ship controller input |
+| `ReadObjectRecord_*` | `ReadObjectRecord_DADA` | Object record reading |
+| `ProcessObjectStateRoutine_*` | `ProcessObjectStateRoutine_CBE3` | Object state machine |
+| `UpdateObjectBuffer_*` | `UpdateObjectBuffer_DB52` | OAM buffer updates |
+| `UpdateObjectRecord_*` | `UpdateObjectRecord_D27D` | Object record maintenance |
+
+---
+
+## 9. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+ResetHandler ($C983) ───────────────────────────────┐
+    │ sei, cld, disable PPU, stack=$FF               │
+    │ wait VBlank, clear PPU memory                  │
+    │ set PPUCTRL=$00, PPUMASK=$02, scroll=$00       │
+    │ upload HUD/playfield tiles via C092            │
+    │ init game RAM, APU channels ($4015=$0F)        │
+    │ enable NMI (PpuControlShadow \| $80)           │
+    ▼                                                │
+jmp UpdateSideScrollingGameplay_CA6A ($CA6A)         │
+    │                                                │
+    │ Main loop — waits for NMI frame sync:          │
+    │   wait until Zp_A2 ($A2) != 0                  │
+    │   dec Zp_A2                                    │
+    │   jsr E47A, DC7B, E6E1, D91A, E6D5, E7AA,     │
+    │   E029, DE78                                   │
+    │   jmp back to CA6A                             │
+    │                                                │
+    └────────────────────────────────────────────────┘
+                                                     │
+NMI ($CAA1) [once per frame]                         │
+    │                                                │
+    ├─ save A, X, Y                                  │
+    ├─ PPU command buffer upload ($CAA8)             │
+    ├─ ConfigureHudAndPlayfieldPpu_D2CF ($CAB9)      │
+    ├─ OAM DMA ($4014 from $0200)                    │
+    ├─ ConfigureHudAndPlayfieldPpu_C073 ($C073)      │
+    ├─ restore PPU mask from shadow                  │
+    ├─ PollShipControllers ($CAC7)                   │
+    ├─ TransformFlightState_CEE8 ($CEE8)             │
+    ├─ branch on Zp_3B: CAD4 or C3CC                 │
+    ├─ CAD4: ReadShipControls_F880, CBD4, D6D8       │
+    ├─ restore registers, re-enable NMI              │
+    └─ rti                                           │
+
+IRQ ($CA9E) — self-loop (unused)
+```
+
+---
+
+## 10. Notes
+
+- **Build verification:** `make` in `copilot/` produces `defender2_rebuilt.nes` that is **byte-identical** to `defender2.nes` and to the PRG bank of `Defender 2 (U).nes`.
+- Vectors confirm NMI at $CAA1, RESET at $C983, and IRQ at $CA9E (self-loop, unused).
+- The main loop (`CA6A`) is a tight NMI-synchronized loop; all substantive per-frame work happens either in the NMI handler or in the routines called from the main loop after the NMI sets `Zp_A2`.
+- Many routines carry address-based names (`UpdateSideScrollingGameplay_C073`, `TransformFlightState_C109`, etc.) reflecting the automated first-pass disassembly; semantic naming is provisional.
+- The disassembly includes inline `.byte` data blocks interleaved with code; boundaries are marked as classified by Pass 1.
+- `locals.inc` provides zero-page names; `symbols.inc` provides the NES hardware register set.
+- One build fix was required: a `bpl` branch to an undefined symbol `LookupTableEntry_FAF5` was replaced with `bne *-$1B` to produce the original `d0 e3` bytes (the disassembler had mislabeled `bne` as `bpl`).
\ No newline at end of file
diff --git a/Defender 2 (U)/copilot/Makefile b/Defender 2 (U)/copilot/Makefile
index 0d008ac..7b0587a 100644
--- a/Defender 2 (U)/copilot/Makefile	
+++ b/Defender 2 (U)/copilot/Makefile	
@@ -1,9 +1,25 @@
-CA65?=ca65
-LD65?=ld65
-all: verify
-%.o: %.s
-	$(CA65) -o $@ $<
-defender2_rebuilt.nes: header.o prg.o chr.o
-	$(LD65) -C linker.cfg -o $@ $^
-verify: defender2_rebuilt.nes
-	cmp defender2.nes $<
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
+clean:
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Defender 2 (U)/copilot/chr.bin b/Defender 2 (U)/copilot/chr.bin
new file mode 100644
index 0000000..672b885
Binary files /dev/null and b/Defender 2 (U)/copilot/chr.bin differ
diff --git a/Defender 2 (U)/copilot/chr.o b/Defender 2 (U)/copilot/chr.o
new file mode 100644
index 0000000..b47267e
Binary files /dev/null and b/Defender 2 (U)/copilot/chr.o differ
diff --git a/Defender 2 (U)/copilot/chr.s b/Defender 2 (U)/copilot/chr.s
index 564d900..f6a8c21 100644
--- a/Defender 2 (U)/copilot/chr.s	
+++ b/Defender 2 (U)/copilot/chr.s	
@@ -1,2 +1,2 @@
 .segment "CHR"
-    .incbin "defender2.nes", $4010, $2000
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Defender 2 (U)/copilot/header.bin b/Defender 2 (U)/copilot/header.bin
new file mode 100644
index 0000000..d5ba821
Binary files /dev/null and b/Defender 2 (U)/copilot/header.bin differ
diff --git a/Defender 2 (U)/copilot/header.o b/Defender 2 (U)/copilot/header.o
new file mode 100644
index 0000000..6bb7a71
Binary files /dev/null and b/Defender 2 (U)/copilot/header.o differ
diff --git a/Defender 2 (U)/copilot/header.s b/Defender 2 (U)/copilot/header.s
index 512e095..37d1389 100644
--- a/Defender 2 (U)/copilot/header.s	
+++ b/Defender 2 (U)/copilot/header.s	
@@ -1,2 +1,2 @@
 .segment "HEADER"
-    .incbin "defender2.nes", 0, 16
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Defender 2 (U)/copilot/linker.cfg b/Defender 2 (U)/copilot/linker.cfg
index 7a0b25e..de5fc6e 100644
--- a/Defender 2 (U)/copilot/linker.cfg	
+++ b/Defender 2 (U)/copilot/linker.cfg	
@@ -1,2 +1,12 @@
-MEMORY { HEADER:start=$0000,size=$0010,file=%O; PRG:start=$C000,size=$3FFA,file=%O; VECTORS:start=$FFFA,size=$0006,file=%O; CHR:start=$0000,size=$2000,file=%O; }
-SEGMENTS { HEADER:load=HEADER,type=ro; PRG:load=PRG,type=ro; VECTORS:load=VECTORS,type=ro; CHR:load=CHR,type=ro; }
+MEMORY {
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $3FFA, fill = yes;
+  VECTORS: start = $FFFA, size = $0006, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
+}
+SEGMENTS {
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  VECTORS: load = VECTORS, type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Defender 2 (U)/copilot/prg.o b/Defender 2 (U)/copilot/prg.o
new file mode 100644
index 0000000..73fdc69
Binary files /dev/null and b/Defender 2 (U)/copilot/prg.o differ
diff --git a/Defender 2 (U)/copilot/prg.s b/Defender 2 (U)/copilot/prg.s
index ffc9445..8f4ae40 100644
--- a/Defender 2 (U)/copilot/prg.s	
+++ b/Defender 2 (U)/copilot/prg.s	
@@ -9396,6 +9396,7 @@ UpdateSideScrollingGameplay_E7E3:
 ; Returns: According to the decoded control flow.
 ; Clobbers: Determined by the instructions below; refined in Pass 3.
 ; -----------------------------------------------------------------------------
+E7F6:
 UpdateSideScrollingGameplay_E7F6:
     ldy #$00                        ; PRG $27F6 | CPU $E7F6 | A0 00
     lda (ScratchValue0),y                   ; PRG $27F8 | CPU $E7F8 | B1 00
@@ -9421,7 +9422,7 @@ UpdateSideScrollingGameplay_E803:
     adc ScratchValue1                       ; PRG $280C | CPU $E80C | 65 01
     sta ScratchValue1                       ; PRG $280E | CPU $E80E | 85 01
     dex                             ; PRG $2810 | CPU $E810 | CA
-    bne UpdateSideScrollingGameplay_E7F6                ; PRG $2811 | CPU $E811 | D0 E3
+    bne *-$1B                       ; PRG $3AB4 | CPU $FAB4 | d0 e3
     rts                             ; PRG $2813 | CPU $E813 | 60
 ; -----------------------------------------------------------------------------
 ; Global purpose: Update Side Scrolling Gameplay E814.
diff --git a/Defender 2 (U)/copilot/reconstructed.lbl b/Defender 2 (U)/copilot/reconstructed.lbl
new file mode 100644
index 0000000..a413cc3
--- /dev/null
+++ b/Defender 2 (U)/copilot/reconstructed.lbl	
@@ -0,0 +1,779 @@
+al 00FE52 .UpdateSideScrollingGameplay_FE52
+al 00FE49 .UpdateSideScrollingGameplay_FE49
+al 00FE58 .UpdateGameplayStateField_FE58
+al 00FE23 .UpdateSideScrollingGameplay_FE23
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+al 00D4E0 .UpdateSideScrollingGameplay_D4E0
+al 00D4D9 .UpdateSideScrollingGameplay_D4D9
+al 00DB1D .UpdateSideScrollingGameplay_DB1D
+al 00D4C1 .UpdateSideScrollingGameplay_D4C1
+al 00D4C3 .UpdateSideScrollingGameplay_D4C3
+al 00D4B2 .CalculateMovementAndClamp_D4B2
+al 00D484 .UpdateSideScrollingGameplay_D484
+al 00D46B .UpdateSideScrollingGameplay_D46B
+al 00D4D0 .UpdateSideScrollingGameplay_D4D0
+al 00D457 .UpdateSideScrollingGameplay_D457
+al 00D446 .UpdateSideScrollingGameplay_D446
+al 00D41E .UpdateSideScrollingGameplay_D41E
+al 00D40D .CalculateMovementAndClamp_D40D
+al 00D435 .UpdateGameplayStateField_D435
+al 00D3E2 .UpdateSideScrollingGameplay_D3E2
+al 00D43D .UpdateSideScrollingGameplay_D43D
+al 00D3D4 .UpdateSideScrollingGameplay_D3D4
+al 00D43A .UpdateSideScrollingGameplay_D43A
+al 00D436 .UpdateSideScrollingGameplay_D436
+al 00D3EF .UpdateSideScrollingGameplay_D3EF
+al 00D3C4 .UpdateSideScrollingGameplay_D3C4
+al 00D3B8 .UpdateSideScrollingGameplay_D3B8
+al 00D3BE .UpdateSideScrollingGameplay_D3BE
+al 00D3AC .UpdateSideScrollingGameplay_D3AC
+al 00D320 .UpdateSideScrollingGameplay_D320
+al 00D378 .UpdateSideScrollingGameplay_D378
+al 00D35E .UpdateSideScrollingGameplay_D35E
+al 00D382 .TransformFlightState_D382
+al 00D331 .UpdateSideScrollingGameplay_D331
+al 00D348 .UpdateSideScrollingGameplay_D348
+al 00D2FF .UpdateSideScrollingGameplay_D2FF
+al 00D2F0 .UpdateSideScrollingGameplay_D2F0
+al 00D2CE .UpdateGameplayStateField_D2CE
+al 00D32C .UpdateSideScrollingGameplay_D32C
+al 00D2C4 .UpdateSideScrollingGameplay_D2C4
+al 00D2B3 .UpdateSideScrollingGameplay_D2B3
+al 00D2AF .UpdateSideScrollingGameplay_D2AF
+al 00D292 .UpdateSideScrollingGameplay_D292
+al 00D294 .UpdateSideScrollingGameplay_D294
+al 00D28E .UpdateSideScrollingGameplay_D28E
+al 00D27B .UpdateSideScrollingGameplay_D27B
+al 00D264 .UpdateSideScrollingGameplay_D264
+al 00D326 .UpdateSideScrollingGameplay_D326
+al 00D25A .UpdateSideScrollingGameplay_D25A
+al 00D25E .UpdateSideScrollingGameplay_D25E
+al 00D254 .UpdateSideScrollingGameplay_D254
+al 00D253 .UpdateGameplayStateField_D253
+al 00D239 .TransformFlightState_D239
+al 00D246 .UpdateSideScrollingGameplay_D246
+al 00D210 .UpdateSideScrollingGameplay_D210
+al 00D216 .UpdateSideScrollingGameplay_D216
+al 00D1F8 .UpdateSideScrollingGameplay_D1F8
+al 00D1FA .UpdateGameplayStateField_D1FA
+al 00D1DC .UpdateGameplayStateField_D1DC
+al 00D1A7 .UpdateGameplayStateField_D1A7
+al 00D16E .UpdateSideScrollingGameplay_D16E
+al 00D157 .UpdateGameplayStateField_D157
+al 00D160 .UpdateSideScrollingGameplay_D160
+al 00DAD9 .UpdateSideScrollingGameplay_DAD9
+al 00D10B .UpdateSideScrollingGameplay_D10B
+al 00D127 .UpdateSideScrollingGameplay_D127
+al 00D0EF .CalculateMovementAndClamp_D0EF
+al 00D0E9 .CalculateMovementAndClamp_D0E9
+al 00D115 .UpdateSideScrollingGameplay_D115
+al 00D0BC .UpdateGameplayStateField_D0BC
+al 00D0BD .CalculateMovementAndClamp_D0BD
+al 00D097 .UpdateGameplayStateField_D097
+al 00D06C .UpdateGameplayStateField_D06C
+al 00D065 .UpdateSideScrollingGameplay_D065
+al 00D053 .UpdateSideScrollingGameplay_D053
+al 00D059 .UpdateSideScrollingGameplay_D059
+al 00D039 .TransformFlightState_D039
+al 00D029 .UpdateSideScrollingGameplay_D029
+al 00CFCA .UpdateSideScrollingGameplay_CFCA
+al 00CFA7 .UpdateSideScrollingGameplay_CFA7
+al 00CF94 .UpdateSideScrollingGameplay_CF94
+al 00CFE2 .UpdateFlyingEntity_CFE2
+al 00CF7B .TransformFlightState_CF7B
+al 00CFDE .UpdateSideScrollingGameplay_CFDE
+al 00CF6B .UpdateSideScrollingGameplay_CF6B
+al 00CFCE .TransformFlightState_CFCE
+al 00CF8C .UpdateSideScrollingGameplay_CF8C
+al 00D6CC .UpdateSideScrollingGameplay_D6CC
+al 00D6FB .UpdateSideScrollingGameplay_D6FB
+al 00D6ED .UpdateSideScrollingGameplay_D6ED
+al 00CF4F .UpdateGameplayStateField_CF4F
+al 00CF0E .UpdateSideScrollingGameplay_CF0E
+al 00CF10 .UpdateGameplayStateField_CF10
+al 00CEE2 .UpdateSideScrollingGameplay_CEE2
+al 00CEE7 .UpdateGameplayStateField_CEE7
+al 00CEB1 .UpdateSideScrollingGameplay_CEB1
+al 00CE91 .UpdateSideScrollingGameplay_CE91
+al 00CE79 .UpdateSideScrollingGameplay_CE79
+al 00CE69 .CalculateMovementAndClamp_CE69
+al 00CE80 .UpdateGameplayStateField_CE80
+al 00CE87 .UpdateSideScrollingGameplay_CE87
+al 00CE61 .UpdateSideScrollingGameplay_CE61
+al 00CE51 .UpdateSideScrollingGameplay_CE51
+al 00D17B .UpdateSideScrollingGameplay_D17B
+al 00CE46 .UpdateGameplayStateField_CE46
+al 00CDFF .UpdateSideScrollingGameplay_CDFF
+al 00CE1C .UpdateGameplayStateField_CE1C
+al 00CDEF .UpdateSideScrollingGameplay_CDEF
+al 00CDD6 .UpdateSideScrollingGameplay_CDD6
+al 00CD93 .UpdateSideScrollingGameplay_CD93
+al 00CD98 .UpdateGameplayStateField_CD98
+al 00CD99 .CalculateMovementAndClamp_CD99
+al 00CD84 .UpdateSideScrollingGameplay_CD84
+al 00CD66 .UpdateSideScrollingGameplay_CD66
+al 00CD88 .UpdateGameplayStateField_CD88
+al 00D1A8 .UpdateSideScrollingGameplay_D1A8
+al 00CD47 .UpdateGameplayStateField_CD47
+al 00CD2F .UpdateSideScrollingGameplay_CD2F
+al 00CEC4 .UpdateSideScrollingGameplay_CEC4
+al 00CCF7 .UpdateSideScrollingGameplay_CCF7
+al 00CCF3 .UpdateSideScrollingGameplay_CCF3
+al 00CCDC .UpdateGameplayStateField_CCDC
+al 00CD03 .UpdateGameplayStateField_CD03
+al 00CD0A .UpdateSideScrollingGameplay_CD0A
+al 00CCDD .UpdateSideScrollingGameplay_CCDD
+al 00CCB0 .UpdateSideScrollingGameplay_CCB0
+al 00CCA5 .UpdateSideScrollingGameplay_CCA5
+al 00CC78 .UpdateSideScrollingGameplay_CC78
+al 00CC5F .UpdateGameplayStateField_CC5F
+al 00CC5D .UpdateSideScrollingGameplay_CC5D
+al 00D1FB .UpdateSideScrollingGameplay_D1FB
+al 00CC8C .UpdateSideScrollingGameplay_CC8C
+al 00CC2C .UpdateSideScrollingGameplay_CC2C
+al 00CC2F .UpdateSideScrollingGameplay_CC2F
+al 00CC40 .UpdateGameplayStateField_CC40
+al 00CC37 .UpdateSideScrollingGameplay_CC37
+al 00CC67 .UpdateSideScrollingGameplay_CC67
+al 00CC47 .UpdateSideScrollingGameplay_CC47
+al 00CC52 .UpdateSideScrollingGameplay_CC52
+al 00CF50 .UpdateSideScrollingGameplay_CF50
+al 00CC02 .UpdateGameplayStateField_CC02
+al 00D12F .UpdateSideScrollingGameplay_D12F
+al 00CBED .UpdateSideScrollingGameplay_CBED
+al 00CCBF .UpdateSideScrollingGameplay_CCBF
+al 00CBE6 .UpdateSideScrollingGameplay_CBE6
+al 00CC03 .UpdateSideScrollingGameplay_CC03
+al 00CC3D .UpdateSideScrollingGameplay_CC3D
+al 00D1DD .UpdateSideScrollingGameplay_D1DD
+al 00CBCA .UpdateSideScrollingGameplay_CBCA
+al 00CBAB .UpdateSideScrollingGameplay_CBAB
+al 00CBB9 .UpdateSideScrollingGameplay_CBB9
+al 00CB93 .UpdateSideScrollingGameplay_CB93
+al 00CBB4 .UpdateGameplayStateField_CBB4
+al 00CB83 .UpdateSideScrollingGameplay_CB83
+al 00CB80 .UpdateSideScrollingGameplay_CB80
+al 00CB7B .UpdateGameplayStateField_CB7B
+al 00CB6F .UpdateSideScrollingGameplay_CB6F
+al 00D072 .UpdateSideScrollingGameplay_D072
+al 00CB6A .UpdateSideScrollingGameplay_CB6A
+al 00E944 .UpdateSideScrollingGameplay_E944
+al 00E814 .UpdateSideScrollingGameplay_E814
+al 00CD4D .UpdateSideScrollingGameplay_CD4D
+al 00CB61 .UpdateSideScrollingGameplay_CB61
+al 00E6F8 .UpdateSideScrollingGameplay_E6F8
+al 00CF11 .UpdateFlyingEntity_CF11
+al 00DC62 .UpdateSideScrollingGameplay_DC62
+al 00DBC1 .UpdateSideScrollingGameplay_DBC1
+al 00DC49 .UpdateSideScrollingGameplay_DC49
+al 00DB2B .UpdateSideScrollingGameplay_DB2B
+al 00D8CD .UpdateSideScrollingGameplay_D8CD
+al 00D7D0 .UpdateSideScrollingGameplay_D7D0
+al 00D726 .UpdateSideScrollingGameplay_D726
+al 00D867 .CalculateMovementAndClamp_D867
+al 00E046 .UpdateSideScrollingGameplay_E046
+al 00DF77 .UpdateSideScrollingGameplay_DF77
+al 00E240 .UpdateSideScrollingGameplay_E240
+al 00D098 .UpdateSideScrollingGameplay_D098
+al 00DE99 .UpdateSideScrollingGameplay_DE99
+al 00DCCA .UpdateSideScrollingGameplay_DCCA
+al 00CD89 .UpdateSideScrollingGameplay_CD89
+al 00DE22 .UpdateSideScrollingGameplay_DE22
+al 00E6BE .UpdateSideScrollingGameplay_E6BE
+al 00E611 .UpdateSideScrollingGameplay_E611
+al 00E5C1 .UpdateSideScrollingGameplay_E5C1
+al 00E3D1 .UpdateSideScrollingGameplay_E3D1
+al 00E888 .UpdateSideScrollingGameplay_E888
+al 00E306 .UpdateSideScrollingGameplay_E306
+al 00DEB3 .UpdateSideScrollingGameplay_DEB3
+al 00DFC8 .CalculateMovementAndClamp_DFC8
+al 00D4E9 .CalculateMovementAndClamp_D4E9
+al 00D5E8 .UpdateSideScrollingGameplay_D5E8
+al 00D950 .UpdateSideScrollingGameplay_D950
+al 00E4D8 .TransformFlightState_E4D8
+al 00DEE9 .UpdateSideScrollingGameplay_DEE9
+al 00D449 .UpdateSideScrollingGameplay_D449
+al 00CE1D .TransformFlightState_CE1D
+al 00CE5B .UpdateSideScrollingGameplay_CE5B
+al 00CAF4 .UpdateSideScrollingGameplay_CAF4
+al 00CADF .ConfigureHudAndPlayfieldPpu_CADF
+al 00D6D8 .UpdateSideScrollingGameplay_D6D8
+al 00CADA .UpdateSideScrollingGameplay_CADA
+al 00CBD4 .UpdateSideScrollingGameplay_CBD4
+al 00F880 .ReadShipControls_F880
+al 00CAD4 .UpdateSideScrollingGameplay_CAD4
+al 00CEE8 .TransformFlightState_CEE8
+al 00D2CF .ConfigureHudAndPlayfieldPpu_D2CF
+al 00CAA8 .ConfigureHudAndPlayfieldPpu_CAA8
+al 00CAA1 .NmiHandler
+al 00CA9E .IrqHandler
+al 00CA98 .UpdateGameplayStateField_CA98
+al 00DE78 .UpdateSideScrollingGameplay_DE78
+al 00E029 .UpdateSideScrollingGameplay_E029
+al 00E7AA .UpdateSideScrollingGameplay_E7AA
+al 00E6D5 .UpdateSideScrollingGameplay_E6D5
+al 00D91A .UpdateSideScrollingGameplay_D91A
+al 00E6E1 .UpdateSideScrollingGameplay_E6E1
+al 00DC7B .UpdateSideScrollingGameplay_DC7B
+al 00E47A .UpdateSideScrollingGameplay_E47A
+al 00CA6A .UpdateSideScrollingGameplay_CA6A
+al 00CA8E .UpdateSideScrollingGameplay_CA8E
+al 00C99D .ConfigureHudAndPlayfieldPpu_C99D
+al 00C98C .UpdateSideScrollingGameplay_C98C
+al 00C983 .ResetHandler
+al 00C903 .GameplayLookupTable_C903
+al 00C8FF .GameplayConstantData_C8FF
+al 00C8FB .GameplayConstantData_C8FB
+al 00C8F7 .GameplayConstantData_C8F7
+al 00C8F3 .GameplayLookupTable_C8F3
+al 00C8EF .GameplayLookupTable_C8EF
+al 00C8EB .GameplayLookupTable_C8EB
+al 00C8DB .GameplayLookupTable_C8DB
+al 00C8CB .GameplayLookupTable_C8CB
+al 00C8B5 .GameplayLookupTable_C8B5
+al 00C89F .GameplayLookupTable_C89F
+al 00C7D8 .GameplayLookupTable_C7D8
+al 00C6DC .GameplayLookupTable_C6DC
+al 00C6D4 .GameplayLookupTable_C6D4
+al 00C6C0 .GameplayLookupTable_C6C0
+al 00C6BF .GameplayLookupTable_C6BF
+al 00C690 .GameplayConstantData_C690
+al 00C68F .GameplayConstantData_C68F
+al 00C636 .UpdateSideScrollingGameplay_C636
+al 00C623 .UpdateSideScrollingGameplay_C623
+al 00C603 .UpdateSideScrollingGameplay_C603
+al 00C5FF .UpdateGameplayStateField_C5FF
+al 00C59C .CalculateMovementAndClamp_C59C
+al 00C585 .UpdateSideScrollingGameplay_C585
+al 00C57E .UpdateSideScrollingGameplay_C57E
+al 00C577 .UpdateSideScrollingGameplay_C577
+al 00C56E .UpdateSideScrollingGameplay_C56E
+al 00C549 .UpdateSideScrollingGameplay_C549
+al 00C540 .UpdateSideScrollingGameplay_C540
+al 00C555 .UpdateSideScrollingGameplay_C555
+al 00C53B .UpdateSideScrollingGameplay_C53B
+al 00C55C .UpdateSideScrollingGameplay_C55C
+al 00C55A .UpdateSideScrollingGameplay_C55A
+al 00C533 .UpdateSideScrollingGameplay_C533
+al 00C509 .UpdateSideScrollingGameplay_C509
+al 00C4DF .UpdateSideScrollingGameplay_C4DF
+al 00C4D4 .CalculateMovementAndClamp_C4D4
+al 00C4CE .UpdateSideScrollingGameplay_C4CE
+al 00C4B4 .TransformFlightState_C4B4
+al 00C4A7 .TransformFlightState_C4A7
+al 00C47C .TransformFlightState_C47C
+al 00C47B .UpdateGameplayStateField_C47B
+al 00C47A .UpdateGameplayStateField_C47A
+al 00C469 .DeriveNewlyPressedButtons
+al 00C44A .ReadShipControls_C44A
+al 00C448 .ReadControllerShiftRegister
+al 00C434 .PollShipControllers
+al 00C41D .TransformFlightState_C41D
+al 00C40D .UpdateSideScrollingGameplay_C40D
+al 00C3E2 .UpdateSideScrollingGameplay_C3E2
+al 00C3DE .UpdateGameplayStateField_C3DE
+al 00C3D8 .UpdateSideScrollingGameplay_C3D8
+al 00C3CC .UpdateSideScrollingGameplay_C3CC
+al 00C3B3 .UpdateSideScrollingGameplay_C3B3
+al 00C3BF .UpdateGameplayStateField_C3BF
+al 00C39E .UpdateSideScrollingGameplay_C39E
+al 00C3C9 .UpdateSideScrollingGameplay_C3C9
+al 00C3C4 .UpdateSideScrollingGameplay_C3C4
+al 00C373 .UpdateSideScrollingGameplay_C373
+al 00C399 .UpdateSideScrollingGameplay_C399
+al 00C3C0 .UpdateSideScrollingGameplay_C3C0
+al 00C36A .UpdateSideScrollingGameplay_C36A
+al 00C355 .TransformFlightState_C355
+al 00C343 .UpdateGameplayStateField_C343
+al 00C337 .UpdateSideScrollingGameplay_C337
+al 00C31B .UpdateGameplayStateField_C31B
+al 00C31F .UpdateGameplayStateField_C31F
+al 00C30E .UpdateSideScrollingGameplay_C30E
+al 00C346 .UpdateSideScrollingGameplay_C346
+al 00C302 .UpdateGameplayStateField_C302
+al 00C2E6 .UpdateSideScrollingGameplay_C2E6
+al 00C2E0 .UpdateSideScrollingGameplay_C2E0
+al 00C324 .UpdateSideScrollingGameplay_C324
+al 00C303 .CalculateMovementAndClamp_C303
+al 00C28B .UpdateSideScrollingGameplay_C28B
+al 00C2B2 .UpdateSideScrollingGameplay_C2B2
+al 00C2AE .UpdateSideScrollingGameplay_C2AE
+al 00C27E .TransformFlightState_C27E
+al 00C274 .UpdateGameplayStateField_C274
+al 00C261 .UpdateSideScrollingGameplay_C261
+al 00C25C .UpdateGameplayStateField_C25C
+al 00C222 .UpdateSideScrollingGameplay_C222
+al 00C20B .UpdateSideScrollingGameplay_C20B
+al 00C1F8 .TransformFlightState_C1F8
+al 00C1E6 .UpdateSideScrollingGameplay_C1E6
+al 00C1C7 .TransformFlightState_C1C7
+al 00C24E .UpdateSideScrollingGameplay_C24E
+al 00C24C .UpdateSideScrollingGameplay_C24C
+al 00C1F7 .UpdateGameplayStateField_C1F7
+al 00C183 .CalculateMovementAndClamp_C183
+al 00C177 .TransformFlightState_C177
+al 00C16E .UpdateSideScrollingGameplay_C16E
+al 00C169 .UpdateSideScrollingGameplay_C169
+al 00C14C .ApplyHudPlayfieldScroll
+al 00C160 .UpdateGameplayStateField_C160
+al 00C144 .UpdateSideScrollingGameplay_C144
+al 00C13C .UpdateGameplayStateField_C13C
+al 00C139 .UpdateSideScrollingGameplay_C139
+al 00C10E .WriteHudOrPlayfieldData_C10E
+al 00C116 .UpdateSideScrollingGameplay_C116
+al 00C0FE .WriteHudOrPlayfieldData_C0FE
+al 00C109 .TransformFlightState_C109
+al 00C0F4 .ConfigureHudAndPlayfieldPpu_C0F4
+al 00C0DE .SetPpuAddress_C0DE
+al 00C0D7 .UpdateSideScrollingGameplay_C0D7
+al 00C0D0 .WriteHudOrPlayfieldTileRun
+al 00C0B7 .FillHudOrPlayfieldTiles
+al 00C0A1 .SetPpuAddress_C0A1
+al 00C092 .ConfigureHudAndPlayfieldPpu_C092
+al 00C087 .TransferShipTargetOamBuffer
+al 00C120 .FinishHudPlayfieldUploadAndResetScroll
+al 00C073 .UpdateSideScrollingGameplay_C073
+al 00C00A .GameplayLookupTable_C00A
diff --git a/Defender 2 (U)/copilot/reconstructed.map b/Defender 2 (U)/copilot/reconstructed.map
new file mode 100644
index 0000000..06dee7f
--- /dev/null
+++ b/Defender 2 (U)/copilot/reconstructed.map	
@@ -0,0 +1,34 @@
+Modules list:
+-------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
+prg.o:
+    PRG               Offs=000000  Size=003FFA  Align=00001  Fill=0000
+    VECTORS           Offs=000000  Size=000006  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
+
+
+Segment list:
+-------------
+Name                   Start     End    Size  Align
+----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
+PRG                   00C000  00FFF9  003FFA  00001
+VECTORS               00FFFA  00FFFF  000006  00001
+
+
+Exports list by name:
+---------------------
+
+
+
+Exports list by value:
+----------------------
+
+
+
+Imports list:
+-------------
+
diff --git a/Defender 2 (U)/copilot/reconstructed.nes b/Defender 2 (U)/copilot/reconstructed.nes
new file mode 100644
index 0000000..ce0cbc5
Binary files /dev/null and b/Defender 2 (U)/copilot/reconstructed.nes differ
diff --git a/Defender 2 (U)/copilot/rom.nes b/Defender 2 (U)/copilot/rom.nes
new file mode 120000
index 0000000..4a8d59c
--- /dev/null
+++ b/Defender 2 (U)/copilot/rom.nes	
@@ -0,0 +1 @@
+../Defender 2 (U).nes
\ No newline at end of file
diff --git a/Excitebike (JU)/OVERVIEW.md b/Excitebike (JU)/OVERVIEW.md
new file mode 100644
index 0000000..3effe8b
--- /dev/null
+++ b/Excitebike (JU)/OVERVIEW.md	
@@ -0,0 +1,418 @@
+# Excitebike (JU) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Excitebike (JU) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Vertical |
+| PRG bank start | CPU $C000 |
+| Source file | `copilot/prg.s` (14,111 lines) |
+| Output | `reconstructed_prg.bin` (16,384 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $C23B | `NMI` |
+| RESET | $C184 | `Reset` |
+| IRQ / BRK | $FFF0 | (`$FFF0` — points into audio data region, unused) |
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles `prg.s` with `ca65`, links with `ld65`, and verifies against `prg.bin`.
+
+**Verification result: BYTE-IDENTICAL** — `reconstructed_prg.bin` matches `prg.bin` exactly (headers, CHR, and all PRG bytes).
+
+### Build fix applied
+
+The original source contained a `bpl LookupTableEntry_FAF5` branch at CPU $FAB4 (line 9425 of `prg.s`), but the symbol `LookupTableEntry_FAF5` was undefined. The branch target CPU $FAF5 fell in the middle of what the disassembler classified as `lda #$16` (`A9` at $FAF4, `16` at $FAF5). The fix:
+
+- Replaced `bpl LookupTableEntry_FAF5` with `bne *-$1B` at CPU $FAB4, producing the exact original bytes `d0 e3` (the disassembler had mislabeled `bne` as `bpl`).
+
+---
+
+## 3. Reset — CPU $FFFC → $C184
+
+**`Reset`** ($C184)
+
+On power-on or reset:
+
+1. `sei` — disable maskable interrupts.
+2. `cld` — clear decimal mode.
+3. `lda #$00 / sta PPUCTRL` — disable PPU rendering and NMI.
+4. `ldx #$FF / txs` — initialize stack pointer to $FF.
+5. **Wait for two VBlanks** — poll `PPUSTATUS` bit 7 twice (`@vblank1`, `@vblank2`). This is the PPU warm-up delay.
+6. **Reset magic check** — compare `ResetMagic1` ($05CE) against `$A5` and `ResetMagic2` ($05CF) against `$5A`:
+   - If both match → warm start: set Y = $04 (preserve more RAM)
+   - If either mismatches → cold start: set Y = $07 (clear more RAM)
+7. **Clear RAM** — clear zero page and one page ($0000–$00FF, or $0000–$06FF depending on warm/cold start) using indirect pointer at $00/$01.
+8. **Persistent RAM init** — if reset magic was valid, `jsr InitializePersistentRam` ($C278):
+   - Copy 31-byte template (`PersistentRecordInitialDataC091` at $C091) to both `PersistentRecord0` ($0580) and `PersistentRecord1` ($05A3)
+   - Fill `PersistentBuffer` ($06E0) with $40, set byte at $07AF to $09
+   - Set reset magic bytes to $A5/$5A
+   - Zero tail bytes of both persistent records
+9. `sta APUDMALOAD` — disable DMC.
+10. `lda #$06 / sta PPUMASK / sta $18` — enable background + sprites, set $18.
+11. `jsr InitializeRuntimePpuState` — fill OAM shadow with $F8, process PPU entries, zero scroll/render fields.
+12. `lda #$90 / jsr SetPpuControl` — set PPUCTRL = $90 (NMI enabled, $2000 base).
+13. Falls into **`@main`** ($C1A4) — the permanent main loop.
+
+---
+
+## 4. Main Loop — `@main` ($C1A4)
+
+After reset, `Reset` never returns. It enters the infinite main loop:
+
+```
+@main ($C1A4):
+    jsr ShiftRuntimeState        ; $E8BC — shift runtime bytes $18-$1F right
+    lda NmiSyncState             ; $48
+    bmi @main                    ; loop if $FF (NMI_SYNC_PENDING)
+    beq @main                    ; loop if $00
+    ; NmiSyncState == $01 (NMI_SYNC_COMPLETE): proceed
+    jsr DisableNmi               ; $C362 — clear NMI bit in PPUCTRL
+    lda NmiSyncState
+    cmp #NMI_SYNC_COMPLETE       ; $01
+    bne @alternate               ; if not complete, receive instead
+    jsr TransmitRuntimeDataCode  ; $C6C8 — serial transmit runtime data
+    jmp @finish
+@alternate:
+    jsr ReceiveRuntimeDataCode   ; $C739 — serial receive runtime data
+@finish:
+    lda #NMI_SYNC_PENDING        ; $FF
+    sta NmiSyncState             ; $48 — reset sync flag for next frame
+    jsr WaitForVblankEndAndEnableNmi  ; wait for VBlank, set NMI bit
+    jmp @main                    ; loop forever
+```
+
+The main loop is **NMI-synchronized**: it blocks until `NmiSyncState` ($48) becomes $01 (set by NMI each frame), then performs serial I/O (transmit or receive runtime data), resets the sync flag to $FF, waits for the next VBlank, enables NMI, and repeats.
+
+### `ShiftRuntimeState` ($E8BC)
+
+Shifts runtime state bytes $18–$1F right by one bit. The carry-in is derived from controller bit 1 ($19 bit 2), enabling serial/data shifting tied to controller input.
+
+---
+
+## 5. NMI / Frame Heartbeat — `NMI` ($C23B)
+
+The NMI fires once per frame and is the central real-time driver:
+
+1. **`jsr DisableNmi`** ($C362) — clear bit 7 of `PpuControlShadow` ($10), write to PPUCTRL ($2000). NMI is disabled during the handler to prevent re-entry.
+2. **PPU mask**: if $45 == 0, `PPUMASK = PpuMaskShadow | $1A` (enable background + sprites); otherwise skip.
+3. **OAM DMA**: write $00 to OAMADDR ($2003), then $02 to OAMDMA ($4014) — copy $0200–$02FF to sprite RAM.
+4. **`jsr NmiPpuUpdate`** ($C27E) — process one PPU update command stream (indexed by $45), then reset $0300/$0301/$45 and PPU address to $3F00.
+5. **Optional rider/lane update**: if $47 != 0, `jsr UpdateRiderLanePositionStates` and `jsr NmiRuntimeUpdate`.
+6. **Runtime counters**: if $03B1 | $03B2 == 0, increment $3F and `jsr UpdateRuntimeCounters`.
+7. **`jsr ReadControllers`** ($E8E5) — read both controller ports ($4016/$4017), update `Controller1Held` ($14), `Controller1Pressed` ($15), `Controller2Held` ($16), `Controller2Pressed` ($17).
+8. **`jsr UpdateAudio`** ($F8DE) — update all four APU channels (Pulse 1, Pulse 2, Noise, Sound Effect) plus sound effects and DMA.
+9. **`jsr DispatchNmiState`** ($C2A9) — dispatch to the current NMI state handler (see below).
+10. **Read PPUSTATUS** ($2002) to reset the address latch.
+11. **`jsr WaitForVblankEndAndEnableNmi`** — wait for VBlank end, set NMI bit in PPUCTRL.
+12. **`rti`** — return from interrupt.
+
+### `NmiPpuUpdate` ($C27E)
+
+Processes a single PPU update command:
+- Load pointer from `PpuUpdatePointerLow/High` ($C0F6/$C111 tables) indexed by $45.
+- Call `ProcessPpuUpdateStream` ($D3C1) which reads the command stream and writes bytes to $2007.
+- Zero out $0300, $0301, and $45.
+- Reset PPU address to $3F00 (four writes to $2006).
+
+---
+
+## 6. NMI State Machine — `DispatchNmiState` ($C2A9)
+
+The NMI dispatcher supports two modes based on `NmiDispatchMode` ($40):
+
+### Mode 0 — Direct state dispatch (`DispatchNmiState` @ $C2A9)
+If `NmiDispatchMode` == 0:
+- Load `NmiState` ($41), double it, use as index into `NmiStateHandlerTable` ($C000–$C01B).
+- Jump indirect through zero-page $00/$01 (high byte left in A, stored to $01 by code at $CB36).
+
+**NMI State Handler Table** ($C000–$C01B) — 14 entries for states $00–$0D:
+
+| State | Handler Address | Purpose |
+|-------|----------------|---------|
+| $00 | `NmiState00` | Menu/title — selection handling |
+| $01 | $C395 | Menu horizontal input |
+| $02 | `UpdateGameplayRuntime` | Main gameplay update |
+| $03 | `DispatchNmiSequenceStep` | Sequence step dispatch |
+| $04 | `NmiState04_07` | Shared state $04/$07 handler |
+| $05 | `UpdateGameplayRuntime` | Main gameplay update |
+| $06 | `DispatchNmiSequenceStep` | Sequence step dispatch |
+| $07 | `NmiState04_07` | Shared state $04/$07 handler |
+| $08 | $C3BD | Menu vertical input |
+| $09 | `UpdateRaceRuntime` | Race gameplay update |
+| $0A | `UpdateGameplayRuntime` | Main gameplay update |
+| $0B | `DispatchNmiSequenceStep` | Sequence step dispatch |
+| $0C | $C43D | Serial handshake state $0C |
+| $0D | $C41C | Serial handshake state $0D |
+
+### Mode 1 — Sequence dispatch
+If `NmiDispatchMode` != 0:
+- Disable PPU rendering.
+- Wait until $30 == 0 (not busy).
+- Look up sequence pointer from `NmiStateToSequenceIndex` + `NmiSequencePointerLow/High` tables.
+- Call the sequence handler at the current `NmiSequenceStep` ($44).
+- If step < 0 (after increment/decrement), go to `InitializeRuntimePpuState`.
+
+**NMI Sequence Pointers** ($C03C–$C07F) — 9 sequences:
+
+| Index | Address | Handlers |
+|-------|---------|----------|
+| 0 | $C03C | $C2BD, $C514 |
+| 1 | $C040 | `SetSerialUpdateSelector06`, $C3F3, $C514 |
+| 2 | $C046 | `SerialUpdateSelectorCluster`, `ClearRuntimeZeroPage`, `InitializeCourseRuntime`, `SetSerialUpdateSelector17`, `SetSerialUpdateSelector0E`, `InitializeGameRuntime` |
+| 3 | $C052 | `SetSerialUpdateSelector06`, `SetSerialUpdateSelector04`, `SelectNmiUpdateForState`, `CallC92CWithZero`, `CompareAndUpdateRecord` |
+| 4 | $C05C | `SetSerialUpdateSelector06`, `SetSerialUpdateSelector09`, `Prepare0300Structure`, $C514 |
+| 5 | $C064 | $C551, `ClearRuntimeZeroPage`, `InitializeCourseRuntime`, `SetSerialUpdateSelector17`, $C562, $C5C2 |
+| 6 | $C070 | `SetSerialUpdateSelector06`, $C575, $C514 |
+| 7 | $C07A | `ClearRuntimeZeroPage`, `RestoreWorkingRecordFields`, $C518 |
+| 8 | $C076 | $C582, $C518 |
+
+---
+
+## 7. Key NMI State Handlers
+
+### `NmiState00` ($C346)
+Title/menu state:
+- If $31 == 0: initialize $43, $4A = 0, $03F7 = $0F, `NmiState` = 2 (gameplay).
+- Else: `jsr UpdateMenuSelection` with count 3; if no input change, set sprite 0 Y from `MenuInitialYTable`; otherwise handle selection done and advance state.
+
+### `NmiState01` ($C397)
+Menu horizontal input:
+- Filter controller buttons, `jsr UpdateMenuSelection` (count 5).
+- If input changed, move horizontal marker; else store `MenuSelectionIndex` to $43 and advance to next NMI state, entering sequence mode.
+
+### `NmiState08` ($C3BD)
+Menu vertical input:
+- `jsr UpdateMenuSelection` (count 6).
+- Based on selection: advance state, jump to sequence entry, or handle choice 5 (reset runtime, preserve selection).
+
+### `NmiState04_07` ($C465)
+Shared handler for states $04/$07:
+- If $34 == 0: advance NMI state and enter sequence mode; clamp state to max 7.
+- Else: `jsr $C92C`, check bit 4 of $3F, either return or `jmp StateHelperCAFA`.
+
+### `NmiState0C` / `NmiState0D` ($C41C / $C43D)
+Serial handshake states:
+- State $0C: if sequence step == 0, set sync complete; else if sync pending, copy record tails and continue handshake.
+- State $0D: similar handshake with persistent record synchronization.
+
+---
+
+## 8. Gameplay Runtime
+
+### `UpdateGameplayRuntime` ($C99A)
+Called from NMI states $02, $05, $0A:
+- `jsr $CA08` (update four rider slots).
+- If $03B1 | $03B2 != 0: jump to PPU update tail.
+- Otherwise: `jsr $D918`, `jsr $DD8D`, `jsr UpdateAllRiderScriptStateE733`, `jsr $E927`.
+- If $52 != 0: `jsr StateHelperCA9B`.
+- If $03F2 != 0: optional updates ($DA9F, $DBC4, $DEBB).
+- `jsr UpdateGlobalCounters`, `jsr BuildGlobalDisplayEAC5`, `jsr CompareRuntimeSlots`, `jsr CheckSlotState`.
+- `jsr UpdateTriggeredSlots`, `jsr UpdateFourSlots`, `jsr UpdateFourSlotPositionsE96C`, `jsr UpdateDisplayState`, `jsr UpdateFourSlot8CE836`, `jsr BuildFourSlotSpritesEA44`, `jsr ProcessCourseDefinition`, `jsr UpdateSlotPairState`, `jsr UpdateGlobalFC`, `jsr UpdateGlobalDisplay`, `jsr ProcessRuntimeEntries`, `jsr PrepareSortedSlots`, `jsr UpdateRuntimeSlots`, `jsr UpdateRiderCourseStateE70B`, `jsr UpdatePpuState`, `jsr ProcessRiderSlots`, `jmp ProcessSortedSlots`.
+
+### `UpdateRaceRuntime` ($C8D6)
+Race-specific update:
+- `jsr $CA1B`, `jsr UpdateGlobalRuntimeEB17`, `jsr UpdateAccumulator`, `jsr UpdateGlobalPosition`, `jsr UpdateRiderCourseStateE70B`, `jsr ProcessCourseDefinition`, `jsr $F68D`, `jsr $F755`, `jsr $C229`, then `jmp UpdatePpuState`.
+
+---
+
+## 9. Audio System
+
+**`UpdateAudio`** ($F8DE) — called from NMI:
+1. `APUFRAMECNT` ($4017) = $C0.
+2. `jsr UpdatePulse1Channel`, `jsr UpdatePulse2Channel`, `jsr UpdateNoiseChannel`, `jsr UpdateSoundEffect`.
+3. Zero out $FF, $FE, $FD, $FB.
+4. If $07FF != 0: `sta APUDMALOAD` ($4011), decrement $07FF.
+
+Audio channel configuration uses tables at $FF00+ (period tables) and $FF3E+ (mask tables). Audio sequence/data lives at $FF64–$FFE9.
+
+---
+
+## 10. Serial I/O System
+
+Excitebike uses the controller port $4016 for serial communication (likely the Famicom 3D System or a similar serial peripheral — peripheral identity unknown):
+
+**Transmit path** (`TransmitRuntimeDataCode` at $C6C8):
+- Configure a 64-byte block from $0060, transmit it.
+- Configure a 20-byte block from $05E0 (working buffer), transmit it.
+- Uses pulse-length encoding: long pulse = 1, short pulse = 0, MSB first.
+- Preamble: short pulses, then long pulses, then short pulses, then one long pulse.
+
+**Receive path** (`ReceiveRuntimeDataCode` at $C739):
+- Disable NMI, configure receive blocks, receive data.
+- Validate 5-byte header against `ReceiveHeaderTableBaseC17F` ($C17F: $E8).
+- If valid: set state variables ($A0–$A3), set $45 = $1A, wait for NMI update.
+- Receive second block (working buffer), validate checksum, return success/failure.
+
+Serial helpers: `TransmitByte` ($C66E), `ReceiveByte` ($C6A5), `TransmitPulseShort` ($C64E), `TransmitPulseLong` ($C653), `ReceiveSerialBit` ($C691), `SerialWaitPulse` ($C639).
+
+---
+
+## 11. Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $00–$01 | TMP00/TMP01 | General scratch / indirect pointer |
+| $08–$09 | SerialBitCountLo/Hi | Serial bit counter |
+| $0E | SerialBlockPtr | Serial block pointer |
+| $0D | SerialBlockLength | Serial block length |
+| $10 | PpuControlShadow | $2000 mirror |
+| $11 | PpuMaskShadow | $2001 mirror |
+| $12–$1F | — | Runtime state bytes (shifted each frame by `ShiftRuntimeState`) |
+| $14 | Controller1Held | Controller 1 held buttons |
+| $15 | Controller1Pressed | Controller 1 newly pressed |
+| $16 | Controller2Held | Controller 2 held buttons |
+| $17 | Controller2Pressed | Controller 2 newly pressed |
+| $31 | — | Menu/timing state |
+| $34 | — | Menu selection state |
+| $3F | — | Runtime counter |
+| $40 | NmiDispatchMode | NMI dispatch mode (0=direct, 1=sequence) |
+| $41 | NmiState | Current NMI state ($00–$0D) |
+| $42 | MenuSelectionIndex | Current menu selection |
+| $43–$4A | — | State/temp variables |
+| $44 | NmiSequenceStep | Current NMI sequence step |
+| $45 | — | PPU update index |
+| $47 | — | Optional update flag |
+| $48 | NmiSyncState | $FF=PENDING, $01=COMPLETE |
+| $49 | InputActionLatch | Menu input latch |
+| $A4 | RiderMotionState | Rider motion state ($01=disabled, $02=active, $03=transition, $04=complete) |
+| $0100 | — | DMA/APU scratch |
+| $0200 | OamBuffer | OAM shadow / sprite DMA source |
+| $0300–$0301 | — | PPU update command structure pointer |
+| $03B1–$03B2 | — | Timed update flag |
+| $0580 | PersistentRecord0 | First persistent record (31 bytes + tails) |
+| $05A3 | PersistentRecord1 | Second persistent record |
+| $05CE–$05CF | ResetMagic1/2 | $A5/$5A warm-start signature |
+| $05E0 | WorkingBuffer | Working buffer for serial I/O |
+| $06E0 | PersistentBuffer | Persistent buffer (256 bytes) |
+| $07FF | — | Audio DMA trigger |
+
+---
+
+## 12. PPU / Rendering
+
+- **OAM DMA**: Every NMI, DMA from $0200–$02FF via `OAMDMA` ($4014).
+- **PPU update streams**: Indexed pointer tables at $C0F6 (low) / $C111 (high), 27 entries. Processed by `ProcessPpuUpdateStream` ($D3C1) during NMI.
+- **Scroll**: `PpuControlShadow` ($10) and `PpuMaskShadow` ($11) are software mirrors, updated during NMI and written to $2000/$2001.
+- **OAM shadow**: Filled with $F8 (offscreen) by `FillOamShadowWithF8` during runtime PPU init.
+
+---
+
+## 13. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C184) ────────────────────────────────────────┐
+    │ sei, cld, disable PPU/NMI, stack=$FF            │
+    │ wait 2× VBlank (PPU warm-up)                    │
+    │ check reset magic ($A5,$5A at $05CE/$05CF)      │
+    │   valid → warm start (preserve more RAM)        │
+    │   invalid → cold start (clear more RAM)         │
+    │ clear RAM ($0000–$00FF or $0000–$06FF)          │
+    │ if valid: InitializePersistentRam               │
+    │   (copy template to both persistent records)    │
+    │ disable DMC, PPUMASK=$06, PPUCTRL=$90 (NMI on)  │
+    │ InitializeRuntimePpuState                       │
+    │                                                 │
+    ▼                                                 │
+@main ($C1A4) ────────────────────────────────────────┤
+    │                                                 │
+    ├─ jsr ShiftRuntimeState   ($E8BC) ──────────────┐
+    │   shift $18-$1F right, carry from controller    │
+    │                                                 │
+    ├─ lda NmiSyncState ($48)                          │
+    ├─ bmi @main      (if $FF = PENDING, loop)        │
+    ├─ beq @main      (if $00, loop)                  │
+    │   (only proceed when NMI set it to $01)         │
+    │                                                 │
+    ├─ jsr DisableNmi     ($C362)                     │
+    ├─ if NmiSyncState == $01:                        │
+    │     jsr TransmitRuntimeDataCode ($C6C8)         │
+    │   else:                                         │
+    │     jsr ReceiveRuntimeDataCode ($C739)          │
+    │                                                 │
+    ├─ lda #NMI_SYNC_PENDING ($FF)                    │
+    │   sta NmiSyncState                              │
+    ├─ jsr WaitForVblankEndAndEnableNmi               │
+    └─ jmp @main   ◄──────────────────────────────────┘
+                                                        │
+NMI ($C23B) [once per frame]                            │
+    │                                                 │
+    ├─ jsr DisableNmi   (PPUCTRL bit7 = 0)            │
+    ├─ PPUMASK = PpuMaskShadow \| $1A (if $45==0)     │
+    ├─ OAM DMA ($0200-$02FF → $4014)                  │
+    ├─ jsr NmiPpuUpdate ($C27E)  [PPU update stream]  │
+    ├─ if $47 != 0:                                     │
+    │     jsr UpdateRiderLanePositionStates           │
+    │     jsr NmiRuntimeUpdate ($D14E)                │
+    ├─ if $03B1|$03B2 == 0: inc $3F, jsr UpdateRuntimeCounters │
+    ├─ jsr ReadControllers ($E8E5)                    │
+    ├─ jsr UpdateAudio ($F8DE)  [4 channels + SFX]    │
+    ├─ jsr DispatchNmiState ($C2A9)                   │
+    │     ├─ NmiDispatchMode==0: direct state table   │
+    │     │   $00=NmiState00 (menu/title)             │
+    │     │   $01=$C395 (menu horiz)                  │
+    │     │   $02=$C99A (UpdateGameplayRuntime)       │
+    │     │   $03=DispatchNmiSequenceStep             │
+    │     │   $04/$07=NmiState04_07                   │
+    │     │   $05=$C99A (UpdateGameplayRuntime)       │
+    │     │   $06=DispatchNmiSequenceStep             │
+    │     │   $07=NmiState04_07                       │
+    │     │   $08=$C3BD (menu vert)                   │
+    │     │   $09=$C8D6 (UpdateRaceRuntime)           │
+    │     │   $0A=$C99A (UpdateGameplayRuntime)       │
+    │     │   $0B=DispatchNmiSequenceStep             │
+    │     │   $0C=$C43D (serial handshake)            │
+    │     │   $0D=$C41C (serial handshake)            │
+    │     └─ NmiDispatchMode!=0: sequence dispatch    │
+    │         (9 sequences at $C03C-$C07F)            │
+    │                                                 │
+    ├─ read PPUSTATUS                                 │
+    ├─ WaitForVblankEndAndEnableNmi                   │
+    │   (set NmiSyncState = $01 implicitly via        │
+    │    main loop's view of completion)              │
+    └─ rti                                            │
+
+Serial I/O (from main loop, once per frame)
+    ├─ TransmitRuntimeDataCode ($C6C8)  [when sync complete]
+    │     ├─ 64-byte block from $0060                 │
+    │     └─ 20-byte block from $05E0 (working buffer)│
+    └─ ReceiveRuntimeDataCode ($C739)  [alternate]
+          ├─ validate 5-byte header ($C17F)           │
+          ├─ receive second block                     │
+          └─ checksum verify                          │
+
+Audio (from NMI via UpdateAudio at $F8DE)
+    ├─ Pulse 1 channel ($4000-$4003)                 │
+    ├─ Pulse 2 channel ($4004-$4007)                 │
+    ├─ Noise channel ($400C-$400F)                   │
+    ├─ Sound effect                                 │
+    └─ DMC load if $07FF != 0                        │
+```
+
+---
+
+## 14. Notes
+
+- **Build verification:** `make` in `copilot/` produces `reconstructed_prg.bin` that is **byte-identical** to `prg.bin` and to the PRG bank of `rom.nes`.
+- Vectors confirm NMI at $C23B, RESET at $C184, IRQ at $FFF0 (points into audio data region — likely a placeholder or unused).
+- The main loop (`@main` at $C1A4) is strictly NMI-synchronized via `NmiSyncState` ($48): it loops until the NMI sets the state to $01 (COMPLETE), performs serial I/O, resets to $FF (PENDING), waits for VBlank, and repeats.
+- Serial I/O uses controller port $4016 for pulse-length encoded data transmission/reception — likely for the Famicom 3D System or a similar serial peripheral.
+- The NMI state machine supports both direct state dispatch (14 states via table at $C000) and sequence dispatch (9 sequences via tables at $C03C–$C07F).
+- Many routines carry address-based labels (`NmiState04_07`, `UpdateSideScrollingGameplay_C073`, etc.) reflecting the automated first-pass disassembly; semantic naming is provisional.
+- `symbols.inc` (embedded at the top of `prg.s`) provides NES hardware register names and key zero-page symbols.
+- One build fix was required: an undefined branch target `LookupTableEntry_FAF5` was replaced with a PC-relative `bne *-$1B` to produce the original `d0 e3` bytes.
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/Makefile b/Excitebike (JU)/copilot/Makefile
index 3f9ba6f..7b0587a 100644
--- a/Excitebike (JU)/copilot/Makefile	
+++ b/Excitebike (JU)/copilot/Makefile	
@@ -1,10 +1,25 @@
-all: reconstructed_prg.bin verify
-prg.o: prg.s symbols.inc prg.bin
-	ca65 -g -o $@ prg.s
-reconstructed_prg.bin: prg.o linker.cfg
-	ld65 -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ prg.o
-verify: reconstructed_prg.bin prg.bin
-	cmp reconstructed_prg.bin prg.bin
-	@echo BYTE-IDENTICAL
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f prg.o reconstructed_prg.bin reconstructed.map reconstructed.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/chr.o b/Excitebike (JU)/copilot/chr.o
new file mode 100644
index 0000000..62dcbec
Binary files /dev/null and b/Excitebike (JU)/copilot/chr.o differ
diff --git a/Excitebike (JU)/copilot/chr.s b/Excitebike (JU)/copilot/chr.s
new file mode 100644
index 0000000..f6a8c21
--- /dev/null
+++ b/Excitebike (JU)/copilot/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/header.o b/Excitebike (JU)/copilot/header.o
new file mode 100644
index 0000000..6bb7a71
Binary files /dev/null and b/Excitebike (JU)/copilot/header.o differ
diff --git a/Excitebike (JU)/copilot/header.s b/Excitebike (JU)/copilot/header.s
new file mode 100644
index 0000000..37d1389
--- /dev/null
+++ b/Excitebike (JU)/copilot/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/linker.cfg b/Excitebike (JU)/copilot/linker.cfg
index d9d421d..cfaf881 100644
--- a/Excitebike (JU)/copilot/linker.cfg	
+++ b/Excitebike (JU)/copilot/linker.cfg	
@@ -1,6 +1,10 @@
 MEMORY {
-  PRG: start = $C000, size = $4000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
-  PRG: load = PRG, type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/locals.inc b/Excitebike (JU)/copilot/locals.inc
new file mode 100644
index 0000000..78db457
--- /dev/null
+++ b/Excitebike (JU)/copilot/locals.inc	
@@ -0,0 +1,181 @@
+; Excitebike-specific zero-page aliases used during Pass 1.
+; These intentionally conservative names will be refined in Passes 2 and 3.
+
+Zp00 = $00
+WorkPtrLo = $01
+WorkPtrHi = $02
+Zp03 = $03
+Zp04 = $04
+Zp05 = $05
+Zp06 = $06
+PpuCtrlShadow = $09
+PpuMaskShadow = $0A
+Zp0C = $0C
+Zp0D = $0D
+Zp0E = $0E
+Zp10 = $10
+Zp11 = $11
+MathOperandLo = $12
+MathOperandHi = $13
+MathResultLo = $14
+MathResultHi = $15
+Zp16 = $16
+Zp17 = $17
+Zp18 = $18
+ControllerHeld = $1A
+Zp1B = $1B
+Zp1D = $1D
+Zp1E = $1E
+Zp1F = $1F
+Zp20 = $20
+Zp21 = $21
+Zp24 = $24
+StateTimer = $25
+Zp26 = $26
+FrameCounter = $27
+Zp28 = $28
+NmiWorkComplete = $30
+PpuBufferReady = $31
+NmiUpdatesEnabled = $32
+NmiTriggerFlag = $33
+StartButtonLatch = $34
+StateTransitionFlag = $35
+GameActiveFlag = $38
+GameMode = $39
+Zp3A = $3A
+Zp3B = $3B
+PaletteUpdateMode = $3C
+GameState = $3D
+GameStateStep = $3E
+DemoCounter = $3F
+Zp40 = $40
+PendingStateFlag = $43
+StateSubstep = $44
+PlayerCourtOrder = $46
+ModeAnimTimerA = $48
+ModeAnimFrameA = $49
+ModeAnimTimerB = $4A
+ModeAnimFrameB = $4B
+ServingPlayer = $4C
+ModeAnimSubframe = $4D
+MessageTimer = $4E
+MessagePlayerIndex = $4F
+PointWinner = $50
+PlayerPointScore = $51
+Player2PointScore = $52
+PlayerGameScore = $53
+ScoreUpdatePhase = $57
+ScoreLo = $58
+ScoreHi = $59
+ScoreAnimationStep = $5A
+CourtMessageId = $5B
+MatchResultType = $5C
+ScoreDisplayState = $5D
+PendingGameState = $5E
+Player1MotionControl = $60
+Player1XSubpixel = $61
+Player1XPosition = $62
+Player1YSubpixel = $63
+Player1YPosition = $64
+Player2XSubpixel = $66
+Player2XPosition = $67
+Player2YSubpixel = $68
+Player2YPosition = $69
+BallMotionControl = $6A
+BallXSubpixel = $6B
+BallXPosition = $6C
+BallYSubpixel = $6D
+BallYPosition = $6E
+BallHeight = $6F
+BallHeightReference = $70
+BallTargetOffset = $71
+BallVerticalVelocityLo = $72
+BallVerticalVelocityHi = $73
+PlayerAnimationFlags = $78
+UmpireMessageId = $79
+BallStateFlags = $7A
+BallBounceState = $7B
+PlayerTargetXLo = $80
+PlayerTargetXHi = $81
+PlayerTargetYLo = $82
+PlayerTargetYHi = $83
+PlayerActionType = $84
+PlayerActionParameter = $85
+PlayerActionState = $86
+PlayerFacingDirection = $87
+PlayerXPosition = $88
+PlayerYPosition = $89
+PlayerPreviousX = $8A
+PlayerPreviousY = $8B
+PlayerMovementFlags = $8C
+BallTrajectoryFlags = $8D
+BallCollisionFlags = $8E
+BallContactState = $8F
+MathCarryByte = $97
+MathVectorXHi = $98
+MathVectorXLo = $99
+MathVectorXResult = $9A
+MathVectorYHi = $9B
+MathVectorYLo = $9C
+ProjectedXLo = $9D
+ProjectedXHi = $9E
+ProjectedYLo = $9F
+ProjectedYHi = $A0
+SignedAimDelta = $A4
+AimMagnitude = $A5
+AimDirection = $A6
+ObjectDataPointerLo = $A8
+ObjectDataPointerHi = $A9
+ObjectDataOffset = $AA
+ActiveObjectIndex = $AB
+AnimationFrame = $B0
+AnimationTimer = $B1
+PoseFrameTimer = $B3
+PlayerAnimationId = $B4
+PoseSequenceOffset = $B5
+PlayerPoseId = $B6
+PlayerPoseFlags = $B7
+RacketTargetX = $B8
+RacketTargetY = $B9
+RacketContactFlags = $BA
+RacketAimOffset = $BB
+ContactPointX = $BC
+ContactPointY = $BD
+PlayerActionDuration = $BF
+RallyFlags = $C0
+RallyPhase = $C1
+CourtSide = $C2
+SignedMovementDelta = $C3
+PlayerActionDelay = $C4
+NetAnimationTimer = $C5
+BallAnimationTimer = $C6
+UmpireAnimationTimer = $C7
+ObjectAnimationState = $C8
+ObjectAnimationFrame = $C9
+RacketContactState = $CA
+BallContactTimer = $CB
+BallContactFlags = $CC
+PlayerMovementSpeed = $CD
+ComputerActionState = $CE
+PreviousPlayerState = $CF
+SelectedGameMode = $E0
+PendingAudioCue = $E6
+DmcOutputLevel = $F0
+AudioChannelControl = $F1
+ActiveSoundEffect = $F2
+SoundEffectTimer = $F3
+SoundEffectPhase = $F4
+Pulse2EffectTimer = $F5
+PitchAdjustment = $F6
+AudioSequencePtrLo = $F7
+AudioSequenceIndex = $F9
+AudioSequenceOffset = $FA
+AudioStreamPosition = $FB
+AudioEventPriority = $FC
+AudioRequestFlags1 = $FD
+AudioRequestFlags2 = $FE
+AudioRequestFlags3 = $FF
+
+; Additional traced fields
+Player2MotionControl = $65
+AudioSequencePtrHi = $F8
\ No newline at end of file
diff --git a/Excitebike (JU)/copilot/prg.o b/Excitebike (JU)/copilot/prg.o
new file mode 100644
index 0000000..469ba10
Binary files /dev/null and b/Excitebike (JU)/copilot/prg.o differ
diff --git a/Excitebike (JU)/copilot/reconstructed.lbl b/Excitebike (JU)/copilot/reconstructed.lbl
new file mode 100644
index 0000000..9e7eed0
--- /dev/null
+++ b/Excitebike (JU)/copilot/reconstructed.lbl	
@@ -0,0 +1,1045 @@
+al 00FFFA .InterruptVectorsFFFA
+al 00FFEA .AudioDataFFEA
+al 00FF64 .AudioDataFF64
+al 00FF4E .AudioLookupTableFF4E
+al 00FF3E .AudioMaskTable
+al 00FEF6 .AudioSequenceFEF6
+al 00FEAE .AudioSequenceFEAE
+al 00FE2C .AudioSequenceFE2C
+al 00FDFC .AudioSequenceFDFC
+al 00FDC9 .@write_noise
+al 00FDC3 .@noise_alt
+al 00FDD2 .SoundEffectReturnFDD2
+al 00FD99 .UpdateSoundEffectNoiseFD99
+al 00FD89 .@write_triangle
+al 00FD7F .@limit_ok
+al 00FD63 .UpdateSoundEffectTriangleFD63
+al 00FD5B .@write_pulse2
+al 00FD4A .@use_87
+al 00FD32 .@decode_event
+al 00FD1D .UpdateSoundEffectVoice1FD1D
+al 00FD17 .@store_sweep
+al 00FD04 .@store_control
+al 00FCFA .@select_control
+al 00FF53 .DecodeAudioEvent
+al 00FCD9 .UpdateSoundEffectVoice0FCD9
+al 00FDD3 .SoundEffectDescriptorDataFDD3
+al 00FC9A .@find_effect
+al 00FC96 .@start_effect
+al 00FC89 .AudioControlTableFC89
+al 00FC75 .@trigger_noise
+al 00FC63 .NoiseEffectUpdateFC63
+al 00FC57 .NoiseEffectFC57
+al 00FC1F .SetupNoiseEffectShort
+al 00FC0E .@load_noise
+al 00FBFF .SetupNoiseEffectLong
+al 00FB77 .NoiseAudioDataFB77
+al 00FB76 .UpdatePulsePitchReturnFB76
+al 00FB5A .UpdateTriangleState
+al 00FB41 .@check_more
+al 00FB28 .@adjust
+al 00FB10 .@scale
+al 00FB17 .UpdatePulsePitch
+al 00FAF2 .@positive_fc
+al 00FADC .@skip_store_07ff
+al 00FACF .Pulse2UpdatePitchFACF
+al 00FAC8 .Pulse2StoreDelayFAC8
+al 00FAC3 .Pulse2LoadDelayFAC3
+al 00FABF .Pulse2ResetStateFABF
+al 00FABB .Pulse2StoreDelayFABB
+al 00FAB3 .Pulse2IncrementStateFAB3
+al 00FA95 .UpdateActivePulse2
+al 00FA94 .@return
+al 00FAF7 .WritePulse2State
+al 00FA69 .@store_mode
+al 00FA5E .@active
+al 00FA4F .Pulse2EffectFA4F
+al 00F9B3 .AudioEffectDataF9B3
+al 00F9A3 .Pulse1EffectTableF9A3
+al 00F99E .@store_volume
+al 00F995 .@update_volume
+al 00F98A .Pulse1EffectF98A
+al 00F97D .Pulse1EffectF97D
+al 00F975 .Pulse1EffectF975
+al 00F96D .Pulse1EffectF96D
+al 00F965 .Pulse1EffectSweep9AF965
+al 00F969 .Pulse1EffectF969
+al 00F95B .Pulse1EffectF95B
+al 00F948 .Pulse1EffectF948
+al 00F93E .Pulse1StopF93E
+al 00F947 .Pulse1EffectReturnF947
+al 00F93A .Pulse1ActiveF93A
+al 00F92B .Pulse1EffectSweepF92B
+al 00F931 .Pulse1EffectF931
+al 00F921 .Pulse1EffectF921
+al 00F90E .Pulse1EffectF90E
+al 00F8CA .@write_sweep
+al 00F8C2 .@check_07
+al 00F8AE .Pulse1EffectF8AE
+al 00F8AB .Pulse1EffectF8AB
+al 00F89C .Pulse1EffectF89C
+al 00F88D .Pulse1EffectF88D
+al 00F889 .ConfigureApuChannel2F889
+al 00F885 .ConfigureApuChannel1F885
+al 00F884 .@return
+al 00FF00 .ApuPeriodTableFF00
+al 00F873 .ConfigureApuChannelCommonF873
+al 00F86B .ConfigurePulse1F86B
+al 00F86A .@return
+al 00FC8D .UpdateSoundEffect
+al 00FC3D .UpdateNoiseChannel
+al 00FA74 .UpdatePulse2Channel
+al 00F8D4 .UpdatePulse1Channel
+al 00F812 .@copy
+al 00F809 .CopyCourseObjectList
+al 00F808 .CourseObjectReturnF808
+al 00F7E7 .CourseObjectReserveNextF7E7
+al 00F7EC .CourseObjectAppendSavedF7EC
+al 00F826 .AdvanceCourseList
+al 00F7CD .CourseObjectAppendCurrentF7CD
+al 00F7C9 .CourseObjectCheckSavedF7C9
+al 00F7FA .CourseObjectCheckLimitF7FA
+al 00F821 .ReserveCourseListEntry
+al 00F7AC .CourseObjectContinueF7AC
+al 00F799 .BuildCourseObjectList
+al 00F792 .@next_candidate
+al 00F770 .@next_pattern
+al 00F75F .FindCourseObjectSearchF75F
+al 00F798 .FindCourseObjectReturnF798
+al 00F755 .FindCourseObjectPattern
+al 00F73E .ResetRuntimeCourseState
+al 00F72C .@check_next
+al 00F731 .@clear_runtime
+al 00F739 .@set_be
+al 00F71E .@check_course
+al 00F70E .UpdateRuntimeCourseState
+al 00F70D .@return
+al 00F6FB .AdvanceRuntimePosition
+al 00F6C7 .UpdateCourseObjectLoadStructureF6C7
+al 00F839 .LoadCourseListPointer
+al 00F68D .UpdateCourseObjectRuntime
+al 00F681 .@copy
+al 00F67A .@fill
+al 00F66A .@store_value
+al 00F65B .@find_slot
+al 00F654 .@next_entry
+al 00F644 .@reset_stream
+al 00F638 .@special_type
+al 00F625 .@advance_eb
+al 00F64E .BuildCourseStructure
+al 00F5F6 .@build_structure
+al 00F5C9 .ProcessCourseAfterToggleF5C9
+al 00F5BA .ProcessCourseToggleF5BA
+al 00F681 .CopyCourseStructure
+al 00F676 .InitializeCourseStructure
+al 00F62D .ContinueCourseDefinition
+al 00F82E .LoadCourseStructurePointer
+al 00F54B .ProcessCourseDefinitionCommandF54A
+al 00F53A .@increment_stream
+al 00F525 .@advance_stream
+al 00F512 .@position_matches
+al 00F4B4 .CoursePatternF4B4
+al 00F4A5 .CoursePatternF4A5
+al 00F496 .CoursePatternF496
+al 00F46E .CoursePatternF46E
+al 00F466 .CoursePatternF466
+al 00F45E .CoursePatternF45E
+al 00F456 .CoursePatternF456
+al 00F3EA .CoursePatternF3EA
+al 00F3DC .CoursePatternF3DC
+al 00F3CE .CoursePatternF3CE
+al 00F3C0 .CoursePatternF3C0
+al 00F35D .CoursePatternF35D
+al 00F355 .CoursePatternF355
+al 00F34D .CoursePatternF34D
+al 00F345 .CoursePatternF345
+al 00F33D .CoursePatternF33D
+al 00F335 .CoursePatternF335
+al 00F32D .CoursePatternF32D
+al 00F314 .CoursePatternF314
+al 00F30A .CoursePatternF30A
+al 00F2F8 .CoursePatternF2F8
+al 00F2E2 .CoursePatternF2E2
+al 00F2CC .CoursePatternF2CC
+al 00F297 .CoursePatternF297
+al 00F25E .CoursePatternF25E
+al 00F1EB .CoursePatternF1EB
+al 00F1D1 .CoursePatternF1D1
+al 00F1A4 .CoursePatternF1A4
+al 00F16B .CoursePatternF16B
+al 00F112 .CoursePatternF112
+al 00F10A .CoursePatternF10A
+al 00F101 .CourseStructureTemplateF101
+al 00F0B3 .CourseStructureTemplateF0B3
+al 00F0AB .CoursePatternF0AB
+al 00F087 .CourseStructurePointerHighF087
+al 00F063 .CourseStructurePointerLowF063
+al 00F000 .CourseDefinitionDataF000
+al 00EE0A .CourseDefinitionDataEE0A
+al 00ED4A .RuntimeCommandDataED4A
+al 00ED3A .RuntimeDataED3A
+al 00ED1E .@fill_second
+al 00ECFF .@fill_first
+al 00ECE6 .@load_parameters
+al 00ECE1 .@no_match
+al 00ECC8 .@return
+al 00ECBF .IncrementWrap40ECBF
+al 00EC99 .UpdateRuntimeAccumulatorEC99
+al 00EC98 .@return
+al 00EC6E .@store
+al 00EC6C .@use_c7
+al 00EC3D .@copy
+al 00EC3A .GlobalRuntimeReturnEC3A
+al 00EC1A .GlobalRuntimeStoreC2EC16
+al 00EC1C .GlobalRuntimeSetFlagEC18
+al 00EC10 .GlobalRuntimeIncrementC2EC10
+al 00EBF6 .GlobalRuntimeUpdateC2EBF6
+al 00EBDF .GlobalRuntimeSetTriggerEBDC
+al 00EBE9 .GlobalRuntimeCheckMode4EBE9
+al 00EBD0 .GlobalRuntimeIncrement05E0EBCD
+al 00EC5D .UpdateOamEntriesEC5D
+al 00EBBC .GlobalRuntimeReturnEBBC
+al 00EBBD .GlobalRuntimeUpdateTrackEBBD
+al 00EBB6 .GlobalRuntimeCheck5CEBB6
+al 00EC75 .InitializeRuntimeFieldsEC75
+al 00EB77 .GlobalRuntimeCheckNextEB77
+al 00EB7C .GlobalRuntimeIncrementBDEB7C
+al 00ECC9 .CheckRuntimeTableValuesECC9
+al 00EB9D .GlobalRuntimeReturnEB9D
+al 00EB7F .GlobalRuntimeShiftAgainEB7F
+al 00EB93 .GlobalRuntimeSetFlagsEB93
+al 00EB43 .GlobalRuntimeSetC1EB43
+al 00EB49 .GlobalRuntimeCheckBFEB49
+al 00EB9E .GlobalRuntimeSecondaryEB9E
+al 00EB35 .GlobalRuntimeCheckC1EB35
+al 00EB5E .GlobalRuntimeUpdateEB5E
+al 00EB23 .GlobalRuntimeCheckBDEB23
+al 00EB7E .GlobalRuntimeReturnEB7E
+al 00EAFF .@second_loop
+al 00EAE2 .@first_loop
+al 00EB16 .@return
+al 00EAE0 .@build_first
+al 00EAA5 .GlobalStateCopyLoopEAA5
+al 00EAC0 .GlobalStateClear3AEAC0
+al 00EAB5 .GlobalStateInitializeEAB5
+al 00EAC4 .GlobalStateReturnEAC4
+al 00EA8B .@next_slot
+al 00EA88 .@build_secondary
+al 00EA61 .@build_primary
+al 00EA58 .@alternate_state
+al 00EA46 .@slot_loop
+al 00EA3B .@store_direction
+al 00EA39 .@negative_direction
+al 00EA2B .@check_input
+al 00EA23 .@check_state
+al 00EA43 .Slot0DirectionReturnEA43
+al 00EA07 .UpdateSlot0DirectionEA07
+al 00EA01 .SlotPositionTableMatchEA01
+al 00E9F9 .SlotPositionStoreE9F9
+al 00E9F1 .SlotPositionUseCurrentE9F1
+al 00E9DF .@invert
+al 00E9D9 .SlotPositionFlipDirectionE9D9
+al 00E9D2 .SlotPositionCheckFlagsE9D2
+al 00E9E9 .SlotPositionLowE9E9
+al 00E9E3 .SlotPositionNextE9E3
+al 00E9AD .SlotPositionResetBCE9AD
+al 00E9B8 .SlotPositionCheckState3E9B8
+al 00E9C4 .SlotPositionCheckBoundsE9C4
+al 00E981 .SlotPositionTableLoopE981
+al 00E97F .SlotPositionCheckTableE97F
+al 00E96E .SlotPositionLoopE96E
+al 00E960 .Slot0388UpdateFrom94E960
+al 00E949 .@store_state
+al 00E930 .@next_slot
+al 00E929 .@slot_loop
+al 00E927 .UpdateFourSlotCCE927
+al 00E91A .@store_boundary
+al 00E924 .@restore_y
+al 00E90B .@save_y
+al 00E926 .@return
+al 00E8E2 .@return
+al 00E8D2 .@return
+al 00E8BE .SlotA4ReturnE8BE
+al 00E8A5 .@update
+al 00E88E .@set_d8
+al 00E86F .AdjustSlotBCFromAE86F
+al 00E84F .StoreSlotBCE4E84F
+al 00E893 .InitializeAndCalculateSlotE893
+al 00E841 .@next_slot
+al 00E838 .@slot_loop
+al 00E831 .@set_flag
+al 00E835 .@return
+al 00E80D .LoadTablePointerE80D
+al 00E7FC .LoadRiderLanePositionE7FC
+al 00E7F2 .StoreRiderCommandStateE7F2
+al 00E7EC .@clear_state
+al 00E7D0 .ResetRiderScriptE7D0
+al 00E7CA .@advance_script
+al 00E7A3 .UpdateRiderCommandStateE7A3
+al 00E794 .DispatchRiderCommandE794
+al 00E77E .@load_command
+al 00E762 .ProcessRiderScriptEntryE762
+al 00E760 .ProcessRiderScriptE760
+al 00E754 .@store_script_index
+al 00E753 .@return
+al 00E73B .UpdateSingleRiderScriptStateE73B
+al 00E735 .@next_rider
+al 00E71E .@adjust
+al 00E72B .@clear_state
+al 00E70D .@next_rider
+al 00E6F5 .DataTableE6F5
+al 00E6E1 .DataTableE6E1
+al 00E8E7 .UpdateSlotStateIfReadyE8E7
+al 00E8D3 .InitializeGlobalB6E8D3
+al 00E8FA .SetSlotBCE4To10E8FA
+al 00E8C6 .InitializeRiderMotionState
+al 00E8BF .ClearRiderMotionState
+al 00E956 .Slot0388CheckA4E956
+al 00E8FF .UpdateSlotBoundaryE8FF
+al 00E8EE .InitializeSlotModeE8EE
+al 00E89D .UpdateRiderMotionState
+al 00E879 .InitializeSlotMode4E879
+al 00EA8F .UpdateGlobalStateEA8F
+al 00E818 .UpdateSlotFlagE818
+al 00E934 .UpdateSlot0388E934
+al 00E854 .InitializeSlotMode2E854
+al 00E845 .InitializeSlotFieldsE845
+al 00E86A .AdjustSlotBCE86A
+al 00E85D .InitializeSlotMode6E85D
+al 00E8E3 .SetSlotA4OneE8E3
+al 00E963 .ClearSlotStateE963
+al 00E6B7 .CommandHandlerVectorsE6B7
+al 00E6AD .DataE6AD
+al 00E6A9 .PpuRowDescriptor2E6A9
+al 00E6A5 .PpuRowDescriptor1E6A5
+al 00E6A1 .PpuRowDescriptor0E6A1
+al 00E6A1 .PpuRowDescriptorsE6A1
+al 00E69A .RiderSpriteTileTableE69A
+al 00E697 .DataE697
+al 00E68C .ScriptE68C
+al 00E689 .ScriptE689
+al 00E686 .ScriptE686
+al 00E684 .ScriptE684
+al 00E667 .ScriptE667
+al 00E652 .ScriptE652
+al 00E649 .ScriptE649
+al 00E63E .ScriptE63E
+al 00E631 .ScriptE631
+al 00E61E .ScriptE61E
+al 00E60B .ScriptE60B
+al 00E5F8 .ScriptE5F8
+al 00E5E5 .ScriptE5E5
+al 00E5D0 .ScriptE5D0
+al 00E5BB .ScriptE5BB
+al 00E5A6 .ScriptE5A6
+al 00E599 .ScriptE599
+al 00E584 .ScriptE584
+al 00E56E .ScriptPointerHighTableE56E
+al 00E55A .ScriptPointerLowContinuationE55A
+al 00E554 .PointerHighTableE554
+al 00E54E .PointerLowTableE54E
+al 00E541 .DataTableE541
+al 00E53D .SlotPositionThresholdTableE53D
+al 00E53C .@return
+al 00E526 .SlotPairSetStateE526
+al 00E528 .SlotPairStoreStateE528
+al 00E513 .SlotPairMultipleE513
+al 00E52C .CompareSlotDistance
+al 00E4FF .SlotPairNextInnerE4FF
+al 00E4F0 .SlotPairCompareE4F0
+al 00E4E0 .SlotPairInnerE4E2
+al 00E50A .SlotPairNextOuterE50A
+al 00E4D9 .SlotPairStartInnerE4D9
+al 00E4CA .SlotPairOuterE4CA
+al 00E4BD .@write_loop
+al 00E4A7 .@next
+al 00E49D .@loop
+al 00E49B .ProcessSlotBits
+al 00E48C .@check_second
+al 00E492 .@process
+al 00E484 .@adjust
+al 00E495 .@next_slot
+al 00E458 .@slot_loop
+al 00E4AD .WriteSlotPattern
+al 00E43F .@process_slot
+al 00E44A .@next_slot
+al 00E432 .@slot_loop
+al 00E455 .@return
+al 00E421 .@no_swap
+al 00E40F .@inner_loop
+al 00E40D .@outer_loop
+al 00E409 .@start_sort
+al 00E3F6 .@initialize
+al 00E3D4 .GlobalDisplayOamLoopE3D4
+al 00E3C1 .GlobalDisplayCombineFCE3C1
+al 00E3B8 .GlobalDisplayCheck1AE3B8
+al 00E3AA .GlobalDisplayFinalizeE3AA
+al 00E39B .GlobalDisplayIncreaseE39B
+al 00E377 .GlobalDisplayRotateE377
+al 00E37A .GlobalDisplayIndexReadyE37A
+al 00E3C8 .GlobalDisplayStore01E3C8
+al 00E36B .GlobalDisplaySelectIndexE36B
+al 00E3C6 .GlobalDisplayBuildE3C6
+al 00E344 .@tiles_ready
+al 00E358 .SlotSpritesReturnE358
+al 00E2F6 .BuildSlotSprites
+al 00E303 .SlotSpritesCheckBCE303
+al 00E2D0 .@continue
+al 00E2BD .@no_borrow
+al 00E2AF .UpdateStructureState
+al 00E2AC .@dispatch
+al 00E29B .@combine_flags
+al 00E25C .SlotValueReturnYE25C
+al 00E25E .SlotValueCheckGlobalE25E
+al 00E24D .SlotValueCheckACE24D
+al 00E243 .SlotValueCheckPositionE243
+al 00E267 .SlotValueReturnACE267
+al 00E22F .GetSlotValue
+al 00E21C .EntryTypeAddFlagE21C
+al 00E215 .EntryTypeHaveBaseE215
+al 00E213 .EntryTypeUseTwoE213
+al 00E21F .EntryTypeAlternateE21F
+al 00E1EB .EntryBuildDecrementYE1EB
+al 00E1E2 .EntryBuildWriteLoopE1E2
+al 00E1F2 .EntryBuildAlternateE1F2
+al 00E1F8 .EntryBuildReturnE1F8
+al 00E1D1 .EntryBuildDispatchE1D1
+al 00E1F9 .GetRuntimeEntryType
+al 00E26A .BuildSlotStructure
+al 00E19D .@next_entry
+al 00E184 .@entry_loop
+al 00E3F4 .SortRuntimeSlots
+al 00E16E .@write_loop
+al 00E16C .WriteStructureE16C
+al 00E17E .StateE0E6ReturnE17E
+al 00E139 .StateE0E6BuildStructureE139
+al 00E124 .StateE0E6CheckPositionE124
+al 00E10A .StateE0E6UpdateE10A
+al 00E0E6 .UpdateStructureGenerator
+al 00E0E5 .@return
+al 00E09E .@return
+al 00E097 .SharedReturnE097
+al 00E071 .PairSetY
+al 00E076 .PairAfterMark
+al 00E065 .PairMarkBoth
+al 00E05B .PairMarkXOnly
+al 00E061 .PairMarkX
+al 00E098 .Add2UnlessHighE098
+al 00E045 .PairCompare80Reverse
+al 00E091 .Add12UnlessHighE091
+al 00E020 .PairCompare8CReverse
+al 00E02A .PairCompare80
+al 00E00E .PairCompare8C
+al 00E07E .PairNextY
+al 00E01D .PairNextYTrampoline
+al 00E086 .PairNextX
+al 00DFDD .PairNextXTrampoline
+al 00DFE0 .PairCheckY
+al 00DFD9 .PairCheckX
+al 00DFC6 .@found
+al 00DFBA .@search_table
+al 00DFD1 .@store
+al 00DFB2 .UpdateSlot70
+al 00DFA8 .@subtract
+al 00DF48 .@copy_display
+al 00DF7F .BuildDisplayValues
+al 00DF41 .@refresh_display
+al 00DF52 .@carry_subunit
+al 00DF3B .@check_subunit
+al 00DF51 .@return
+al 00DF24 .@check_flag
+al 00DF17 .@clamp
+al 00DFA4 .DivideByX_DFA4
+al 00DF15 .@minimum
+al 00DF07 .@set_x
+al 00DEF8 .@shift_loop
+al 00DF2D .@store_result
+al 00DEDB .@store_flag
+al 00DED9 .@set_flag
+al 00DECC .@check_existing
+al 00DEDE .@next_slot
+al 00DEBD .@slot_loop
+al 00DEBB .UpdateSlotFlags
+al 00DE9D .StateDE31AfterLoopDE9D
+al 00DE9A .StateDE31NextDE9A
+al 00DE91 .StateDE31SubtractDE91
+al 00DE6F .StateDE31LoopDE6F
+al 00DE66 .StateDE31SetupLoopDE66
+al 00DE5E .StateDE31ValueReadyDE5E
+al 00DE4E .StateDE31SelectValueDE4E
+al 00DEA5 .StateDE31ReturnDEA5
+al 00DEA6 .StateDE31Mode1DEA6
+al 00DE20 .@set_90
+al 00DE24 .@update_ac
+al 00DDE9 .@select_index
+al 00DDEE .@store_index
+al 00DE2D .@next_slot
+al 00DDD3 .@slot_loop
+al 00DDBA .StateUpdateStoreDCDDBA
+al 00DDAE .StateUpdateSet90DDAE
+al 00DDBC .StateUpdateInitialize02C0DDBC
+al 00DDCE .StateUpdateCopyTemplateDDCE
+al 00DDBF .StateUpdateMode8DDBF
+al 00DD8D .GlobalStateUpdateDD8D
+al 00DD6C .@store_ff
+al 00DD6E .@return
+al 00DD5D .@check_slot
+al 00DD1A .StateDCF2CommonDD1A
+al 00DD38 .InitializeSlotState
+al 00DD06 .UpdateSlotFrom94DD06
+al 00DCFE .StateDCF2Increment94DCFE
+al 00DD08 .StateDCF2Store0384DD08
+al 00DCFA .StateDCF2ZeroDCFA
+al 00DD11 .StateDCF2Mode2DD11
+al 00DD37 .StateDCF2ReturnDD37
+al 00DCF1 .@return
+al 00DCDB .@increment
+al 00DCDD .@return
+al 00DCC7 .AdjustSlotAC
+al 00DCC6 .@return
+al 00DCB8 .@store
+al 00DCB5 .@from_table
+al 00DCA0 .UpdateSlot0368DCA0
+al 00DC9A .CalculateSlotRemainingFromADC9A
+al 00DC8D .SlotUpdateReturnDC8D
+al 00DC6E .@check_position
+al 00DC69 .@set_flag
+al 00DC5C .@table_index_ready
+al 00DC8E .SlotUpdateAlternateDC8E
+al 00DC87 .SlotUpdateCommonDC87
+al 00DC39 .@clear_fields
+al 00DC97 .CalculateSlotRemaining
+al 00DC19 .@return
+al 00DBDD .@reset_slot
+al 00DBE0 .@initialize
+al 00DBC4 .SlotSetupDBC4
+al 00DB94 .SlotConfigReturnDB94
+al 00DB8C .SlotConfigIncrementCheckDB8C
+al 00DB5C .SlotConfigFromTableDB5C
+al 00DB6C .SlotConfigSpecialDB6C
+al 00DB5F .SlotConfigStore78DB5F
+al 00DB58 .SlotConfigCheckIndexDB58
+al 00DB32 .@store_a4
+al 00DB30 .@small_value
+al 00DB4D .@return_zero
+al 00DB34 .@configure_slot
+al 00DB95 .ResetSlotState
+al 00DAE3 .InitializeSlot
+al 00DAD7 .@next_slot
+al 00DAC8 .@search_slots
+al 00DAA5 .@check_entry
+al 00DADF .@next_outer
+al 00DA9F .SlotSearchDA9F
+al 00DA92 .@no_high_decrement
+al 00DA89 .@no_high_increment
+al 00DA9B .@next_slot
+al 00DA7C .@slot_loop
+al 00DA79 .@return
+al 00DA7A .UpdateSlotPositions
+al 00DCDE .UpdateSlot0374
+al 00DCF2 .UpdateSlotState
+al 00DC1A .UpdateSlotDC1A
+al 00DA58 .UpdateSlotPosition
+al 00DA2C .@slot_loop
+al 00DA69 .RuntimeSlotsReturnDA69
+al 00DA14 .SlotStateReturnDA14
+al 00DA03 .SlotSetDirectionDA03
+al 00D9F6 .SlotStateHandlerD9F6
+al 00D9F3 .@advance_state
+al 00DA10 .SlotResetStateDA10
+al 00D9E7 .@nonzero_slot
+al 00D9F5 .@return
+al 00D9D3 .SlotStateHandlerD9D3
+al 00D9B6 .@check_position
+al 00D9AA .@skip_decrement
+al 00D9A7 .@decrement_position
+al 00D99F .@store_49
+al 00D9A1 .@update_timing
+al 00D9D2 .@return
+al 00D9C0 .@advance_state
+al 00D983 .SlotStateHandlerD983
+al 00D970 .SlotStateAdvanceD970
+al 00D96A .@store_direction
+al 00D96E .SlotStateResetD96E
+al 00D95D .@compare
+al 00D953 .SlotStateHandlerD953
+al 00D97E .SlotStateTailD97E
+al 00D952 .@return
+al 00D94E .@advance_state
+al 00D933 .SlotStateHandlerD933
+al 00DA15 .UpdateSlotDerivedPosition
+al 00D924 .DispatchSlotState
+al 00D91A .@loop
+al 00D918 .UpdateFourObjects
+al 00D561 .GraphicsAndUiDataD561
+al 00D551 .PpuRecordDataD551
+al 00D541 .PpuRecordDataD541
+al 00D531 .PpuRecordDataD531
+al 00D521 .PpuRecordDataD521
+al 00D511 .PpuRecordDataD511
+al 00D501 .PpuRecordDataD501
+al 00D4F1 .PpuRecordDataD4F1
+al 00D4E1 .PpuRecordDataD4E1
+al 00D4C0 .PpuCommandDataD4C0
+al 00D4B0 .PpuRecordDataD4B0
+al 00D4A0 .PpuRecordDataD4A0
+al 00D490 .PpuRecordDataD490
+al 00D480 .PpuRecordDataD480
+al 00D46E .PpuRecordDataD46E
+al 00D3D6 .PpuGraphicsDataD3D6
+al 00D3AD .@write_byte
+al 00D3AA .@next_write
+al 00D3A7 .@decode_count
+al 00D39D .@set_ppuctrl
+al 00D387 .ProcessPpuUpdateCommand
+al 00D386 .@done
+al 00D35D .@read
+al 00D35B .ReadOneController
+al 00D336 .@shift
+al 00D322 .@next
+al 00D31C .@process
+al 00D30F .@return
+al 00D2D1 .@next_value
+al 00D2FF .Advance0300WriteIndex
+al 00D2BA .@next_group
+al 00D2A3 .Build0300Descriptor
+al 00D29C .@clear_attribute_bytes
+al 00D283 .@fill_fc
+al 00D26D .@calculate_address
+al 00D259 .@loop
+al 00D260 .InitializePpuMemory
+al 00D23D .@next_entry
+al 00D217 .@write_row
+al 00D211 .@next_row
+al 00D202 .@store_common
+al 00D1FC .@store_value
+al 00D1EE .@build_entry
+al 00D1E3 .@calculate_count
+al 00D19B .@wait_ppu
+al 00D180 .@delay_inner
+al 00D17E .NmiRuntimeDelayD17E
+al 00D16D .@hide_oam_entries
+al 00D1B3 .ApplyPpuScrollState
+al 00D14E .@wait_ppu
+al 00ECE4 .BuildPairedPpuRows
+al 00D135 .@fill
+al 00D11F .Initialize0300Structure
+al 00D0F6 .@copy
+al 00D0F4 .Initialize03D0Structure
+al 00D0DD .@store_value
+al 00D0D9 .@read_next
+al 00D0C8 .@next_rider
+al 00D0C6 .BuildRiderCourseObjectTable
+al 00D0B6 .@reduce
+al 00D0BE .@store
+al 00D0AD .@next_rider
+al 00D0A6 .CourseScanStoreResultD0A6
+al 00D0A4 .CourseScanResultD0A4
+al 00D088 .CheckRiderCourseOtherSideD088
+al 00D058 .CheckRiderCourseAhead
+al 00D054 .@use_y
+al 00D044 .@next_entry
+al 00D03C .@check_48
+al 00D025 .@scan_entry
+al 00D018 .ScanRiderStructure
+al 00DB50 .ConfigureSlot
+al 00D015 .@configure
+al 00CFFA .@merge
+al 00CFFF .@return
+al 00CFEA .UpdateRiderPackedState
+al 00CFE3 .SetRiderPositionHighNibbleMaskCFE3
+al 00CFE5 .MergeRiderPositionFlagsCFE5
+al 00CFE9 .RiderPositionFlagsReturnCFE9
+al 00CFDB .UpdateRiderPositionFlagsCFDB
+al 00CFCB .UpdateRiderPositionFlags
+al 00CFCA .@return
+al 00CFC4 .@next_rider
+al 00CFA6 .@check_rider
+al 00CF96 .CheckAdjacentRiderConflict
+al 00CF94 .RiderCourseValueInvalidCF94
+al 00CF8B .RiderCourseValueCheckCF8B
+al 00E7FF .LoadIndexedValueE7FF
+al 00CF85 .RiderCourseStoreCF85
+al 00CF88 .RiderCourseValueCheckCF88
+al 00CF6A .RiderCourseEntryCF6A
+al 00CF87 .RiderCourseReturnCF87
+al 00CF47 .RiderCourseEntryCF47
+al 00CF64 .RiderCoursePathCF64
+al 00CF2B .RiderCourseAlternateCF2B
+al 00CF0C .CheckRiderCourseState
+al 00D000 .SelectRiderConfiguration
+al 00CEFF .@copy_runtime
+al 00CF04 .@advance_slot
+al 00CED2 .@next_slot
+al 00CECF .@return
+al 00CEB2 .RiderStateUpdateCEB2
+al 00CEAF .@increment
+al 00CEA0 .@alternate
+al 00CE9F .@return
+al 00CE80 .CodeCE80
+al 00CE6D .CodeCE6D
+al 00CE82 .CodeCE82
+al 00CE4D .CodeCE4D
+al 00CE46 .CodeCE46
+al 00CE39 .CodeCE39
+al 00CE45 .CodeCE45
+al 00CE29 .CodeCE29
+al 00CE28 .CodeCE28
+al 00CE15 .CodeCE15
+al 00CE1D .CodeCE1D
+al 00CE00 .CodeCE00
+al 00CE0A .CodeCE0A
+al 00CE83 .UpdateSlotTimer
+al 00CDDE .CodeCDDE
+al 00CDD5 .CodeCDD5
+al 00CDBD .CodeCDBD
+al 00CE58 .CodeCE58
+al 00CDBA .CodeCDBA
+al 00CDB2 .CodeCDB2
+al 00CDAC .CodeCDAC
+al 00CD95 .CodeCD95
+al 00CDEE .CodeCDEE
+al 00CD8C .CodeCD8C
+al 00CD79 .CodeCD79
+al 00CD70 .CodeCD70
+al 00CD58 .@return
+al 00CD59 .CodeCD59
+al 00CD3A .@update_slot
+al 00CD3D .@next_slot
+al 00CD25 .@slot_loop
+al 00CD40 .@post_update
+al 00CD15 .@copy
+al 00CD13 .Copy02C0Template
+al 00CCEC .@entry_loop
+al 00CD12 .@return
+al 00CCDD .Initialize02C0Entries
+al 00D1C7 .BuildIndirectStructure
+al 00CCC6 .SequenceSetupIndexReady
+al 00DD6F .UpdateSlotAccumulator
+al 00CCBB .SequenceSetupStorePointer
+al 00CCA3 .SequenceSetupCalculate55
+al 00CCB9 .SequenceSetupSelectPointer
+al 00CC7A .@store_state
+al 00CC7C .@return
+al 00CC65 .StateSequenceStep2StoreSecondary
+al 00CC62 .StateSequenceStep2StorePrimary
+al 00DFA2 .DivideBy10
+al 00CC3A .StateSequenceStep2CopyTable
+al 00CC32 .StateSequenceStep2BuildStructure
+al 00CC2F .StateSequenceStep2Set45
+al 00CC6A .StateSequenceStep2Return
+al 00CBF8 .StateSequenceStep2StoreFB
+al 00CCCA .SequenceSetupLoadIndexedParameters
+al 00CBD4 .StateSequenceStep2LoadTables
+al 00CC7D .SequenceSetup
+al 00CC15 .StateSequenceStep2CheckThreshold
+al 00CBBF .StateSequenceStep2RunStep3
+al 00CBB9 .StateSequenceStep2CallThreshold
+al 00CBC9 .StateSequenceStep2Process
+al 00CBA4 .StateSequenceStep2
+al 00CB9F .StateSequenceCommonCB9F
+al 00CB99 .StateSequenceSet03AD
+al 00CB82 .StateSequenceStep1Copy
+al 00CBA3 .StateSequenceReturn
+al 00CB77 .StateSequenceStep1
+al 00CB69 .StateSequenceStep0MaybeAdvance
+al 00CB6D .StateSequenceStep0SetFlags
+al 00CB73 .StateSequenceStep0Finish
+al 00CB3B .StateSequenceStep0
+al 00CB36 .DispatchIndirectHighByte
+al 00CB25 .@check_flag
+al 00CB1D .@next_record
+al 00CB2B .@return
+al 00CB11 .@store
+al 00CAFE .@fill
+al 00CB05 .SharedReturnCB05
+al 00CAF3 .StateHelperCAF3
+al 00CAA9 .SharedReturnCAA9
+al 00CAAA .StateHelperCAAA
+al 00CA8C .@clear
+al 00CA84 .RuntimeInputReturnCA84
+al 00CA7F .RuntimeInputSetDelayCA7F
+al 00CA67 .RuntimeInputStoreB0CA67
+al 00CA63 .RuntimeInputDecrementCA63
+al 00CA20 .RuntimeTransitionCA20
+al 00CA38 .RuntimeInputStateCA38
+al 00CA0A .@next_rider
+al 00CA08 .UpdateFourRiderRuntime
+al 00E42B .ProcessSortedSlots
+al 00CED0 .ProcessRiderSlots
+al 00DA26 .UpdateRuntimeSlots
+al 00E456 .PrepareSortedSlots
+al 00E17F .ProcessRuntimeEntries
+al 00E359 .UpdateGlobalDisplay
+al 00DEE2 .UpdateGlobalFC
+al 00E4C8 .UpdateSlotPairState
+al 00EA44 .BuildFourSlotSpritesEA44
+al 00E836 .UpdateFourSlot8CE836
+al 00DE31 .UpdateDisplayState
+al 00E96C .UpdateFourSlotPositionsE96C
+al 00CD1F .UpdateFourSlots
+al 00DDD1 .UpdateTriggeredSlots
+al 00E09F .CheckSlotState
+al 00DFD5 .CompareRuntimeSlots
+al 00EAC5 .BuildGlobalDisplayEAC5
+al 00DF30 .UpdateGlobalCounters
+al 00C9C9 .@after_optional_updates
+al 00C9D5 .@continue_runtime
+al 00CA9B .StateHelperCA9B
+al 00C9BB .@normal_runtime
+al 00E733 .UpdateAllRiderScriptStateE733
+al 00D19B .UpdatePpuState
+al 00C997 .RuntimeUpdatePpuTailC997
+al 00F4FF .ProcessCourseDefinition
+al 00E70B .UpdateRiderCourseStateE70B
+al 00DBFE .UpdateGlobalPosition
+al 00DA6A .UpdateAccumulator
+al 00EB17 .UpdateGlobalRuntimeEB17
+al 00C971 .Advance0300IndexC971
+al 00C94B .Append0300EntryC94B
+al 00C93F .@copy_03d1
+al 00C935 .Setup0300EntryC935
+al 00C92C .Setup0300EntryC92C
+al 00C91D .@store_06
+al 00C90E .@update_record
+al 00C8EA .@copy_0300_template
+al 00C902 .@load_reference
+al 00C8DE .ContinueGameRuntimeC8DE
+al 00C8DB .@select_rider
+al 00C8AC .@initialize_riders
+al 00C87F .@store_34
+al 00C86D .@clear
+al 00C83A .@initialize_course_ram
+al 00C831 .@clear_ram
+al 00D13F .InitializePairedPpuRows
+al 00C81F .@return
+al 00C817 .@changed
+al 00C81B .@store
+al 00C811 .@prev
+al 00C80A .@next
+al 00C7EC .@early_return
+al 00C7ED .@input
+al 00C7DC .@success
+al 00C7DA .@failure
+al 00C7BA .@receive_payload
+al 00C7A3 .@wait_second_preamble
+al 00C796 .@wait_first_preamble
+al 00C792 .@restart
+al 00C782 .ReceiveWaitSecondUpdate
+al 00C762 .ReceiveHeaderByteOk
+al 00C757 .ReceiveValidateHeader
+al 00C74B .ReceiveWaitUpdate
+al 00C748 .ReceiveRunUpdate
+al 00C744 .ReceiveError
+al 00C751 .ReceiveFirstBlockOk
+al 00C792 .ReceiveDataBlockCode
+al 00C734 .SetTransmitPreambleCountsCode
+al 00C6FD .@send_payload
+al 00C6EB .@short_preamble
+al 00C6E4 .@long_preamble
+al 00C6D9 .@initial_delay
+al 00C726 .SetupTransmitWorkingBufferCode
+al 00C6D1 .TransmitDataBlockCode
+al 00C716 .SetupTransmitRamBlockCode
+al 00C6BE .@finish_bit
+al 00C6AD .@next_bit
+al 00C6A5 .SerialReceiveByteCode
+al 00C698 .@delay
+al 00C691 .SerialReceiveBitCode
+al 00C690 .@return
+al 00C68A .SerialIncrementCountCode
+al 00C67D .@finish_bit
+al 00C681 .@bit_set
+al 00C673 .@next_bit
+al 00C66E .SerialTransmitByteCode
+al 00C668 .@low_delay
+al 00C65F .@high_delay
+al 00C653 .SerialPulseLongCode
+al 00C656 .SerialPulseCommon
+al 00C64E .SerialPulseShortCode
+al 00C643 .@wait_low
+al 00C639 .@wait_high
+al 00C639 .SerialWaitPulseCode
+al 00C62D .SerialWriteTimingCode
+al 00C623 .@copy
+al 00EC47 .BuildOamEntryEC47
+al 00C5F2 .@copy_template
+al 00E1A3 .BuildRuntimeEntry
+al 00C5C2 .InitializeRuntimeState
+al 00C5B2 .@copy
+al 00C621 .CopyPersistentBufferToWorkingRam
+al 00C58A .@copy_fields
+al 00C594 .@copy_rom_field
+al 00C582 .SetSerialUpdateSelector11
+al 00C575 .InitializeSerialSelectionMarker
+al 00C562 .SetSerialUpdateSelector05
+al 00C56E .SetSerialUpdateSelector
+al 00CB06 .CalculatePersistentRecordOffset
+al 00CB13 .CalculateReferenceRecordOffset
+al 00C503 .C503_ShiftLoop
+al 00C4FC .C4FC_CompareLimit
+al 00C4F7 .C4F7_AddSaved
+al 00C50B .C50B_SubtractLimit
+al 00C4E4 .C4E4_Overflow
+al 00C4E8 .C4E8_DifferenceReady
+al 00C4DC .C4DC_Accumulate
+al 00C4C6 .C4C6_ReferenceDifference
+al 00C522 .LoadReferenceTriplet
+al 00C4CC .C4CC_CalculateValue
+al 00C512 .C512_FinalizeValue
+al 00C49E .C49E_CopyTriplet
+al 00C4AD .C4AD_CheckReference
+al 00C4A9 .C4A9_ValueAccepted
+al 00C49A .C49A_FirstDifference
+al 00C53A .LoadPersistentTriplet
+al 00C482 .@store_state
+al 00CAFA .StateHelperCAFA
+al 00C477 .@advance
+al 00C464 .SharedReturnC464
+al 00C462 .@store
+al 00CC6B .StateSequenceStep3
+al 00C44E .State0CSetComplete
+al 00C43D .NmiState0C
+al 00C447 .ContinueAsyncHandshake
+al 00EC3B .CopyWorkingBufferToPersistentEC3B
+al 00C42A .@copy_record_tails
+al 00C454 .StateHandshakeReturn
+al 00C450 .StateHandshakeComplete
+al 00C41C .NmiState0D
+al 00C409 .InitializeSprite0
+al 00C3F3 .InitializeSelectionMarker
+al 00CA85 .ResetRuntimeZeroPagePreserveSelection
+al 00C3E4 .@choice5
+al 00C3D5 .@higher_choice
+al 00C3D2 .@enter_sequence
+al 00C3EA .@move_vertical_marker
+al 00C3BD .NmiState08
+al 00C411 .SetSprite0X
+al 00C3AF .AdvanceNmiStateAndEnterNmiSequence
+al 00C3B8 .MoveHorizontalMarker
+al 00C395 .NmiState01
+al 00C3B1 .EnterNmiSequenceMode
+al 00C3EF .SetSprite0Y
+al 00C36A .@selection_done
+al 00C7DE .UpdateMenuSelection
+al 00C389 .@finish_select
+al 00C359 .@select
+al 00C339 .@wait
+al 00C32B .ResetRuntimePpuFieldsC32F
+al 00D23B .ProcessTwoIndexedEntries
+al 00D255 .FillOamShadowWithF8
+al 00C2F0 .@wait
+al 00D24F .DisablePpuRendering
+al 00C2EC .@sequence_abort
+al 00C2D9 .@advance_index
+al 00C2D3 .@have_fb
+al 00C2BD .@alternate_init
+al 00C2ED .@sequence_mode
+al 00D3C1 .ProcessPpuUpdateStream
+al 00C281 .ProcessPpuUpdateByIndex
+al 00C2A9 .DispatchNmiState
+al 00F844 .UpdateAudio
+al 00D347 .ReadControllers
+al 00D310 .UpdateRuntimeCounters
+al 00C26F .@skip_timed
+al 00D14E .NmiRuntimeUpdate
+al 00D0AB .UpdateRiderLanePositionStates
+al 00C262 .@skip_optional
+al 00C27F .NmiPpuUpdate
+al 00C24B .@skip_mask
+al 00C23B .NMI
+al 00C22D .@tails
+al 00C210 .@buf
+al 00C1FF .@copy
+al 00C739 .ReceiveRuntimeDataCode
+al 00C339 .WaitForVblankEndAndEnableNmi
+al 00C1ED .@finish
+al 00C6C8 .TransmitRuntimeDataCode
+al 00C1F7 .@alternate
+al 00C32F .DisableNmi
+al 00D326 .ShiftRuntimeState
+al 00C1D8 .@main
+al 00C333 .SetPpuControl
+al 00C318 .InitializeRuntimePpuState
+al 00C1FD .InitializePersistentRam
+al 00C1B5 .@clear_ram
+al 00C1AE .@clear_select
+al 00C195 .@vblank2
+al 00C18E .@vblank1
+al 00C184 .Reset
+al 00C180 .ExpectedReceiveHeaderC180
+al 00C17F .ReceiveHeaderTableBaseC17F
+al 00C178 .RuntimeOamTemplateC178
+al 00C174 .DataC174
+al 00C170 .State0318TableC170
+al 00C16A .State0317TableC16A
+al 00C166 .State0316TableC166
+al 00C160 .State0315TableC160
+al 00C158 .DataC158
+al 00C150 .Copy02C0TemplateC150
+al 00C147 .Initialize02C0EntryTableC147
+al 00C142 .DataC142
+al 00C13C .Prepare0300StructureTemplateC13C
+al 00C134 .StateSequenceStep2Template
+al 00C130 .NmiSequenceStepPointerHigh
+al 00C12C .NmiSequenceStepPointerLow
+al 00C111 .PpuUpdatePointerHigh
+al 00C0F6 .PpuUpdatePointerLow
+al 00C0ED .IndexedParameterTableC0ED
+al 00C0EC .IndexedParameterTableC0EC
+al 00C0E8 .SequencePointerOffsetTable
+al 00C0E5 .SequenceFlagsTable
+al 00C0E2 .SequenceParameter02Table
+al 00C0DE .SequenceLimitTable
+al 00C0DA .SequencePositionTable
+al 00C0D8 .DataC0D8
+al 00C0D4 .SlotTimerReloadTable
+al 00C0D1 .Slot94BoundaryTable
+al 00C0CE .Slot90BoundaryTable
+al 00C0CC .SlotPositionThresholdTable
+al 00C0CA .SlotACAlternateTargetTable
+al 00C0C8 .SlotACTargetTableC0C8
+al 00C0C4 .DataC0C4
+al 00C0C0 .DataC0C0
+al 00C0BC .SlotPositionAddTableC0BC
+al 00C0B8 .DataC0B8
+al 00C0B4 .DataC0B4
+al 00C0B0 .DataC0B0
+al 00C091 .PersistentRecordInitialDataC091
+al 00C090 .DataC090
+al 00C08B .MenuVerticalYTableC08B
+al 00C088 .Sprite0InitialXTableC088
+al 00C083 .MenuHorizontalXTableC083
+al 00C080 .MenuInitialYTable
+al 00C586 .RestoreWorkingRecordFields
+al 00C07A .NmiSequence7C07A
+al 00C076 .NmiSequence8C076
+al 00C070 .NmiSequence6C070
+al 00C064 .NmiSequence5C064
+al 00C5AC .Prepare0300Structure
+al 00C571 .SetSerialUpdateSelector09
+al 00C05C .NmiSequence4C05C
+al 00C485 .CompareAndUpdateRecord
+al 00C5A7 .CallC92CWithZero
+al 00C455 .SelectNmiUpdateForState
+al 00C56A .SetSerialUpdateSelector04
+al 00C052 .NmiSequence3C052
+al 00C875 .InitializeGameRuntime
+al 00C566 .SetSerialUpdateSelector0E
+al 00C5A3 .SetSerialUpdateSelector17
+al 00C820 .InitializeCourseRuntime
+al 00C869 .ClearRuntimeZeroPage
+al 00C551 .SerialUpdateSelectorCluster
+al 00C046 .NmiSequence2C046
+al 00C55E .SetSerialUpdateSelector06
+al 00C040 .NmiSequence1C040
+al 00C03C .NmiSequence0C03C
+al 00C033 .NmiSequencePointerHigh
+al 00C02A .NmiSequencePointerLow
+al 00C01C .NmiStateToSequenceIndex
+al 00C97C .UpdateRaceRuntime
+al 00C465 .NmiState04_07
+al 00CB2C .DispatchNmiSequenceStep
+al 00C99A .UpdateGameplayRuntime
+al 00C346 .NmiState00
+al 00C000 .NmiStateHandlerTable
diff --git a/Excitebike (JU)/copilot/reconstructed.map b/Excitebike (JU)/copilot/reconstructed.map
new file mode 100644
index 0000000..1ad1cc6
--- /dev/null
+++ b/Excitebike (JU)/copilot/reconstructed.map	
@@ -0,0 +1,32 @@
+Modules list:
+-------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
+prg.o:
+    PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
+
+
+Segment list:
+-------------
+Name                   Start     End    Size  Align
+----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
+PRG                   00C000  00FFFF  004000  00001
+
+
+Exports list by name:
+---------------------
+
+
+
+Exports list by value:
+----------------------
+
+
+
+Imports list:
+-------------
+
diff --git a/Excitebike (JU)/copilot/reconstructed.nes b/Excitebike (JU)/copilot/reconstructed.nes
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diff --git a/Excitebike (JU)/copilot/reconstructed_prg.bin b/Excitebike (JU)/copilot/reconstructed_prg.bin
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diff --git a/Excitebike (JU)/copilot/rom.nes b/Excitebike (JU)/copilot/rom.nes
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--- /dev/null
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@@ -0,0 +1 @@
+../rom.nes
\ No newline at end of file
diff --git a/OVERVIEW.md b/OVERVIEW.md
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+++ b/OVERVIEW.md
@@ -0,0 +1,148 @@
+# Disassembly Project Index — /home/tmerritt/Projects/disassembly/
+
+This document provides a consolidated overview of all NES disassembly projects in this directory. Each project has its own folder containing a `copilot/` subdirectory with the full source, build tooling, and an individual `OVERVIEW.md` with a detailed power-on execution flow analysis.
+
+---
+
+## Project Inventory
+
+| # | Project | Region/Version | PRG Size | CHR Size | Mirroring | Build Status | Vectors (NMI / RESET / IRQ) |
+|---|---------|----------------|----------|----------|-----------|--------------|------------------------------|
+| 1 | Balloon Fight (JU) | Japan | 16 KB | 8 KB | Horizontal | BYTE-IDENTICAL | $C094 / $C000 / $C0F7 |
+| 2 | Baseball (UE) | USA/Europe | 16 KB | 8 KB | Horizontal | BYTE-IDENTICAL | $C046 / $C40B / $C43E |
+| 3 | Bomberman (U) | USA | 16 KB | 8 KB | Vertical | BYTE-IDENTICAL | $C01A / $C000 / $FFF9 |
+| 4 | Burger Time (U) | USA | 16 KB | 8 KB | Horizontal | BYTE-IDENTICAL | $C046 / $C40B / $C43E |
+| 5 | Clu Clu Land (JU) | Japan | 16 KB | 8 KB | Horizontal | BYTE-IDENTICAL | $C1F1 / $C000 / $FFF9 |
+| 6 | Defender 2 (U) | USA | 16 KB | 8 KB | Vertical | BYTE-IDENTICAL | $CAA1 / $C983 / $CA9E |
+| 7 | Excitebike (JU) | Japan | 16 KB | 8 KB | Vertical | BYTE-IDENTICAL | $C1F1 / $FD24 / $FD24 |
+| 8 | Tennis (JU) | Japan | 16 KB | 8 KB | Vertical | BYTE-IDENTICAL | $C07D / $C000 / $C000 |
+
+---
+
+## Per-Project Details
+
+### 1. Balloon Fight (JU)
+- **Folder:** `Balloon Fight (JU)/`
+- **ROM:** `balloon.nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (8,538 lines)
+- **Linker:** PRG at $C000, 16 KB; single segment
+- **Vectors:** NMI → $C094 (`NmiHandler`), RESET → $C000 (`Reset`), IRQ → $C0F7 (`IrqHandler`, self-loop)
+- **Key subsystems:** NMI-driven frame loop with PPU command buffer, round spawner ($C790), bonus objects ($CB74), carrier/rescue sequence ($C6F9), particle system ($CDAA), sound driver ($FFF7 banked)
+- **Build fix:** None needed; byte-identical out of the box
+- **Details:** `Balloon Fight (JU)/OVERVIEW.md`
+
+### 2. Baseball (UE)
+- **Folder:** `Baseball (UE)/`
+- **ROM:** `baseball.nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (21,624 lines — largest source)
+- **Linker:** PRG at $C000, 16 KB; single segment
+- **Vectors:** NMI → $C046 (`NMI`), RESET → $C40B (`Reset`), IRQ → $C43E (`IRQ`, `rti`)
+- **Key subsystems:** Queued event system ($EB66–$EB9C) as the main frame driver, round/state machine ($C5FE), batting/pitching ($C6044–$C6414), object sorting ($C339), sound driver ($F9D0–$FE2x)
+- **Build fix:** None needed; byte-identical out of the box
+- **Details:** `Baseball (UE)/OVERVIEW.md`
+
+### 3. Bomberman (U)
+- **Folder:** `Bomberman (U)/`
+- **ROM:** `bomberman.nes` (24,592 bytes)
+- **Source:** `copilot/main.s` (8,070 lines)
+- **Linker:** HEADER at $0000 (16 bytes), PRG at $C000 (16 KB), CHR at $0000 (8 KB)
+- **Vectors:** NMI → $C01A (`NmiHandler`), RESET → $C000 (`Reset`), IRQ → $FFF9 (`IrqHandler`, `rti`)
+- **Key subsystems:** NMI-driven PPU command queue and VRAM transfers, main loop at $C368 with state dispatch table ($C75D), bomb/object object slots (80 slots at $03E6), sound driver ($E642–$FE2x) with dispatch table ($E6AD)
+- **Build fix:** One-byte mismatch at CPU $E70C (`dec $E4` vs `dec $54`) — resolved by adding `RandomStateAlt = $E4` to `locals.inc` alongside `RandomState0 = $54` (zero-page reuse); also renamed `ControllerState` → `ControllerState1`, `Main_HandleControl_C368` → `MainGameLoop`, `Gameplay_HandleControl_C79D` → `GameplayUpdate`, `Sound_HandleControl_E65F` → `SoundUpdate`
+- **Details:** `Bomberman (U)/OVERVIEW.md`
+
+### 4. Burger Time (U)
+- **Folder:** `Burger Time (U)/`
+- **ROM:** `Burger Time (U) [!].nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (9,323 lines), `copilot/header.s`, `copilot/chr.s`
+- **Linker:** HEADER, PRG at $C000 (0x3FFA), VECTORS at $FFFA, CHR
+- **Vectors:** NMI → $C046 (`NmiHandler`), RESET → $C40B (`ResetHandler`), IRQ → $C43E (`IrqHandler`)
+- **Key subsystems:** Event-driven main loop via `CommonEngineExit` ($EB6A) and queued events ($EB9D), title screen / round state machine ($C5FE), object arrays ($03E6 state, $0436/$0486 position), audio engine ($F9D0–$FE2x) with music sequencer ($FD34)
+- **Build fix:** None needed; byte-identical. Requires symlink `burger_time.nes → "../Burger Time (U) [!].nes"` due to spaces in ROM filename
+- **Details:** `Burger Time (U)/OVERVIEW.md`
+
+### 5. Clu Clu Land (JU)
+- **Folder:** `Clu Clu Land (JU)/`
+- **ROM:** `rom.nes` (24,592 bytes)
+- **Source:** `copilot/main.s` (9,150 lines)
+- **Linker:** PRG at $C000, 16 KB; single segment (no separate HEADER/CHR segments in cfg, but CHR data is embedded inline at end of prg.s)
+- **Vectors:** NMI → $C1F1 (`NMIHandler`), RESET → $C000 (`ResetEntry`), IRQ → $C196 (`IrqHandler`, reuses Reset)
+- **Key subsystems:** State-machine main loop via dispatch table at $C000–$C00D, NMI-driven PPU command queue + VRAM transfers, object pools ($03E6 state, $0436/$0486 position), sound driver ($E642–$F7C0) with dispatch table ($E6AD)
+- **Build fix:** One `bpl` branch to undefined label at CPU $FAB4 — replaced with `bne *-$1B` to produce original `d0 e3` bytes (disassembler mislabeled `bne` as `bpl`)
+- **Details:** `Clu Clu Land (JU)/OVERVIEW.md`
+
+### 6. Defender 2 (U)
+- **Folder:** `Defender 2 (U)/`
+- **ROM:** `Defender 2 (U).nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (11,905 lines)
+- **Linker:** HEADER at $0000 (16 bytes), PRG at $C000 (0x3FFA), VECTORS at $FFFA, CHR at $0000
+- **Vectors:** NMI → $CAA1 (`NmiHandler`), RESET → $C983 (`ResetHandler`), IRQ → $CA9E (`IrqHandler`, reuses Reset)
+- **Key subsystems:** Event-driven main loop (`UpdateSideScrollingGameplay_CA6A` at $CA6A) waiting on NMI flag, side-scrolling gameplay ($C073–$C324 family), PPU streaming ($F20B–$F7C0), audio engine ($E642–$F7C0) with dispatch table ($E6AD)
+- **Build fix:** Same `bpl` → `bne *-$1B` fix at CPU $E811 as Clu Clu Land (disassembler mislabeled `bne` as `bpl`)
+- **Details:** `Defender 2 (U)/OVERVIEW.md`
+
+### 7. Excitebike (JU)
+- **Folder:** `Excitebike (JU)/`
+- **ROM:** `rom.nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (14,111 lines)
+- **Linker:** PRG at $C000, 16 KB; single segment
+- **Vectors:** NMI → $C23B (`NMI`), RESET → $C184 (`Reset`), IRQ → $FFF0 (points into audio data region — likely placeholder/unused)
+- **Key subsystems:** NMI-driven state machine with dispatch table at $C000–$C00D (14 states), title/menu system ($C346–$C454), gameplay update chain ($C99A), race update ($C8D6), audio engine ($F8DE) with 4 channels + SFX, serial I/O over controller port $4016
+- **Build fix:** Same `bpl` → `bne *-$1B` fix at CPU $FAB4 (same pattern as Clu Clu Land/Defender 2)
+- **Details:** `Excitebike (JU)/OVERVIEW.md`
+
+### 8. Tennis (JU)
+- **Folder:** `Tennis (JU)/`
+- **ROM:** `Tennis (JU).nes` (24,592 bytes)
+- **Source:** `copilot/prg.s` (9,268 lines)
+- **Linker:** PRG at $C000, 16 KB; single segment
+- **Vectors:** NMI → $C07D (`NmiHandler`), RESET → $C000 (`Reset`), IRQ → $C000 (`Reset` reused)
+- **Key subsystems:** NMI-synchronized main loop (`MainLoop` at $C04F), game state machine via `MainStateHandlerTable` ($C101, 12 states), game mode state machine via `GameModeStateTable` ($CAD7, 8 states), object/sprite system with fixed-point physics, audio engine ($F8DE) with serial I/O over controller port
+- **Build fix:** None needed; byte-identical out of the box
+- **Details:** `Tennis (JU)/OVERVIEW.md`
+
+---
+
+## Common Patterns Across All Projects
+
+### Memory Map
+Every project uses a single 16 KB PRG bank mapped at CPU **$C000–$FFFF**, with 8 KB CHR. All builds are NROM (no bank switching).
+
+### Interrupt Structure
+All projects follow the same NES interrupt pattern:
+- **NMI** fires once per frame and is the real-time heartbeat — handles OAM DMA, PPU updates, controller reading, and audio.
+- **RESET** performs cold-start hardware init, RAM clearing, and enters the main loop.
+- **IRQ** is almost always unused (either `rti` or a self-loop).
+
+### Build Toolchain
+All projects use the same toolchain:
+- **ca65** (6502 assembler)
+- **ld65** (linker with `.cfg` memory map)
+- All rebuilds are verified **byte-identical** to the original `prg.bin` / ROM PRG bank.
+
+### Disassembly Style
+All sources are "Pass-1" style disassemblies:
+- Every instruction annotated with PRG offset, CPU address, and emitted bytes
+- Inline `.byte`/`.word`/`.res` data blocks interleaved with code
+- Address-based labels (`Label_Cxxxx`, `Sub_Cxxxx`, `EngineRoutine_Cxxxx`) where semantics are not yet resolved
+- Zero-page symbol files (`locals.inc`) and hardware symbol files (`symbols.inc`)
+
+---
+
+## Navigation
+
+Each project folder contains:
+- `copilot/` — disassembly source, build config, and build artifacts
+- `copilot/OVERVIEW.md` — detailed per-project power-on execution flow analysis
+- `<rom>.nes` — original NES ROM image (for reference)
+
+To rebuild any project:
+```bash
+cd /home/tmerritt/Projects/disassembly/<Project>/copilot
+make
+```
+
+To verify byte-identity:
+```bash
+make verify   # (where supported by the Makefile)
+```
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/OVERVIEW.md b/Pac-Man (USA) (Namco)/OVERVIEW.md
new file mode 100644
index 0000000..74392be
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@@ -0,0 +1,467 @@
+# Pac-Man (USA) (Namco) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Pac-Man (USA) (Namco) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Vertical |
+| PRG bank start | CPU $C000 |
+| Source file | `copilot/prg.s` (14,332 lines) |
+| Output | `reconstructed_prg.bin` (16,384 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $C10E | `NmiHandler` |
+| RESET | $C033 | `Reset` |
+| IRQ / BRK | $C17E | `IrqHandler` (just `rti` — unused) |
+
+Additional ROM data at $FFF6–$FFF9:
+- $FFF6/$FFF7 = $ECEC (little-endian), used by `DrawMazeNametable` as a source pointer ($00/$01)
+- $FFF8/$FFF9 = $C10E (little-endian)
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles `prg.s` with `ca65`, links with `ld65`, and verifies against `prg.bin`.
+
+**Verification result: BYTE-IDENTICAL** — `reconstructed_prg.bin` matches `prg.bin` exactly (all 16,384 bytes), and `prg.bin` matches the PRG bank of `rom.nes` (skipping the 16-byte iNES header).
+
+---
+
+## 3. Reset — CPU $FFFC → $C033
+
+**`Reset`** ($C033)
+
+On power-on or reset:
+
+1. `ldx #$00 / stx PPUCTRL` — disable PPU rendering/NMI.
+2. `sei / cld` — disable maskable interrupts, clear decimal mode.
+3. `dex / txs` — initialize stack pointer to $FF.
+4. `nop x3` — three NOP padding bytes.
+5. **Wait for two VBlanks** — `@WaitForPpu` loop: set PPUMASK=$06, poll PPUSTATUS bit 7 twice (X counts down from 2). This is the PPU warm-up delay.
+6. **Clear low RAM** — `@ClearLowRam`: zero $0000–$003D.
+7. **Clear RAM pages** — `@ClearRamPages`: using indirect pointer at $00/$01, clear pages starting at $0100 upward until high byte reaches $08 (effectively clearing $0100–$07FF).
+8. `PPUMASK=$06`, scroll=$00 — enable background + sprites, reset scroll.
+9. **Warm-start signature check** — `@CheckRamSignature`: compare RAM at $0052 against the 15-byte string `"HIROKI AOYAGI"` plus `$AA,$55` (stored at `RamSignature`, $C354–$C366):
+   - If all 15 bytes match → warm start: skip full RAM clear, go to `@SignatureAlreadyPresent`.
+   - If any byte differs → cold start: `@InitializeRamSignature` clears all of zero page, then copies the signature string to $0052–$0060.
+10. Set $64=$01 (some flag), set gameState=$00.
+11. Set $45=$07, then check cocktail/active-player flags at $46/$47. If both nonzero, perform a 16-byte swap loop (`@SwapLoop`) swapping bytes between $67,y and $77,y for Y=0..15.
+12. `APUCTRL=$1F`, `APUFRAMECNT=$C0` — enable all APU channels, set frame counter mode.
+13. `jsr InitializeAudioEngine` ($E1F8 region) — clear audio request/channel state.
+14. `jsr $EEB4` — audio/sound engine init.
+15. Set PPUCTRL=$88, `ppuCtrlShadow`=$88 — enable NMI, $2000 nametable base.
+16. Set $48=$FF (gameplay suspended flag), clear $023F and $024B (PPU update buffers).
+17. Set $36=$01 (some state flag).
+18. `jmp MainEntry` — transfer control to the main program.
+
+**`RamSignature`** ($C354): `.byte "HIROKI AOYAGI", $AA, $55` — developer credit / warm-start validation signature.
+
+---
+
+## 4. NMI / Frame Heartbeat — `NmiHandler` ($C10E)
+
+The NMI fires once per frame and is the central real-time driver:
+
+1. **Save registers** (A, X, Y on stack).
+2. **PPUMASK=$1E** — enable background + sprites with specific emphasis settings.
+3. **OAM DMA**: write $00 to OAMADDR ($2003), $00 to $40, then `lda $45 / sta OAMDMA` ($4014) — DMA from page $45 (i.e., $4500–$45FF) to sprite RAM.
+4. **`jsr FlushGameplayPpuUpdates`** ($DE3B region) — flush pending PPU gameplay update blocks at $023F and $0245.
+5. **`jsr ReadNearbyNametableTiles`** — read nametable tile data around Pac-Man (likely for collision/tunnel logic).
+6. **`jsr UpdatePalettes`** — upload palette data from RAM buffers $0299 and $02A9 to PPU palette $3F00/$3F10 when those buffers are marked active ($0F marker).
+7. **Restore scroll**: write $41 and $42 to PPUSCROLL (two writes — horizontal then vertical).
+8. **Construct PPUCTRL**: `lda $47 / and $46 / and #$01 / asl / ora $43` — builds the PPUCTRL value from shadow/flag bits, writes to PPUCTRL.
+9. **Controller strobe**: write $01 then $00 to JOY1 ($4016).
+10. **Read both controllers** — 8 iterations each:
+    - Controller 1: read JOY1, mask with #$03, compare with #$01, rotate into $4D (`currentInput`).
+    - Controller 2: read `APUFRAMECNT` ($4017), mask with #$03, compare with #$01, rotate into $4E.
+11. **Select active controller**: X = `currentInput` ($4D) by default; if `cocktailModeFlag` ($46) & `activePlayerFlag` ($47) both nonzero, X = `newlyPressedInput` ($4E). Store X to `previousInput` ($4F).
+12. **`inc frameCounter`** ($4B) — increment per-frame counter.
+13. **$48 gate**: if $48 (`gameplaySuspended`) != 0, skip to `@NmiDone`.
+14. **`jsr InitializeAudioChannels`** — scan and activate audio channel slots.
+15. **`@NmiDone`**: restore registers (Y, X, A), `rti`.
+
+The label `IrqHandler` appears at the `rti` following NMI's register restore — it is the same code address, just an alternate entry label for the IRQ vector (which points to the same `rti`).
+
+### `UpdatePalettes`
+Conditionally uploads 16-byte palette blocks from RAM $0299 (to PPU $3F00) and $02A9 (to PPU $3F10) when the corresponding buffer marker byte equals $0F. After upload, resets the marker and PPU address to $3000.
+
+---
+
+## 5. Main Entry — `MainEntry` ($C573)
+
+After Reset, control transfers to `MainEntry`. This is the foreground state-machine entry:
+
+1. **`$40=$01`** — set the NMI sync flag (NMI will clear it each frame).
+2. **`@WaitForInitialNmi`** — spin until NMI clears $40 to $00 (synchronize to first VBlank).
+3. **PPUCTRL=$88 / ppuCtrlShadow=$88** — enable NMI.
+4. **PPUMASK=$00** — disable rendering.
+5. **Clear OAM page** — fill $0700–$07FF with 0.
+6. `cocktailModeFlag=$00`, then call:
+   - `jsr ClearGameplayNametables`
+   - `jsr InitializeNametableAttributes`
+   - `jsr InitializeNametableData`
+   - `jsr $E419` — additional init (address-named).
+7. **Initialize palette buffers** — copy 32 bytes from `TitleScreenPalette` to RAM $0299–$02B8.
+8. Set `actorStatusDisplay` ($6C–$6F) = $2D, set $023F=$FF, `gameplaySuspended`=$FF.
+9. Clear $47, $46, $42, $41, `stateTimer` ($4C), $87, $88.
+10. **PPUCTRL selection**: if `gameState` ($3F) != 0, use $8A; else use $8A as well (both paths end up with $8A; the `bne` is effectively a no-op in current code). Write to PPUCTRL and `ppuCtrlShadow`.
+11. **`MainDispatchLoop`** ($C645):
+    - `$40=$01`, spin until NMI clears it (`@WaitForNmi`).
+    - `Y = gameState` ($3F), load 16-bit handler address from `MainStateHandlerTable` ($C267) into $10/$11.
+    - `jmp ($0010)` — indirect jump to the state handler.
+
+**`MainStateHandlerTable`** ($C267–$C26E) — 4 entries, indexed by `gameState` as a byte offset (even values $00, $02, $04, $06):
+
+| Offset | Handler | Description |
+|--------|---------|-------------|
+| $00 | `InitialStateHandler` | Title/input-wait state |
+| $02 | `PlayerSelectionState` | 1P/2P selection |
+| $04 | `State04Handler` | Substate dispatch machine |
+| $06 | `TimedStateTransition` | Timed state transition |
+
+---
+
+## 6. Main State Handlers
+
+### `TimedStateTransition` ($C27A) — state offset $06
+- Decrement `$0F` countdown. If nonzero, return to `MainDispatchLoop`.
+- When zero: set `gameState`=$02, return to `MainDispatchLoop`.
+- This is a timed transitional state: another state places a duration in `$0F` and selects state $06; this handler counts down before advancing to state $02.
+
+### `InitialStateHandler` ($C27A region, actually at $C27A? No — at $C27A is TimedStateTransition; InitialStateHandler is at $C27A? Let me re-check)
+
+Actually from the listing:
+- `TimedStateTransition` is at $C27A
+- `InitialStateHandler` is at $C27A? No. Let me re-read:
+
+Line 730: `TimedStateTransition:` is at $C27A (based on comment "$C27A-$C2A5: Timed State Transition Handler" — wait, the comment says $C27A but the code shows `dec $0F` at line 731. Then line 740: `; $C27A-$C2A5: Initial/Input State Handler` and line 766: `InitialStateHandler:`.
+
+So there's a discrepancy in comments. The actual code:
+- `TimedStateTransition` = `dec $0F / bne MainDispatchLoop / lda #$02 / sta gameState / jmp MainDispatchLoop` — this is state $06's handler.
+- `InitialStateHandler` = checks controller bits $0C; if set → gameState=$06, $0F=$5A, jump MainEntry. Else increment $42; if $42 reaches $F0 → reset $42, ppuCtrlShadow=$88, gameState=$06, $0F=$5A. Otherwise return to MainDispatchLoop.
+
+### `PlayerSelectionState` ($C546 region) — state offset $02
+- If $87|$88 != 0 → `@AdvanceTimeout` (16-bit timeout counter).
+- Else (first entry): copy `PlayerCountSelectionDisplayData` ($C507–$C50E) to RAM $024B until $FF terminator. Capture controller bits $04 and $08 into `pacmanRequestedDirection` ($50) and `pacmanDirection` ($51).
+- `@AdvanceTimeout`: increment 16-bit counter at $87/$88. If high byte reaches $02 → reset counter, set gameState=$04, jump MainDispatchLoop.
+- `@CheckSelectionInput`: if controller bit $04 changed → store as `pacmanRequestedDirection`, reset counter, set $87=$01, toggle `activePlayerFlag` ($47) between 0/1, update display marker tiles at $024D/$0251 from `PlayerCountSelectionMarkerTiles` ($C50F–$C511).
+- `@CheckConfirmInput`: if controller bit $08 changed → store as `pacmanDirection`. If bit $08 now active → clear `gameplaySuspended`, `jsr $EEB4`, jump `GameModeEntry`.
+
+**`PlayerCountSelectionDisplayData`** ($C507): `$22,$0A,$5C,$00, $22,$4A,$20,$FF` — copied to $024B on entry.
+**`PlayerCountSelectionMarkerTiles`** ($C50F): `$5C,$20,$5C` — selection marker toggle data.
+
+### `State04Handler` ($C52E region) — state offset $04
+- If controller bits $0C set → gameState=$02, jump MainEntry (restart).
+- Else: `Y = $87` (substate offset), load 16-bit handler from `State04SubstateTable` ($C52E), jump indirect via $10/$11.
+
+**`State04SubstateTable`** ($C52E) — 12 entries indexed by even offsets $00–$16:
+
+| Offset | Handler |
+|--------|---------|
+| $00 | `State04Initialize` |
+| $02–$12 | `State04TimedSubstate` (shared, 6 entries) |
+| $14 | `State04LongDelay` |
+| $16 | `State04FinalPhase` |
+
+- `State04Initialize` ($C573): sync to NMI via $40, PPUCTRL=$08, disable rendering, clear $88, call `$C5D8`, `InitializeState04PpuData` ($C608), `LoadState04DisplayData` ($C5A6), advance $87 by 2, PPUCTRL=$88, return to loop.
+- `State04TimedSubstate` ($C589): increment $88; at $30 frames → clear $88, call `$C5A6`, advance $87 by 2.
+- `State04LongDelay` ($C5A6): increment $88; at $80 frames → advance $87 by 2 to substate $16.
+- `State04FinalPhase` ($C5D7): sets $47=$01, tail-jumps to `GameModeEntry`.
+- `SetSelectionFlagAndContinue` ($C5D7): `activePlayerFlag=$01`, `jmp GameModeEntry`.
+
+### `LoadState04DisplayData` ($C5A6)
+Uses $87 as offset into `CharacterIntroDisplayDataTable` ($C687), copies $FF-terminated stream to RAM $024B. Optional secondary copy of 16 bytes from `CharacterIntroSpriteData` based on substate offset.
+
+**`CharacterIntroDisplayDataTable`** ($C687) — 10 pointers to display streams for characters/nicknames (SHADOW, BLINKY, SPEEDY, PINKY, etc.) plus scoring legend.
+
+---
+
+## 7. Game Mode Entry — `GameModeEntry` ($C328)
+
+Reached from `SetSelectionFlagAndContinue` (state $04 final phase). This transitions from the attract/selection sequence into gameplay:
+
+1. PPUCTRL=$88, ppuCtrlShadow=$88.
+2. Wait for VBlank.
+3. PPUMASK=$00, gameState=$00, cocktailModeFlag=$00, $69=$00, $4A=$00.
+4. `jsr ClearGameplayNametables`, `jsr DrawGameplayHudLabels`, `jsr DrawGameplayScoreFields`.
+5. If `gameplaySuspended` != 0 → roundNumber=$01 (continue existing game).
+6. Else → clear 32 bytes starting at roundNumber ($67–$86), set roundNumber=$03, $77=$03, clear $0600/$0601.
+7. Common init: roundDisplayValue=$FF, $78=$FF, $0245=$FF, ppuCtrlShadow=$88, PPUCTRL=$88.
+8. **`GameModeFrameSync`** ($C360): `$40=$01`, wait for NMI clear ($@WaitForNmi`), then:
+   - If `gameplaySuspended` != 0 AND controller bits $0C set → gameState=$02, jump MainEntry (restart).
+   - If `stateTimer` ($4C) != 0 → decrement, return to `@WaitForNextFrame`.
+   - Else `@DispatchState`: `Y = gameState`, load handler from `GameModeStateTable` ($CAD7) into $10/$11, indirect jump.
+
+**`GameModeStateTable`** ($CAD7) — 8 entries indexed by even offsets $00–$0E:
+
+| Offset | Handler |
+|--------|---------|
+| $00 | `GameModeState00` |
+| $02 | `GameModeState02` |
+| $04 | `GameModeState04` |
+| $06 | `GameModeState06` |
+| $08 | `GameModeState08` |
+| $0A | `GameModeState0A` |
+| $0C | `GameModeState0C` |
+| $0E | `InitializeGameplayTransitionState` |
+
+### `GameModeState04` ($CAE9) — pause/per-frame handler
+- If $060F != 0 → return to `GameModeFrameSync`.
+- Else: edge-detect controller bit $08 using $49 as previous state. On new press → increment $4A, install pause display commands at $024B, toggle pause display via bit 0 of $4A.
+- When not paused and bit 0 of $4A clear → call gameplay helper chain before returning to `GameModeFrameSync`.
+- Adjacent data at $CB5B contains tile values for "PAUSE" text — confirms this is the pause-state handler.
+
+---
+
+## 8. PPU / Rendering
+
+### `DrawMazeNametable` ($E2E4)
+Draws the maze nametable using compressed data:
+- PPU destination selected based on cocktail mode ($47 & $46): $2000 or $2080.
+- Source pointer from `MazeDataPointerBytes` at $FFF6–$FFF7 ($ECEC → points to ROM data).
+- Each row: set PPU address, decode 2-bit-run-length-encoded bytes from the source (2 bits = repeat count-1, 6 bits = tile value), write $16 (22) bytes per row.
+- Advance PPU destination by $20 per row.
+
+### `FlushGameplayPpuUpdates` ($DE3B)
+- If $48 (`gameplaySuspended`) == 0 → process update block at $023F (6 bytes + terminator to PPU).
+- Else → jump to `UpdateAnimatedGameplayPpuFields`.
+- Block at $0245 processed similarly if nonzero.
+
+---
+
+## 9. Audio System
+
+**`InitializeAudioEngine`** ($E1F8):
+- Clear audio request pointer ($F0/$F1 = $0006), channel table pointer ($F2/$F3 = $0620), sequence table pointer from ROM $F100/$F101.
+- audioWorkValue=$40, APUSTATUS=$1F, APUFRAMECNT=$C0.
+- Clear 16 bytes through ($F0), clear 16 entries at 8-byte stride through ($F2).
+
+**`InitializeAudioChannels`** ($EED0):
+- Clear audio channel flags and work values, scan 16 eight-byte slots through ($F2).
+- Slots with values $01–$04 activate a channel: copy 4-byte parameters through indirect pointer $F6.
+- Falls through to runtime command processing at $EF2D.
+
+**`UpdateAudioChannels`** ($EF2D):
+- For each active slot: decrement countdown, fetch command byte from sequence table, decode command ($F0+ = special, $C0+ = delay, else = note/frequency), update APU registers ($4000–$400F).
+
+**`UpdateAudio`** ($F8DE):
+- APUFRAMECNT=$C0, update Pulse 1, Pulse 2, Noise, Sound Effect channels.
+- Clear $FF–$FB; if $07FF != 0 → APUDMALOAD, decrement $07FF.
+
+Audio data tables at $FF00–$FFF5 (period/mask tables), $FF64–$FFEA (sequences/instruments), $F450–$F49A (runtime command data).
+
+---
+
+## 10. Zero-Page / RAM Symbols
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $00–$01 | workPtr0/1 | General indirect pointers |
+| $02–$09 | workValue0–5 | General scratch values |
+| $0A | pathCompareValue | Maze pathfinding |
+| $0B | pathFallbackValue | Maze pathfinding |
+| $0C | legalDirections | Maze pathfinding |
+| $10 | dispatchVector | State dispatch indirect pointer |
+| $12–$15 | arithmeticValue/Operand | 16-bit arithmetic |
+| $1A–$2D | pacmanMotion–ghost4Motion | Actor motion records (4 bytes each) |
+| $2E–$2F | pacmanTargetRow/Column | Pac-Man maze target |
+| $32 | pacmanSpriteFrame | Pac-Man sprite frame |
+| $33 | ghostSpriteFrames | Ghost sprite frames |
+| $39 | ghostDirectionFlags | Ghost direction/control state |
+| $3F | gameState | Main gameplay state |
+| $40 | — | NMI sync flag ($01=pending, NMI clears to $00) |
+| $41 | ppuCtrlShadow | PPUCTRL mirror |
+| $42 | — | Second PPUSCROLL write |
+| $46 | cocktailModeFlag | Cocktail cabinet mode |
+| $47 | activePlayerFlag | Active player (0/1) |
+| $48 | gameplaySuspended | Gameplay suspended flag |
+| $4B | frameCounter | Per-frame counter |
+| $4C | stateTimer | State countdown timer |
+| $4D | currentInput | Controller 1 input |
+| $4E | newlyPressedInput | Newly pressed input |
+| $4F | previousInput | Previous input state |
+| $50 | pacmanRequestedDirection | Requested direction |
+| $51 | pacmanDirection | Current direction |
+| $61 | highScoreDigits | High score digits |
+| $67 | roundNumber | Round number |
+| $68 | roundDisplayValue | Round display value |
+| $6A | pelletsRemaining | Pellets remaining |
+| $6B | extraLifeAwarded | Extra life flag |
+| $6C–$6F | actorStatusDisplay | Actor status display |
+| $70 | playerScoreDigits | Player score digits |
+| $F0–$F7 | audioRequestPtr…audioWorkValue | Audio engine pointers/values |
+| $F8 | audioChannelFlags | Audio channel flags |
+| $FC | audioRequestIndex | Audio request index |
+| $FD | audioChannelOffset | Audio channel offset |
+| $FE–$FF | audioIndirectPtr | Audio indirect pointer |
+
+---
+
+## 11. Data Tables
+
+| Label | Address | Description |
+|-------|---------|-------------|
+| `CopyrightText` | $C004 | "COPYRIGHT 1980 1993 NAMCO LTD. ALL RIGHTS RESERVED" |
+| `RamSignature` | $C354 | `"HIROKI AOYAGI" $AA $55` — warm-start signature |
+| `MainStateHandlerTable` | $C267 | 4 main state handler pointers |
+| `State04SubstateTable` | $C52E | 12 state-$04 substate handler pointers |
+| `GameModeStateTable` | $CAD7 | 8 game-mode state handler pointers |
+| `CharacterIntroDisplayDataTable` | $C687 | 10 display data pointers for character intro |
+| `TitleScreenTileBlock` | $C326 | 6 rows × $17 bytes of title tile data |
+| `TitleScreenPpuRecords` | $C3B0 | 9 PPU update records for title screen |
+| `TitleScreenPalette` | $C43F | 32-byte initial palette |
+| `TitleScreenAttributeData` | $C45F | $18 attribute bytes |
+| `PlayerCountSelectionDisplayData` | $C507 | 8 bytes for player-count display |
+| `PlayerCountSelectionMarkerTiles` | $C50F | $5C,$20,$5C marker toggle |
+| `CharacterIntroPalette` | $C667 | 32-byte character intro palette |
+| `CharacterIntroDisplayDataTable` | $C687 | Character intro display pointers |
+| `CharacterNicknameHeaderData` | $C69B | "CHARACTER ; NICKNAME" display data |
+| `MazeDataPointerBytes` | $FFF6 | $EC,$EC,$0E,$C1 — maze data pointer ($C10E) |
+| Audio tables | $FF00–$FFEA | Period/mask tables, sequences, instruments |
+
+---
+
+## 12. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C033) ───────────────────────────────────────────────┐
+    │ sei, cld, disable PPU, wait 2× VBlank                   │
+    │ clear RAM $0000–$003D, clear pages $0100–$07FF          │
+    │ PPUMASK=$06, scroll=$00                                 │
+    │ check warm-start signature "HIROKI AOYAGI" + $AA,$55    │
+    │   valid → skip full clear; invalid → clear + save sig   │
+    │ set flags, optional 16-byte swap ($67↔$77)              │
+    │ APUCTRL=$1F, APUFRAMECNT=$C0                            │
+    │ jsr InitializeAudioEngine, jsr $EEB4                    │
+    │ PPUCTRL=$88 (NMI enabled), $48=$FF (suspended)          │
+    │ jmp MainEntry                                           │
+    │                                                         │
+MainEntry ($C573)                                             │
+    │ $40=$1, wait for NMI to clear it                        │
+    │ PPUCTRL=$88, PPUMASK=$00, clear OAM                     │
+    │ clear cocktail/player flags, $41/$42/$4C/$87/$88        │
+    │ init nametables, attributes, palette buffers            │
+    │ select PPUCTRL ($8A), set ppuCtrlShadow                 │
+    │                                                         │
+MainDispatchLoop ($C645) ─────────────────────────────────────┤
+    │ $40=$1, wait for NMI                                    │
+    │ Y = gameState ($3F)                                     │
+    │ load handler from MainStateHandlerTable ($C267)         │
+    │ jmp ($0010) → state handler                             │
+    │                                                         │
+    ├─ State $00: InitialStateHandler                         │
+    │   ├─ controller bits $0C → gameState=$06, $0F=$5A      │
+    │   │   → jump MainEntry (restart sync)                  │
+    │   └─ else inc $42; if $42==$F0 → reset, gameState=$06 │
+    │                                                         │
+    ├─ State $02: PlayerSelectionState                        │
+    │   ├─ 1P/2P selection via controller bits $04/$08       │
+    │   ├─ timeout ($87/$88 reaches $0200) → gameState=$04   │
+    │   └─ confirm (bit $08) → clear suspended, jsr $EEB4,   │
+    │       jmp GameModeEntry                                 │
+    │                                                         │
+    ├─ State $04: State04Handler                              │
+    │   ├─ controller bits $0C → gameState=$02, restart      │
+    │   └─ Y=$87 → dispatch via State04SubstateTable ($C52E) │
+    │       ├─ $00: State04Initialize (PPU setup, $87+=2)    │
+    │       ├─ $02–$12: State04TimedSubstate ($30 frames)    │
+    │       ├─ $14: State04LongDelay ($80 frames)            │
+    │       └─ $16: State04FinalPhase → $47=$1,              │
+    │           jmp GameModeEntry                             │
+    │                                                         │
+    └─ State $06: TimedStateTransition                        │
+        │ dec $0F; if nonzero → MainDispatchLoop              │
+        │ else gameState=$02 → MainDispatchLoop               │
+    │                                                         │
+    └─ loop back to MainDispatchLoop                          │
+    │                                                         │
+GameModeEntry ($C328) [from SetSelectionFlagAndContinue]      │
+    │                                                         │
+    ├─ PPUCTRL=$88, wait VBlank, PPUMASK=$00                  │
+    ├─ clear gameplay state, HUD labels, score fields         │
+    ├─ if not suspended: clear player state, roundNumber=$3   │
+    │   else: roundNumber=$1                                  │
+    ├─ common init: roundDisplayValue=$FF, PPUCTRL=$88       │
+    │                                                         │
+GameModeFrameSync ($C360) ────────────────────────────────────┤
+    │ $40=$1, wait for NMI                                    │
+    │                                                         │
+    ├─ if suspended && controller bits $0C → gameState=$02,  │
+    │   jmp MainEntry (restart)                               │
+    │                                                         │
+    ├─ if stateTimer != 0 → dec, return to @WaitForNextFrame │
+    │                                                         │
+    └─ Y = gameState → dispatch via GameModeStateTable ($CAD7)│
+        │                                                     │
+        ├─ $00: GameModeState00                               │
+        ├─ $02: GameModeState02                               │
+        ├─ $04: GameModeState04 (pause/input handler)         │
+        │     ├─ $060F != 0 → return to frame sync            │
+        │     ├─ edge-detect controller bit $08 ($49)         │
+        │     │   → new press: inc $4A, install pause cmds   │
+        │     │   → bit 0 of $4A toggles pause display        │
+        │     └─ not paused, bit0 of $4A clear → gameplay     │
+        │       helper chain → return to frame sync           │
+        ├─ $06–$0C: GameModeState06/08/0A/0C                  │
+        └─ $0E: InitializeGameplayTransitionState             │
+        │                                                     │
+        └─ loop back to GameModeFrameSync                     │
+    │                                                         │
+    └─ (eventually enters gameplay via $0E handler)           │
+                                                              │
+NMI ($C10E) [once per frame]                                  │
+    │                                                         │
+    ├─ save A, X, Y                                           │
+    ├─ PPUMASK=$1E                                            │
+    ├─ OAM DMA ($4500–$45FF → $0200–$02FF)                   │
+    ├─ jsr FlushGameplayPpuUpdates ($DE3B)                   │
+    ├─ jsr ReadNearbyNametableTiles                           │
+    ├─ jsr UpdatePalettes ($3F00/$3F10 from $0299/$02A9)     │
+    ├─ restore scroll ($41,$42 → PPUSCROLL)                   │
+    ├─ construct PPUCTRL from $47,$46,$43                     │
+    ├─ strobe JOY1, read both controllers (8 bits each)       │
+    │   → $4D (current), $4E (newly pressed)                  │
+    ├─ select active controller → $4F (previousInput)         │
+    ├─ inc frameCounter ($4B)                                 │
+    ├─ if $48==0: jsr InitializeAudioChannels                │
+    ├─ restore registers, rti                                 │
+    │                                                         │
+IrqHandler ($C17E): rti (unused)                              │
+                                                              │
+Audio Engine (from NMI via InitializeAudioChannels/$EEB4)     │
+    ├─ 16 eight-byte channel slots scanned                    │
+    │   │ values $01–$04 activate a channel                   │
+    │   │ 4-byte parameters copied via $F6 pointer            │
+    ├─ UpdateAudioChannels ($EF2D):                           │
+    │   │ decrement countdowns, fetch command bytes,          │
+    │   │ decode ($F0+=special, $C0+=delay, else=note),       │
+    │   │ write APU registers $4000–$400F                     │
+    └─ UpdateAudio ($F8DE): 4 channels + SFX + DMA trigger    │
+```
+
+---
+
+## 13. Notes
+
+- **Build verification:** `make` in `copilot/` produces `reconstructed_prg.bin` that is **byte-identical** to `prg.bin` and to the PRG bank of `rom.nes`.
+- Vectors confirm NMI at $C10E, RESET at $C033, IRQ at $C17E (a bare `rti`, unused).
+- The foreground main loop (`MainDispatchLoop` at $C645) is strictly NMI-synchronized via `$40`: NMI clears it each frame, and the main code spins waiting for it to clear before dispatching to the next state handler.
+- `GameModeEntry` ($C328) is a second, separate state machine entered from the state-$04 final phase. It has its own frame sync (`$40`) and its own 8-state dispatch table (`GameModeStateTable` at $CAD7), leading into gameplay initialization.
+- State $04 contains a nested secondary state machine (`State04SubstateTable` at $C52E) with 12 substate offsets, implementing a timed character-introduction sequence (GHOST names, nicknames, scoring legend).
+- The warm-start signature `"HIROKI AOYAGI"` at $0052 allows the game to preserve RAM across a soft reset.
+- Many routine labels are address-based (`State04TimedSubstate`, `LoadState04DisplayData`, etc.) reflecting the automated first-pass disassembly; semantic naming is provisional.
+- `symbols.inc` (embedded at the top of `prg.s`) provides NES hardware register names, controller masks, and extensive zero-page symbol definitions.
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/Makefile b/Pac-Man (USA) (Namco)/copilot/Makefile
index 3f9ba6f..7b0587a 100644
--- a/Pac-Man (USA) (Namco)/copilot/Makefile	
+++ b/Pac-Man (USA) (Namco)/copilot/Makefile	
@@ -1,10 +1,25 @@
-all: reconstructed_prg.bin verify
-prg.o: prg.s symbols.inc prg.bin
-	ca65 -g -o $@ prg.s
-reconstructed_prg.bin: prg.o linker.cfg
-	ld65 -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ prg.o
-verify: reconstructed_prg.bin prg.bin
-	cmp reconstructed_prg.bin prg.bin
-	@echo BYTE-IDENTICAL
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f prg.o reconstructed_prg.bin reconstructed.map reconstructed.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/chr.bin b/Pac-Man (USA) (Namco)/copilot/chr.bin
new file mode 100644
index 0000000..35814df
Binary files /dev/null and b/Pac-Man (USA) (Namco)/copilot/chr.bin differ
diff --git a/Pac-Man (USA) (Namco)/copilot/chr.o b/Pac-Man (USA) (Namco)/copilot/chr.o
new file mode 100644
index 0000000..aed007c
Binary files /dev/null and b/Pac-Man (USA) (Namco)/copilot/chr.o differ
diff --git a/Pac-Man (USA) (Namco)/copilot/chr.s b/Pac-Man (USA) (Namco)/copilot/chr.s
new file mode 100644
index 0000000..f6a8c21
--- /dev/null
+++ b/Pac-Man (USA) (Namco)/copilot/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/header.bin b/Pac-Man (USA) (Namco)/copilot/header.bin
new file mode 100644
index 0000000..aee36c4
Binary files /dev/null and b/Pac-Man (USA) (Namco)/copilot/header.bin differ
diff --git a/Pac-Man (USA) (Namco)/copilot/header.o b/Pac-Man (USA) (Namco)/copilot/header.o
new file mode 100644
index 0000000..5126448
Binary files /dev/null and b/Pac-Man (USA) (Namco)/copilot/header.o differ
diff --git a/Pac-Man (USA) (Namco)/copilot/header.s b/Pac-Man (USA) (Namco)/copilot/header.s
new file mode 100644
index 0000000..37d1389
--- /dev/null
+++ b/Pac-Man (USA) (Namco)/copilot/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/linker.cfg b/Pac-Man (USA) (Namco)/copilot/linker.cfg
index d9d421d..cfaf881 100644
--- a/Pac-Man (USA) (Namco)/copilot/linker.cfg	
+++ b/Pac-Man (USA) (Namco)/copilot/linker.cfg	
@@ -1,6 +1,10 @@
 MEMORY {
-  PRG: start = $C000, size = $4000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
-  PRG: load = PRG, type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/locals.inc b/Pac-Man (USA) (Namco)/copilot/locals.inc
new file mode 100644
index 0000000..e2b3a64
--- /dev/null
+++ b/Pac-Man (USA) (Namco)/copilot/locals.inc	
@@ -0,0 +1,181 @@
+; Pac-Man specific zero-page aliases used during Pass 1.
+; These intentionally conservative names will be refined in Passes 2 and 3.
+
+Zp00 = $00
+WorkPtrLo = $01
+WorkPtrHi = $02
+Zp03 = $03
+Zp04 = $04
+Zp05 = $05
+Zp06 = $06
+PpuCtrlShadow = $09
+PpuMaskShadow = $0A
+Zp0C = $0C
+Zp0D = $0D
+Zp0E = $0E
+Zp10 = $10
+Zp11 = $11
+MathOperandLo = $12
+MathOperandHi = $13
+MathResultLo = $14
+MathResultHi = $15
+Zp16 = $16
+Zp17 = $17
+Zp18 = $18
+ControllerHeld = $1A
+Zp1B = $1B
+Zp1D = $1D
+Zp1E = $1E
+Zp1F = $1F
+Zp20 = $20
+Zp21 = $21
+Zp24 = $24
+StateTimer = $25
+Zp26 = $26
+FrameCounter = $27
+Zp28 = $28
+NmiWorkComplete = $30
+PpuBufferReady = $31
+NmiUpdatesEnabled = $32
+NmiTriggerFlag = $33
+StartButtonLatch = $34
+StateTransitionFlag = $35
+GameActiveFlag = $38
+GameMode = $39
+Zp3A = $3A
+Zp3B = $3B
+PaletteUpdateMode = $3C
+GameState = $3D
+GameStateStep = $3E
+DemoCounter = $3F
+Zp40 = $40
+PendingStateFlag = $43
+StateSubstep = $44
+PlayerCourtOrder = $46
+ModeAnimTimerA = $48
+ModeAnimFrameA = $49
+ModeAnimTimerB = $4A
+ModeAnimFrameB = $4B
+ServingPlayer = $4C
+ModeAnimSubframe = $4D
+MessageTimer = $4E
+MessagePlayerIndex = $4F
+PointWinner = $50
+PlayerPointScore = $51
+Player2PointScore = $52
+PlayerGameScore = $53
+ScoreUpdatePhase = $57
+ScoreLo = $58
+ScoreHi = $59
+ScoreAnimationStep = $5A
+CourtMessageId = $5B
+MatchResultType = $5C
+ScoreDisplayState = $5D
+PendingGameState = $5E
+Player1MotionControl = $60
+Player1XSubpixel = $61
+Player1XPosition = $62
+Player1YSubpixel = $63
+Player1YPosition = $64
+Player2XSubpixel = $66
+Player2XPosition = $67
+Player2YSubpixel = $68
+Player2YPosition = $69
+BallMotionControl = $6A
+BallXSubpixel = $6B
+BallXPosition = $6C
+BallYSubpixel = $6D
+BallYPosition = $6E
+BallHeight = $6F
+BallHeightReference = $70
+BallTargetOffset = $71
+BallVerticalVelocityLo = $72
+BallVerticalVelocityHi = $73
+PlayerAnimationFlags = $78
+UmpireMessageId = $79
+BallStateFlags = $7A
+BallBounceState = $7B
+PlayerTargetXLo = $80
+PlayerTargetXHi = $81
+PlayerTargetYLo = $82
+PlayerTargetYHi = $83
+PlayerActionType = $84
+PlayerActionParameter = $85
+PlayerActionState = $86
+PlayerFacingDirection = $87
+PlayerXPosition = $88
+PlayerYPosition = $89
+PlayerPreviousX = $8A
+PlayerPreviousY = $8B
+PlayerMovementFlags = $8C
+BallTrajectoryFlags = $8D
+BallCollisionFlags = $8E
+BallContactState = $8F
+MathCarryByte = $97
+MathVectorXHi = $98
+MathVectorXLo = $99
+MathVectorXResult = $9A
+MathVectorYHi = $9B
+MathVectorYLo = $9C
+ProjectedXLo = $9D
+ProjectedXHi = $9E
+ProjectedYLo = $9F
+ProjectedYHi = $A0
+SignedAimDelta = $A4
+AimMagnitude = $A5
+AimDirection = $A6
+ObjectDataPointerLo = $A8
+ObjectDataPointerHi = $A9
+ObjectDataOffset = $AA
+ActiveObjectIndex = $AB
+AnimationFrame = $B0
+AnimationTimer = $B1
+PoseFrameTimer = $B3
+PlayerAnimationId = $B4
+PoseSequenceOffset = $B5
+PlayerPoseId = $B6
+PlayerPoseFlags = $B7
+RacketTargetX = $B8
+RacketTargetY = $B9
+RacketContactFlags = $BA
+RacketAimOffset = $BB
+ContactPointX = $BC
+ContactPointY = $BD
+PlayerActionDuration = $BF
+RallyFlags = $C0
+RallyPhase = $C1
+CourtSide = $C2
+SignedMovementDelta = $C3
+PlayerActionDelay = $C4
+NetAnimationTimer = $C5
+BallAnimationTimer = $C6
+UmpireAnimationTimer = $C7
+ObjectAnimationState = $C8
+ObjectAnimationFrame = $C9
+RacketContactState = $CA
+BallContactTimer = $CB
+BallContactFlags = $CC
+PlayerMovementSpeed = $CD
+ComputerActionState = $CE
+PreviousPlayerState = $CF
+SelectedGameMode = $E0
+PendingAudioCue = $E6
+DmcOutputLevel = $F0
+AudioChannelControl = $F1
+ActiveSoundEffect = $F2
+SoundEffectTimer = $F3
+SoundEffectPhase = $F4
+Pulse2EffectTimer = $F5
+PitchAdjustment = $F6
+AudioSequencePtrLo = $F7
+AudioSequenceIndex = $F9
+AudioSequenceOffset = $FA
+AudioStreamPosition = $FB
+AudioEventPriority = $FC
+AudioRequestFlags1 = $FD
+AudioRequestFlags2 = $FE
+AudioRequestFlags3 = $FF
+
+; Additional traced fields
+Player2MotionControl = $65
+AudioSequencePtrHi = $F8
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/prg.o b/Pac-Man (USA) (Namco)/copilot/prg.o
index 1c31bdc..dd165fe 100644
Binary files a/Pac-Man (USA) (Namco)/copilot/prg.o and b/Pac-Man (USA) (Namco)/copilot/prg.o differ
diff --git a/Pac-Man (USA) (Namco)/copilot/reconstructed.map b/Pac-Man (USA) (Namco)/copilot/reconstructed.map
index aaf7f17..1ad1cc6 100644
--- a/Pac-Man (USA) (Namco)/copilot/reconstructed.map	
+++ b/Pac-Man (USA) (Namco)/copilot/reconstructed.map	
@@ -1,13 +1,19 @@
 Modules list:
 -------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
 prg.o:
     PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
 
 
 Segment list:
 -------------
 Name                   Start     End    Size  Align
 ----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
 PRG                   00C000  00FFFF  004000  00001
 
 
diff --git a/Pac-Man (USA) (Namco)/copilot/reconstructed.nes b/Pac-Man (USA) (Namco)/copilot/reconstructed.nes
new file mode 100644
index 0000000..788e164
Binary files /dev/null and b/Pac-Man (USA) (Namco)/copilot/reconstructed.nes differ
diff --git a/Pac-Man (USA) (Namco)/copilot/rom.nes b/Pac-Man (USA) (Namco)/copilot/rom.nes
new file mode 120000
index 0000000..ba0d050
--- /dev/null
+++ b/Pac-Man (USA) (Namco)/copilot/rom.nes	
@@ -0,0 +1 @@
+../rom.nes
\ No newline at end of file
diff --git a/Pac-Man (USA) (Namco)/copilot/symbols.inc b/Pac-Man (USA) (Namco)/copilot/symbols.inc
index e69de29..ca0e52c 100644
--- a/Pac-Man (USA) (Namco)/copilot/symbols.inc	
+++ b/Pac-Man (USA) (Namco)/copilot/symbols.inc	
@@ -0,0 +1,51 @@
+; PPU registers 
+PPUCTRL = $2000
+PPUMASK = $2001
+PPUSTATUS = $2002
+OAMADDR = $2003
+OAMDATA = $2004
+PPUSCROLL = $2005
+PPUADDR = $2006
+PPUDATA = $2007
+OAMDMA = $4014
+JOY1 = $4016
+
+APUPC1BASE = $4000
+APUPC1SWEEP = $4001
+APUPC1TLOW = $4002
+APUPC1THIGH = $4003
+
+APUPC2BASE = $4004
+APUPC2SWEEP = $4005
+APUPC2LOW = $4006
+APUPC2HIGH = $4007
+
+APUTRIBASE = $4008
+APUTRILOW = $400A
+APUTRIHIGH = $400B
+
+APUNOISEBASE = $400C
+APUNOISELOOP = $400E
+APUNOISELENGTH = $400F
+
+APUDMABASE = $4010
+APUDMALOAD = $4011
+APUDMAADDR = $4012
+APUDMALEN = $4013
+
+APUCTRL = $4015
+APUSTATUS = $4015
+APUFRAMECNT = $4017
+
+PAD_RIGHT=$01
+PAD_LEFT=$02
+PAD_DOWN=$04
+PAD_UP=$08
+PAD_START=$10
+PAD_SELECT=$20
+PAD_B=$40
+PAD_A=$80
+PAD_HORIZONTAL=PAD_LEFT|PAD_RIGHT
+PAD_VERTICAL=PAD_UP|PAD_DOWN
+PAD_DPAD=PAD_HORIZONTAL|PAD_VERTICAL
+PAD_MENU_INPUT=PAD_SELECT|PAD_START|PAD_VERTICAL
\ No newline at end of file
diff --git a/Tennis (JU)/OVERVIEW.md b/Tennis (JU)/OVERVIEW.md
new file mode 100644
index 0000000..6dbd1bb
--- /dev/null
+++ b/Tennis (JU)/OVERVIEW.md	
@@ -0,0 +1,367 @@
+# Tennis (JU) — Game Flow from Power-On
+
+This document describes the execution flow of the disassembled Tennis (JU) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
+
+---
+
+## 1. ROM and Memory Layout
+
+| Property | Value |
+|----------|-------|
+| Format | iNES / NES 2.0 |
+| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
+| CHR | 1 × 8 KB |
+| Mirroring | Vertical |
+| PRG bank start | CPU $C000 |
+| Source file | `copilot/prg.s` (9,268 lines) |
+| Output | `reconstructed_prg.bin` (16,384 bytes) |
+
+### Interrupt vectors (CPU $FFFA–$FFFF)
+
+| Vector | Address | Handler |
+|--------|---------|---------|
+| NMI | $C07D | `NmiHandler` |
+| RESET | $C000 | `Reset` |
+| IRQ / BRK | $C000 | `Reset` (reused — unused) |
+
+---
+
+## 2. Build Status
+
+`make` in `copilot/` assembles `prg.s` with `ca65`, links with `ld65`, and verifies against `prg.bin`.
+
+**Verification result: BYTE-IDENTICAL** — `reconstructed_prg.bin` matches `prg.bin` exactly (all 16,384 bytes), and `prg.bin` matches the PRG bank of `Tennis (JU).nes`.
+
+---
+
+## 3. Reset — CPU $FFFC → $C000
+
+**`Reset`** ($C000)
+
+On power-on or reset:
+
+1. `cld` — clear decimal mode.
+2. `sei` — disable maskable interrupts.
+3. **Wait for VBlank** — poll `PPUSTATUS` bit 7 (`@Flow_C002`).
+4. `PPUCTRL=$00`, `PPUMASK=$00` — disable rendering and NMI.
+5. Stack pointer = $FF.
+6. `X = FrameCounter` ($27), then `Y=$06`, `WorkPtrHi=$02`, `WorkPtrLo=$00`, `A=$00`.
+7. **Clear RAM** — `sta (WorkPtrLo),y` loop decrementing `WorkPtrHi` from $02 down, effectively clearing $0000–$02FF.
+8. `X` is 0 at this point; if non-zero (it never is on entry), skip; else `X=$5F`.
+9. `stx $0500` — set $0500 to $5F (or 0).
+10. `jsr ClearNametables` ($C195) — clear nametable memory.
+11. `jsr HideAllSprites` ($C1A5) — hide all sprites by writing $F4 to OAM.
+12. `PPUSCROLL=$00` twice; `GameActiveFlag=$01`.
+13. `APUSTATUS=$0F` — enable all four APU channels.
+14. `PPUCTRL=$90`, `PpuCtrlShadow=$90` — enable NMI, $2000 base.
+15. `PpuMaskShadow=$06`.
+16. Falls into **`MainLoop`** ($C04F) — the permanent foreground loop.
+
+---
+
+## 4. Main Loop — `MainLoop` ($C04F)
+
+After reset, control enters the infinite foreground loop:
+
+```
+MainLoop ($C04F):
+    NmiWorkComplete ($30) = $00
+    if GameActiveFlag ($38) != 0:
+        if GameStateStep ($3E) == 1:
+            jsr RunAudioEngine ($FFF7)
+        Flow_C060:
+    jsr UpdateTimers ($C375)
+    jsr UpdateGameState ($C0AA)
+    NmiUpdatesEnabled ($32) = $01
+    Flow_C06A:
+    if NmiWorkComplete ($30) != 0:
+        FrameCounter ($27)++
+        NmiUpdatesEnabled ($32) = $00
+        jmp MainLoop
+    else:
+        jsr RollRng ($C456)
+        jmp Flow_C06A
+```
+
+The main loop is **NMI-synchronized**: it waits for `NmiWorkComplete` ($30) to become non-zero (set by NMI each frame), then advances the frame counter, clears the update-enabled flag, and loops. If NMI work is not complete, it rolls the RNG and retries.
+
+---
+
+## 5. NMI / Frame Heartbeat — `NmiHandler` ($C07D)
+
+The NMI fires once per frame:
+
+1. **Save registers** (A, X, Y on stack).
+2. **OAM DMA**: write $00 to OAMADDR ($2003), then $02 to OAMDMA ($4014) — copy $0200–$02FF to sprite RAM.
+3. If `NmiUpdatesEnabled` ($32) == 0, skip to `@Flow_C0A0`.
+4. Otherwise:
+   - `jsr WritePalette` ($C1B5) — conditional palette upload based on `PaletteUpdateMode` ($3C).
+   - `jsr WritePpuBuffer` ($C2EC) — flush pending PPU command buffer at $0590.
+   - `jsr SetScroll` ($C3FD) — write scroll from $1E/$1F to PPUSCROLL.
+   - `jsr ReadControllers` ($C2A4) — read both controller ports.
+5. `NmiWorkComplete ($30) = $01` — signal main loop that the frame update is done.
+6. `NmiTriggerFlag ($33) = $01`.
+7. Restore registers, `rti`.
+
+The label `IrqHandler` appears at the same `rti` address — IRQ/BRK vector points here, but it's unused (same as Reset).
+
+---
+
+## 5. Game State Machine — `UpdateGameState` ($C0AA)
+
+Called each main-loop iteration:
+
+```
+UpdateGameState ($C0AA):
+    if GameActiveFlag ($38) == 0:
+        Flow_C0B1:
+        if ControllerHeld ($1A) & START ($10):
+            if StartButtonLatch ($34) != 0 → skip
+            else: StartButtonLatch=$01
+            Y = GameState ($3D)
+            if GameState == 7 → Flow_C0EA
+            if GameState == 4 → Flow_C0CC
+            if GameState == 6 → skip
+            else → Flow_C0FC
+        Flow_C0FC:
+        DispatchInlineAddressTable ($C38B) with GameState index
+            → GameStateHandlerTable ($C101)
+    else (GameActiveFlag == 0):
+        Flow_C119:
+        if ControllerHeld & $30 (START|SELECT):
+            if bit $10 set → Flow_C134
+            else: GameActiveFlag=$00, GameState=$00, PendingStateFlag=$00
+                  jsr MatchRoutine_CBCB, jsr DisableRendering
+                  GameMode=$SelectedGameMode ($E0), rts
+        Flow_C134: (complex state-transition logic with StateTransitionFlag, GameMode, etc.)
+        Flow_C180:
+        GameStateStep ($3E) → DispatchInlineAddressTable → GameStateStepHandlerTable ($C185)
+```
+
+### `MainStateHandlerTable` ($C101) — indexed by `GameState` ($3D) as a byte offset (even offsets $00–$16):
+
+| Offset | Handler | Description |
+|--------|---------|-------------|
+| $00 | `GameState00_InitializeMatch` ($C70A) | Match initialization |
+| $02 | `GameState01_WaitForServe` ($C797) | Wait for serve input |
+| $04 | `GameState02_PrepareRally` ($C7B7) | Prepare rally |
+| $06 | `GameState03_RunRally` ($C7C6) | Run rally |
+| $08 | `GameState04_PointEnded` ($C907) | Point ended |
+| $0A | `GameState05_UpdateScore` ($CA07) | Update score |
+| $0C | `GameState06_AdvanceGame` ($C9DE) | Advance game |
+| $0E | `GameState07_PauseOrTransition` ($C42B) | Pause/transition (RTS) |
+| $10 | `GameState08_WaitForTimer` ($CA28) | Wait for timer |
+| $12 | `GameState09_RestorePreviousState` ($CA31) | Restore state |
+| $14 | `GameState0A_ResumePreviousState` ($CA3A) | Resume state |
+| $16 | `GameState0B_FinishTransition` ($CA5B) | Finish transition |
+
+### `GameStateStepHandlerTable` ($C185) — indexed by `GameStateStep` ($3E):
+
+| Offset | Handler |
+|--------|---------|
+| $00 | `ModeStep00_DrawSelectionScreen` ($CA87) |
+| $02 | `ModeStep01_Countdown` ($CAC9) |
+| $04 | `ModeStep02_InitializeSelection` ($CADD) |
+| $06 | `ModeStep03_UpdateSelection` ($CAE4) |
+| $08 | `ModeStep04_ConfirmSelection` ($CAEE) |
+| $0A | `ModeStep05_StartDemoOrMatch` ($CAF4) |
+| $0C | `ModeStep06_CompleteSetup` ($CC04) |
+
+### Key state handlers:
+
+- **`GameState00_InitializeMatch`** ($C70A): First-time init — clear nametable, render routine, palette mode, set `PendingStateFlag`. Subsequent calls advance through sub-states ($87/$88 counter), render sprites, enable rendering, set `GameState=$07`, call `MatchRoutine_CBCB`.
+- **`GameState01_WaitForServe`** ($C797): Disable rendering, clear nametable, render court + score, zero point winners, clear animation flags, set ball trajectory flags, advance `GameState`.
+- **`GameState02_PrepareRally`** ($C7B7): Enable rendering, clear PPU mask shadow bit 4, hide sprites, render routine, advance `GameState`.
+- **`GameState03_RunRally`** ($C7C6): Render routine, set `PpuBufferReady`, `MatchRoutine_C7E7` (copy initial object state), `PhysicsRoutine_D7E1`, handle serving player, `EngineRoutine_C436`, advance `GameState`.
+
+---
+
+## 6. NMI-Driven Per-Frame Work
+
+The NMI handler (called every VBlank) performs:
+
+| Step | Routine | Address | Purpose |
+|------|---------|---------|---------|
+| OAM DMA | — | $C084–$C089 | Copy $0200–$02FF to sprite RAM |
+| Palette update | `WritePalette` | $C1B5 | Conditional palette upload ($3F00/$3F10) |
+| PPU buffer flush | `WritePpuBuffer` | $C2EC | Write pending PPU commands from $0590 buffer |
+| Scroll | `SetScroll` | $C3FD | Write scroll X/Y from $1E/$1F |
+| Controller read | `ReadControllers` | $C2A4 | Read both ports, build held/newly-pressed |
+
+The main loop calls `UpdateGameState` ($C0AA) which dispatches to the active game state handler, then advances timers and audio.
+
+---
+
+## 7. Object / Sprite System
+
+- **OAM buffer** at $0200–$02FF, written via `WriteMetaspriteToOam` ($C440).
+- **Object data pointers**: `ObjectDataPointerLo/Hi` ($A8/$A9), `ObjectDataOffset` ($AA), `ActiveObjectIndex` ($AB).
+- **Animation**: `AnimationFrame` ($B0), `AnimationTimer` ($B1), `PoseFrameTimer` ($B3), `PlayerAnimationId` ($B4), `PoseSequenceOffset` ($B5), `PlayerPoseId` ($B6), `PlayerPoseFlags` ($B7).
+- **Racket**: `RacketTargetX` ($B8), `RacketTargetY` ($B9), `RacketContactFlags` ($BA), `RacketAimOffset` ($BB).
+- **Player physics**: `PlayerMotionControl` ($60/$65 for P1/P2), X/Y position + subpixel ($61–$69), target coordinates ($80–$83), action type/state ($84–$86), facing direction ($87), position ($88–$89).
+- **Ball**: `BallMotionControl` ($6A), X/Y position + subpixel ($6B–$6E), height ($6F/$70), target offset ($71), vertical velocity ($72/$73), state flags ($7A), bounce state ($7B), contact state ($8F), trajectory flags ($8D), collision flags ($8E).
+
+---
+
+## 8. Audio System
+
+**`RunAudioEngine`** ($FFF7) — jumps to `AudioEngineUpdate` ($F8E0). Called from MainLoop when `GameStateStep == 1` and `GameActiveFlag != 0`.
+
+**`InitializeAudioEngine`** ($E1F8):
+- Clear audio request pointer ($F0/$F1 = $0006), channel table pointer ($F2/$F3 = $0620), sequence table pointer from ROM $F100/$F101.
+- `audioWorkValue=$40`, `APUSTATUS=$1F`, `APUFRAMECNT=$C0`.
+- Clear 16 bytes through ($F0), clear 16 entries at 8-byte stride through ($F2).
+
+**`InitializeAudioChannels`** ($EED0):
+- Clear audio channel flags, scan 16 eight-byte slots through ($F2).
+- Slots with values $01–$04 activate a channel: copy 4-byte parameters through indirect pointer $F6.
+
+**Audio data** at $FF00–$FFF5 (period/mask tables, sequences, instruments), $F450–$F49A (runtime command data), AudioEventSequenceData at $FDFA–$FFEA.
+
+Audio RAM symbols ($F0–$FF): `audioRequestPtr`, `audioChannelTablePtr`, `audioSequenceTablePtr`, `audioWorkPtr`, `audioWorkValue`, `audioChannelFlags`, `audioRequestIndex`, `audioChannelOffset`, `audioIndirectPtr`, plus channel-specific effect timers ($F5–$F6), sequence pointers/indices ($F7–$FA), stream position ($FB), event priority ($FC), request flags ($FD–$FF).
+
+---
+
+## 9. Zero-Page / RAM Symbols (key subset)
+
+| Address | Symbol | Use |
+|---------|--------|-----|
+| $01–$02 | WorkPtrLo/Hi | General indirect pointer |
+| $09 | PpuCtrlShadow | $2000 mirror |
+| $0A | PpuMaskShadow | $2001 mirror |
+| $1A | ControllerHeld | Controller buttons held |
+| $1B | Zp1B | Previous controller state |
+| $20 | Zp20 | Timer counter |
+| $25 | StateTimer | State countdown timer |
+| $27 | FrameCounter | Frame tick counter |
+| $30 | NmiWorkComplete | NMI frame-sync flag |
+| $31 | PpuBufferReady | PPU buffer ready flag |
+| $32 | NmiUpdatesEnabled | NMI updates enabled flag |
+| $33 | NmiTriggerFlag | NMI trigger flag |
+| $34 | StartButtonLatch | Start button debounce latch |
+| $35 | StateTransitionFlag | State transition flag |
+| $38 | GameActiveFlag | Game active flag |
+| $39 | GameMode | Current game mode |
+| $3C | PaletteUpdateMode | Palette update mode |
+| $3D | GameState | Main game state |
+| $3E | GameStateStep | Game state step/substep |
+| $3F | DemoCounter | Demo counter |
+| $43 | PendingStateFlag | Pending state flag |
+| $44 | StateSubstep | State substep |
+| $46 | PlayerCourtOrder | Player court order |
+| $48–$4B | ModeAnimTimer/Frame A&B | Mode animation timers/frames |
+| $4C | ServingPlayer | Serving player |
+| $4D | ModeAnimSubframe | Animation subframe |
+| $4E | MessageTimer | Message timer |
+| $4F | MessagePlayerIndex | Message player index |
+| $50 | PointWinner | Point winner |
+| $51–$53 | Player/2 Point/Game Score | Score values |
+| $57–$5D | Score-related state | Score display/update state |
+| $5E | PendingGameState | Pending game state |
+| $60–$6E | Player/Ball motion state | Player and ball physics |
+| $78–$7F | Animation/ball state | Animation flags, ball state/collision |
+| $80–$8F | Target/action/collision state | Player targets, action state, collision flags |
+| $A8–$AA | ObjectDataPointerLo/Hi, Offset | Object data pointers |
+| $AB | ActiveObjectIndex | Active object index |
+| $B0–$C9 | Animation/pose/racket state | Animation frames, pose, racket targets |
+| $CA–$CC | Contact/bounce state | Racket/ball contact state |
+| $CD–$CF | Movement/action state | Movement speed, computer/action state |
+| $E0 | SelectedGameMode | Selected game mode |
+| $E6–$FF | Audio engine state | Audio request pointers, channel flags, sequence state |
+
+---
+
+## 10. PPU / Rendering
+
+- **OAM DMA**: Every NMI, DMA from $0200–$02FF via `OAMDMA` ($4014).
+- **PPU buffer**: `WritePpuBuffer` ($C2EC) writes a command buffer at $0590 to PPU when `PpuBufferReady` ($31) is set.
+- **Scroll**: `SetScroll` ($C3FD) writes $1E/$1F to PPUSCROLL.
+- **Palette**: `WritePalette` ($C1B5) conditionally uploads from RAM buffers based on `PaletteUpdateMode` ($3C).
+- **Palette shadow**: `PpuCtrlShadow` ($09), `PpuMaskShadow` ($0A).
+- **Sprite hiding**: `HideAllSprites` ($C1A5) writes $F4 to OAM.
+- **Metasprite rendering**: `WriteMetaspriteToOam` ($C440) writes sprite data from a pointer.
+
+---
+
+## 11. Data Tables
+
+| Label | Address | Description |
+|-------|---------|-------------|
+| `MainStateHandlerTable` | $C101 | 12 main game state handler pointers |
+| `GameStateStepHandlerTable` | $C185 | 7 mode step handler pointers |
+| `GameStateHandlerTable` (game mode) | $CAD7 | 8 game-mode state handler pointers |
+| `InitialMatchObjectStateData` | $C847 | Initial object state data for match start |
+| `EngineTable_*` | Various | Inline data tables embedded between code |
+| `AudioEventSequenceData` | $FDFA | Audio event sequence data |
+| Audio tables | $FF00–$FFF5 | Period/mask tables, sequences, instruments |
+
+---
+
+## 12. Summary of Execution Flow
+
+```
+Power On / Reset
+    │
+    ▼
+Reset ($C000) ───────────────────────────────────────────────────────┐
+    │ cld, sei, wait VBlank, PPUCTRL/PPUMASK=$00                      │
+    │ stack=$FF, clear RAM $0000–$02FF                                │
+    │ $0500=$5F, clear nametables, hide sprites                       │
+    │ PPUSCROLL=$00, GameActiveFlag=$01                               │
+    │ APUSTATUS=$0F (all channels on)                                 │
+    │ PPUCTRL=$90 (NMI on), PpuCtrlShadow=$90                         │
+    │ PpuMaskShadow=$06                                               │
+    │                                                                 │
+    ▼                                                                 │
+MainLoop ($C04F) ─────────────────────────────────────────────────────┤
+    │                                                                 │
+    ├─ NmiWorkComplete ($30) = $00                                    │
+    ├─ if GameActiveFlag && GameStateStep==1: RunAudioEngine ($FFF7)  │
+    ├─ jsr UpdateTimers ($C375)                                       │
+    ├─ jsr UpdateGameState ($C0AA)  ──► state machine dispatch        │
+    │     ├─ State $00: InitializeMatch                               │
+    │     ├─ State $01: WaitForServe                                  │
+    │     ├─ State $02: PrepareRally                                  │
+    │     ├─ State $03: RunRally                                      │
+    │     ├─ State $04: PointEnded                                    │
+    │     ├─ State $05: UpdateScore                                   │
+    │     ├─ State $06: AdvanceGame                                   │
+    │     ├─ State $07: PauseOrTransition (RTS)                       │
+    │     ├─ State $08–$0B: WaitForTimer / Restore / Resume / Finish  │
+    │     └─ return to MainLoop                                       │
+    │                                                                 │
+    ├─ NmiUpdatesEnabled ($32) = $01                                  │
+    ├─ wait for NmiWorkComplete ($30) != 0  ◄── NMI sets this         │
+    ├─ FrameCounter++, NmiUpdatesEnabled=$00                          │
+    └─ jmp MainLoop                                                   │
+    │                                                                 │
+    │   (if NmiWorkComplete==0: jsr RollRng ($C456), retry)           │
+    │                                                                 │
+NMI ($C07D) [once per frame]                                          │
+    │                                                                 │
+    ├─ save A, X, Y                                                   │
+    ├─ OAM DMA ($0200–$02FF → $4014)                                  │
+    ├─ if NmiUpdatesEnabled:                                          │
+    │     jsr WritePalette ($C1B5)                                    │
+    │     jsr WritePpuBuffer ($C2EC)                                  │
+    │     jsr SetScroll ($C3FD)                                       │
+    ├─ jsr ReadControllers ($C2A4)  → $4D/$4E/$4F                     │
+    ├─ NmiWorkComplete ($30) = $01  (unblocks main loop)              │
+    ├─ NmiTriggerFlag ($33) = $01                                     │
+    ├─ restore registers, rti                                         │
+    │                                                                 │
+IrqHandler ($C17E): rti (unused)                                      │
+```
+
+---
+
+## 13. Notes
+
+- **Build verification:** `make` in `copilot/` produces `reconstructed_prg.bin` that is **byte-identical** to `prg.bin` and to the PRG bank of `Tennis (JU).nes`.
+- Vectors confirm NMI at $C07D, and both RESET and IRQ at $C000 (the reset handler doubles as the IRQ handler, just a `rti`).
+- The foreground main loop (`MainLoop` at $C04F) is strictly NMI-synchronized via `NmiWorkComplete` ($30): it loops until NMI sets it to $01, processes game state and timers, then waits again.
+- `UpdateGameState` ($C0AA) dispatches to one of 12 main game states via `MainStateHandlerTable` at $C101, indexed by `GameState` ($3D).
+- State $04 contains a nested secondary state machine (`GameStateStepHandlerTable` at $C185, 7 steps) for mode selection/setup.
+- Many routine labels are address-based (`EngineRoutine_C1DD`, `MatchRoutine_C7E7`, etc.) reflecting the automated first-pass disassembly; semantic naming is provisional.
+- `symbols.inc` provides NES hardware register names and controller masks; `locals.inc` provides extensive zero-page symbol definitions covering player/ball physics, audio, and game state.
+- The disassembly includes inline data tables (`EngineTable_*`) embedded between code regions, preserved verbatim for byte-identity.
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/Makefile b/Tennis (JU)/copilot/Makefile
index 3f9ba6f..7b0587a 100644
--- a/Tennis (JU)/copilot/Makefile	
+++ b/Tennis (JU)/copilot/Makefile	
@@ -1,10 +1,25 @@
-all: reconstructed_prg.bin verify
-prg.o: prg.s symbols.inc prg.bin
-	ca65 -g -o $@ prg.s
-reconstructed_prg.bin: prg.o linker.cfg
-	ld65 -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ prg.o
-verify: reconstructed_prg.bin prg.bin
-	cmp reconstructed_prg.bin prg.bin
-	@echo BYTE-IDENTICAL
+CA65 ?= ca65
+LD65 ?= ld65
+
+all: reconstructed.nes verify
+
+prg.o: prg.s symbols.inc locals.inc
+	$(CA65) -g -o $@ $<
+
+header.o: header.s
+	$(CA65) -g -o $@ $<
+
+chr.o: chr.s
+	$(CA65) -g -o $@ $<
+
+reconstructed.nes: header.o prg.o chr.o linker.cfg
+	$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
+
+verify: reconstructed.nes
+	cmp reconstructed.nes rom.nes
+	@echo "Byte-identical ROM verified."
+
 clean:
-	rm -f prg.o reconstructed_prg.bin reconstructed.map reconstructed.lbl
+	rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
+
+.PHONY: all verify clean
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/chr.bin b/Tennis (JU)/copilot/chr.bin
new file mode 100644
index 0000000..d8f4cf6
Binary files /dev/null and b/Tennis (JU)/copilot/chr.bin differ
diff --git a/Tennis (JU)/copilot/chr.o b/Tennis (JU)/copilot/chr.o
new file mode 100644
index 0000000..212b138
Binary files /dev/null and b/Tennis (JU)/copilot/chr.o differ
diff --git a/Tennis (JU)/copilot/chr.s b/Tennis (JU)/copilot/chr.s
new file mode 100644
index 0000000..f6a8c21
--- /dev/null
+++ b/Tennis (JU)/copilot/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "chr.bin"
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/header.bin b/Tennis (JU)/copilot/header.bin
new file mode 100644
index 0000000..8bc3c20
Binary files /dev/null and b/Tennis (JU)/copilot/header.bin differ
diff --git a/Tennis (JU)/copilot/header.o b/Tennis (JU)/copilot/header.o
new file mode 100644
index 0000000..b732506
Binary files /dev/null and b/Tennis (JU)/copilot/header.o differ
diff --git a/Tennis (JU)/copilot/header.s b/Tennis (JU)/copilot/header.s
new file mode 100644
index 0000000..37d1389
--- /dev/null
+++ b/Tennis (JU)/copilot/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "header.bin"
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/linker.cfg b/Tennis (JU)/copilot/linker.cfg
index d9d421d..cfaf881 100644
--- a/Tennis (JU)/copilot/linker.cfg	
+++ b/Tennis (JU)/copilot/linker.cfg	
@@ -1,6 +1,10 @@
 MEMORY {
-  PRG: start = $C000, size = $4000, file = %O, fill = yes;
+  HEADER: start = $0000, size = $0010, fill = yes;
+  PRG:    start = $C000, size = $4000, fill = yes;
+  CHR:    start = $0000, size = $2000, fill = yes;
 }
 SEGMENTS {
-  PRG: load = PRG, type = ro;
-}
+  HEADER: load = HEADER, type = ro;
+  PRG:    load = PRG,    type = ro;
+  CHR:    load = CHR,    type = ro;
+}
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/locals.inc b/Tennis (JU)/copilot/locals.inc
index ea2bda9..2779853 100644
--- a/Tennis (JU)/copilot/locals.inc	
+++ b/Tennis (JU)/copilot/locals.inc	
@@ -178,4 +178,4 @@ AudioRequestFlags3 = $FF
 
 ; Additional traced fields
 Player2MotionControl = $65
-AudioSequencePtrHi = $F8
+AudioSequencePtrHi = $F8
\ No newline at end of file
diff --git a/Tennis (JU)/copilot/prg.o b/Tennis (JU)/copilot/prg.o
index 0571191..caa0c56 100644
Binary files a/Tennis (JU)/copilot/prg.o and b/Tennis (JU)/copilot/prg.o differ
diff --git a/Tennis (JU)/copilot/prg.s b/Tennis (JU)/copilot/prg.s
index d6d83b8..9a7672b 100644
--- a/Tennis (JU)/copilot/prg.s	
+++ b/Tennis (JU)/copilot/prg.s	
@@ -9,6 +9,7 @@
 .include "locals.inc"
 
 .segment "PRG"
+.org $C000
 
 ; =============================================================================
 ; Reset
diff --git a/Tennis (JU)/copilot/reconstructed.map b/Tennis (JU)/copilot/reconstructed.map
index aaf7f17..1ad1cc6 100644
--- a/Tennis (JU)/copilot/reconstructed.map	
+++ b/Tennis (JU)/copilot/reconstructed.map	
@@ -1,13 +1,19 @@
 Modules list:
 -------------
+header.o:
+    HEADER            Offs=000000  Size=000010  Align=00001  Fill=0000
 prg.o:
     PRG               Offs=000000  Size=004000  Align=00001  Fill=0000
+chr.o:
+    CHR               Offs=000000  Size=002000  Align=00001  Fill=0000
 
 
 Segment list:
 -------------
 Name                   Start     End    Size  Align
 ----------------------------------------------------
+CHR                   000000  001FFF  002000  00001
+HEADER                000000  00000F  000010  00001
 PRG                   00C000  00FFFF  004000  00001
 
 
diff --git a/Tennis (JU)/copilot/prg.bin b/Tennis (JU)/copilot/reconstructed.nes
similarity index 66%
rename from Tennis (JU)/copilot/prg.bin
rename to Tennis (JU)/copilot/reconstructed.nes
index 5feb337..e7ead1e 100644
Binary files a/Tennis (JU)/copilot/prg.bin and b/Tennis (JU)/copilot/reconstructed.nes differ
diff --git a/Tennis (JU)/copilot/reconstructed_prg.bin b/Tennis (JU)/copilot/reconstructed_prg.bin
deleted file mode 100644
index 5feb337..0000000
Binary files a/Tennis (JU)/copilot/reconstructed_prg.bin and /dev/null differ
diff --git a/Tennis (JU)/copilot/rom.nes b/Tennis (JU)/copilot/rom.nes
new file mode 120000
index 0000000..772303d
--- /dev/null
+++ b/Tennis (JU)/copilot/rom.nes	
@@ -0,0 +1 @@
+../Tennis (JU).nes
\ No newline at end of file
diff --git a/_ROMS/Donkey Kong 3 (JUE).nes b/_wip/Donkey Kong 3 (JUE)/Donkey Kong 3 (JUE).nes
similarity index 100%
rename from _ROMS/Donkey Kong 3 (JUE).nes
rename to _wip/Donkey Kong 3 (JUE)/Donkey Kong 3 (JUE).nes
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/Makefile b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/Makefile
new file mode 100644
index 0000000..cf14bd0
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/Makefile	
@@ -0,0 +1,9 @@
+CA65?=ca65
+LD65?=ld65
+all: verify
+%.o: %.s
+	$(CA65) -o $@ $<
+defender2_rebuilt.nes: header.o prg.o chr.o
+	$(LD65) -C linker.cfg -o $@ $^
+verify: defender2_rebuilt.nes
+	cmp dk3.nes $<
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.o b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.o
new file mode 100644
index 0000000..846bf7e
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.o differ
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.s b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.s
new file mode 100644
index 0000000..c021b92
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/chr.s	
@@ -0,0 +1,2 @@
+.segment "CHR"
+    .incbin "dk3.nes", $4010, $2000
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/dk3.nes b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/dk3.nes
new file mode 100644
index 0000000..7b683e6
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/dk3.nes differ
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.o b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.o
new file mode 100644
index 0000000..bf59cce
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.o differ
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.s b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.s
new file mode 100644
index 0000000..3a3627f
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/header.s	
@@ -0,0 +1,2 @@
+.segment "HEADER"
+    .incbin "dk3.nes", 0, 16
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/linker.cfg b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/linker.cfg
new file mode 100644
index 0000000..7a0b25e
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/linker.cfg	
@@ -0,0 +1,2 @@
+MEMORY { HEADER:start=$0000,size=$0010,file=%O; PRG:start=$C000,size=$3FFA,file=%O; VECTORS:start=$FFFA,size=$0006,file=%O; CHR:start=$0000,size=$2000,file=%O; }
+SEGMENTS { HEADER:load=HEADER,type=ro; PRG:load=PRG,type=ro; VECTORS:load=VECTORS,type=ro; CHR:load=CHR,type=ro; }
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/locals.inc b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/locals.inc
new file mode 100644
index 0000000..95b0cb4
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/locals.inc	
@@ -0,0 +1,319 @@
+; Defender II application-specific symbols identified in Pass 2.
+
+ControllerSerialBits = $00
+WorkPointerOrValueLo = $01
+WorkPointerOrValueHi = $02
+SourceRecordPointerLo = $03
+PackedCoordinateOrValue = $04
+LoopCounter05 = $05
+RecordFieldCount = $06
+RecordRepeatCount = $07
+ObjectScanIndex = $08
+MetaspriteLayoutOffset = $0C
+SkippedSpriteCount = $0D
+ObjectSlotOrFieldIndex = $0E
+IndirectStorePointer = $0F
+SignedOffsetAccumulator = $10
+CurrentSpriteTileId = $11
+CoordinateLimit = $12
+CoordinateValue = $13
+MetaspriteLayoutPointerLo = $14
+MetaspriteLayoutPointerHi = $15
+PackedHudOrObjectValue = $16
+CoordinateDelta = $17
+ControllerButtons = $1A
+ControllerPressedOrScriptInput = $1B
+SecondControllerPressed = $1D
+GameplayTimerArray = $20
+GameplayTimer = $21
+GameplayStateBackup = $22
+GameplayStateFlags = $23
+ScreenSelectionPositionOrDelay = $25
+FrameCounter = $27
+SavedGameplayTimerArray = $28
+FrameReadyFlag = $30
+CollisionResultFlag = $31
+NmiFrameDelay = $32
+NmiWorkMode = $33
+QueuedPpuTransferCount = $34
+ScreenSubstate = $36
+StartInputLatch = $37
+SelectedPlayerAndScreenFlags = $38
+GameMode = $3A
+CurrentScreenState = $3B
+PlayerModeOrScreenPhase = $3C
+ReturnScreenState = $3D
+SelectedPlayerIndex = $40
+SelectedScreenVariant = $41
+SelectedActorIndex = $43
+ScreenCollisionState = $44
+CollisionCandidateIndex = $45
+PendingObstacleInteraction = $46
+ObjectSpawnDelay = $47
+ObjectSpawnType = $48
+ObjectSpawnX = $49
+ObjectSpawnState = $4B
+ScreenEffectState = $4E
+ScreenEffectTimer = $4F
+GameplayObjectState = $50
+GameplayObjectTimer = $51
+GameplayObjectX = $52
+GameplayObjectFlags = $54
+GameplayObjectAnimation = $55
+ActiveActorType = $60
+ActiveActorState = $61
+ScreenObjectMode = $62
+ScreenObjectTimer = $63
+ScreenObjectTrigger = $64
+ScreenObjectCounter = $65
+ActorTimerArray = $68
+ActorSequenceStep = $69
+ActorTableIndex = $6F
+ActorStateArray = $70
+ActorAnimationStep = $75
+ScreenVariantInitialState = $78
+PlayerOrActorX = $81
+PlayerOrActorY = $82
+PlayerMotionState = $83
+ActorFlags = $84
+ActorX = $85
+ActorY = $86
+PlayerStartXTable = $8C
+PlayerStartYTable = $8D
+ActorAnimationTimer = $90
+ActorInteractionState = $91
+ActorAnimationFrame = $92
+ObstacleAnimationTimer = $94
+ObstacleInteractionState = $95
+ObstacleAnimationFrame = $96
+ObjectRecordPointerLo = $A8
+ObjectRecordPointerHi = $A9
+ObjectRecordStride = $AA
+OamBufferWriteOffset = $AB
+SpriteAttributes = $B7
+ObjectScreenY = $B8
+ObjectScreenX = $B9
+MovementDirectionFlags = $BC
+MovementStepIndex = $BD
+CollisionMask = $BF
+CollisionExtent = $C0
+CollisionCoordinate = $C2
+CollisionFlags = $C4
+CollisionTableIndex = $C8
+AudioChannelStateArray = $F0
+AudioFrameCounter = $F1
+AudioSequenceDelay = $F2
+AudioSequencePosition = $F3
+AudioCommandValue = $F4
+AudioEffectIndex = $F5
+AudioNoteIndex = $F6
+AudioPeriodBase = $F7
+AudioEnvelopeOrSequenceIndex = $F8
+AudioSequencePointerLo = $F9
+AudioSequencePointerHi = $FA
+AudioRequestFlags = $FB
+AudioModeOrEffectIndex = $FC
+AudioPendingFlags = $FD
+AudioEffectRequest = $FE
+AudioChannelRequest = $FF
+
+; Main RAM
+OamBuffer = $0200
+Ram_02E0 = $02E0
+Ram_0300 = $0300
+Ram_0301 = $0301
+Ram_0302 = $0302
+Ram_0303 = $0303
+Ram_0304 = $0304
+Ram_0305 = $0305
+Ram_0306 = $0306
+Ram_0307 = $0307
+Ram_0308 = $0308
+Ram_0309 = $0309
+Ram_030A = $030A
+Ram_030B = $030B
+Ram_030C = $030C
+Ram_030D = $030D
+Ram_030E = $030E
+Ram_0310 = $0310
+Ram_0312 = $0312
+Ram_0320 = $0320
+Ram_0321 = $0321
+Ram_0326 = $0326
+Ram_0327 = $0327
+Ram_0328 = $0328
+Ram_0329 = $0329
+Ram_032A = $032A
+Ram_032E = $032E
+Ram_0340 = $0340
+Ram_0342 = $0342
+Ram_0343 = $0343
+Ram_0344 = $0344
+Ram_0345 = $0345
+Ram_0346 = $0346
+Ram_0347 = $0347
+Ram_0348 = $0348
+Ram_0349 = $0349
+Ram_034A = $034A
+Ram_034B = $034B
+Ram_034C = $034C
+Ram_034D = $034D
+Ram_034E = $034E
+Ram_034F = $034F
+Ram_0350 = $0350
+Ram_035A = $035A
+Ram_0360 = $0360
+Ram_0361 = $0361
+Ram_0362 = $0362
+Ram_0363 = $0363
+Ram_0365 = $0365
+Ram_0366 = $0366
+Ram_0367 = $0367
+Ram_0368 = $0368
+Ram_0369 = $0369
+Ram_036A = $036A
+Ram_036B = $036B
+Ram_036C = $036C
+Ram_036D = $036D
+Ram_036E = $036E
+Ram_0371 = $0371
+Ram_0372 = $0372
+Ram_0373 = $0373
+Ram_0374 = $0374
+Ram_0375 = $0375
+Ram_0376 = $0376
+Ram_0377 = $0377
+Ram_0380 = $0380
+Ram_0381 = $0381
+Ram_0386 = $0386
+Ram_0388 = $0388
+Ram_0389 = $0389
+Ram_038A = $038A
+Ram_038B = $038B
+Ram_038D = $038D
+Ram_038E = $038E
+Ram_0390 = $0390
+Ram_0396 = $0396
+Ram_0398 = $0398
+Ram_0399 = $0399
+Ram_039A = $039A
+Ram_03A0 = $03A0
+Ram_03A1 = $03A1
+Ram_03A3 = $03A3
+Ram_03A6 = $03A6
+Ram_03A8 = $03A8
+Ram_03A9 = $03A9
+Ram_03AD = $03AD
+Ram_03AE = $03AE
+Ram_03AF = $03AF
+Ram_03B0 = $03B0
+Ram_03B6 = $03B6
+Ram_03B7 = $03B7
+Ram_03B8 = $03B8
+Ram_03B9 = $03B9
+Ram_03BA = $03BA
+Ram_03C0 = $03C0
+Ram_03C6 = $03C6
+Ram_03C7 = $03C7
+Ram_03C8 = $03C8
+Ram_03C9 = $03C9
+Ram_03CA = $03CA
+Ram_03CB = $03CB
+Ram_03CC = $03CC
+Ram_03CD = $03CD
+Ram_03CE = $03CE
+Ram_0400 = $0400
+Ram_0401 = $0401
+Ram_0402 = $0402
+Ram_0403 = $0403
+Ram_0405 = $0405
+Ram_0406 = $0406
+Ram_0407 = $0407
+Ram_0408 = $0408
+Ram_0409 = $0409
+Ram_040E = $040E
+Ram_040F = $040F
+Ram_0415 = $0415
+Ram_041B = $041B
+Ram_041D = $041D
+Ram_04A0 = $04A0
+Ram_04A4 = $04A4
+Ram_04A6 = $04A6
+Ram_04A8 = $04A8
+Ram_04A9 = $04A9
+Ram_04AB = $04AB
+Ram_04AC = $04AC
+Ram_04AE = $04AE
+Ram_04E0 = $04E0
+Ram_04E1 = $04E1
+Ram_04E2 = $04E2
+Ram_04E3 = $04E3
+Ram_04E5 = $04E5
+Ram_04E6 = $04E6
+Ram_04E8 = $04E8
+Ram_04E9 = $04E9
+Ram_04EA = $04EA
+Ram_04EB = $04EB
+Ram_04ED = $04ED
+Ram_04EE = $04EE
+Ram_04EF = $04EF
+Ram_04FE = $04FE
+Ram_0500 = $0500
+Ram_0501 = $0501
+Ram_0502 = $0502
+Ram_0580 = $0580
+Ram_0584 = $0584
+Ram_05A4 = $05A4
+Ram_0600 = $0600
+Ram_0601 = $0601
+Ram_0602 = $0602
+Ram_0603 = $0603
+Ram_0605 = $0605
+Ram_0606 = $0606
+Ram_0607 = $0607
+Ram_0608 = $0608
+Ram_0609 = $0609
+Ram_060A = $060A
+Ram_060B = $060B
+Ram_060C = $060C
+Ram_060D = $060D
+Ram_060E = $060E
+Ram_060F = $060F
+Ram_0611 = $0611
+Ram_0612 = $0612
+Ram_0614 = $0614
+Ram_0615 = $0615
+Ram_0618 = $0618
+Ram_06A0 = $06A0
+Ram_06A3 = $06A3
+Ram_06A4 = $06A4
+Ram_06A5 = $06A5
+Ram_06A6 = $06A6
+Ram_06A7 = $06A7
+Ram_06A8 = $06A8
+Ram_06A9 = $06A9
+Ram_06AA = $06AA
+Ram_06BA = $06BA
+Ram_06C0 = $06C0
+Ram_06F0 = $06F0
+Ram_06F1 = $06F1
+Ram_06F2 = $06F2
+Ram_06F3 = $06F3
+Ram_0700 = $0700
+Ram_0701 = $0701
+Ram_0790 = $0790
+Ram_0792 = $0792
+Ram_0796 = $0796
+Ram_079A = $079A
+Ram_07A8 = $07A8
+Ram_07B1 = $07B1
+Ram_07B3 = $07B3
+Ram_07B4 = $07B4
+Ram_07B5 = $07B5
+Ram_07B6 = $07B6
+Ram_07F0 = $07F0
+Ram_07F4 = $07F4
+Ram_07FF = $07FF
+Data_C206 = $C206
+Data_F970 = $F970
+Data_FAB3 = $FAB3
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.o b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.o
new file mode 100644
index 0000000..42c78d2
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.o differ
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.s b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.s
new file mode 100644
index 0000000..dd70b1b
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/prg.s	
@@ -0,0 +1,9952 @@
+.setcpu "6502"
+.include "symbols.inc"
+.include "locals.inc"
+
+.segment "PRG"
+
+; Overlapping table aliases. These tables intentionally begin inside encoded
+; instruction bytes, so they are expressed as relocatable symbol aliases rather
+; than duplicate storage labels.
+QueuedPpuTransferDestinationOffsetTable = RunQueuedPpuTransfer + $11 ; CPU $C206
+AudioPitchOrPeriodTable_F970           = Flow_F96F + $01             ; CPU $F970
+AudioSequenceIndexTable_FAB3           = Flow_FA85 + $2E             ; CPU $FAB3
+
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C000.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ResetHandler:
+    cld                             ; PRG $0000 | CPU $C000 | D8
+    sei                             ; PRG $0001 | CPU $C001 | 78
+; -----------------------------------------------------------------------------
+; Global purpose: Wait For Initial Vblank And Disable Rendering.
+; Local behavior: Reads PPUSTATUS, WaitForInitialVblankAndDisableRendering, FrameCounter; mutates PPUCTRL, PPUMASK, WorkPointerOrValueHi, WorkPointerOrValueLo.
+; Parameters: PPUSTATUS, WaitForInitialVblankAndDisableRendering, FrameCounter.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+WaitForInitialVblankAndDisableRendering:
+    lda PPUSTATUS                   ; PRG $0002 | CPU $C002 | AD 02 20
+    bpl WaitForInitialVblankAndDisableRendering                ; PRG $0005 | CPU $C005 | 10 FB
+    ldx #$00                        ; PRG $0007 | CPU $C007 | A2 00
+    stx PPUCTRL                     ; PRG $0009 | CPU $C009 | 8E 00 20
+    stx PPUMASK                     ; PRG $000C | CPU $C00C | 8E 01 20
+    dex                             ; PRG $000F | CPU $C00F | CA
+    txs                             ; PRG $0010 | CPU $C010 | 9A
+    ldx FrameCounter                       ; PRG $0011 | CPU $C011 | A6 27
+    ldy #$07                        ; PRG $0013 | CPU $C013 | A0 07
+    sty WorkPointerOrValueHi                       ; PRG $0015 | CPU $C015 | 84 02
+    ldy #$00                        ; PRG $0017 | CPU $C017 | A0 00
+    sty WorkPointerOrValueLo                       ; PRG $0019 | CPU $C019 | 84 01
+    lda #$00                        ; PRG $001B | CPU $C01B | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Cpu Ram Page Loop.
+; Local behavior: Reads ClearCpuRamPageLoop, WorkPointerOrValueHi, FinishResetInitialization; mutates WorkPointerOrValueLo, WorkPointerOrValueHi.
+; Parameters: ClearCpuRamPageLoop, WorkPointerOrValueHi, FinishResetInitialization.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearCpuRamPageLoop:
+    sta (WorkPointerOrValueLo),y                   ; PRG $001D | CPU $C01D | 91 01
+    dey                             ; PRG $001F | CPU $C01F | 88
+    bne ClearCpuRamPageLoop                ; PRG $0020 | CPU $C020 | D0 FB
+    dec WorkPointerOrValueHi                       ; PRG $0022 | CPU $C022 | C6 02
+    bpl ClearCpuRamPageLoop                ; PRG $0024 | CPU $C024 | 10 F7
+    txa                             ; PRG $0026 | CPU $C026 | 8A
+    bne FinishResetInitialization                ; PRG $0027 | CPU $C027 | D0 02
+    ldx #$5F                        ; PRG $0029 | CPU $C029 | A2 5F
+; -----------------------------------------------------------------------------
+; Global purpose: Finish Reset Initialization.
+; Local behavior: Reads ClearNametable2400WithTileFF, HideAllOamSprites; mutates Ram_06F0, PPUSCROLL, GameMode, SND_CHN, PPUCTRL.
+; Parameters: ClearNametable2400WithTileFF, HideAllOamSprites.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+FinishResetInitialization:
+    stx Ram_06F0                    ; PRG $002B | CPU $C02B | 8E F0 06
+    jsr ClearNametable2400WithTileFF                ; PRG $002E | CPU $C02E | 20 A2 C1
+    jsr HideAllOamSprites                ; PRG $0031 | CPU $C031 | 20 EA C1
+    sty PPUSCROLL                   ; PRG $0034 | CPU $C034 | 8C 05 20
+    sty PPUSCROLL                   ; PRG $0037 | CPU $C037 | 8C 05 20
+    iny                             ; PRG $003A | CPU $C03A | C8
+    sty GameMode                       ; PRG $003B | CPU $C03B | 84 3A
+    lda #$0F                        ; PRG $003D | CPU $C03D | A9 0F
+    sta SND_CHN                     ; PRG $003F | CPU $C03F | 8D 15 40
+    lda #$90                        ; PRG $0042 | CPU $C042 | A9 90
+    sta PPUCTRL                     ; PRG $0044 | CPU $C044 | 8D 00 20
+; -----------------------------------------------------------------------------
+; Global purpose: Select Main Loop Audio Path.
+; Local behavior: Reads GameMode, RunAudioOnlyFrame, PlayerModeOrScreenPhase, RunMainGameFrame; mutates no direct memory mutation observed.
+; Parameters: GameMode, RunAudioOnlyFrame, PlayerModeOrScreenPhase, RunMainGameFrame.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+SelectMainLoopAudioPath:
+    lda GameMode                       ; PRG $0047 | CPU $C047 | A5 3A
+    beq RunAudioOnlyFrame                ; PRG $0049 | CPU $C049 | F0 06
+    lda PlayerModeOrScreenPhase                       ; PRG $004B | CPU $C04B | A5 3C
+    cmp #$01                        ; PRG $004D | CPU $C04D | C9 01
+    bne RunMainGameFrame                ; PRG $004F | CPU $C04F | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Run Audio Only Frame.
+; Local behavior: Reads UpdateAudioEngine; mutates no direct memory mutation observed.
+; Parameters: UpdateAudioEngine.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+RunAudioOnlyFrame:
+    jsr UpdateAudioEngine                ; PRG $0051 | CPU $C051 | 20 20 F8
+; -----------------------------------------------------------------------------
+; Global purpose: Run Main Game Frame.
+; Local behavior: Reads DecrementGameplayTimers, UpdateTitleAndGameplayState, RequestNmiProcessing, SelectMainLoopAudioPath; mutates no direct memory mutation observed.
+; Parameters: DecrementGameplayTimers, UpdateTitleAndGameplayState, RequestNmiProcessing, SelectMainLoopAudioPath.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+RunMainGameFrame:
+    jsr DecrementGameplayTimers                ; PRG $0054 | CPU $C054 | 20 B0 C3
+    jsr UpdateTitleAndGameplayState                ; PRG $0057 | CPU $C057 | 20 BA C0
+    jsr RequestNmiProcessing                ; PRG $005A | CPU $C05A | 20 5F C0
+    beq SelectMainLoopAudioPath                ; PRG $005D | CPU $C05D | F0 E8
+; -----------------------------------------------------------------------------
+; Global purpose: Request Nmi Processing.
+; Local behavior: Reads implicit CPU state or none observed; mutates NmiFrameDelay.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+RequestNmiProcessing:
+    lda #$01                        ; PRG $005F | CPU $C05F | A9 01
+    sta NmiFrameDelay                       ; PRG $0061 | CPU $C061 | 85 32
+; -----------------------------------------------------------------------------
+; Global purpose: Wait For Frame Ready.
+; Local behavior: Reads AdvancePseudoRandomState, FrameReadyFlag, WaitForFrameReady, FrameCounter, NmiFrameDelay; mutates FrameCounter, NmiFrameDelay, FrameReadyFlag.
+; Parameters: AdvancePseudoRandomState, FrameReadyFlag, WaitForFrameReady, FrameCounter, NmiFrameDelay.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$00; sta FrameReadyFlag; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+WaitForFrameReady:
+    jsr AdvancePseudoRandomState                ; PRG $0063 | CPU $C063 | 20 2F C4
+    lda FrameReadyFlag                       ; PRG $0066 | CPU $C066 | A5 30
+    beq WaitForFrameReady                ; PRG $0068 | CPU $C068 | F0 F9
+    inc FrameCounter                       ; PRG $006A | CPU $C06A | E6 27
+    dec NmiFrameDelay                       ; PRG $006C | CPU $C06C | C6 32
+    lda #$00                        ; PRG $006E | CPU $C06E | A9 00
+    sta FrameReadyFlag                       ; PRG $0070 | CPU $C070 | 85 30
+    rts                             ; PRG $0072 | CPU $C072 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Nmi Work Mode.
+; Local behavior: Reads implicit CPU state or none observed; mutates NmiWorkMode.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearNmiWorkMode:
+    lda #$00                        ; PRG $0073 | CPU $C073 | A9 00
+    sta NmiWorkMode                       ; PRG $0075 | CPU $C075 | 85 33
+    nop                             ; PRG $0077 | CPU $C077 | EA
+; -----------------------------------------------------------------------------
+; Global purpose: Wait For Nmi Work Completion.
+; Local behavior: Reads NmiWorkMode, WaitForNmiWorkCompletion; mutates no direct memory mutation observed.
+; Parameters: NmiWorkMode, WaitForNmiWorkCompletion.
+; Returns: returns to caller; flags/register result depends on final instructions: lda NmiWorkMode; beq WaitForNmiWorkCompletion; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+WaitForNmiWorkCompletion:
+    lda NmiWorkMode                       ; PRG $0078 | CPU $C078 | A5 33
+    beq WaitForNmiWorkCompletion                ; PRG $007A | CPU $C07A | F0 FC
+    rts                             ; PRG $007C | CPU $C07C | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Disable Rendering For Nmi Work.
+; Local behavior: Reads ClearNmiWorkMode, WritePpuMaskAndReturn; mutates no direct memory mutation observed.
+; Parameters: ClearNmiWorkMode, WritePpuMaskAndReturn.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DisableRenderingForNmiWork:
+    jsr ClearNmiWorkMode                ; PRG $007D | CPU $C07D | 20 73 C0
+    lda #$06                        ; PRG $0080 | CPU $C080 | A9 06
+    bne WritePpuMaskAndReturn                ; PRG $0082 | CPU $C082 | D0 05
+; -----------------------------------------------------------------------------
+; Global purpose: Enable Rendering After Nmi Work.
+; Local behavior: Reads ClearNmiWorkMode; mutates no direct memory mutation observed.
+; Parameters: ClearNmiWorkMode.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EnableRenderingAfterNmiWork:
+    jsr ClearNmiWorkMode                ; PRG $0084 | CPU $C084 | 20 73 C0
+    lda #$1E                        ; PRG $0087 | CPU $C087 | A9 1E
+; -----------------------------------------------------------------------------
+; Global purpose: Write Ppu Mask And Return.
+; Local behavior: Reads implicit CPU state or none observed; mutates PPUMASK.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: sta PPUMASK; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+WritePpuMaskAndReturn:
+    sta PPUMASK                     ; PRG $0089 | CPU $C089 | 8D 01 20
+    rts                             ; PRG $008C | CPU $C08C | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C08D.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+NmiHandler:
+    pha                             ; PRG $008D | CPU $C08D | 48
+    txa                             ; PRG $008E | CPU $C08E | 8A
+    pha                             ; PRG $008F | CPU $C08F | 48
+    tya                             ; PRG $0090 | CPU $C090 | 98
+    pha                             ; PRG $0091 | CPU $C091 | 48
+    lda #$00                        ; PRG $0092 | CPU $C092 | A9 00
+    sta OAMADDR                     ; PRG $0094 | CPU $C094 | 8D 03 20
+    lda #$02                        ; PRG $0097 | CPU $C097 | A9 02
+    sta OAMDMA                      ; PRG $0099 | CPU $C099 | 8D 14 40
+    lda NmiFrameDelay                       ; PRG $009C | CPU $C09C | A5 32
+    beq CompleteNmiAndRestoreRegisters                ; PRG $009E | CPU $C09E | F0 10
+    jsr RunQueuedPpuTransfer                ; PRG $00A0 | CPU $C0A0 | 20 F5 C1
+    jsr UpdatePpuTransferQueue                ; PRG $00A3 | CPU $C0A3 | 20 70 C3
+    jsr ResetPpuScroll                ; PRG $00A6 | CPU $C0A6 | 20 24 C4
+    jsr UpdateControllerState_C328                ; PRG $00A9 | CPU $C0A9 | 20 28 C3
+    ldy #$01                        ; PRG $00AC | CPU $C0AC | A0 01
+    sty FrameReadyFlag                       ; PRG $00AE | CPU $C0AE | 84 30
+; -----------------------------------------------------------------------------
+; Global purpose: Complete Nmi And Restore Registers.
+; Local behavior: Reads implicit CPU state or none observed; mutates NmiWorkMode.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns from interrupt; restored CPU context.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CompleteNmiAndRestoreRegisters:
+    lda #$01                        ; PRG $00B0 | CPU $C0B0 | A9 01
+    sta NmiWorkMode                       ; PRG $00B2 | CPU $C0B2 | 85 33
+    pla                             ; PRG $00B4 | CPU $C0B4 | 68
+    tay                             ; PRG $00B5 | CPU $C0B5 | A8
+    pla                             ; PRG $00B6 | CPU $C0B6 | 68
+    tax                             ; PRG $00B7 | CPU $C0B7 | AA
+    pla                             ; PRG $00B8 | CPU $C0B8 | 68
+    rti                             ; PRG $00B9 | CPU $C0B9 | 40
+; -----------------------------------------------------------------------------
+; Global purpose: Update Title And Gameplay State.
+; Local behavior: Reads GameMode, HandleStartAndPlayerSelection, ControllerButtons, ClearScreenSubstate, ScreenSubstate, DispatchCurrentScreenState, CurrentScreenState, StartGameplayCountdown; mutates ScreenSubstate.
+; Parameters: GameMode, HandleStartAndPlayerSelection, ControllerButtons, ClearScreenSubstate, ScreenSubstate, DispatchCurrentScreenState, CurrentScreenState, StartGameplayCountdown.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateTitleAndGameplayState:
+    lda GameMode                       ; PRG $00BA | CPU $C0BA | A5 3A
+    bne HandleStartAndPlayerSelection                ; PRG $00BC | CPU $C0BC | D0 6B
+    lda ControllerButtons                       ; PRG $00BE | CPU $C0BE | A5 1A
+    and #$10                        ; PRG $00C0 | CPU $C0C0 | 29 10
+    beq ClearScreenSubstate                ; PRG $00C2 | CPU $C0C2 | F0 40
+    ldy ScreenSubstate                       ; PRG $00C4 | CPU $C0C4 | A4 36
+    bne DispatchCurrentScreenState                ; PRG $00C6 | CPU $C0C6 | D0 40
+    iny                             ; PRG $00C8 | CPU $C0C8 | C8
+    sty ScreenSubstate                       ; PRG $00C9 | CPU $C0C9 | 84 36
+    ldy CurrentScreenState                       ; PRG $00CB | CPU $C0CB | A4 3B
+    cpy #$0D                        ; PRG $00CD | CPU $C0CD | C0 0D
+    beq StartGameplayCountdown                ; PRG $00CF | CPU $C0CF | F0 25
+    cpy #$06                        ; PRG $00D1 | CPU $C0D1 | C0 06
+    bne DispatchCurrentScreenState                ; PRG $00D3 | CPU $C0D3 | D0 33
+    ldx #$07                        ; PRG $00D5 | CPU $C0D5 | A2 07
+; -----------------------------------------------------------------------------
+; Global purpose: Copy Player State Defaults.
+; Local behavior: Reads GameplayTimerArray, CopyPlayerStateDefaults, ClearNmiWorkMode, ClearAudioRequestFlags, SelectAlternateAudioMode; mutates SavedGameplayTimerArray, ReturnScreenState, CurrentScreenState, PPUMASK, PPUCTRL.
+; Parameters: GameplayTimerArray, CopyPlayerStateDefaults, ClearNmiWorkMode, ClearAudioRequestFlags, SelectAlternateAudioMode.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CopyPlayerStateDefaults:
+    lda GameplayTimerArray,x                     ; PRG $00D7 | CPU $C0D7 | B5 20
+    sta SavedGameplayTimerArray,x                     ; PRG $00D9 | CPU $C0D9 | 95 28
+    dex                             ; PRG $00DB | CPU $C0DB | CA
+    bpl CopyPlayerStateDefaults                ; PRG $00DC | CPU $C0DC | 10 F9
+    sty ReturnScreenState                       ; PRG $00DE | CPU $C0DE | 84 3D
+    lda #$0D                        ; PRG $00E0 | CPU $C0E0 | A9 0D
+    sta CurrentScreenState                       ; PRG $00E2 | CPU $C0E2 | 85 3B
+    jsr ClearNmiWorkMode                ; PRG $00E4 | CPU $C0E4 | 20 73 C0
+    lda #$0E                        ; PRG $00E7 | CPU $C0E7 | A9 0E
+    sta PPUMASK                     ; PRG $00E9 | CPU $C0E9 | 8D 01 20
+    lda #$81                        ; PRG $00EC | CPU $C0EC | A9 81
+    sta PPUCTRL                     ; PRG $00EE | CPU $C0EE | 8D 00 20
+    jsr ClearAudioRequestFlags                ; PRG $00F1 | CPU $C0F1 | 20 56 C6
+    beq SelectAlternateAudioMode                ; PRG $00F4 | CPU $C0F4 | F0 08
+; -----------------------------------------------------------------------------
+; Global purpose: Start Gameplay Countdown.
+; Local behavior: Reads implicit CPU state or none observed; mutates GameplayTimer, CurrentScreenState.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+StartGameplayCountdown:
+    lda #$14                        ; PRG $00F6 | CPU $C0F6 | A9 14
+    sta GameplayTimer                       ; PRG $00F8 | CPU $C0F8 | 85 21
+    lda #$0C                        ; PRG $00FA | CPU $C0FA | A9 0C
+    sta CurrentScreenState                       ; PRG $00FC | CPU $C0FC | 85 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Select Alternate Audio Mode.
+; Local behavior: Reads DispatchCurrentScreenState; mutates AudioRequestFlags.
+; Parameters: DispatchCurrentScreenState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+SelectAlternateAudioMode:
+    lda #$02                        ; PRG $00FE | CPU $C0FE | A9 02
+    sta AudioRequestFlags                       ; PRG $0100 | CPU $C100 | 85 FB
+    bne DispatchCurrentScreenState                ; PRG $0102 | CPU $C102 | D0 04
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Screen Substate.
+; Local behavior: Reads implicit CPU state or none observed; mutates ScreenSubstate.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearScreenSubstate:
+    lda #$00                        ; PRG $0104 | CPU $C104 | A9 00
+    sta ScreenSubstate                       ; PRG $0106 | CPU $C106 | 85 36
+; -----------------------------------------------------------------------------
+; Global purpose: Dispatch Current Screen State.
+; Local behavior: Reads CurrentScreenState, DispatchScreenStateHandler; mutates no direct memory mutation observed.
+; Parameters: CurrentScreenState, DispatchScreenStateHandler.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DispatchCurrentScreenState:
+    lda CurrentScreenState                       ; PRG $0108 | CPU $C108 | A5 3B
+    jsr DispatchScreenStateHandler                ; PRG $010A | CPU $C10A | 20 C6 C3
+ScreenStateHandlerTable:
+    .byte $63,$C6,$AB,$C6,$D4,$C6,$EB,$C6,$55,$C7,$C2,$C7,$DD,$C7,$C6,$C8 ; PRG $010D | CPU $C10D
+    .byte $3E,$C9,$4B,$C9,$98,$C9,$AF,$C9,$C7,$C9,$7C,$C0 ; PRG $011D | CPU $C11D
+; -----------------------------------------------------------------------------
+; Global purpose: Handle Start And Player Selection.
+; Local behavior: Reads ControllerButtons, Flow_C142, ClearAudioRequestFlags; mutates GameMode, CurrentScreenState.
+; Parameters: ControllerButtons, Flow_C142, ClearAudioRequestFlags.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+HandleStartAndPlayerSelection:
+    lda ControllerButtons                       ; PRG $0129 | CPU $C129 | A5 1A
+    and #$30                        ; PRG $012B | CPU $C12B | 29 30
+    cmp #$10                        ; PRG $012D | CPU $C12D | C9 10
+    bne Flow_C142                ; PRG $012F | CPU $C12F | D0 11
+    jsr ClearAudioRequestFlags                ; PRG $0131 | CPU $C131 | 20 56 C6
+    sta GameMode                       ; PRG $0134 | CPU $C134 | 85 3A
+    sta CurrentScreenState                       ; PRG $0136 | CPU $C136 | 85 3B
+    ldx #$07                        ; PRG $0138 | CPU $C138 | A2 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C13 A.
+; Local behavior: Reads Flow_C13A, DisableRenderingForNmiWork; mutates ActorFlags.
+; Parameters: Flow_C13A, DisableRenderingForNmiWork.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C13A:
+    sta ActorFlags,x                     ; PRG $013A | CPU $C13A | 95 84
+    dex                             ; PRG $013C | CPU $C13C | CA
+    bpl Flow_C13A                ; PRG $013D | CPU $C13D | 10 FB
+    jmp DisableRenderingForNmiWork                ; PRG $013F | CPU $C13F | 4C 7D C0
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C142.
+; Local behavior: Reads PlayerModeOrScreenPhase, Flow_C18D, Flow_C167, Flow_C160, StartInputLatch, Flow_C173, SelectedPlayerAndScreenFlags, Flow_C15B; mutates no direct memory mutation observed.
+; Parameters: PlayerModeOrScreenPhase, Flow_C18D, Flow_C167, Flow_C160, StartInputLatch, Flow_C173, SelectedPlayerAndScreenFlags, Flow_C15B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C142:
+    ldx PlayerModeOrScreenPhase                       ; PRG $0142 | CPU $C142 | A6 3C
+    beq Flow_C18D                ; PRG $0144 | CPU $C144 | F0 47
+    cmp #$20                        ; PRG $0146 | CPU $C146 | C9 20
+    bne Flow_C167                ; PRG $0148 | CPU $C148 | D0 1D
+    cpx #$01                        ; PRG $014A | CPU $C14A | E0 01
+    bne Flow_C160                ; PRG $014C | CPU $C14C | D0 12
+    lda StartInputLatch                       ; PRG $014E | CPU $C14E | A5 37
+    bne Flow_C173                ; PRG $0150 | CPU $C150 | D0 21
+    ldy SelectedPlayerAndScreenFlags                       ; PRG $0152 | CPU $C152 | A4 38
+    iny                             ; PRG $0154 | CPU $C154 | C8
+    cpy #$04                        ; PRG $0155 | CPU $C155 | C0 04
+    bne Flow_C15B                ; PRG $0157 | CPU $C157 | D0 02
+    ldy #$00                        ; PRG $0159 | CPU $C159 | A0 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C15 B.
+; Local behavior: Reads UpdateZp_37_C16F; mutates SelectedPlayerAndScreenFlags.
+; Parameters: UpdateZp_37_C16F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C15B:
+    sty SelectedPlayerAndScreenFlags                       ; PRG $015B | CPU $C15B | 84 38
+    jmp UpdateZp_37_C16F                ; PRG $015D | CPU $C15D | 4C 6F C1
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C160.
+; Local behavior: Reads ClearAudioRequestFlags, Flow_C18D; mutates PlayerModeOrScreenPhase.
+; Parameters: ClearAudioRequestFlags, Flow_C18D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C160:
+    jsr ClearAudioRequestFlags                ; PRG $0160 | CPU $C160 | 20 56 C6
+    sta PlayerModeOrScreenPhase                       ; PRG $0163 | CPU $C163 | 85 3C
+    beq Flow_C18D                ; PRG $0165 | CPU $C165 | F0 26
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C167.
+; Local behavior: Reads UpdateZp_37_C16F, Flow_C17D; mutates StartInputLatch.
+; Parameters: UpdateZp_37_C16F, Flow_C17D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C167:
+    cmp #$00                        ; PRG $0167 | CPU $C167 | C9 00
+    bne UpdateZp_37_C16F                ; PRG $0169 | CPU $C169 | D0 04
+    sta StartInputLatch                       ; PRG $016B | CPU $C16B | 85 37
+    beq Flow_C17D                ; PRG $016D | CPU $C16D | F0 0E
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 37 C16 F.
+; Local behavior: Reads implicit CPU state or none observed; mutates StartInputLatch.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_37_C16F:
+    lda #$01                        ; PRG $016F | CPU $C16F | A9 01
+    sta StartInputLatch                       ; PRG $0171 | CPU $C171 | 85 37
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C173.
+; Local behavior: Reads ScreenSelectionPositionOrDelay, Flow_C17D; mutates ScreenSelectionPositionOrDelay.
+; Parameters: ScreenSelectionPositionOrDelay, Flow_C17D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C173:
+    lda ScreenSelectionPositionOrDelay                       ; PRG $0173 | CPU $C173 | A5 25
+    cmp #$25                        ; PRG $0175 | CPU $C175 | C9 25
+    bcs Flow_C17D                ; PRG $0177 | CPU $C177 | B0 04
+    lda #$25                        ; PRG $0179 | CPU $C179 | A9 25
+    sta ScreenSelectionPositionOrDelay                       ; PRG $017B | CPU $C17B | 85 25
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C17 D.
+; Local behavior: Reads Flow_C18D, SelectedPlayerAndScreenFlags; mutates OamBuffer.
+; Parameters: Flow_C18D, SelectedPlayerAndScreenFlags.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C17D:
+    cpx #$01                        ; PRG $017D | CPU $C17D | E0 01
+    bne Flow_C18D                ; PRG $017F | CPU $C17F | D0 0C
+    lda SelectedPlayerAndScreenFlags                       ; PRG $0181 | CPU $C181 | A5 38
+    asl a                           ; PRG $0183 | CPU $C183 | 0A
+    asl a                           ; PRG $0184 | CPU $C184 | 0A
+    asl a                           ; PRG $0185 | CPU $C185 | 0A
+    asl a                           ; PRG $0186 | CPU $C186 | 0A
+    clc                             ; PRG $0187 | CPU $C187 | 18
+    adc #$80                        ; PRG $0188 | CPU $C188 | 69 80
+    sta OamBuffer                    ; PRG $018A | CPU $C18A | 8D 00 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C18 D.
+; Local behavior: Reads PlayerModeOrScreenPhase, DispatchScreenStateHandler; mutates no direct memory mutation observed.
+; Parameters: PlayerModeOrScreenPhase, DispatchScreenStateHandler.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C18D:
+    lda PlayerModeOrScreenPhase                       ; PRG $018D | CPU $C18D | A5 3C
+    jsr DispatchScreenStateHandler                ; PRG $018F | CPU $C18F | 20 C6 C3
+    .byte $EB,$C9,$2B,$CA,$41,$CA,$56,$CA,$5B,$CA,$60,$CA,$6E,$CA,$EB,$CA ; PRG $0192 | CPU $C192
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Nametable2400 With Tile FF.
+; Local behavior: Reads FillNametableAndClearAttributes; mutates no direct memory mutation observed.
+; Parameters: FillNametableAndClearAttributes.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearNametable2400WithTileFF:
+    lda #$24                        ; PRG $01A2 | CPU $C1A2 | A9 24
+    ldx #$FF                        ; PRG $01A4 | CPU $C1A4 | A2 FF
+    jsr FillNametableAndClearAttributes                ; PRG $01A6 | CPU $C1A6 | 20 AD C1
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Nametable2000 With Tile24.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearNametable2000WithTile24:
+    ldx #$24                        ; PRG $01A9 | CPU $C1A9 | A2 24
+    lda #$20                        ; PRG $01AB | CPU $C1AB | A9 20
+; -----------------------------------------------------------------------------
+; Global purpose: Fill Nametable And Clear Attributes.
+; Local behavior: Reads PPUSTATUS, WorkPointerOrValueHi, SourceRecordPointerLo; mutates SourceRecordPointerLo, WorkPointerOrValueHi, PPUCTRL, PPUADDR.
+; Parameters: PPUSTATUS, WorkPointerOrValueHi, SourceRecordPointerLo.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+FillNametableAndClearAttributes:
+    stx SourceRecordPointerLo                       ; PRG $01AD | CPU $C1AD | 86 03
+    sta WorkPointerOrValueHi                       ; PRG $01AF | CPU $C1AF | 85 02
+    lda PPUSTATUS                   ; PRG $01B1 | CPU $C1B1 | AD 02 20
+    lda #$90                        ; PRG $01B4 | CPU $C1B4 | A9 90
+    sta PPUCTRL                     ; PRG $01B6 | CPU $C1B6 | 8D 00 20
+    lda WorkPointerOrValueHi                       ; PRG $01B9 | CPU $C1B9 | A5 02
+    sta PPUADDR                     ; PRG $01BB | CPU $C1BB | 8D 06 20
+    lda #$00                        ; PRG $01BE | CPU $C1BE | A9 00
+    sta PPUADDR                     ; PRG $01C0 | CPU $C1C0 | 8D 06 20
+    ldx #$04                        ; PRG $01C3 | CPU $C1C3 | A2 04
+    ldy #$00                        ; PRG $01C5 | CPU $C1C5 | A0 00
+    lda SourceRecordPointerLo                       ; PRG $01C7 | CPU $C1C7 | A5 03
+; -----------------------------------------------------------------------------
+; Global purpose: Fill Nametable Tile Bytes.
+; Local behavior: Reads FillNametableTileBytes, WorkPointerOrValueHi; mutates PPUDATA, PPUADDR.
+; Parameters: FillNametableTileBytes, WorkPointerOrValueHi.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+FillNametableTileBytes:
+    sta PPUDATA                     ; PRG $01C9 | CPU $C1C9 | 8D 07 20
+    dey                             ; PRG $01CC | CPU $C1CC | 88
+    bne FillNametableTileBytes                ; PRG $01CD | CPU $C1CD | D0 FA
+    dex                             ; PRG $01CF | CPU $C1CF | CA
+    bne FillNametableTileBytes                ; PRG $01D0 | CPU $C1D0 | D0 F7
+    lda WorkPointerOrValueHi                       ; PRG $01D2 | CPU $C1D2 | A5 02
+    clc                             ; PRG $01D4 | CPU $C1D4 | 18
+    adc #$03                        ; PRG $01D5 | CPU $C1D5 | 69 03
+    sta PPUADDR                     ; PRG $01D7 | CPU $C1D7 | 8D 06 20
+    lda #$C0                        ; PRG $01DA | CPU $C1DA | A9 C0
+    sta PPUADDR                     ; PRG $01DC | CPU $C1DC | 8D 06 20
+    ldy #$40                        ; PRG $01DF | CPU $C1DF | A0 40
+    lda #$00                        ; PRG $01E1 | CPU $C1E1 | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Nametable Attributes.
+; Local behavior: Reads ClearNametableAttributes; mutates PPUDATA.
+; Parameters: ClearNametableAttributes.
+; Returns: returns to caller; flags/register result depends on final instructions: dey; bne ClearNametableAttributes; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearNametableAttributes:
+    sta PPUDATA                     ; PRG $01E3 | CPU $C1E3 | 8D 07 20
+    dey                             ; PRG $01E6 | CPU $C1E6 | 88
+    bne ClearNametableAttributes                ; PRG $01E7 | CPU $C1E7 | D0 FA
+    rts                             ; PRG $01E9 | CPU $C1E9 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Hide All Oam Sprites.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+HideAllOamSprites:
+    ldy #$00                        ; PRG $01EA | CPU $C1EA | A0 00
+    lda #$F4                        ; PRG $01EC | CPU $C1EC | A9 F4
+; -----------------------------------------------------------------------------
+; Global purpose: Hide OAM sprites loop.
+; Local behavior: Writes $F4 to OamBuffer,Y, decrements Y, and repeats until Y returns to $00.
+; Parameters: A = hidden-sprite Y coordinate ($F4); Y = starting OAM byte offset ($00 for full buffer).
+; Returns: Falls through to the RTS at $C1F4 after all 64 OAM Y bytes are hidden.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+HideOamSpritesLoop:
+    sta OamBuffer,y                  ; PRG $01EE | CPU $C1EE | 99 00 02
+    dey                             ; PRG $01F1 | CPU $C1F1 | 88
+    bne HideOamSpritesLoop                ; PRG $01F2 | CPU $C1F2 | D0 FA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C1 F4.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C1F4:
+    rts                             ; PRG $01F4 | CPU $C1F4 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Run Queued Ppu Transfer.
+; Local behavior: Reads QueuedPpuTransferCount, Flow_C1F4, QueuedPpuTransferSourcePageTable, QueuedPpuTransferDestinationOffsetTable, BeginPpuCommandStream; mutates QueuedPpuTransferCount.
+; Parameters: QueuedPpuTransferCount, Flow_C1F4, QueuedPpuTransferSourcePageTable, QueuedPpuTransferDestinationOffsetTable, BeginPpuCommandStream.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+RunQueuedPpuTransfer:
+    ldy QueuedPpuTransferCount                       ; PRG $01F5 | CPU $C1F5 | A4 34
+    beq Flow_C1F4                ; PRG $01F7 | CPU $C1F7 | F0 FB
+    lda QueuedPpuTransferSourcePageTable,y                 ; PRG $01F9 | CPU $C1F9 | B9 0A C2
+    ldx QueuedPpuTransferDestinationOffsetTable,y                 ; PRG $01FC | CPU $C1FC | BE 06 C2
+    ldy #$00                        ; PRG $01FF | CPU $C1FF | A0 00
+    sty QueuedPpuTransferCount                       ; PRG $0201 | CPU $C201 | 84 34
+    tay                             ; PRG $0203 | CPU $C203 | A8
+    jmp BeginPpuCommandStream                ; PRG $0204 | CPU $C204 | 4C DC C3
+    .byte $16,$3A,$5E ; PRG $0207 | CPU $C207
+
+QueuedPpuTransferSourcePageTable:
+    .byte $82,$F0,$F0,$F0,$F0 ; PRG $020A | CPU $C20A
+; -----------------------------------------------------------------------------
+; Global purpose: Advance Object Record Pointer.
+; Local behavior: Reads ObjectRecordPointerLo, ObjectRecordStride; mutates ObjectRecordPointerLo.
+; Parameters: ObjectRecordPointerLo, ObjectRecordStride.
+; Returns: returns to caller; flags/register result depends on final instructions: adc ObjectRecordStride; sta ObjectRecordPointerLo; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+AdvanceObjectRecordPointer:
+    lda ObjectRecordPointerLo                       ; PRG $020F | CPU $C20F | A5 A8
+    clc                             ; PRG $0211 | CPU $C211 | 18
+    adc ObjectRecordStride                       ; PRG $0212 | CPU $C212 | 65 AA
+    sta ObjectRecordPointerLo                       ; PRG $0214 | CPU $C214 | 85 A8
+    rts                             ; PRG $0216 | CPU $C216 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C217.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+LoadObjectSpriteRenderState:
+    ldy #$0A                        ; PRG $0217 | CPU $C217 | A0 0A
+    lda (ObjectRecordPointerLo),y                   ; PRG $0219 | CPU $C219 | B1 A8
+    tax                             ; PRG $021B | CPU $C21B | AA
+    dey                             ; PRG $021C | CPU $C21C | 88
+    lda (ObjectRecordPointerLo),y                   ; PRG $021D | CPU $C21D | B1 A8
+    sta ObjectScreenX                       ; PRG $021F | CPU $C21F | 85 B9
+    dey                             ; PRG $0221 | CPU $C221 | 88
+    lda (ObjectRecordPointerLo),y                   ; PRG $0222 | CPU $C222 | B1 A8
+    sta ObjectScreenY                       ; PRG $0224 | CPU $C224 | 85 B8
+    dey                             ; PRG $0226 | CPU $C226 | 88
+    lda (ObjectRecordPointerLo),y                   ; PRG $0227 | CPU $C227 | B1 A8
+    sta SpriteAttributes                       ; PRG $0229 | CPU $C229 | 85 B7
+    dey                             ; PRG $022B | CPU $C22B | 88
+    lda (ObjectRecordPointerLo),y                   ; PRG $022C | CPU $C22C | B1 A8
+    asl a                           ; PRG $022E | CPU $C22E | 0A
+    tay                             ; PRG $022F | CPU $C22F | A8
+    lda AnimationBaseTileTable,y                 ; PRG $0230 | CPU $C230 | B9 B0 F6
+    sta CurrentSpriteTileId                       ; PRG $0233 | CPU $C233 | 85 11
+    lda AnimationLayoutIndexTable,y                 ; PRG $0235 | CPU $C235 | B9 AF F6
+    asl a                           ; PRG $0238 | CPU $C238 | 0A
+    tay                             ; PRG $0239 | CPU $C239 | A8
+    lda MetaspriteLayoutPointerTable,y                 ; PRG $023A | CPU $C23A | B9 57 F7
+    sta MetaspriteLayoutPointerLo                       ; PRG $023D | CPU $C23D | 85 14
+    lda MetaspriteLayoutPointerTableHi,y                 ; PRG $023F | CPU $C23F | B9 58 F7
+    sta MetaspriteLayoutPointerHi                       ; PRG $0242 | CPU $C242 | 85 15
+    ldy #$00                        ; PRG $0244 | CPU $C244 | A0 00
+    beq AdvanceMetaspriteLayout                ; PRG $0246 | CPU $C246 | F0 46
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C248.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+RenderMetaspriteEntry:
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $0248 | CPU $C248 | B1 14
+    asl a                           ; PRG $024A | CPU $C24A | 0A
+    bcc EmitOamSprite                ; PRG $024B | CPU $C24B | 90 06
+    lsr a                           ; PRG $024D | CPU $C24D | 4A
+    eor FrameCounter                       ; PRG $024E | CPU $C24E | 45 27
+    lsr a                           ; PRG $0250 | CPU $C250 | 4A
+    bcs SkipFlickerSprite                ; PRG $0251 | CPU $C251 | B0 34
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C253.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EmitOamSprite:
+    iny                             ; PRG $0253 | CPU $C253 | C8
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $0254 | CPU $C254 | B1 14
+    iny                             ; PRG $0256 | CPU $C256 | C8
+    clc                             ; PRG $0257 | CPU $C257 | 18
+    adc ObjectScreenY                       ; PRG $0258 | CPU $C258 | 65 B8
+    adc #$FF                        ; PRG $025A | CPU $C25A | 69 FF
+    sta OamBuffer,x                  ; PRG $025C | CPU $C25C | 9D 00 02
+    inx                             ; PRG $025F | CPU $C25F | E8
+    lda CurrentSpriteTileId                       ; PRG $0260 | CPU $C260 | A5 11
+    sta OamBuffer,x                  ; PRG $0262 | CPU $C262 | 9D 00 02
+    inc CurrentSpriteTileId                       ; PRG $0265 | CPU $C265 | E6 11
+    inx                             ; PRG $0267 | CPU $C267 | E8
+    lda SpriteAttributes                       ; PRG $0268 | CPU $C268 | A5 B7
+    sta OamBuffer,x                  ; PRG $026A | CPU $C26A | 9D 00 02
+    inx                             ; PRG $026D | CPU $C26D | E8
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $026E | CPU $C26E | B1 14
+    bit SpriteAttributes                       ; PRG $0270 | CPU $C270 | 24 B7
+    bvs MirrorSpriteXOffset                ; PRG $0272 | CPU $C272 | 70 03
+    clc                             ; PRG $0274 | CPU $C274 | 18
+    bcc StoreSpriteX                ; PRG $0275 | CPU $C275 | 90 06
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C277.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+MirrorSpriteXOffset:
+    eor #$FF                        ; PRG $0277 | CPU $C277 | 49 FF
+    sec                             ; PRG $0279 | CPU $C279 | 38
+    sbc #$08                        ; PRG $027A | CPU $C27A | E9 08
+    sec                             ; PRG $027C | CPU $C27C | 38
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C27D.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+StoreSpriteX:
+    adc ObjectScreenX                       ; PRG $027D | CPU $C27D | 65 B9
+    iny                             ; PRG $027F | CPU $C27F | C8
+    sta OamBuffer,x                  ; PRG $0280 | CPU $C280 | 9D 00 02
+    inx                             ; PRG $0283 | CPU $C283 | E8
+    jmp AdvanceMetaspriteLayout                ; PRG $0284 | CPU $C284 | 4C 8E C2
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C287.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+SkipFlickerSprite:
+    iny                             ; PRG $0287 | CPU $C287 | C8
+    iny                             ; PRG $0288 | CPU $C288 | C8
+    iny                             ; PRG $0289 | CPU $C289 | C8
+    inc CurrentSpriteTileId                       ; PRG $028A | CPU $C28A | E6 11
+    inc SkippedSpriteCount                       ; PRG $028C | CPU $C28C | E6 0D
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C28E.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+AdvanceMetaspriteLayout:
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $028E | CPU $C28E | B1 14
+    and #$10                        ; PRG $0290 | CPU $C290 | 29 10
+    beq RenderMetaspriteEntry                ; PRG $0292 | CPU $C292 | F0 B4
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $0294 | CPU $C294 | B1 14
+    and #$0F                        ; PRG $0296 | CPU $C296 | 29 0F
+    beq ReturnFromMetaspriteRender                ; PRG $0298 | CPU $C298 | F0 0D
+    tay                             ; PRG $029A | CPU $C29A | A8
+    lda #$F4                        ; PRG $029B | CPU $C29B | A9 F4
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C29D.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+HideUnusedMetaspriteSlots:
+    sta OamBuffer,x                  ; PRG $029D | CPU $C29D | 9D 00 02
+    inx                             ; PRG $02A0 | CPU $C2A0 | E8
+    inx                             ; PRG $02A1 | CPU $C2A1 | E8
+    inx                             ; PRG $02A2 | CPU $C2A2 | E8
+    inx                             ; PRG $02A3 | CPU $C2A3 | E8
+    dey                             ; PRG $02A4 | CPU $C2A4 | 88
+    bne HideUnusedMetaspriteSlots                ; PRG $02A5 | CPU $C2A5 | D0 F6
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C2A7.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ReturnFromMetaspriteRender:
+    rts                             ; PRG $02A7 | CPU $C2A7 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Decrement Object Timer.
+; Local behavior: Reads ObjectRecordPointerLo, Flow_C2B3; mutates ObjectRecordPointerLo.
+; Parameters: ObjectRecordPointerLo, Flow_C2B3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DecrementObjectTimer:
+    ldy #$03                        ; PRG $02A8 | CPU $C2A8 | A0 03
+    lda (ObjectRecordPointerLo),y                   ; PRG $02AA | CPU $C2AA | B1 A8
+    beq Flow_C2B3                ; PRG $02AC | CPU $C2AC | F0 05
+    sec                             ; PRG $02AE | CPU $C2AE | 38
+    sbc #$01                        ; PRG $02AF | CPU $C2AF | E9 01
+    sta (ObjectRecordPointerLo),y                   ; PRG $02B1 | CPU $C2B1 | 91 A8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C2 B3.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C2B3:
+    rts                             ; PRG $02B3 | CPU $C2B3 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch C2 B4.
+; Local behavior: Reads DecrementObjectTimer, Flow_C2B3, ObjectRecordPointerLo, ObjectRecordPointerHi, Flow_C2D0, Flow_C2EF, Flow_C30F; mutates no direct memory mutation observed.
+; Parameters: DecrementObjectTimer, Flow_C2B3, ObjectRecordPointerLo, ObjectRecordPointerHi, Flow_C2D0, Flow_C2EF, Flow_C30F.
+; Returns: returns to caller; flags/register result depends on final instructions: cmp #$06; beq Flow_C30F; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_C2B4:
+    jsr DecrementObjectTimer                ; PRG $02B4 | CPU $C2B4 | 20 A8 C2
+    bne Flow_C2B3                ; PRG $02B7 | CPU $C2B7 | D0 FA
+    ldx ObjectRecordPointerLo                       ; PRG $02B9 | CPU $C2B9 | A6 A8
+    lda ObjectRecordPointerHi                       ; PRG $02BB | CPU $C2BB | A5 A9
+    cmp #$03                        ; PRG $02BD | CPU $C2BD | C9 03
+    beq Flow_C2D0                ; PRG $02BF | CPU $C2BF | F0 0F
+    cmp #$04                        ; PRG $02C1 | CPU $C2C1 | C9 04
+    beq Flow_C2EF                ; PRG $02C3 | CPU $C2C3 | F0 2A
+    cmp #$06                        ; PRG $02C5 | CPU $C2C5 | C9 06
+    beq Flow_C30F                ; PRG $02C7 | CPU $C2C7 | F0 46
+    rts                             ; PRG $02C9 | CPU $C2C9 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C2 CA.
+; Local behavior: Reads IndexedGameplayLookupTable_F5D4; mutates Ram_0305.
+; Parameters: IndexedGameplayLookupTable_F5D4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C2CA:
+    lda IndexedGameplayLookupTable_F5D4,y                 ; PRG $02CA | CPU $C2CA | B9 D4 F5
+    sta Ram_0305,x                  ; PRG $02CD | CPU $C2CD | 9D 05 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C2 D0.
+; Local behavior: Reads Ram_0305, IndexedGameplayLookupTable_F5D4, Flow_C2CA, Ram_0302; mutates Ram_0306, Ram_0303, Ram_0305.
+; Parameters: Ram_0305, IndexedGameplayLookupTable_F5D4, Flow_C2CA, Ram_0302.
+; Returns: returns to caller; flags/register result depends on final instructions: tya; sta Ram_0305,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C2D0:
+    ldy Ram_0305,x                  ; PRG $02D0 | CPU $C2D0 | BC 05 03
+    lda IndexedGameplayLookupTable_F5D4,y                 ; PRG $02D3 | CPU $C2D3 | B9 D4 F5
+    iny                             ; PRG $02D6 | CPU $C2D6 | C8
+    cmp #$FF                        ; PRG $02D7 | CPU $C2D7 | C9 FF
+    beq Flow_C2CA                ; PRG $02D9 | CPU $C2D9 | F0 EF
+    sta Ram_0306,x                  ; PRG $02DB | CPU $C2DB | 9D 06 03
+    lda Ram_0302,x                  ; PRG $02DE | CPU $C2DE | BD 02 03
+    sta Ram_0303,x                  ; PRG $02E1 | CPU $C2E1 | 9D 03 03
+    tya                             ; PRG $02E4 | CPU $C2E4 | 98
+    sta Ram_0305,x                  ; PRG $02E5 | CPU $C2E5 | 9D 05 03
+    rts                             ; PRG $02E8 | CPU $C2E8 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C2 E9.
+; Local behavior: Reads IndexedGameplayLookupTable_F60D; mutates Ram_0405.
+; Parameters: IndexedGameplayLookupTable_F60D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C2E9:
+    lda IndexedGameplayLookupTable_F60D,y                 ; PRG $02E9 | CPU $C2E9 | B9 0D F6
+    sta Ram_0405,x                  ; PRG $02EC | CPU $C2EC | 9D 05 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C2 EF.
+; Local behavior: Reads Ram_0405, IndexedGameplayLookupTable_F60D, Flow_C2E9; mutates Ram_0406, Ram_0403, Ram_0405.
+; Parameters: Ram_0405, IndexedGameplayLookupTable_F60D, Flow_C2E9.
+; Returns: returns to caller; flags/register result depends on final instructions: tya; sta Ram_0405,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C2EF:
+    ldy Ram_0405,x                  ; PRG $02EF | CPU $C2EF | BC 05 04
+    lda IndexedGameplayLookupTable_F60D,y                 ; PRG $02F2 | CPU $C2F2 | B9 0D F6
+    iny                             ; PRG $02F5 | CPU $C2F5 | C8
+    cmp #$FF                        ; PRG $02F6 | CPU $C2F6 | C9 FF
+    beq Flow_C2E9                ; PRG $02F8 | CPU $C2F8 | F0 EF
+    sta Ram_0406,x                  ; PRG $02FA | CPU $C2FA | 9D 06 04
+    lda IndexedGameplayLookupTable_F60D,y                 ; PRG $02FD | CPU $C2FD | B9 0D F6
+    sta Ram_0403,x                  ; PRG $0300 | CPU $C300 | 9D 03 04
+    iny                             ; PRG $0303 | CPU $C303 | C8
+    tya                             ; PRG $0304 | CPU $C304 | 98
+    sta Ram_0405,x                  ; PRG $0305 | CPU $C305 | 9D 05 04
+    rts                             ; PRG $0308 | CPU $C308 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C309.
+; Local behavior: Reads IndexedGameplayLookupTable_F68B; mutates Ram_0605.
+; Parameters: IndexedGameplayLookupTable_F68B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C309:
+    lda IndexedGameplayLookupTable_F68B,y                 ; PRG $0309 | CPU $C309 | B9 8B F6
+    sta Ram_0605,x                  ; PRG $030C | CPU $C30C | 9D 05 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C30 F.
+; Local behavior: Reads Ram_0605, IndexedGameplayLookupTable_F68B, Flow_C309, Ram_0602; mutates Ram_0606, Ram_0603, Ram_0605.
+; Parameters: Ram_0605, IndexedGameplayLookupTable_F68B, Flow_C309, Ram_0602.
+; Returns: returns to caller; flags/register result depends on final instructions: tya; sta Ram_0605,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C30F:
+    ldy Ram_0605,x                  ; PRG $030F | CPU $C30F | BC 05 06
+    lda IndexedGameplayLookupTable_F68B,y                 ; PRG $0312 | CPU $C312 | B9 8B F6
+    iny                             ; PRG $0315 | CPU $C315 | C8
+    cmp #$FF                        ; PRG $0316 | CPU $C316 | C9 FF
+    beq Flow_C309                ; PRG $0318 | CPU $C318 | F0 EF
+    sta Ram_0606,x                  ; PRG $031A | CPU $C31A | 9D 06 06
+    lda Ram_0602,x                  ; PRG $031D | CPU $C31D | BD 02 06
+    sta Ram_0603,x                  ; PRG $0320 | CPU $C320 | 9D 03 06
+    tya                             ; PRG $0323 | CPU $C323 | 98
+    sta Ram_0605,x                  ; PRG $0324 | CPU $C324 | 9D 05 06
+    rts                             ; PRG $0327 | CPU $C327 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Controller State C328.
+; Local behavior: Reads ReadControllerPorts; mutates JOY1.
+; Parameters: ReadControllerPorts.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateControllerState_C328:
+    ldx #$01                        ; PRG $0328 | CPU $C328 | A2 01
+    stx JOY1                        ; PRG $032A | CPU $C32A | 8E 16 40
+    dex                             ; PRG $032D | CPU $C32D | CA
+    txa                             ; PRG $032E | CPU $C32E | 8A
+    sta JOY1                        ; PRG $032F | CPU $C32F | 8D 16 40
+    jsr ReadControllerPorts                ; PRG $0332 | CPU $C332 | 20 36 C3
+    inx                             ; PRG $0335 | CPU $C335 | E8
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C336.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ReadControllerPorts:
+    ldy #$08                        ; PRG $0336 | CPU $C336 | A0 08
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C338.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ShiftControllerBits:
+    pha                             ; PRG $0338 | CPU $C338 | 48
+    lda JOY1,x                      ; PRG $0339 | CPU $C339 | BD 16 40
+    sta WorkPointerOrValueLo                       ; PRG $033C | CPU $C33C | 85 01
+    lsr a                           ; PRG $033E | CPU $C33E | 4A
+    ora WorkPointerOrValueLo                       ; PRG $033F | CPU $C33F | 05 01
+    lsr a                           ; PRG $0341 | CPU $C341 | 4A
+    pla                             ; PRG $0342 | CPU $C342 | 68
+    rol a                           ; PRG $0343 | CPU $C343 | 2A
+    dey                             ; PRG $0344 | CPU $C344 | 88
+    bne ShiftControllerBits                ; PRG $0345 | CPU $C345 | D0 F1
+    stx WorkPointerOrValueLo                       ; PRG $0347 | CPU $C347 | 86 01
+    asl WorkPointerOrValueLo                       ; PRG $0349 | CPU $C349 | 06 01
+    ldx WorkPointerOrValueLo                       ; PRG $034B | CPU $C34B | A6 01
+    ldy ControllerButtons,x                     ; PRG $034D | CPU $C34D | B4 1A
+    sty WorkPointerOrValueLo                       ; PRG $034F | CPU $C34F | 84 01
+    sta ControllerButtons,x                     ; PRG $0351 | CPU $C351 | 95 1A
+    sta ControllerPressedOrScriptInput,x                     ; PRG $0353 | CPU $C353 | 95 1B
+    and #$FF                        ; PRG $0355 | CPU $C355 | 29 FF
+    bpl Flow_C361                ; PRG $0357 | CPU $C357 | 10 08
+    bit WorkPointerOrValueLo                       ; PRG $0359 | CPU $C359 | 24 01
+    bpl Flow_C361                ; PRG $035B | CPU $C35B | 10 04
+    and #$7F                        ; PRG $035D | CPU $C35D | 29 7F
+    sta ControllerPressedOrScriptInput,x                     ; PRG $035F | CPU $C35F | 95 1B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C361.
+; Local behavior: Reads WorkPointerOrValueHi, Flow_C36F, WorkPointerOrValueLo; mutates WorkPointerOrValueHi, ControllerPressedOrScriptInput.
+; Parameters: WorkPointerOrValueHi, Flow_C36F, WorkPointerOrValueLo.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C361:
+    sta WorkPointerOrValueHi                       ; PRG $0361 | CPU $C361 | 85 02
+    bit WorkPointerOrValueHi                       ; PRG $0363 | CPU $C363 | 24 02
+    bvc Flow_C36F                ; PRG $0365 | CPU $C365 | 50 08
+    bit WorkPointerOrValueLo                       ; PRG $0367 | CPU $C367 | 24 01
+    bvc Flow_C36F                ; PRG $0369 | CPU $C369 | 50 04
+    and #$BF                        ; PRG $036B | CPU $C36B | 29 BF
+    sta ControllerPressedOrScriptInput,x                     ; PRG $036D | CPU $C36D | 95 1B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C36 F.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C36F:
+    rts                             ; PRG $036F | CPU $C36F | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ppu Transfer Queue.
+; Local behavior: Reads CollisionResultFlag, Flow_C3AF, PPUSTATUS, Flow_C3A1; mutates WorkPointerOrValueLo, WorkPointerOrValueHi, PPUCTRL.
+; Parameters: CollisionResultFlag, Flow_C3AF, PPUSTATUS, Flow_C3A1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdatePpuTransferQueue:
+    lda CollisionResultFlag                       ; PRG $0370 | CPU $C370 | A5 31
+    beq Flow_C3AF                ; PRG $0372 | CPU $C372 | F0 3B
+    lda #$01                        ; PRG $0374 | CPU $C374 | A9 01
+    sta WorkPointerOrValueLo                       ; PRG $0376 | CPU $C376 | 85 01
+    lda #$07                        ; PRG $0378 | CPU $C378 | A9 07
+    sta WorkPointerOrValueHi                       ; PRG $037A | CPU $C37A | 85 02
+    lda #$90                        ; PRG $037C | CPU $C37C | A9 90
+    sta PPUCTRL                     ; PRG $037E | CPU $C37E | 8D 00 20
+    ldx PPUSTATUS                   ; PRG $0381 | CPU $C381 | AE 02 20
+    ldy #$00                        ; PRG $0384 | CPU $C384 | A0 00
+    beq Flow_C3A1                ; PRG $0386 | CPU $C386 | F0 19
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C388.
+; Local behavior: Reads WorkPointerOrValueLo; mutates PPUADDR.
+; Parameters: WorkPointerOrValueLo.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C388:
+    sta PPUADDR                     ; PRG $0388 | CPU $C388 | 8D 06 20
+    iny                             ; PRG $038B | CPU $C38B | C8
+    lda (WorkPointerOrValueLo),y                   ; PRG $038C | CPU $C38C | B1 01
+    sta PPUADDR                     ; PRG $038E | CPU $C38E | 8D 06 20
+    iny                             ; PRG $0391 | CPU $C391 | C8
+    lda (WorkPointerOrValueLo),y                   ; PRG $0392 | CPU $C392 | B1 01
+    and #$3F                        ; PRG $0394 | CPU $C394 | 29 3F
+    tax                             ; PRG $0396 | CPU $C396 | AA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C397.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_C397; mutates PPUDATA.
+; Parameters: WorkPointerOrValueLo, Flow_C397.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C397:
+    iny                             ; PRG $0397 | CPU $C397 | C8
+    lda (WorkPointerOrValueLo),y                   ; PRG $0398 | CPU $C398 | B1 01
+    sta PPUDATA                     ; PRG $039A | CPU $C39A | 8D 07 20
+    dex                             ; PRG $039D | CPU $C39D | CA
+    bne Flow_C397                ; PRG $039E | CPU $C39E | D0 F7
+    iny                             ; PRG $03A0 | CPU $C3A0 | C8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 A1.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_C388; mutates Ram_0700, Ram_0701, CollisionResultFlag.
+; Parameters: WorkPointerOrValueLo, Flow_C388.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3A1:
+    lda (WorkPointerOrValueLo),y                   ; PRG $03A1 | CPU $C3A1 | B1 01
+    bne Flow_C388                ; PRG $03A3 | CPU $C3A3 | D0 E3
+    lda #$00                        ; PRG $03A5 | CPU $C3A5 | A9 00
+    sta Ram_0700                    ; PRG $03A7 | CPU $C3A7 | 8D 00 07
+    sta Ram_0701                    ; PRG $03AA | CPU $C3AA | 8D 01 07
+    sta CollisionResultFlag                       ; PRG $03AD | CPU $C3AD | 85 31
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 AF.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3AF:
+    rts                             ; PRG $03AF | CPU $C3AF | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Decrement Gameplay Timers.
+; Local behavior: Reads GameplayTimerArray, Flow_C3BC; mutates GameplayTimerArray.
+; Parameters: GameplayTimerArray, Flow_C3BC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DecrementGameplayTimers:
+    ldx #$03                        ; PRG $03B0 | CPU $C3B0 | A2 03
+    dec GameplayTimerArray                       ; PRG $03B2 | CPU $C3B2 | C6 20
+    bpl Flow_C3BC                ; PRG $03B4 | CPU $C3B4 | 10 06
+    lda #$0A                        ; PRG $03B6 | CPU $C3B6 | A9 0A
+    sta GameplayTimerArray                       ; PRG $03B8 | CPU $C3B8 | 85 20
+    ldx #$05                        ; PRG $03BA | CPU $C3BA | A2 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 BC.
+; Local behavior: Reads GameplayTimer, Flow_C3C2; mutates GameplayTimer.
+; Parameters: GameplayTimer, Flow_C3C2.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3BC:
+    lda GameplayTimer,x                     ; PRG $03BC | CPU $C3BC | B5 21
+    beq Flow_C3C2                ; PRG $03BE | CPU $C3BE | F0 02
+    dec GameplayTimer,x                     ; PRG $03C0 | CPU $C3C0 | D6 21
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 C2.
+; Local behavior: Reads Flow_C3BC; mutates no direct memory mutation observed.
+; Parameters: Flow_C3BC.
+; Returns: returns to caller; flags/register result depends on final instructions: dex; bpl Flow_C3BC; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3C2:
+    dex                             ; PRG $03C2 | CPU $C3C2 | CA
+    bpl Flow_C3BC                ; PRG $03C3 | CPU $C3C3 | 10 F7
+    rts                             ; PRG $03C5 | CPU $C3C5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C3C6.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DispatchScreenStateHandler:
+    asl a                           ; PRG $03C6 | CPU $C3C6 | 0A
+    tay                             ; PRG $03C7 | CPU $C3C7 | A8
+    iny                             ; PRG $03C8 | CPU $C3C8 | C8
+    pla                             ; PRG $03C9 | CPU $C3C9 | 68
+    sta MetaspriteLayoutPointerLo                       ; PRG $03CA | CPU $C3CA | 85 14
+    pla                             ; PRG $03CC | CPU $C3CC | 68
+    sta MetaspriteLayoutPointerHi                       ; PRG $03CD | CPU $C3CD | 85 15
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $03CF | CPU $C3CF | B1 14
+    tax                             ; PRG $03D1 | CPU $C3D1 | AA
+    iny                             ; PRG $03D2 | CPU $C3D2 | C8
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $03D3 | CPU $C3D3 | B1 14
+    sta MetaspriteLayoutPointerHi                       ; PRG $03D5 | CPU $C3D5 | 85 15
+    stx MetaspriteLayoutPointerLo                       ; PRG $03D7 | CPU $C3D7 | 86 14
+    jmp (MetaspriteLayoutPointerLo)                     ; PRG $03D9 | CPU $C3D9 | 6C 14 00
+; -----------------------------------------------------------------------------
+; Global purpose: Begin Ppu Command Stream.
+; Local behavior: Reads FinishPpuCommandStreamAndRestoreScroll; mutates WorkPointerOrValueLo, WorkPointerOrValueHi.
+; Parameters: FinishPpuCommandStreamAndRestoreScroll.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+BeginPpuCommandStream:
+    stx WorkPointerOrValueLo                       ; PRG $03DC | CPU $C3DC | 86 01
+    sty WorkPointerOrValueHi                       ; PRG $03DE | CPU $C3DE | 84 02
+    jmp FinishPpuCommandStreamAndRestoreScroll                ; PRG $03E0 | CPU $C3E0 | 4C 1B C4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 E3.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_C3F7; mutates PPUADDR.
+; Parameters: WorkPointerOrValueLo, Flow_C3F7.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3E3:
+    sta PPUADDR                     ; PRG $03E3 | CPU $C3E3 | 8D 06 20
+    iny                             ; PRG $03E6 | CPU $C3E6 | C8
+    lda (WorkPointerOrValueLo),y                   ; PRG $03E7 | CPU $C3E7 | B1 01
+    sta PPUADDR                     ; PRG $03E9 | CPU $C3E9 | 8D 06 20
+    iny                             ; PRG $03EC | CPU $C3EC | C8
+    lda (WorkPointerOrValueLo),y                   ; PRG $03ED | CPU $C3ED | B1 01
+    asl a                           ; PRG $03EF | CPU $C3EF | 0A
+    pha                             ; PRG $03F0 | CPU $C3F0 | 48
+    lda #$94                        ; PRG $03F1 | CPU $C3F1 | A9 94
+    bcs Flow_C3F7                ; PRG $03F3 | CPU $C3F3 | B0 02
+    and #$FB                        ; PRG $03F5 | CPU $C3F5 | 29 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C3 F7.
+; Local behavior: Reads Flow_C401; mutates PPUCTRL.
+; Parameters: Flow_C401.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C3F7:
+    sta PPUCTRL                     ; PRG $03F7 | CPU $C3F7 | 8D 00 20
+    pla                             ; PRG $03FA | CPU $C3FA | 68
+    asl a                           ; PRG $03FB | CPU $C3FB | 0A
+    bcc Flow_C401                ; PRG $03FC | CPU $C3FC | 90 03
+    ora #$02                        ; PRG $03FE | CPU $C3FE | 09 02
+    iny                             ; PRG $0400 | CPU $C400 | C8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C401.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C401:
+    lsr a                           ; PRG $0401 | CPU $C401 | 4A
+    lsr a                           ; PRG $0402 | CPU $C402 | 4A
+    tax                             ; PRG $0403 | CPU $C403 | AA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C404.
+; Local behavior: Reads Flow_C407; mutates no direct memory mutation observed.
+; Parameters: Flow_C407.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C404:
+    bcs Flow_C407                ; PRG $0404 | CPU $C404 | B0 01
+    iny                             ; PRG $0406 | CPU $C406 | C8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C407.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_C404, WorkPointerOrValueHi; mutates PPUDATA, WorkPointerOrValueLo, WorkPointerOrValueHi.
+; Parameters: WorkPointerOrValueLo, Flow_C404, WorkPointerOrValueHi.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C407:
+    lda (WorkPointerOrValueLo),y                   ; PRG $0407 | CPU $C407 | B1 01
+    sta PPUDATA                     ; PRG $0409 | CPU $C409 | 8D 07 20
+    dex                             ; PRG $040C | CPU $C40C | CA
+    bne Flow_C404                ; PRG $040D | CPU $C40D | D0 F5
+    sec                             ; PRG $040F | CPU $C40F | 38
+    tya                             ; PRG $0410 | CPU $C410 | 98
+    adc WorkPointerOrValueLo                       ; PRG $0411 | CPU $C411 | 65 01
+    sta WorkPointerOrValueLo                       ; PRG $0413 | CPU $C413 | 85 01
+    lda #$00                        ; PRG $0415 | CPU $C415 | A9 00
+    adc WorkPointerOrValueHi                       ; PRG $0417 | CPU $C417 | 65 02
+    sta WorkPointerOrValueHi                       ; PRG $0419 | CPU $C419 | 85 02
+; -----------------------------------------------------------------------------
+; Global purpose: Finish Ppu Command Stream And Restore Scroll.
+; Local behavior: Reads PPUSTATUS, WorkPointerOrValueLo, Flow_C3E3; mutates no direct memory mutation observed.
+; Parameters: PPUSTATUS, WorkPointerOrValueLo, Flow_C3E3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+FinishPpuCommandStreamAndRestoreScroll:
+    ldx PPUSTATUS                   ; PRG $041B | CPU $C41B | AE 02 20
+    ldy #$00                        ; PRG $041E | CPU $C41E | A0 00
+    lda (WorkPointerOrValueLo),y                   ; PRG $0420 | CPU $C420 | B1 01
+    bne Flow_C3E3                ; PRG $0422 | CPU $C422 | D0 BF
+; -----------------------------------------------------------------------------
+; Global purpose: Reset Ppu Scroll.
+; Local behavior: Reads implicit CPU state or none observed; mutates PPUSCROLL.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: sta PPUSCROLL; pla; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ResetPpuScroll:
+    pha                             ; PRG $0424 | CPU $C424 | 48
+    lda #$00                        ; PRG $0425 | CPU $C425 | A9 00
+    sta PPUSCROLL                   ; PRG $0427 | CPU $C427 | 8D 05 20
+    sta PPUSCROLL                   ; PRG $042A | CPU $C42A | 8D 05 20
+    pla                             ; PRG $042D | CPU $C42D | 68
+    rts                             ; PRG $042E | CPU $C42E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Advance Pseudo Random State.
+; Local behavior: Reads Ram_06F0, Ram_06F1, Flow_C447; mutates Ram_06F0, Ram_06F1.
+; Parameters: Ram_06F0, Ram_06F1, Flow_C447.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+AdvancePseudoRandomState:
+    lda Ram_06F0                    ; PRG $042F | CPU $C42F | AD F0 06
+    clc                             ; PRG $0432 | CPU $C432 | 18
+    adc #$0F                        ; PRG $0433 | CPU $C433 | 69 0F
+    sta Ram_06F0                    ; PRG $0435 | CPU $C435 | 8D F0 06
+    lda Ram_06F1                    ; PRG $0438 | CPU $C438 | AD F1 06
+    adc #$11                        ; PRG $043B | CPU $C43B | 69 11
+    sta Ram_06F1                    ; PRG $043D | CPU $C43D | 8D F1 06
+    eor Ram_06F0                    ; PRG $0440 | CPU $C440 | 4D F0 06
+    clc                             ; PRG $0443 | CPU $C443 | 18
+    bpl Flow_C447                ; PRG $0444 | CPU $C444 | 10 01
+    sec                             ; PRG $0446 | CPU $C446 | 38
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C447.
+; Local behavior: Reads Ram_06F2, Ram_06F3, Ram_06F0; mutates Ram_06F2, Ram_06F3.
+; Parameters: Ram_06F2, Ram_06F3, Ram_06F0.
+; Returns: returns to caller; flags/register result depends on final instructions: ror Ram_06F3; lda Ram_06F0; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C447:
+    ror Ram_06F2                    ; PRG $0447 | CPU $C447 | 6E F2 06
+    ror Ram_06F3                    ; PRG $044A | CPU $C44A | 6E F3 06
+    lda Ram_06F0                    ; PRG $044D | CPU $C44D | AD F0 06
+    rts                             ; PRG $0450 | CPU $C450 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Expand Packed Score Or Hud Data.
+; Local behavior: Reads SourceRecordPointerLo, Ram_0700; mutates CollisionResultFlag, RecordFieldCount, LoopCounter05.
+; Parameters: SourceRecordPointerLo, Ram_0700.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ExpandPackedScoreOrHudData:
+    lda #$01                        ; PRG $0451 | CPU $C451 | A9 01
+    sta CollisionResultFlag                       ; PRG $0453 | CPU $C453 | 85 31
+    ldy #$00                        ; PRG $0455 | CPU $C455 | A0 00
+    lda (SourceRecordPointerLo),y                   ; PRG $0457 | CPU $C457 | B1 03
+    and #$0F                        ; PRG $0459 | CPU $C459 | 29 0F
+    sta RecordFieldCount                       ; PRG $045B | CPU $C45B | 85 06
+    lda (SourceRecordPointerLo),y                   ; PRG $045D | CPU $C45D | B1 03
+    lsr a                           ; PRG $045F | CPU $C45F | 4A
+    lsr a                           ; PRG $0460 | CPU $C460 | 4A
+    lsr a                           ; PRG $0461 | CPU $C461 | 4A
+    lsr a                           ; PRG $0462 | CPU $C462 | 4A
+    sta LoopCounter05                       ; PRG $0463 | CPU $C463 | 85 05
+    ldx Ram_0700                    ; PRG $0465 | CPU $C465 | AE 00 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C468.
+; Local behavior: Reads WorkPointerOrValueHi, AppendHudTileByte, WorkPointerOrValueLo, RecordFieldCount; mutates RecordRepeatCount.
+; Parameters: WorkPointerOrValueHi, AppendHudTileByte, WorkPointerOrValueLo, RecordFieldCount.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C468:
+    lda WorkPointerOrValueHi                       ; PRG $0468 | CPU $C468 | A5 02
+    jsr AppendHudTileByte                ; PRG $046A | CPU $C46A | 20 D5 C4
+    lda WorkPointerOrValueLo                       ; PRG $046D | CPU $C46D | A5 01
+    jsr AppendHudTileByte                ; PRG $046F | CPU $C46F | 20 D5 C4
+    lda RecordFieldCount                       ; PRG $0472 | CPU $C472 | A5 06
+    sta RecordRepeatCount                       ; PRG $0474 | CPU $C474 | 85 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C476.
+; Local behavior: Reads AppendHudTileByte, SourceRecordPointerLo, RecordRepeatCount, Flow_C476, WorkPointerOrValueLo, WorkPointerOrValueHi, LoopCounter05, Flow_C468; mutates RecordRepeatCount, Ram_0700, WorkPointerOrValueLo, WorkPointerOrValueHi, LoopCounter05.
+; Parameters: AppendHudTileByte, SourceRecordPointerLo, RecordRepeatCount, Flow_C476, WorkPointerOrValueLo, WorkPointerOrValueHi, LoopCounter05, Flow_C468.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C476:
+    jsr AppendHudTileByte                ; PRG $0476 | CPU $C476 | 20 D5 C4
+    iny                             ; PRG $0479 | CPU $C479 | C8
+    lda (SourceRecordPointerLo),y                   ; PRG $047A | CPU $C47A | B1 03
+    dec RecordRepeatCount                       ; PRG $047C | CPU $C47C | C6 07
+    bne Flow_C476                ; PRG $047E | CPU $C47E | D0 F6
+    jsr AppendHudTileByte                ; PRG $0480 | CPU $C480 | 20 D5 C4
+    stx Ram_0700                    ; PRG $0483 | CPU $C483 | 8E 00 07
+    clc                             ; PRG $0486 | CPU $C486 | 18
+    lda #$20                        ; PRG $0487 | CPU $C487 | A9 20
+    adc WorkPointerOrValueLo                       ; PRG $0489 | CPU $C489 | 65 01
+    sta WorkPointerOrValueLo                       ; PRG $048B | CPU $C48B | 85 01
+    lda #$00                        ; PRG $048D | CPU $C48D | A9 00
+    adc WorkPointerOrValueHi                       ; PRG $048F | CPU $C48F | 65 02
+    sta WorkPointerOrValueHi                       ; PRG $0491 | CPU $C491 | 85 02
+    dec LoopCounter05                       ; PRG $0493 | CPU $C493 | C6 05
+    bne Flow_C468                ; PRG $0495 | CPU $C495 | D0 D1
+    beq Flow_C4C0                ; PRG $0497 | CPU $C497 | F0 27
+; -----------------------------------------------------------------------------
+; Global purpose: Select Digit Glyph Table.
+; Local behavior: Reads HudDigitGlyphPointerTableLo, HudDigitGlyphPointerTableHi, MetaspriteLayoutPointerLo, Ram_0700; mutates MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi, CurrentSpriteTileId, CollisionResultFlag.
+; Parameters: HudDigitGlyphPointerTableLo, HudDigitGlyphPointerTableHi, MetaspriteLayoutPointerLo, Ram_0700.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+SelectDigitGlyphTable:
+    asl a                           ; PRG $0499 | CPU $C499 | 0A
+    tay                             ; PRG $049A | CPU $C49A | A8
+    lda HudDigitGlyphPointerTableLo,y                 ; PRG $049B | CPU $C49B | B9 7C EF
+    sta MetaspriteLayoutPointerLo                       ; PRG $049E | CPU $C49E | 85 14
+    lda HudDigitGlyphPointerTableHi,y                 ; PRG $04A0 | CPU $C4A0 | B9 7D EF
+    sta MetaspriteLayoutPointerHi                       ; PRG $04A3 | CPU $C4A3 | 85 15
+    ldy #$00                        ; PRG $04A5 | CPU $C4A5 | A0 00
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $04A7 | CPU $C4A7 | B1 14
+    sta CurrentSpriteTileId                       ; PRG $04A9 | CPU $C4A9 | 85 11
+    iny                             ; PRG $04AB | CPU $C4AB | C8
+    lda #$01                        ; PRG $04AC | CPU $C4AC | A9 01
+    sta CollisionResultFlag                       ; PRG $04AE | CPU $C4AE | 85 31
+    ldx Ram_0700                    ; PRG $04B0 | CPU $C4B0 | AE 00 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C4 B3.
+; Local behavior: Reads MetaspriteLayoutPointerLo, AppendHudTileByte, CurrentSpriteTileId, Flow_C4B3; mutates CurrentSpriteTileId.
+; Parameters: MetaspriteLayoutPointerLo, AppendHudTileByte, CurrentSpriteTileId, Flow_C4B3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C4B3:
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $04B3 | CPU $C4B3 | B1 14
+    jsr AppendHudTileByte                ; PRG $04B5 | CPU $C4B5 | 20 D5 C4
+    iny                             ; PRG $04B8 | CPU $C4B8 | C8
+    dec CurrentSpriteTileId                       ; PRG $04B9 | CPU $C4B9 | C6 11
+    bne Flow_C4B3                ; PRG $04BB | CPU $C4BB | D0 F6
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation C4 BD.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0700.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_C4BD:
+    stx Ram_0700                    ; PRG $04BD | CPU $C4BD | 8E 00 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C4 C0.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0701.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C4C0:
+    lda #$00                        ; PRG $04C0 | CPU $C4C0 | A9 00
+    sta Ram_0701,x                  ; PRG $04C2 | CPU $C4C2 | 9D 01 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C4 C5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C4C5:
+    rts                             ; PRG $04C5 | CPU $C4C5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value C4 C6.
+; Local behavior: Reads AppendHudTileByte, PackedHudOrObjectValue; mutates PackedHudOrObjectValue.
+; Parameters: AppendHudTileByte, PackedHudOrObjectValue.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_C4C6:
+    sta PackedHudOrObjectValue                       ; PRG $04C6 | CPU $C4C6 | 85 16
+    and #$F0                        ; PRG $04C8 | CPU $C4C8 | 29 F0
+    lsr a                           ; PRG $04CA | CPU $C4CA | 4A
+    lsr a                           ; PRG $04CB | CPU $C4CB | 4A
+    lsr a                           ; PRG $04CC | CPU $C4CC | 4A
+    lsr a                           ; PRG $04CD | CPU $C4CD | 4A
+    jsr AppendHudTileByte                ; PRG $04CE | CPU $C4CE | 20 D5 C4
+    lda PackedHudOrObjectValue                       ; PRG $04D1 | CPU $C4D1 | A5 16
+    and #$0F                        ; PRG $04D3 | CPU $C4D3 | 29 0F
+; -----------------------------------------------------------------------------
+; Global purpose: Append Hud Tile Byte.
+; Local behavior: Reads Flow_C4E8, Ram_0700; mutates Ram_0701.
+; Parameters: Flow_C4E8, Ram_0700.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+AppendHudTileByte:
+    sta Ram_0701,x                  ; PRG $04D5 | CPU $C4D5 | 9D 01 07
+    inx                             ; PRG $04D8 | CPU $C4D8 | E8
+    txa                             ; PRG $04D9 | CPU $C4D9 | 8A
+    cmp #$4F                        ; PRG $04DA | CPU $C4DA | C9 4F
+    bcc Flow_C4E8                ; PRG $04DC | CPU $C4DC | 90 0A
+    ldx Ram_0700                    ; PRG $04DE | CPU $C4DE | AE 00 07
+    lda #$00                        ; PRG $04E1 | CPU $C4E1 | A9 00
+    sta Ram_0701,x                  ; PRG $04E3 | CPU $C4E3 | 9D 01 07
+    pla                             ; PRG $04E6 | CPU $C4E6 | 68
+    pla                             ; PRG $04E7 | CPU $C4E7 | 68
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C4 E8.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C4E8:
+    rts                             ; PRG $04E8 | CPU $C4E8 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State C4 E9.
+; Local behavior: Reads WorkPointerOrValueLo, UpdateActorCoordinates_C4F9; mutates CollisionResultFlag.
+; Parameters: WorkPointerOrValueLo, UpdateActorCoordinates_C4F9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_C4E9:
+    lda #$01                        ; PRG $04E9 | CPU $C4E9 | A9 01
+    sta CollisionResultFlag                       ; PRG $04EB | CPU $C4EB | 85 31
+    ldx WorkPointerOrValueLo                       ; PRG $04ED | CPU $C4ED | A6 01
+    jsr UpdateActorCoordinates_C4F9                ; PRG $04EF | CPU $C4EF | 20 F9 C4
+    lda WorkPointerOrValueLo                       ; PRG $04F2 | CPU $C4F2 | A5 01
+    lsr a                           ; PRG $04F4 | CPU $C4F4 | 4A
+    lsr a                           ; PRG $04F5 | CPU $C4F5 | 4A
+    lsr a                           ; PRG $04F6 | CPU $C4F6 | 4A
+    lsr a                           ; PRG $04F7 | CPU $C4F7 | 4A
+    tax                             ; PRG $04F8 | CPU $C4F8 | AA
+; -----------------------------------------------------------------------------
+; Global purpose: Update Actor Coordinates C4 F9.
+; Local behavior: Reads Flow_C4C5, SelectDigitGlyphTable, SourceRecordPointerLo, PlayerOrActorX, TransformPackedValue_C4C6, PlayerOrActorY; mutates SourceRecordPointerLo.
+; Parameters: Flow_C4C5, SelectDigitGlyphTable, SourceRecordPointerLo, PlayerOrActorX, TransformPackedValue_C4C6, PlayerOrActorY.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateActorCoordinates_C4F9:
+    inx                             ; PRG $04F9 | CPU $C4F9 | E8
+    txa                             ; PRG $04FA | CPU $C4FA | 8A
+    and #$0F                        ; PRG $04FB | CPU $C4FB | 29 0F
+    cmp #$09                        ; PRG $04FD | CPU $C4FD | C9 09
+    bcs Flow_C4C5                ; PRG $04FF | CPU $C4FF | B0 C4
+    sta SourceRecordPointerLo                       ; PRG $0501 | CPU $C501 | 85 03
+    jsr SelectDigitGlyphTable                ; PRG $0503 | CPU $C503 | 20 99 C4
+    lda SourceRecordPointerLo                       ; PRG $0506 | CPU $C506 | A5 03
+    asl a                           ; PRG $0508 | CPU $C508 | 0A
+    asl a                           ; PRG $0509 | CPU $C509 | 0A
+    tay                             ; PRG $050A | CPU $C50A | A8
+    lda PlayerOrActorX,y                     ; PRG $050B | CPU $C50B | B9 81 00
+    jsr TransformPackedValue_C4C6                ; PRG $050E | CPU $C50E | 20 C6 C4
+    lda PlayerOrActorY,y                     ; PRG $0511 | CPU $C511 | B9 82 00
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation C514.
+; Local behavior: Reads TransformPackedValue_C4C6, AppendHudTileByte; mutates no direct memory mutation observed.
+; Parameters: TransformPackedValue_C4C6, AppendHudTileByte.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_C514:
+    jsr TransformPackedValue_C4C6                ; PRG $0514 | CPU $C514 | 20 C6 C4
+    lda #$00                        ; PRG $0517 | CPU $C517 | A9 00
+    jsr AppendHudTileByte                ; PRG $0519 | CPU $C519 | 20 D5 C4
+    lda #$00                        ; PRG $051C | CPU $C51C | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation C51 E.
+; Local behavior: Reads AppendHudTileByte, Continuation_C4BD; mutates no direct memory mutation observed.
+; Parameters: AppendHudTileByte, Continuation_C4BD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_C51E:
+    jsr AppendHudTileByte                ; PRG $051E | CPU $C51E | 20 D5 C4
+    jmp Continuation_C4BD                ; PRG $0521 | CPU $C521 | 4C BD C4
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value C524.
+; Local behavior: Reads SelectDigitGlyphTable, SelectedActorIndex, ActorAnimationFrame, Continuation_C51E; mutates no direct memory mutation observed.
+; Parameters: SelectDigitGlyphTable, SelectedActorIndex, ActorAnimationFrame, Continuation_C51E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_C524:
+    lda #$03                        ; PRG $0524 | CPU $C524 | A9 03
+    jsr SelectDigitGlyphTable                ; PRG $0526 | CPU $C526 | 20 99 C4
+    lda SelectedActorIndex                       ; PRG $0529 | CPU $C529 | A5 43
+    asl a                           ; PRG $052B | CPU $C52B | 0A
+    asl a                           ; PRG $052C | CPU $C52C | 0A
+    tay                             ; PRG $052D | CPU $C52D | A8
+    lda ActorAnimationFrame,y                     ; PRG $052E | CPU $C52E | B9 92 00
+    jmp Continuation_C51E                ; PRG $0531 | CPU $C531 | 4C 1E C5
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch C534.
+; Local behavior: Reads SelectDigitGlyphTable, ActiveActorState, TransformPackedValue_C4C6, Continuation_C4BD; mutates no direct memory mutation observed.
+; Parameters: SelectDigitGlyphTable, ActiveActorState, TransformPackedValue_C4C6, Continuation_C4BD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_C534:
+    lda #$05                        ; PRG $0534 | CPU $C534 | A9 05
+    jsr SelectDigitGlyphTable                ; PRG $0536 | CPU $C536 | 20 99 C4
+    lda ActiveActorState                       ; PRG $0539 | CPU $C539 | A5 61
+    jsr TransformPackedValue_C4C6                ; PRG $053B | CPU $C53B | 20 C6 C4
+    jmp Continuation_C4BD                ; PRG $053E | CPU $C53E | 4C BD C4
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation C541.
+; Local behavior: Reads SelectDigitGlyphTable, ScreenEffectState, Continuation_C514; mutates no direct memory mutation observed.
+; Parameters: SelectDigitGlyphTable, ScreenEffectState, Continuation_C514.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_C541:
+    lda #$04                        ; PRG $0541 | CPU $C541 | A9 04
+    jsr SelectDigitGlyphTable                ; PRG $0543 | CPU $C543 | 20 99 C4
+    lda ScreenEffectState                       ; PRG $0546 | CPU $C546 | A5 4E
+    jmp Continuation_C514                ; PRG $0548 | CPU $C548 | 4C 14 C5
+; -----------------------------------------------------------------------------
+; Global purpose: Update Actor Coordinates C54 B.
+; Local behavior: Reads GameMode, Flow_C56D, SelectedActorIndex, ActorY, AddPackedMovementDelta, ActorX; mutates PackedCoordinateOrValue, ActorY, ActorX, PendingObstacleInteraction.
+; Parameters: GameMode, Flow_C56D, SelectedActorIndex, ActorY, AddPackedMovementDelta, ActorX.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateActorCoordinates_C54B:
+    ldx GameMode                       ; PRG $054B | CPU $C54B | A6 3A
+    bne Flow_C56D                ; PRG $054D | CPU $C54D | D0 1E
+    sta PackedCoordinateOrValue                       ; PRG $054F | CPU $C54F | 85 04
+    lda SelectedActorIndex                       ; PRG $0551 | CPU $C551 | A5 43
+    asl a                           ; PRG $0553 | CPU $C553 | 0A
+    asl a                           ; PRG $0554 | CPU $C554 | 0A
+    tax                             ; PRG $0555 | CPU $C555 | AA
+    clc                             ; PRG $0556 | CPU $C556 | 18
+    lda ActorY,x                     ; PRG $0557 | CPU $C557 | B5 86
+    jsr AddPackedMovementDelta                ; PRG $0559 | CPU $C559 | 20 6E C5
+    sta ActorY,x                     ; PRG $055C | CPU $C55C | 95 86
+    lda ActorX,x                     ; PRG $055E | CPU $C55E | B5 85
+    sta PackedCoordinateOrValue                       ; PRG $0560 | CPU $C560 | 85 04
+    lda #$00                        ; PRG $0562 | CPU $C562 | A9 00
+    jsr AddPackedMovementDelta                ; PRG $0564 | CPU $C564 | 20 6E C5
+    sta ActorX,x                     ; PRG $0567 | CPU $C567 | 95 85
+    lda #$01                        ; PRG $0569 | CPU $C569 | A9 01
+    sta PendingObstacleInteraction                       ; PRG $056B | CPU $C56B | 85 46
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C56 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C56D:
+    rts                             ; PRG $056D | CPU $C56D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C56E.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+AddPackedMovementDelta:
+    jsr DecodePackedMovementDelta                ; PRG $056E | CPU $C56E | 20 B1 C5
+    adc WorkPointerOrValueHi                       ; PRG $0571 | CPU $C571 | 65 02
+    cmp #$0A                        ; PRG $0573 | CPU $C573 | C9 0A
+    bcc Flow_C579                ; PRG $0575 | CPU $C575 | 90 02
+    adc #$05                        ; PRG $0577 | CPU $C577 | 69 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C579.
+; Local behavior: Reads SourceRecordPointerLo, PackedCoordinateOrValue, Flow_C58A; mutates SourceRecordPointerLo.
+; Parameters: SourceRecordPointerLo, PackedCoordinateOrValue, Flow_C58A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C579:
+    clc                             ; PRG $0579 | CPU $C579 | 18
+    adc SourceRecordPointerLo                       ; PRG $057A | CPU $C57A | 65 03
+    sta SourceRecordPointerLo                       ; PRG $057C | CPU $C57C | 85 03
+    lda PackedCoordinateOrValue                       ; PRG $057E | CPU $C57E | A5 04
+    and #$F0                        ; PRG $0580 | CPU $C580 | 29 F0
+    adc SourceRecordPointerLo                       ; PRG $0582 | CPU $C582 | 65 03
+    bcc Flow_C58A                ; PRG $0584 | CPU $C584 | 90 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C586.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: adc #$5F; sec; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C586:
+    adc #$5F                        ; PRG $0586 | CPU $C586 | 69 5F
+    sec                             ; PRG $0588 | CPU $C588 | 38
+    rts                             ; PRG $0589 | CPU $C589 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C58 A.
+; Local behavior: Reads Flow_C586; mutates no direct memory mutation observed.
+; Parameters: Flow_C586.
+; Returns: returns to caller; flags/register result depends on final instructions: cmp #$A0; bcs Flow_C586; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C58A:
+    cmp #$A0                        ; PRG $058A | CPU $C58A | C9 A0
+    bcs Flow_C586                ; PRG $058C | CPU $C58C | B0 F8
+    rts                             ; PRG $058E | CPU $C58E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value C58 F.
+; Local behavior: Reads DecodePackedMovementDelta, WorkPointerOrValueHi, Flow_C5A2, SourceRecordPointerLo; mutates WorkPointerOrValueHi, SourceRecordPointerLo.
+; Parameters: DecodePackedMovementDelta, WorkPointerOrValueHi, Flow_C5A2, SourceRecordPointerLo.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_C58F:
+    jsr DecodePackedMovementDelta                ; PRG $058F | CPU $C58F | 20 B1 C5
+    sbc WorkPointerOrValueHi                       ; PRG $0592 | CPU $C592 | E5 02
+    sta WorkPointerOrValueHi                       ; PRG $0594 | CPU $C594 | 85 02
+    bcs Flow_C5A2                ; PRG $0596 | CPU $C596 | B0 0A
+    adc #$0A                        ; PRG $0598 | CPU $C598 | 69 0A
+    sta WorkPointerOrValueHi                       ; PRG $059A | CPU $C59A | 85 02
+    lda SourceRecordPointerLo                       ; PRG $059C | CPU $C59C | A5 03
+    adc #$0F                        ; PRG $059E | CPU $C59E | 69 0F
+    sta SourceRecordPointerLo                       ; PRG $05A0 | CPU $C5A0 | 85 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C5 A2.
+; Local behavior: Reads PackedCoordinateOrValue, SourceRecordPointerLo, Flow_C5AE; mutates no direct memory mutation observed.
+; Parameters: PackedCoordinateOrValue, SourceRecordPointerLo, Flow_C5AE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C5A2:
+    lda PackedCoordinateOrValue                       ; PRG $05A2 | CPU $C5A2 | A5 04
+    and #$F0                        ; PRG $05A4 | CPU $C5A4 | 29 F0
+    sec                             ; PRG $05A6 | CPU $C5A6 | 38
+    sbc SourceRecordPointerLo                       ; PRG $05A7 | CPU $C5A7 | E5 03
+    bcs Flow_C5AE                ; PRG $05A9 | CPU $C5A9 | B0 03
+    adc #$A0                        ; PRG $05AB | CPU $C5AB | 69 A0
+    clc                             ; PRG $05AD | CPU $C5AD | 18
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C5 AE.
+; Local behavior: Reads WorkPointerOrValueHi; mutates no direct memory mutation observed.
+; Parameters: WorkPointerOrValueHi.
+; Returns: returns to caller; flags/register result depends on final instructions: ora WorkPointerOrValueHi; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C5AE:
+    ora WorkPointerOrValueHi                       ; PRG $05AE | CPU $C5AE | 05 02
+    rts                             ; PRG $05B0 | CPU $C5B0 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C5B1.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+DecodePackedMovementDelta:
+    pha                             ; PRG $05B1 | CPU $C5B1 | 48
+    and #$0F                        ; PRG $05B2 | CPU $C5B2 | 29 0F
+    sta WorkPointerOrValueHi                       ; PRG $05B4 | CPU $C5B4 | 85 02
+    pla                             ; PRG $05B6 | CPU $C5B6 | 68
+    and #$F0                        ; PRG $05B7 | CPU $C5B7 | 29 F0
+    sta SourceRecordPointerLo                       ; PRG $05B9 | CPU $C5B9 | 85 03
+    lda PackedCoordinateOrValue                       ; PRG $05BB | CPU $C5BB | A5 04
+    and #$0F                        ; PRG $05BD | CPU $C5BD | 29 0F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C5 BF.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C5BF:
+    rts                             ; PRG $05BF | CPU $C5BF | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C5C0.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateActorObstacleInteraction:
+    lda GameMode                       ; PRG $05C0 | CPU $C5C0 | A5 3A
+    bne Flow_C5BF                ; PRG $05C2 | CPU $C5C2 | D0 FB
+    lda Ram_0700                    ; PRG $05C4 | CPU $C5C4 | AD 00 07
+    cmp #$20                        ; PRG $05C7 | CPU $C5C7 | C9 20
+    bcs Flow_C5BF                ; PRG $05C9 | CPU $C5C9 | B0 F4
+    lda PendingObstacleInteraction                       ; PRG $05CB | CPU $C5CB | A5 46
+    beq Flow_C5BF                ; PRG $05CD | CPU $C5CD | F0 F0
+    lda #$00                        ; PRG $05CF | CPU $C5CF | A9 00
+    sta PendingObstacleInteraction                       ; PRG $05D1 | CPU $C5D1 | 85 46
+    jsr SelectNearestActorOrObstacle                ; PRG $05D3 | CPU $C5D3 | 20 01 C6
+    lda SelectedActorIndex                       ; PRG $05D6 | CPU $C5D6 | A5 43
+    ora #$F0                        ; PRG $05D8 | CPU $C5D8 | 09 F0
+    sta WorkPointerOrValueLo                       ; PRG $05DA | CPU $C5DA | 85 01
+    jsr EvaluateCollisionState_C4E9                ; PRG $05DC | CPU $C5DC | 20 E9 C4
+    lda SelectedActorIndex                       ; PRG $05DF | CPU $C5DF | A5 43
+    asl a                           ; PRG $05E1 | CPU $C5E1 | 0A
+    asl a                           ; PRG $05E2 | CPU $C5E2 | 0A
+    tax                             ; PRG $05E3 | CPU $C5E3 | AA
+    ldy ActorAnimationTimer,x                     ; PRG $05E4 | CPU $C5E4 | B4 90
+    dey                             ; PRG $05E6 | CPU $C5E6 | 88
+    tya                             ; PRG $05E7 | CPU $C5E7 | 98
+    sta ActorAnimationFrame,x                     ; PRG $05E8 | CPU $C5E8 | 95 92
+    lda ActorInteractionState,x                     ; PRG $05EA | CPU $C5EA | B5 91
+    bne Flow_C5FE                ; PRG $05EC | CPU $C5EC | D0 10
+    lda ActorX,x                     ; PRG $05EE | CPU $C5EE | B5 85
+    cmp #$05                        ; PRG $05F0 | CPU $C5F0 | C9 05
+    bne Flow_C5FE                ; PRG $05F2 | CPU $C5F2 | D0 0A
+    sta ActorInteractionState,x                     ; PRG $05F4 | CPU $C5F4 | 95 91
+    inc ActorAnimationTimer,x                     ; PRG $05F6 | CPU $C5F6 | F6 90
+    inc ActorAnimationFrame,x                     ; PRG $05F8 | CPU $C5F8 | F6 92
+    lda #$02                        ; PRG $05FA | CPU $C5FA | A9 02
+    sta AudioRequestFlags                       ; PRG $05FC | CPU $C5FC | 85 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C5 FE.
+; Local behavior: Reads TransformPackedValue_C524; mutates no direct memory mutation observed.
+; Parameters: TransformPackedValue_C524.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C5FE:
+    jmp TransformPackedValue_C524                ; PRG $05FE | CPU $C5FE | 4C 24 C5
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C601.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+SelectNearestActorOrObstacle:
+    lda SelectedActorIndex                       ; PRG $0601 | CPU $C601 | A5 43
+    asl a                           ; PRG $0603 | CPU $C603 | 0A
+    asl a                           ; PRG $0604 | CPU $C604 | 0A
+    tax                             ; PRG $0605 | CPU $C605 | AA
+    sec                             ; PRG $0606 | CPU $C606 | 38
+    lda PlayerOrActorY                       ; PRG $0607 | CPU $C607 | A5 82
+    sta PackedCoordinateOrValue                       ; PRG $0609 | CPU $C609 | 85 04
+    lda ActorY,x                     ; PRG $060B | CPU $C60B | B5 86
+    jsr CalculateAndClampValue_C58F                ; PRG $060D | CPU $C60D | 20 8F C5
+    lda PlayerOrActorX                       ; PRG $0610 | CPU $C610 | A5 81
+    sta PackedCoordinateOrValue                       ; PRG $0612 | CPU $C612 | 85 04
+    lda ActorX,x                     ; PRG $0614 | CPU $C614 | B5 85
+    jsr CalculateAndClampValue_C58F                ; PRG $0616 | CPU $C616 | 20 8F C5
+    bcs CopySelectedActorCoordinates                ; PRG $0619 | CPU $C619 | B0 08
+    lda ActorX,x                     ; PRG $061B | CPU $C61B | B5 85
+    sta PlayerOrActorX                       ; PRG $061D | CPU $C61D | 85 81
+    lda ActorY,x                     ; PRG $061F | CPU $C61F | B5 86
+    sta PlayerOrActorY                       ; PRG $0621 | CPU $C621 | 85 82
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C623.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CopySelectedActorCoordinates:
+    rts                             ; PRG $0623 | CPU $C623 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State C624.
+; Local behavior: Reads ScreenCollisionState, CopySelectedActorCoordinates, SelectedScreenVariant, ScreenEffectTimer; mutates ScreenEffectTimer.
+; Parameters: ScreenCollisionState, CopySelectedActorCoordinates, SelectedScreenVariant, ScreenEffectTimer.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_C624:
+    ldy ScreenCollisionState                       ; PRG $0624 | CPU $C624 | A4 44
+    dey                             ; PRG $0626 | CPU $C626 | 88
+    bne CopySelectedActorCoordinates                ; PRG $0627 | CPU $C627 | D0 FA
+    lda SelectedScreenVariant                       ; PRG $0629 | CPU $C629 | A5 41
+    lsr a                           ; PRG $062B | CPU $C62B | 4A
+    lda ScreenEffectTimer                       ; PRG $062C | CPU $C62C | A5 4F
+    adc #$03                        ; PRG $062E | CPU $C62E | 69 03
+    sta ScreenEffectTimer                       ; PRG $0630 | CPU $C630 | 85 4F
+    bcc CopySelectedActorCoordinates                ; PRG $0632 | CPU $C632 | 90 EF
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 04 C634.
+; Local behavior: Reads ScreenEffectState, CalculateAndClampValue_C58F, Continuation_C541; mutates PackedCoordinateOrValue, ScreenEffectState.
+; Parameters: ScreenEffectState, CalculateAndClampValue_C58F, Continuation_C541.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_04_C634:
+    lda ScreenEffectState                       ; PRG $0634 | CPU $C634 | A5 4E
+    sta PackedCoordinateOrValue                       ; PRG $0636 | CPU $C636 | 85 04
+    lda #$01                        ; PRG $0638 | CPU $C638 | A9 01
+    jsr CalculateAndClampValue_C58F                ; PRG $063A | CPU $C63A | 20 8F C5
+    sta ScreenEffectState                       ; PRG $063D | CPU $C63D | 85 4E
+    jmp Continuation_C541                ; PRG $063F | CPU $C63F | 4C 41 C5
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation C642.
+; Local behavior: Reads implicit CPU state or none observed; mutates CurrentSpriteTileId.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_C642:
+    ldy #$04                        ; PRG $0642 | CPU $C642 | A0 04
+    sty CurrentSpriteTileId                       ; PRG $0644 | CPU $C644 | 84 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C646.
+; Local behavior: Reads CurrentSpriteTileId, ActorStateArray, Flow_C651, ComputeOrDispatch_EC43; mutates no direct memory mutation observed.
+; Parameters: CurrentSpriteTileId, ActorStateArray, Flow_C651, ComputeOrDispatch_EC43.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C646:
+    ldy CurrentSpriteTileId                       ; PRG $0646 | CPU $C646 | A4 11
+    lda ActorStateArray,y                     ; PRG $0648 | CPU $C648 | B9 70 00
+    beq Flow_C651                ; PRG $064B | CPU $C64B | F0 04
+    tya                             ; PRG $064D | CPU $C64D | 98
+    jsr ComputeOrDispatch_EC43                ; PRG $064E | CPU $C64E | 20 43 EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C651.
+; Local behavior: Reads CurrentSpriteTileId, Flow_C646; mutates CurrentSpriteTileId.
+; Parameters: CurrentSpriteTileId, Flow_C646.
+; Returns: returns to caller; flags/register result depends on final instructions: dec CurrentSpriteTileId; bpl Flow_C646; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C651:
+    dec CurrentSpriteTileId                       ; PRG $0651 | CPU $C651 | C6 11
+    bpl Flow_C646                ; PRG $0653 | CPU $C653 | 10 F1
+    rts                             ; PRG $0655 | CPU $C655 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Clear Audio Request Flags.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioChannelRequest, AudioEffectRequest, AudioPendingFlags, AudioModeOrEffectIndex, AudioRequestFlags.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: sta AudioModeOrEffectIndex; sta AudioRequestFlags; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ClearAudioRequestFlags:
+    lda #$00                        ; PRG $0656 | CPU $C656 | A9 00
+    sta AudioChannelRequest                       ; PRG $0658 | CPU $C658 | 85 FF
+    sta AudioEffectRequest                       ; PRG $065A | CPU $C65A | 85 FE
+    sta AudioPendingFlags                       ; PRG $065C | CPU $C65C | 85 FD
+    sta AudioModeOrEffectIndex                       ; PRG $065E | CPU $C65E | 85 FC
+    sta AudioRequestFlags                       ; PRG $0660 | CPU $C660 | 85 FB
+    rts                             ; PRG $0662 | CPU $C662 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C663.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+InitializeGameplayActors:
+    lda SelectedPlayerAndScreenFlags                       ; PRG $0663 | CPU $C663 | A5 38
+    and #$02                        ; PRG $0665 | CPU $C665 | 29 02
+    lsr a                           ; PRG $0667 | CPU $C667 | 4A
+    sta SelectedPlayerIndex                       ; PRG $0668 | CPU $C668 | 85 40
+    lda SelectedPlayerAndScreenFlags                       ; PRG $066A | CPU $C66A | A5 38
+    and #$01                        ; PRG $066C | CPU $C66C | 29 01
+    sta SelectedScreenVariant                       ; PRG $066E | CPU $C66E | 85 41
+    asl a                           ; PRG $0670 | CPU $C670 | 0A
+    tay                             ; PRG $0671 | CPU $C671 | A8
+    lda PlayerStartXTable,y                     ; PRG $0672 | CPU $C672 | B9 8C 00
+    sta PlayerOrActorX                       ; PRG $0675 | CPU $C675 | 85 81
+    lda PlayerStartYTable,y                     ; PRG $0677 | CPU $C677 | B9 8D 00
+    sta PlayerOrActorY                       ; PRG $067A | CPU $C67A | 85 82
+    lda #$00                        ; PRG $067C | CPU $C67C | A9 00
+    sta PlayerMotionState                       ; PRG $067E | CPU $C67E | 85 83
+    sta ActorInteractionState                       ; PRG $0680 | CPU $C680 | 85 91
+    sta ObstacleInteractionState                       ; PRG $0682 | CPU $C682 | 85 95
+    lda #$03                        ; PRG $0684 | CPU $C684 | A9 03
+    sta ActorAnimationTimer                       ; PRG $0686 | CPU $C686 | 85 90
+    sta ObstacleAnimationTimer                       ; PRG $0688 | CPU $C688 | 85 94
+    sta ActorAnimationFrame                       ; PRG $068A | CPU $C68A | 85 92
+    sta ObstacleAnimationFrame                       ; PRG $068C | CPU $C68C | 85 96
+    lda #$00                        ; PRG $068E | CPU $C68E | A9 00
+    ldx #$3F                        ; PRG $0690 | CPU $C690 | A2 3F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C692.
+; Local behavior: Reads Flow_C692, CurrentScreenState; mutates Ram_0580, SelectedActorIndex, Ram_0584, Ram_05A4, QueuedPpuTransferCount, AudioRequestFlags, CurrentScreenState.
+; Parameters: Flow_C692, CurrentScreenState.
+; Returns: returns to caller; flags/register result depends on final instructions: sta AudioRequestFlags; inc CurrentScreenState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C692:
+    sta Ram_0580,x                  ; PRG $0692 | CPU $C692 | 9D 80 05
+    dex                             ; PRG $0695 | CPU $C695 | CA
+    bpl Flow_C692                ; PRG $0696 | CPU $C696 | 10 FA
+    sta SelectedActorIndex                       ; PRG $0698 | CPU $C698 | 85 43
+    lda #$01                        ; PRG $069A | CPU $C69A | A9 01
+    sta Ram_0584                    ; PRG $069C | CPU $C69C | 8D 84 05
+    sta Ram_05A4                    ; PRG $069F | CPU $C69F | 8D A4 05
+    sta QueuedPpuTransferCount                       ; PRG $06A2 | CPU $C6A2 | 85 34
+    lda #$05                        ; PRG $06A4 | CPU $C6A4 | A9 05
+    sta AudioRequestFlags                       ; PRG $06A6 | CPU $C6A6 | 85 FB
+    inc CurrentScreenState                       ; PRG $06A8 | CPU $C6A8 | E6 3B
+    rts                             ; PRG $06AA | CPU $C6AA | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C6AB.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+InitializeScreenState1:
+    jsr DisableRenderingForNmiWork                ; PRG $06AB | CPU $C6AB | 20 7D C0
+    jsr ClearNametable2000WithTile24                ; PRG $06AE | CPU $C6AE | 20 A9 C1
+    jsr HideAllOamSprites                ; PRG $06B1 | CPU $C6B1 | 20 EA C1
+    lda SelectedActorIndex                       ; PRG $06B4 | CPU $C6B4 | A5 43
+    asl a                           ; PRG $06B6 | CPU $C6B6 | 0A
+    asl a                           ; PRG $06B7 | CPU $C6B7 | 0A
+    asl a                           ; PRG $06B8 | CPU $C6B8 | 0A
+    asl a                           ; PRG $06B9 | CPU $C6B9 | 0A
+    asl a                           ; PRG $06BA | CPU $C6BA | 0A
+    tay                             ; PRG $06BB | CPU $C6BB | A8
+    ldx #$00                        ; PRG $06BC | CPU $C6BC | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C6 BE.
+; Local behavior: Reads Ram_0580, Flow_C6BE, CurrentScreenState; mutates ActiveActorType, ObjectSpawnType, GameplayObjectAnimation, CurrentScreenState.
+; Parameters: Ram_0580, Flow_C6BE, CurrentScreenState.
+; Returns: returns to caller; flags/register result depends on final instructions: sta GameplayObjectAnimation; inc CurrentScreenState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C6BE:
+    lda Ram_0580,y                  ; PRG $06BE | CPU $C6BE | B9 80 05
+    sta ActiveActorType,x                     ; PRG $06C1 | CPU $C6C1 | 95 60
+    iny                             ; PRG $06C3 | CPU $C6C3 | C8
+    inx                             ; PRG $06C4 | CPU $C6C4 | E8
+    cpx #$20                        ; PRG $06C5 | CPU $C6C5 | E0 20
+    bne Flow_C6BE                ; PRG $06C7 | CPU $C6C7 | D0 F5
+    lda #$01                        ; PRG $06C9 | CPU $C6C9 | A9 01
+    sta ObjectSpawnType                       ; PRG $06CB | CPU $C6CB | 85 48
+    lda #$00                        ; PRG $06CD | CPU $C6CD | A9 00
+    sta GameplayObjectAnimation                       ; PRG $06CF | CPU $C6CF | 85 55
+    inc CurrentScreenState                       ; PRG $06D1 | CPU $C6D1 | E6 3B
+    rts                             ; PRG $06D3 | CPU $C6D3 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C6D4.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+InitializeScreenState2:
+    ldy #$03                        ; PRG $06D4 | CPU $C6D4 | A0 03
+    lda SelectedPlayerIndex                       ; PRG $06D6 | CPU $C6D6 | A5 40
+    beq Flow_C6E4                ; PRG $06D8 | CPU $C6D8 | F0 0A
+    lda SelectedActorIndex                       ; PRG $06DA | CPU $C6DA | A5 43
+    clc                             ; PRG $06DC | CPU $C6DC | 18
+    adc #$06                        ; PRG $06DD | CPU $C6DD | 69 06
+    jsr SelectDigitGlyphTable                ; PRG $06DF | CPU $C6DF | 20 99 C4
+    ldy #$08                        ; PRG $06E2 | CPU $C6E2 | A0 08
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C6 E4.
+; Local behavior: Reads CurrentScreenState, EnableRenderingAfterNmiWork; mutates ScreenSelectionPositionOrDelay, CurrentScreenState.
+; Parameters: CurrentScreenState, EnableRenderingAfterNmiWork.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C6E4:
+    sty ScreenSelectionPositionOrDelay                       ; PRG $06E4 | CPU $C6E4 | 84 25
+    inc CurrentScreenState                       ; PRG $06E6 | CPU $C6E6 | E6 3B
+    jmp EnableRenderingAfterNmiWork                ; PRG $06E8 | CPU $C6E8 | 4C 84 C0
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C6EB.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateActiveScreenObjects:
+    lda ScreenSelectionPositionOrDelay                       ; PRG $06EB | CPU $C6EB | A5 25
+    bne Flow_C70B                ; PRG $06ED | CPU $C6ED | D0 1C
+    jsr DisableRenderingForNmiWork                ; PRG $06EF | CPU $C6EF | 20 7D C0
+    lda ScreenObjectTrigger                       ; PRG $06F2 | CPU $C6F2 | A5 64
+    beq Flow_C709                ; PRG $06F4 | CPU $C6F4 | F0 13
+    lda #$00                        ; PRG $06F6 | CPU $C6F6 | A9 00
+    sta ScreenObjectTrigger                       ; PRG $06F8 | CPU $C6F8 | 85 64
+    jsr PrepareScreenObjectUpdate                ; PRG $06FA | CPU $C6FA | 20 10 C7
+    clc                             ; PRG $06FD | CPU $C6FD | 18
+    lda ActiveActorState                       ; PRG $06FE | CPU $C6FE | A5 61
+    sta PackedCoordinateOrValue                       ; PRG $0700 | CPU $C700 | 85 04
+    lda #$01                        ; PRG $0702 | CPU $C702 | A9 01
+    jsr AddPackedMovementDelta                ; PRG $0704 | CPU $C704 | 20 6E C5
+    sta ActiveActorState                       ; PRG $0707 | CPU $C707 | 85 61
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C709.
+; Local behavior: Reads CurrentScreenState; mutates CurrentScreenState.
+; Parameters: CurrentScreenState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C709:
+    inc CurrentScreenState                       ; PRG $0709 | CPU $C709 | E6 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C70 B.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C70B:
+    rts                             ; PRG $070B | CPU $C70B | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C70 C.
+; Local behavior: Reads implicit CPU state or none observed; mutates ActiveActorType.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C70C:
+    lda #$7E                        ; PRG $070C | CPU $C70C | A9 7E
+    sta ActiveActorType                       ; PRG $070E | CPU $C70E | 85 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C710.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+PrepareScreenObjectUpdate:
+    ldy ActiveActorType                       ; PRG $0710 | CPU $C710 | A4 60
+    lda ActorCollisionOrStateTable_EC69,y                 ; PRG $0712 | CPU $C712 | B9 69 EC
+    cmp #$AA                        ; PRG $0715 | CPU $C715 | C9 AA
+    beq Flow_C70C                ; PRG $0717 | CPU $C717 | F0 F3
+    sta ScreenObjectMode                       ; PRG $0719 | CPU $C719 | 85 62
+    iny                             ; PRG $071B | CPU $C71B | C8
+    lda ActorCollisionOrStateTable_EC69,y                 ; PRG $071C | CPU $C71C | B9 69 EC
+    sta ScreenObjectTimer                       ; PRG $071F | CPU $C71F | 85 63
+    iny                             ; PRG $0721 | CPU $C721 | C8
+    ldx #$00                        ; PRG $0722 | CPU $C722 | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C724.
+; Local behavior: Reads ActorCollisionOrStateTable_EC69, Flow_C724; mutates ActorTimerArray, ActiveActorType, ActorTableIndex, ActorAnimationStep.
+; Parameters: ActorCollisionOrStateTable_EC69, Flow_C724.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C724:
+    lda ActorCollisionOrStateTable_EC69,y                 ; PRG $0724 | CPU $C724 | B9 69 EC
+    sta ActorTimerArray,x                     ; PRG $0727 | CPU $C727 | 95 68
+    iny                             ; PRG $0729 | CPU $C729 | C8
+    inx                             ; PRG $072A | CPU $C72A | E8
+    cpx #$07                        ; PRG $072B | CPU $C72B | E0 07
+    bne Flow_C724                ; PRG $072D | CPU $C72D | D0 F5
+    sty ActiveActorType                       ; PRG $072F | CPU $C72F | 84 60
+    lda #$20                        ; PRG $0731 | CPU $C731 | A9 20
+    sta ActorTableIndex                       ; PRG $0733 | CPU $C733 | 85 6F
+    lda #$05                        ; PRG $0735 | CPU $C735 | A9 05
+    sta ActorAnimationStep                       ; PRG $0737 | CPU $C737 | 85 75
+    ldy #$04                        ; PRG $0739 | CPU $C739 | A0 04
+    lda #$01                        ; PRG $073B | CPU $C73B | A9 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C73 D.
+; Local behavior: Reads Flow_C73D, ActiveActorState, SelectedScreenVariant, ScreenVariantInitialStateTable; mutates ActorStateArray, ScreenVariantInitialState.
+; Parameters: Flow_C73D, ActiveActorState, SelectedScreenVariant, ScreenVariantInitialStateTable.
+; Returns: returns to caller; flags/register result depends on final instructions: lda ScreenVariantInitialStateTable,y; sta ScreenVariantInitialState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C73D:
+    sta ActorStateArray,y                     ; PRG $073D | CPU $C73D | 99 70 00
+    dey                             ; PRG $0740 | CPU $C740 | 88
+    bpl Flow_C73D                ; PRG $0741 | CPU $C741 | 10 FA
+    lda ActiveActorState                       ; PRG $0743 | CPU $C743 | A5 61
+    cmp #$06                        ; PRG $0745 | CPU $C745 | C9 06
+    lda SelectedScreenVariant                       ; PRG $0747 | CPU $C747 | A5 41
+    asl a                           ; PRG $0749 | CPU $C749 | 0A
+    tay                             ; PRG $074A | CPU $C74A | A8
+    lda ScreenVariantInitialStateTable,y                 ; PRG $074B | CPU $C74B | B9 51 C7
+    sta ScreenVariantInitialState                       ; PRG $074E | CPU $C74E | 85 78
+    rts                             ; PRG $0750 | CPU $C750 | 60
+
+ScreenVariantInitialStateTable:
+    .byte $00,$03,$03,$05 ; PRG $0751 | CPU $C751
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C755.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState4:
+    jsr ClearNametable2000WithTile24                ; PRG $0755 | CPU $C755 | 20 A9 C1
+    jsr HideAllOamSprites                ; PRG $0758 | CPU $C758 | 20 EA C1
+    jsr ComputeOrDispatch_C76F                ; PRG $075B | CPU $C75B | 20 6F C7
+    jsr UpdateZp_01_C7B0                ; PRG $075E | CPU $C75E | 20 B0 C7
+    jsr TransformPackedValue_C524                ; PRG $0761 | CPU $C761 | 20 24 C5
+    jsr ComputeOrDispatch_C534                ; PRG $0764 | CPU $C764 | 20 34 C5
+    jsr RequestNmiProcessing                ; PRG $0767 | CPU $C767 | 20 5F C0
+    inc CurrentScreenState                       ; PRG $076A | CPU $C76A | E6 3B
+    jmp Continuation_C642                ; PRG $076C | CPU $C76C | 4C 42 C6
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch C76 F.
+; Local behavior: Reads BeginPpuCommandStream, ScreenObjectMode, Flow_C784; mutates no direct memory mutation observed.
+; Parameters: BeginPpuCommandStream, ScreenObjectMode, Flow_C784.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_C76F:
+    ldx #$03                        ; PRG $076F | CPU $C76F | A2 03
+    ldy #$F2                        ; PRG $0771 | CPU $C771 | A0 F2
+    jsr BeginPpuCommandStream                ; PRG $0773 | CPU $C773 | 20 DC C3
+    ldx #$5C                        ; PRG $0776 | CPU $C776 | A2 5C
+    ldy #$F2                        ; PRG $0778 | CPU $C778 | A0 F2
+    lda ScreenObjectMode                       ; PRG $077A | CPU $C77A | A5 62
+    cmp #$02                        ; PRG $077C | CPU $C77C | C9 02
+    bne Flow_C784                ; PRG $077E | CPU $C77E | D0 04
+    ldx #$06                        ; PRG $0780 | CPU $C780 | A2 06
+    ldy #$F4                        ; PRG $0782 | CPU $C782 | A0 F4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C784.
+; Local behavior: Reads BeginPpuCommandStream, ClearNmiWorkMode, ScreenObjectMode, Flow_C797; mutates no direct memory mutation observed.
+; Parameters: BeginPpuCommandStream, ClearNmiWorkMode, ScreenObjectMode, Flow_C797.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C784:
+    jsr BeginPpuCommandStream                ; PRG $0784 | CPU $C784 | 20 DC C3
+    jsr ClearNmiWorkMode                ; PRG $0787 | CPU $C787 | 20 73 C0
+    lda ScreenObjectMode                       ; PRG $078A | CPU $C78A | A5 62
+    cmp #$01                        ; PRG $078C | CPU $C78C | C9 01
+    bne Flow_C797                ; PRG $078E | CPU $C78E | D0 07
+    ldx #$AF                        ; PRG $0790 | CPU $C790 | A2 AF
+    ldy #$F5                        ; PRG $0792 | CPU $C792 | A0 F5
+    jsr BeginPpuCommandStream                ; PRG $0794 | CPU $C794 | 20 DC C3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C797.
+; Local behavior: Reads BeginPpuCommandStream, SelectedPlayerIndex, Flow_C7A9; mutates no direct memory mutation observed.
+; Parameters: BeginPpuCommandStream, SelectedPlayerIndex, Flow_C7A9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C797:
+    ldx #$C1                        ; PRG $0797 | CPU $C797 | A2 C1
+    ldy #$F5                        ; PRG $0799 | CPU $C799 | A0 F5
+    jsr BeginPpuCommandStream                ; PRG $079B | CPU $C79B | 20 DC C3
+    lda SelectedPlayerIndex                       ; PRG $079E | CPU $C79E | A5 40
+    beq Flow_C7A9                ; PRG $07A0 | CPU $C7A0 | F0 07
+    ldx #$CE                        ; PRG $07A2 | CPU $C7A2 | A2 CE
+    ldy #$F5                        ; PRG $07A4 | CPU $C7A4 | A0 F5
+    jsr BeginPpuCommandStream                ; PRG $07A6 | CPU $C7A6 | 20 DC C3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C7 A9.
+; Local behavior: Reads ScreenObjectMode, QueuedPpuTransferCount; mutates QueuedPpuTransferCount.
+; Parameters: ScreenObjectMode, QueuedPpuTransferCount.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C7A9:
+    lda ScreenObjectMode                       ; PRG $07A9 | CPU $C7A9 | A5 62
+    sta QueuedPpuTransferCount                       ; PRG $07AB | CPU $C7AB | 85 34
+    inc QueuedPpuTransferCount                       ; PRG $07AD | CPU $C7AD | E6 34
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C7 AF.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C7AF:
+    rts                             ; PRG $07AF | CPU $C7AF | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 01 C7 B0.
+; Local behavior: Reads EvaluateCollisionState_C4E9, SelectedPlayerIndex, Flow_C7AF; mutates WorkPointerOrValueLo.
+; Parameters: EvaluateCollisionState_C4E9, SelectedPlayerIndex, Flow_C7AF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_01_C7B0:
+    lda #$F0                        ; PRG $07B0 | CPU $C7B0 | A9 F0
+    sta WorkPointerOrValueLo                       ; PRG $07B2 | CPU $C7B2 | 85 01
+    jsr EvaluateCollisionState_C4E9                ; PRG $07B4 | CPU $C7B4 | 20 E9 C4
+    lda SelectedPlayerIndex                       ; PRG $07B7 | CPU $C7B7 | A5 40
+    beq Flow_C7AF                ; PRG $07B9 | CPU $C7B9 | F0 F4
+    lda #$A1                        ; PRG $07BB | CPU $C7BB | A9 A1
+    sta WorkPointerOrValueLo                       ; PRG $07BD | CPU $C7BD | 85 01
+    jmp EvaluateCollisionState_C4E9                ; PRG $07BF | CPU $C7BF | 4C E9 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C7C2.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState5:
+    jsr UpdateRam_0300_CB2B                ; PRG $07C2 | CPU $C7C2 | 20 2B CB
+    jsr UpdateZp_04_E7C5                ; PRG $07C5 | CPU $C7C5 | 20 C5 E7
+    jsr EnableRenderingAfterNmiWork                ; PRG $07C8 | CPU $C7C8 | 20 84 C0
+    lda #$80                        ; PRG $07CB | CPU $C7CB | A9 80
+    sta ScreenEffectState                       ; PRG $07CD | CPU $C7CD | 85 4E
+    lda #$00                        ; PRG $07CF | CPU $C7CF | A9 00
+    sta ScreenEffectTimer                       ; PRG $07D1 | CPU $C7D1 | 85 4F
+    sta ObjectSpawnDelay                       ; PRG $07D3 | CPU $C7D3 | 85 47
+    sta ScreenCollisionState                       ; PRG $07D5 | CPU $C7D5 | 85 44
+    sta Ram_03A0                    ; PRG $07D7 | CPU $C7D7 | 8D A0 03
+    inc CurrentScreenState                       ; PRG $07DA | CPU $C7DA | E6 3B
+    rts                             ; PRG $07DC | CPU $C7DC | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C7DD.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState6:
+    jsr UpdateObjectScreenY_D1D7                ; PRG $07DD | CPU $C7DD | 20 D7 D1
+    jsr UpdateZp_A8_CB89                ; PRG $07E0 | CPU $C7E0 | 20 89 CB
+    jsr UpdateZp_A8_CEA9                ; PRG $07E3 | CPU $C7E3 | 20 A9 CE
+    jsr TransformPackedValue_D023                ; PRG $07E6 | CPU $C7E6 | 20 23 D0
+    jsr UpdateZp_A8_D2F2                ; PRG $07E9 | CPU $C7E9 | 20 F2 D2
+    jsr EvaluateCollisionState_E86A                ; PRG $07EC | CPU $C7EC | 20 6A E8
+    jsr EvaluateCollisionState_DF94                ; PRG $07EF | CPU $C7EF | 20 94 DF
+    jsr UpdateZp_A8_EBC6                ; PRG $07F2 | CPU $C7F2 | 20 C6 EB
+    jsr EvaluateCollisionState_DED5                ; PRG $07F5 | CPU $C7F5 | 20 D5 DE
+    jsr UpdateRam_0371_D75A                ; PRG $07F8 | CPU $C7F8 | 20 5A D7
+    jsr EvaluateCollisionState_DD71                ; PRG $07FB | CPU $C7FB | 20 71 DD
+    jsr EvaluateCollisionState_DE2E                ; PRG $07FE | CPU $C7FE | 20 2E DE
+    jsr UpdateZp_A8_E9F6                ; PRG $0801 | CPU $C801 | 20 F6 E9
+    jsr UpdateZp_A8_EB06                ; PRG $0804 | CPU $C804 | 20 06 EB
+    jsr EvaluateCollisionState_C624                ; PRG $0807 | CPU $C807 | 20 24 C6
+    jsr UpdateActorObstacleInteraction                ; PRG $080A | CPU $C80A | 20 C0 C5
+    ldy ScreenCollisionState                       ; PRG $080D | CPU $C80D | A4 44
+    beq LoadScreenCollisionState                ; PRG $080F | CPU $C80F | F0 1E
+    dey                             ; PRG $0811 | CPU $C811 | 88
+    beq Flow_C837                ; PRG $0812 | CPU $C812 | F0 23
+    lda #$00                        ; PRG $0814 | CPU $C814 | A9 00
+    sta AudioModeOrEffectIndex                       ; PRG $0816 | CPU $C816 | 85 FC
+    lda ObjectSpawnDelay                       ; PRG $0818 | CPU $C818 | A5 47
+    beq Flow_C82E                ; PRG $081A | CPU $C81A | F0 12
+    inc CurrentScreenState                       ; PRG $081C | CPU $C81C | E6 3B
+    inc PlayerModeOrScreenPhase                       ; PRG $081E | CPU $C81E | E6 3C
+    lda #$10                        ; PRG $0820 | CPU $C820 | A9 10
+    sta ScreenSelectionPositionOrDelay                       ; PRG $0822 | CPU $C822 | 85 25
+    lda #$00                        ; PRG $0824 | CPU $C824 | A9 00
+    ldy ScreenObjectCounter                       ; PRG $0826 | CPU $C826 | A4 65
+    beq Flow_C82C                ; PRG $0828 | CPU $C828 | F0 02
+    lda #$02                        ; PRG $082A | CPU $C82A | A9 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C82 C.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectSpawnX.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C82C:
+    sta ObjectSpawnX                       ; PRG $082C | CPU $C82C | 85 49
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C82 E.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C82E:
+    rts                             ; PRG $082E | CPU $C82E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C82F.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+LoadScreenCollisionState:
+    lda Ram_0360                    ; PRG $082F | CPU $C82F | AD 60 03
+    sta ScreenCollisionState                       ; PRG $0832 | CPU $C832 | 85 44
+    sta PendingObstacleInteraction                       ; PRG $0834 | CPU $C834 | 85 46
+    rts                             ; PRG $0836 | CPU $C836 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C837.
+; Local behavior: Reads ScreenObjectMode, Flow_C840; mutates no direct memory mutation observed.
+; Parameters: ScreenObjectMode, Flow_C840.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C837:
+    ldx #$01                        ; PRG $0837 | CPU $C837 | A2 01
+    lda ScreenObjectMode                       ; PRG $0839 | CPU $C839 | A5 62
+    cmp #$02                        ; PRG $083B | CPU $C83B | C9 02
+    bne Flow_C840                ; PRG $083D | CPU $C83D | D0 01
+    inx                             ; PRG $083F | CPU $C83F | E8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C840.
+; Local behavior: Reads ScreenObjectMode, Flow_C84A; mutates no direct memory mutation observed.
+; Parameters: ScreenObjectMode, Flow_C84A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C840:
+    ldy #$B8                        ; PRG $0840 | CPU $C840 | A0 B8
+    lda ScreenObjectMode                       ; PRG $0842 | CPU $C842 | A5 62
+    cmp #$02                        ; PRG $0844 | CPU $C844 | C9 02
+    bne Flow_C84A                ; PRG $0846 | CPU $C846 | D0 02
+    ldy #$9C                        ; PRG $0848 | CPU $C848 | A0 9C
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C84 A.
+; Local behavior: Reads Ram_0371, Flow_C853, Flow_C871; mutates no direct memory mutation observed.
+; Parameters: Ram_0371, Flow_C853, Flow_C871.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C84A:
+    cpy Ram_0371                    ; PRG $084A | CPU $C84A | CC 71 03
+    bcs Flow_C853                ; PRG $084D | CPU $C84D | B0 04
+    ldx #$06                        ; PRG $084F | CPU $C84F | A2 06
+    bne Flow_C871                ; PRG $0851 | CPU $C851 | D0 1E
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C853.
+; Local behavior: Reads ScreenEffectState, Flow_C85D, Flow_C871; mutates no direct memory mutation observed.
+; Parameters: ScreenEffectState, Flow_C85D, Flow_C871.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C853:
+    lda ScreenEffectState                       ; PRG $0853 | CPU $C853 | A5 4E
+    cmp #$10                        ; PRG $0855 | CPU $C855 | C9 10
+    bcs Flow_C85D                ; PRG $0857 | CPU $C857 | B0 04
+    ldx #$06                        ; PRG $0859 | CPU $C859 | A2 06
+    bne Flow_C871                ; PRG $085B | CPU $C85B | D0 14
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C85 D.
+; Local behavior: Reads GameplayObjectAnimation, Flow_C865, Flow_C871; mutates no direct memory mutation observed.
+; Parameters: GameplayObjectAnimation, Flow_C865, Flow_C871.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C85D:
+    lda GameplayObjectAnimation                       ; PRG $085D | CPU $C85D | A5 55
+    beq Flow_C865                ; PRG $085F | CPU $C85F | F0 04
+    ldx #$05                        ; PRG $0861 | CPU $C861 | A2 05
+    bne Flow_C871                ; PRG $0863 | CPU $C863 | D0 0C
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C865.
+; Local behavior: Reads Ram_03A0, Flow_C871, Ram_03A1; mutates no direct memory mutation observed.
+; Parameters: Ram_03A0, Flow_C871, Ram_03A1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C865:
+    lda Ram_03A0                    ; PRG $0865 | CPU $C865 | AD A0 03
+    beq Flow_C871                ; PRG $0868 | CPU $C868 | F0 07
+    lda Ram_03A1                    ; PRG $086A | CPU $C86A | AD A1 03
+    bne Flow_C871                ; PRG $086D | CPU $C86D | D0 02
+    ldx #$04                        ; PRG $086F | CPU $C86F | A2 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C871.
+; Local behavior: Reads ActorTableIndex, Flow_C887; mutates AudioModeOrEffectIndex, AudioRequestFlags, ScreenObjectTrigger, Ram_0360, ScreenCollisionState.
+; Parameters: ActorTableIndex, Flow_C887.
+; Returns: returns to caller; flags/register result depends on final instructions: sta Ram_0360; sta ScreenCollisionState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C871:
+    stx AudioModeOrEffectIndex                       ; PRG $0871 | CPU $C871 | 86 FC
+    lda ActorTableIndex                       ; PRG $0873 | CPU $C873 | A5 6F
+    bne Flow_C887                ; PRG $0875 | CPU $C875 | D0 10
+    lda #$07                        ; PRG $0877 | CPU $C877 | A9 07
+    sta AudioRequestFlags                       ; PRG $0879 | CPU $C879 | 85 FB
+    lda #$01                        ; PRG $087B | CPU $C87B | A9 01
+    sta ScreenObjectTrigger                       ; PRG $087D | CPU $C87D | 85 64
+    lda #$02                        ; PRG $087F | CPU $C87F | A9 02
+    sta Ram_0360                    ; PRG $0881 | CPU $C881 | 8D 60 03
+    sta ScreenCollisionState                       ; PRG $0884 | CPU $C884 | 85 44
+    rts                             ; PRG $0886 | CPU $C886 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C887.
+; Local behavior: Reads Ram_0360, Flow_C898, Flow_C89D, Flow_C8B9; mutates no direct memory mutation observed.
+; Parameters: Ram_0360, Flow_C898, Flow_C89D, Flow_C8B9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C887:
+    lda Ram_0360                    ; PRG $0887 | CPU $C887 | AD 60 03
+    cmp #$02                        ; PRG $088A | CPU $C88A | C9 02
+    beq Flow_C898                ; PRG $088C | CPU $C88C | F0 0A
+    cmp #$03                        ; PRG $088E | CPU $C88E | C9 03
+    beq Flow_C898                ; PRG $0890 | CPU $C890 | F0 06
+    cmp #$04                        ; PRG $0892 | CPU $C892 | C9 04
+    bne Flow_C89D                ; PRG $0894 | CPU $C894 | D0 07
+    beq Flow_C8B9                ; PRG $0896 | CPU $C896 | F0 21
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C898.
+; Local behavior: Reads implicit CPU state or none observed; mutates ScreenCollisionState.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$03; sta ScreenCollisionState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C898:
+    lda #$03                        ; PRG $0898 | CPU $C898 | A9 03
+    sta ScreenCollisionState                       ; PRG $089A | CPU $C89A | 85 44
+    rts                             ; PRG $089C | CPU $C89C | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C89 D.
+; Local behavior: Reads Ram_0300, Flow_C8B0; mutates ScreenCollisionState, Ram_0360, GameplayStateFlags.
+; Parameters: Ram_0300, Flow_C8B0.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$20; sta GameplayStateFlags; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C89D:
+    lda Ram_0300                    ; PRG $089D | CPU $C89D | AD 00 03
+    cmp #$02                        ; PRG $08A0 | CPU $C8A0 | C9 02
+    bne Flow_C8B0                ; PRG $08A2 | CPU $C8A2 | D0 0C
+    lda #$06                        ; PRG $08A4 | CPU $C8A4 | A9 06
+    sta ScreenCollisionState                       ; PRG $08A6 | CPU $C8A6 | 85 44
+    sta Ram_0360                    ; PRG $08A8 | CPU $C8A8 | 8D 60 03
+    lda #$20                        ; PRG $08AB | CPU $C8AB | A9 20
+    sta GameplayStateFlags                       ; PRG $08AD | CPU $C8AD | 85 23
+    rts                             ; PRG $08AF | CPU $C8AF | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 B0.
+; Local behavior: Reads ScreenEffectState, Flow_C8C5; mutates Ram_0360.
+; Parameters: ScreenEffectState, Flow_C8C5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8B0:
+    lda ScreenEffectState                       ; PRG $08B0 | CPU $C8B0 | A5 4E
+    bne Flow_C8C5                ; PRG $08B2 | CPU $C8B2 | D0 11
+    lda #$05                        ; PRG $08B4 | CPU $C8B4 | A9 05
+    sta Ram_0360                    ; PRG $08B6 | CPU $C8B6 | 8D 60 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 B9.
+; Local behavior: Reads implicit CPU state or none observed; mutates ScreenCollisionState, Ram_0300, Ram_0301.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8B9:
+    sta ScreenCollisionState                       ; PRG $08B9 | CPU $C8B9 | 85 44
+    lda #$02                        ; PRG $08BB | CPU $C8BB | A9 02
+    sta Ram_0300                    ; PRG $08BD | CPU $C8BD | 8D 00 03
+    lda #$00                        ; PRG $08C0 | CPU $C8C0 | A9 00
+    sta Ram_0301                    ; PRG $08C2 | CPU $C8C2 | 8D 01 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 C5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8C5:
+    rts                             ; PRG $08C5 | CPU $C8C5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C8C6.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState7:
+    ldy ObjectSpawnX                       ; PRG $08C6 | CPU $C8C6 | A4 49
+    beq Flow_C8D4                ; PRG $08C8 | CPU $C8C8 | F0 0A
+    dey                             ; PRG $08CA | CPU $C8CA | 88
+    beq Flow_C8FC                ; PRG $08CB | CPU $C8CB | F0 2F
+    lda GameplayTimer                       ; PRG $08CD | CPU $C8CD | A5 21
+    bne Flow_C8D3                ; PRG $08CF | CPU $C8CF | D0 02
+    inc CurrentScreenState                       ; PRG $08D1 | CPU $C8D1 | E6 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 D3.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8D3:
+    rts                             ; PRG $08D3 | CPU $C8D3 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 D4.
+; Local behavior: Reads ScreenSelectionPositionOrDelay, Flow_C8D3, FrameCounter, ScreenEffectState, Flow_C8F1, UpdateZp_04_C634, UpdateActorCoordinates_C54B, UpdateActorObstacleInteraction; mutates AudioEffectRequest.
+; Parameters: ScreenSelectionPositionOrDelay, Flow_C8D3, FrameCounter, ScreenEffectState, Flow_C8F1, UpdateZp_04_C634, UpdateActorCoordinates_C54B, UpdateActorObstacleInteraction.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8D4:
+    lda ScreenSelectionPositionOrDelay                       ; PRG $08D4 | CPU $C8D4 | A5 25
+    bne Flow_C8D3                ; PRG $08D6 | CPU $C8D6 | D0 FB
+    lda FrameCounter                       ; PRG $08D8 | CPU $C8D8 | A5 27
+    lsr a                           ; PRG $08DA | CPU $C8DA | 4A
+    bcs Flow_C8D3                ; PRG $08DB | CPU $C8DB | B0 F6
+    lda ScreenEffectState                       ; PRG $08DD | CPU $C8DD | A5 4E
+    beq Flow_C8F1                ; PRG $08DF | CPU $C8DF | F0 10
+    lda #$20                        ; PRG $08E1 | CPU $C8E1 | A9 20
+    sta AudioEffectRequest                       ; PRG $08E3 | CPU $C8E3 | 85 FE
+    sec                             ; PRG $08E5 | CPU $C8E5 | 38
+    jsr UpdateZp_04_C634                ; PRG $08E6 | CPU $C8E6 | 20 34 C6
+    lda #$01                        ; PRG $08E9 | CPU $C8E9 | A9 01
+    jsr UpdateActorCoordinates_C54B                ; PRG $08EB | CPU $C8EB | 20 4B C5
+    jmp UpdateActorObstacleInteraction                ; PRG $08EE | CPU $C8EE | 4C C0 C5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 F1.
+; Local behavior: Reads ObjectSpawnX; mutates ObjectSpawnX, GameplayTimer, CollisionTableIndex.
+; Parameters: ObjectSpawnX.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$00; sta CollisionTableIndex; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8F1:
+    inc ObjectSpawnX                       ; PRG $08F1 | CPU $C8F1 | E6 49
+    lda #$18                        ; PRG $08F3 | CPU $C8F3 | A9 18
+    sta GameplayTimer                       ; PRG $08F5 | CPU $C8F5 | 85 21
+    lda #$00                        ; PRG $08F7 | CPU $C8F7 | A9 00
+    sta CollisionTableIndex                       ; PRG $08F9 | CPU $C8F9 | 85 C8
+    rts                             ; PRG $08FB | CPU $C8FB | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C8 FC.
+; Local behavior: Reads GameplayTimer, Flow_C923, FrameCounter, CollisionTableIndex, Flow_C924, ActorStateArray, ComputeOrDispatch_EC49, UpdateActorCoordinates_C54B; mutates CollisionTableIndex, AudioRequestFlags.
+; Parameters: GameplayTimer, Flow_C923, FrameCounter, CollisionTableIndex, Flow_C924, ActorStateArray, ComputeOrDispatch_EC49, UpdateActorCoordinates_C54B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C8FC:
+    lda GameplayTimer                       ; PRG $08FC | CPU $C8FC | A5 21
+    bne Flow_C923                ; PRG $08FE | CPU $C8FE | D0 23
+    lda FrameCounter                       ; PRG $0900 | CPU $C900 | A5 27
+    and #$0F                        ; PRG $0902 | CPU $C902 | 29 0F
+    bne Flow_C923                ; PRG $0904 | CPU $C904 | D0 1D
+    ldy CollisionTableIndex                       ; PRG $0906 | CPU $C906 | A4 C8
+    inc CollisionTableIndex                       ; PRG $0908 | CPU $C908 | E6 C8
+    cpy #$05                        ; PRG $090A | CPU $C90A | C0 05
+    beq Flow_C924                ; PRG $090C | CPU $C90C | F0 16
+    lda ActorStateArray,y                     ; PRG $090E | CPU $C90E | B9 70 00
+    beq Flow_C923                ; PRG $0911 | CPU $C911 | F0 10
+    tya                             ; PRG $0913 | CPU $C913 | 98
+    jsr ComputeOrDispatch_EC49                ; PRG $0914 | CPU $C914 | 20 49 EC
+    lda #$05                        ; PRG $0917 | CPU $C917 | A9 05
+    jsr UpdateActorCoordinates_C54B                ; PRG $0919 | CPU $C919 | 20 4B C5
+    jsr UpdateActorObstacleInteraction                ; PRG $091C | CPU $C91C | 20 C0 C5
+    lda #$01                        ; PRG $091F | CPU $C91F | A9 01
+    sta AudioRequestFlags                       ; PRG $0921 | CPU $C921 | 85 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C923.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C923:
+    rts                             ; PRG $0923 | CPU $C923 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C924.
+; Local behavior: Reads ActorAnimationStep, Flow_C937, UpdateActorCoordinates_C54B, UpdateActorObstacleInteraction, SelectDigitGlyphTable; mutates no direct memory mutation observed.
+; Parameters: ActorAnimationStep, Flow_C937, UpdateActorCoordinates_C54B, UpdateActorObstacleInteraction, SelectDigitGlyphTable.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C924:
+    lda ActorAnimationStep                       ; PRG $0924 | CPU $C924 | A5 75
+    cmp #$05                        ; PRG $0926 | CPU $C926 | C9 05
+    bne Flow_C937                ; PRG $0928 | CPU $C928 | D0 0D
+    lda #$30                        ; PRG $092A | CPU $C92A | A9 30
+    jsr UpdateActorCoordinates_C54B                ; PRG $092C | CPU $C92C | 20 4B C5
+    jsr UpdateActorObstacleInteraction                ; PRG $092F | CPU $C92F | 20 C0 C5
+    lda #$0B                        ; PRG $0932 | CPU $C932 | A9 0B
+    jsr SelectDigitGlyphTable                ; PRG $0934 | CPU $C934 | 20 99 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C937.
+; Local behavior: Reads ObjectSpawnX; mutates ObjectSpawnX, GameplayTimer.
+; Parameters: ObjectSpawnX.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$80; sta GameplayTimer; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C937:
+    inc ObjectSpawnX                       ; PRG $0937 | CPU $C937 | E6 49
+    lda #$80                        ; PRG $0939 | CPU $C939 | A9 80
+    sta GameplayTimer                       ; PRG $093B | CPU $C93B | 85 21
+    rts                             ; PRG $093D | CPU $C93D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C93E.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState8:
+    ldy #$03                        ; PRG $093E | CPU $C93E | A0 03
+    lda ScreenObjectCounter                       ; PRG $0940 | CPU $C940 | A5 65
+    beq Flow_C948                ; PRG $0942 | CPU $C942 | F0 04
+    dec ScreenObjectCounter                       ; PRG $0944 | CPU $C944 | C6 65
+    ldy #$09                        ; PRG $0946 | CPU $C946 | A0 09
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C948.
+; Local behavior: Reads implicit CPU state or none observed; mutates CurrentScreenState.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: sty CurrentScreenState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C948:
+    sty CurrentScreenState                       ; PRG $0948 | CPU $C948 | 84 3B
+    rts                             ; PRG $094A | CPU $C94A | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C94B.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState9:
+    lda SelectedActorIndex                       ; PRG $094B | CPU $C94B | A5 43
+    asl a                           ; PRG $094D | CPU $C94D | 0A
+    asl a                           ; PRG $094E | CPU $C94E | 0A
+    sta PackedHudOrObjectValue                       ; PRG $094F | CPU $C94F | 85 16
+    asl a                           ; PRG $0951 | CPU $C951 | 0A
+    asl a                           ; PRG $0952 | CPU $C952 | 0A
+    asl a                           ; PRG $0953 | CPU $C953 | 0A
+    tay                             ; PRG $0954 | CPU $C954 | A8
+    ldx #$00                        ; PRG $0955 | CPU $C955 | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C957.
+; Local behavior: Reads ActiveActorType, Flow_C957, SelectedPlayerIndex, Flow_C975, SelectedActorIndex, ActorAnimationTimer; mutates Ram_0580, SelectedActorIndex.
+; Parameters: ActiveActorType, Flow_C957, SelectedPlayerIndex, Flow_C975, SelectedActorIndex, ActorAnimationTimer.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C957:
+    lda ActiveActorType,x                     ; PRG $0957 | CPU $C957 | B5 60
+    sta Ram_0580,y                  ; PRG $0959 | CPU $C959 | 99 80 05
+    iny                             ; PRG $095C | CPU $C95C | C8
+    inx                             ; PRG $095D | CPU $C95D | E8
+    cpx #$20                        ; PRG $095E | CPU $C95E | E0 20
+    bne Flow_C957                ; PRG $0960 | CPU $C960 | D0 F5
+    lda SelectedPlayerIndex                       ; PRG $0962 | CPU $C962 | A5 40
+    beq Flow_C975                ; PRG $0964 | CPU $C964 | F0 0F
+    lda SelectedActorIndex                       ; PRG $0966 | CPU $C966 | A5 43
+    eor #$01                        ; PRG $0968 | CPU $C968 | 49 01
+    tax                             ; PRG $096A | CPU $C96A | AA
+    asl a                           ; PRG $096B | CPU $C96B | 0A
+    asl a                           ; PRG $096C | CPU $C96C | 0A
+    tay                             ; PRG $096D | CPU $C96D | A8
+    lda ActorAnimationTimer,y                     ; PRG $096E | CPU $C96E | B9 90 00
+    beq Flow_C975                ; PRG $0971 | CPU $C971 | F0 02
+    stx SelectedActorIndex                       ; PRG $0973 | CPU $C973 | 86 43
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C975.
+; Local behavior: Reads PackedHudOrObjectValue, ActorAnimationTimer, Flow_C993, SelectDigitGlyphTable, SelectedPlayerIndex, Flow_C991, Flow_C98E; mutates ActorAnimationTimer.
+; Parameters: PackedHudOrObjectValue, ActorAnimationTimer, Flow_C993, SelectDigitGlyphTable, SelectedPlayerIndex, Flow_C991, Flow_C98E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C975:
+    ldy #$01                        ; PRG $0975 | CPU $C975 | A0 01
+    ldx PackedHudOrObjectValue                       ; PRG $0977 | CPU $C977 | A6 16
+    dec ActorAnimationTimer,x                     ; PRG $0979 | CPU $C979 | D6 90
+    bne Flow_C993                ; PRG $097B | CPU $C97B | D0 16
+    lda #$08                        ; PRG $097D | CPU $C97D | A9 08
+    jsr SelectDigitGlyphTable                ; PRG $097F | CPU $C97F | 20 99 C4
+    lda SelectedPlayerIndex                       ; PRG $0982 | CPU $C982 | A5 40
+    beq Flow_C991                ; PRG $0984 | CPU $C984 | F0 0B
+    lda #$06                        ; PRG $0986 | CPU $C986 | A9 06
+    ldy PackedHudOrObjectValue                       ; PRG $0988 | CPU $C988 | A4 16
+    beq Flow_C98E                ; PRG $098A | CPU $C98A | F0 02
+    lda #$07                        ; PRG $098C | CPU $C98C | A9 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C98 E.
+; Local behavior: Reads SelectDigitGlyphTable; mutates no direct memory mutation observed.
+; Parameters: SelectDigitGlyphTable.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C98E:
+    jsr SelectDigitGlyphTable                ; PRG $098E | CPU $C98E | 20 99 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C991.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C991:
+    ldy #$20                        ; PRG $0991 | CPU $C991 | A0 20
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C993.
+; Local behavior: Reads CurrentScreenState; mutates ScreenSelectionPositionOrDelay, CurrentScreenState.
+; Parameters: CurrentScreenState.
+; Returns: returns to caller; flags/register result depends on final instructions: sty ScreenSelectionPositionOrDelay; inc CurrentScreenState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C993:
+    sty ScreenSelectionPositionOrDelay                       ; PRG $0993 | CPU $C993 | 84 25
+    inc CurrentScreenState                       ; PRG $0995 | CPU $C995 | E6 3B
+    rts                             ; PRG $0997 | CPU $C997 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C998.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState10:
+    lda ScreenSelectionPositionOrDelay                       ; PRG $0998 | CPU $C998 | A5 25
+    bne Flow_C9AE                ; PRG $099A | CPU $C99A | D0 12
+    ldy #$01                        ; PRG $099C | CPU $C99C | A0 01
+    lda ActorAnimationTimer                       ; PRG $099E | CPU $C99E | A5 90
+    bne Flow_C9AC                ; PRG $09A0 | CPU $C9A0 | D0 0A
+    lda SelectedPlayerIndex                       ; PRG $09A2 | CPU $C9A2 | A5 40
+    beq Flow_C9AA                ; PRG $09A4 | CPU $C9A4 | F0 04
+    lda ObstacleAnimationTimer                       ; PRG $09A6 | CPU $C9A6 | A5 94
+    bne Flow_C9AC                ; PRG $09A8 | CPU $C9A8 | D0 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 AA.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9AA:
+    ldy #$0B                        ; PRG $09AA | CPU $C9AA | A0 0B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 AC.
+; Local behavior: Reads implicit CPU state or none observed; mutates CurrentScreenState.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9AC:
+    sty CurrentScreenState                       ; PRG $09AC | CPU $C9AC | 84 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 AE.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9AE:
+    rts                             ; PRG $09AE | CPU $C9AE | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C9AF.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState11:
+    lda SelectedScreenVariant                       ; PRG $09AF | CPU $C9AF | A5 41
+    asl a                           ; PRG $09B1 | CPU $C9B1 | 0A
+    tay                             ; PRG $09B2 | CPU $C9B2 | A8
+    lda PlayerOrActorX                       ; PRG $09B3 | CPU $C9B3 | A5 81
+    sta PlayerStartXTable,y                     ; PRG $09B5 | CPU $C9B5 | 99 8C 00
+    lda PlayerOrActorY                       ; PRG $09B8 | CPU $C9B8 | A5 82
+    sta PlayerStartYTable,y                     ; PRG $09BA | CPU $C9BA | 99 8D 00
+    lda #$01                        ; PRG $09BD | CPU $C9BD | A9 01
+    sta GameMode                       ; PRG $09BF | CPU $C9BF | 85 3A
+    jsr ClearAudioRequestFlags                ; PRG $09C1 | CPU $C9C1 | 20 56 C6
+    sta PlayerModeOrScreenPhase                       ; PRG $09C4 | CPU $C9C4 | 85 3C
+    rts                             ; PRG $09C6 | CPU $C9C6 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Pass 2 control-flow entry at CPU $C9C7.
+; Local behavior: Executes the decoded instruction sequence at this entry point.
+; Parameters: Determined by callers; refined in Pass 3.
+; Returns: According to the decoded control flow.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateScreenGameplayState12:
+    lda GameplayTimer                       ; PRG $09C7 | CPU $C9C7 | A5 21
+    beq Flow_C9DD                ; PRG $09C9 | CPU $C9C9 | F0 12
+    cmp #$0A                        ; PRG $09CB | CPU $C9CB | C9 0A
+    bne Flow_C9EA                ; PRG $09CD | CPU $C9CD | D0 1B
+    jsr ClearNmiWorkMode                ; PRG $09CF | CPU $C9CF | 20 73 C0
+    lda #$1E                        ; PRG $09D2 | CPU $C9D2 | A9 1E
+    sta PPUMASK                     ; PRG $09D4 | CPU $C9D4 | 8D 01 20
+    lda #$90                        ; PRG $09D7 | CPU $C9D7 | A9 90
+    sta PPUCTRL                     ; PRG $09D9 | CPU $C9D9 | 8D 00 20
+    rts                             ; PRG $09DC | CPU $C9DC | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 DD.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9DD:
+    ldx #$07                        ; PRG $09DD | CPU $C9DD | A2 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 DF.
+; Local behavior: Reads SavedGameplayTimerArray, Flow_C9DF, ReturnScreenState; mutates GameplayTimerArray, CurrentScreenState.
+; Parameters: SavedGameplayTimerArray, Flow_C9DF, ReturnScreenState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9DF:
+    lda SavedGameplayTimerArray,x                     ; PRG $09DF | CPU $C9DF | B5 28
+    sta GameplayTimerArray,x                     ; PRG $09E1 | CPU $C9E1 | 95 20
+    dex                             ; PRG $09E3 | CPU $C9E3 | CA
+    bpl Flow_C9DF                ; PRG $09E4 | CPU $C9E4 | 10 F9
+    lda ReturnScreenState                       ; PRG $09E6 | CPU $C9E6 | A5 3D
+    sta CurrentScreenState                       ; PRG $09E8 | CPU $C9E8 | 85 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow C9 EA.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: .byte $85,$B0,$85,$B3,$85,$B7,$A9,$68,$85,$B8,$A9,$2C,$85,$B9,$A9,$10; .byte $85,$BA,$A9,$18,$85,$B2,$60,$A9,$B0,$85,$A8,$A9,$00,$85,$A9,$C6; .byte $B3,$D0,$0A,$A5,$B2,$85,$B3,$A5,$B7,$49,$40,$85,$B7,$4C,$17,$C2.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_C9EA:
+    rts                             ; PRG $09EA | CPU $C9EA | 60
+    .byte $20,$7D,$C0,$20,$A2,$C1,$20,$EA,$C1,$20,$73,$C0,$A2,$9E,$A0,$F0 ; PRG $09EB | CPU $C9EB
+    .byte $20,$DC,$C3,$A9,$04,$85,$34,$20,$F5,$CA,$A9,$01,$85,$37,$A0,$03 ; PRG $09FB | CPU $C9FB
+    .byte $B9,$FC,$F7,$99,$00,$02,$88,$10,$F7,$E6,$3C,$A4,$39,$D0,$08,$A0 ; PRG $0A0B | CPU $CA0B
+    .byte $03,$84,$39,$A9,$2F,$D0,$04,$C6,$39,$A9,$25,$85,$25,$4C,$84,$C0 ; PRG $0A1B | CPU $CA1B
+    .byte $A4,$25,$F0,$0F,$C0,$2B,$D0,$08,$A9,$05,$85,$FB,$A0,$28,$84,$25 ; PRG $0A2B | CPU $CA2B
+    .byte $4C,$12,$CB,$E6,$3C,$60,$20,$63,$C6,$A9,$01,$85,$41,$20,$AB,$C6 ; PRG $0A3B | CPU $CA3B
+    .byte $A0,$00,$84,$92,$A9,$2D,$85,$60,$E6,$3C,$60,$E6,$3C,$4C,$EB,$C6 ; PRG $0A4B | CPU $CA4B
+    .byte $E6,$3C,$4C,$55,$C7,$20,$C2,$C7,$A9,$00,$85,$3F,$85,$3E,$85,$27 ; PRG $0A5B | CPU $CA5B
+    .byte $E6,$3C,$60,$A5,$1A,$2A,$2A,$65,$1C,$65,$27,$8D,$F0,$06,$A5,$3E ; PRG $0A6B | CPU $CA6B
+    .byte $F0,$0C,$C6,$3E,$AD,$10,$03,$29,$7F,$85,$1B,$4C,$9D,$CA,$A4,$3F ; PRG $0A7B | CPU $CA7B
+    .byte $B9,$AE,$CA,$C9,$AA,$F0,$15,$85,$1B,$C8,$B9,$AE,$CA,$85,$3E,$C8 ; PRG $0A8B | CPU $CA8B
+    .byte $84,$3F,$20,$DD,$C7,$A5,$3C,$C9,$07,$F0,$03,$60,$E6,$3C,$A9,$08 ; PRG $0A9B | CPU $CA9B
+    .byte $85,$25,$60,$00,$D0,$C8,$60,$80,$20,$C8,$98,$C4,$82,$80,$03,$C1 ; PRG $0AAB | CPU $CAAB
+    .byte $38,$02,$38,$88,$20,$80,$38,$C1,$38,$C2,$53,$C1,$08,$C8,$10,$C1 ; PRG $0ABB | CPU $CABB
+    .byte $20,$C4,$10,$C2,$30,$C8,$80,$C1,$30,$C4,$14,$C1,$20,$C0,$FF,$C0 ; PRG $0ACB | CPU $CACB
+    .byte $80,$C2,$14,$C8,$FF,$C8,$80,$C4,$60,$C1,$10,$C2,$14,$C0,$FF,$AA ; PRG $0ADB | CPU $CADB
+    .byte $A5,$25,$D0,$05,$20,$56,$C6,$85,$3C,$60,$A9,$4A,$85,$B6,$A9,$01 ; PRG $0AEB | CPU $CAEB
+    .byte $85,$B0,$85,$B3,$85,$B7,$A9,$68,$85,$B8,$A9,$2C,$85,$B9,$A9,$10 ; PRG $0AFB | CPU $CAFB
+    .byte $85,$BA,$A9,$18,$85,$B2,$60,$A9,$B0,$85,$A8,$A9,$00,$85,$A9,$C6 ; PRG $0B0B | CPU $CB0B
+    .byte $B3,$D0,$0A,$A5,$B2,$85,$B3,$A5,$B7,$49,$40,$85,$B7,$4C,$17,$C2 ; PRG $0B1B | CPU $CB1B
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0300 CB2 B.
+; Local behavior: Reads ScreenObjectMode, Flow_CB5F; mutates Ram_0300, Ram_0307, Ram_0302, Ram_0305, Ram_030E, Ram_0301, Ram_0306, Ram_0312.
+; Parameters: ScreenObjectMode, Flow_CB5F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0300_CB2B:
+    lda #$01                        ; PRG $0B2B | CPU $CB2B | A9 01
+    sta Ram_0300                    ; PRG $0B2D | CPU $CB2D | 8D 00 03
+    sta Ram_0307                    ; PRG $0B30 | CPU $CB30 | 8D 07 03
+    lda #$04                        ; PRG $0B33 | CPU $CB33 | A9 04
+    sta Ram_0302                    ; PRG $0B35 | CPU $CB35 | 8D 02 03
+    lda #$26                        ; PRG $0B38 | CPU $CB38 | A9 26
+    sta Ram_0305                    ; PRG $0B3A | CPU $CB3A | 8D 05 03
+    lda #$00                        ; PRG $0B3D | CPU $CB3D | A9 00
+    sta Ram_030E                    ; PRG $0B3F | CPU $CB3F | 8D 0E 03
+    sta Ram_0301                    ; PRG $0B42 | CPU $CB42 | 8D 01 03
+    sta Ram_0306                    ; PRG $0B45 | CPU $CB45 | 8D 06 03
+    sta Ram_0312                    ; PRG $0B48 | CPU $CB48 | 8D 12 03
+    lda #$C8                        ; PRG $0B4B | CPU $CB4B | A9 C8
+    sta Ram_0308                    ; PRG $0B4D | CPU $CB4D | 8D 08 03
+    lda #$80                        ; PRG $0B50 | CPU $CB50 | A9 80
+    sta Ram_0309                    ; PRG $0B52 | CPU $CB52 | 8D 09 03
+    ldy #$98                        ; PRG $0B55 | CPU $CB55 | A0 98
+    lda ScreenObjectMode                       ; PRG $0B57 | CPU $CB57 | A5 62
+    cmp #$02                        ; PRG $0B59 | CPU $CB59 | C9 02
+    bne Flow_CB5F                ; PRG $0B5B | CPU $CB5B | D0 02
+    ldy #$88                        ; PRG $0B5D | CPU $CB5D | A0 88
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CB5 F.
+; Local behavior: Reads TransformPackedValue_D263, UpdateRam_036C_D6F3, ComputeOrDispatch_CE77, UpdateRam_0380_DDFD, UpdateZp_50_DE62; mutates Ram_030A, Ram_030D, Ram_0340, Ram_0350, Ram_034A, Ram_035A.
+; Parameters: TransformPackedValue_D263, UpdateRam_036C_D6F3, ComputeOrDispatch_CE77, UpdateRam_0380_DDFD, UpdateZp_50_DE62.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr UpdateRam_0380_DDFD; jsr UpdateZp_50_DE62; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CB5F:
+    sty Ram_030A                    ; PRG $0B5F | CPU $CB5F | 8C 0A 03
+    lda #$0A                        ; PRG $0B62 | CPU $CB62 | A9 0A
+    sta Ram_030D                    ; PRG $0B64 | CPU $CB64 | 8D 0D 03
+    lda #$00                        ; PRG $0B67 | CPU $CB67 | A9 00
+    sta Ram_0340                    ; PRG $0B69 | CPU $CB69 | 8D 40 03
+    sta Ram_0350                    ; PRG $0B6C | CPU $CB6C | 8D 50 03
+    lda #$10                        ; PRG $0B6F | CPU $CB6F | A9 10
+    sta Ram_034A                    ; PRG $0B71 | CPU $CB71 | 8D 4A 03
+    lda #$20                        ; PRG $0B74 | CPU $CB74 | A9 20
+    sta Ram_035A                    ; PRG $0B76 | CPU $CB76 | 8D 5A 03
+    jsr TransformPackedValue_D263                ; PRG $0B79 | CPU $CB79 | 20 63 D2
+    jsr UpdateRam_036C_D6F3                ; PRG $0B7C | CPU $CB7C | 20 F3 D6
+    jsr ComputeOrDispatch_CE77                ; PRG $0B7F | CPU $CB7F | 20 77 CE
+    jsr UpdateRam_0380_DDFD                ; PRG $0B82 | CPU $CB82 | 20 FD DD
+    jsr UpdateZp_50_DE62                ; PRG $0B85 | CPU $CB85 | 20 62 DE
+    rts                             ; PRG $0B88 | CPU $CB88 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 CB89.
+; Local behavior: Reads ControllerPressedOrScriptInput, SelectedActorIndex, Flow_CB99, SecondControllerPressed; mutates ObjectRecordPointerLo, ObjectRecordPointerHi.
+; Parameters: ControllerPressedOrScriptInput, SelectedActorIndex, Flow_CB99, SecondControllerPressed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_CB89:
+    lda #$00                        ; PRG $0B89 | CPU $CB89 | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $0B8B | CPU $CB8B | 85 A8
+    lda #$03                        ; PRG $0B8D | CPU $CB8D | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $0B8F | CPU $CB8F | 85 A9
+    lda ControllerPressedOrScriptInput                       ; PRG $0B91 | CPU $CB91 | A5 1B
+    ldy SelectedActorIndex                       ; PRG $0B93 | CPU $CB93 | A4 43
+    beq Flow_CB99                ; PRG $0B95 | CPU $CB95 | F0 02
+    lda SecondControllerPressed                       ; PRG $0B97 | CPU $CB97 | A5 1D
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CB99.
+; Local behavior: Reads ScreenCollisionState, Flow_CBB7, Flow_CBA8, UpdateZp_54_CFB1; mutates CollisionExtent, Ram_0310.
+; Parameters: ScreenCollisionState, Flow_CBB7, Flow_CBA8, UpdateZp_54_CFB1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CB99:
+    sta CollisionExtent                       ; PRG $0B99 | CPU $CB99 | 85 C0
+    sta Ram_0310                    ; PRG $0B9B | CPU $CB9B | 8D 10 03
+    ldy ScreenCollisionState                       ; PRG $0B9E | CPU $CB9E | A4 44
+    beq Flow_CBB7                ; PRG $0BA0 | CPU $CBA0 | F0 15
+    dey                             ; PRG $0BA2 | CPU $CBA2 | 88
+    bne Flow_CBA8                ; PRG $0BA3 | CPU $CBA3 | D0 03
+    jsr UpdateZp_54_CFB1                ; PRG $0BA5 | CPU $CBA5 | 20 B1 CF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBA8.
+; Local behavior: Reads UpdateRam_0312_CBB8, ComputeOrDispatch_CC65, ComputeOrDispatch_C2B4, UpdateRam_0304_CDAC, LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_0312_CBB8, ComputeOrDispatch_CC65, ComputeOrDispatch_C2B4, UpdateRam_0304_CDAC, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBA8:
+    jsr UpdateRam_0312_CBB8                ; PRG $0BA8 | CPU $CBA8 | 20 B8 CB
+    jsr ComputeOrDispatch_CC65                ; PRG $0BAB | CPU $CBAB | 20 65 CC
+    jsr ComputeOrDispatch_C2B4                ; PRG $0BAE | CPU $CBAE | 20 B4 C2
+    jsr UpdateRam_0304_CDAC                ; PRG $0BB1 | CPU $CBB1 | 20 AC CD
+    jsr LoadObjectSpriteRenderState                ; PRG $0BB4 | CPU $CBB4 | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBB7.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBB7:
+    rts                             ; PRG $0BB7 | CPU $CBB7 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0312 CBB8.
+; Local behavior: Reads Ram_0300, Flow_CBF5, Ram_0312, Flow_CBD1, SelectedScreenVariant, Flow_CBCF; mutates Ram_0312.
+; Parameters: Ram_0300, Flow_CBF5, Ram_0312, Flow_CBD1, SelectedScreenVariant, Flow_CBCF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0312_CBB8:
+    lda Ram_0300                    ; PRG $0BB8 | CPU $CBB8 | AD 00 03
+    cmp #$01                        ; PRG $0BBB | CPU $CBBB | C9 01
+    bne Flow_CBF5                ; PRG $0BBD | CPU $CBBD | D0 36
+    lda Ram_0312                    ; PRG $0BBF | CPU $CBBF | AD 12 03
+    beq Flow_CBD1                ; PRG $0BC2 | CPU $CBC2 | F0 0D
+    dec Ram_0312                    ; PRG $0BC4 | CPU $CBC4 | CE 12 03
+    lda #$74                        ; PRG $0BC7 | CPU $CBC7 | A9 74
+    ldy SelectedScreenVariant                       ; PRG $0BC9 | CPU $CBC9 | A4 41
+    beq Flow_CBCF                ; PRG $0BCB | CPU $CBCB | F0 02
+    lda #$74                        ; PRG $0BCD | CPU $CBCD | A9 74
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBCF.
+; Local behavior: Reads implicit CPU state or none observed; mutates GameplayObjectAnimation.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBCF:
+    sta GameplayObjectAnimation                       ; PRG $0BCF | CPU $CBCF | 85 55
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBD1.
+; Local behavior: Reads FrameCounter, Flow_CBDD, GameplayObjectAnimation; mutates GameplayObjectAnimation.
+; Parameters: FrameCounter, Flow_CBDD, GameplayObjectAnimation.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBD1:
+    lda FrameCounter                       ; PRG $0BD1 | CPU $CBD1 | A5 27
+    and #$07                        ; PRG $0BD3 | CPU $CBD3 | 29 07
+    bne Flow_CBDD                ; PRG $0BD5 | CPU $CBD5 | D0 06
+    lda GameplayObjectAnimation                       ; PRG $0BD7 | CPU $CBD7 | A5 55
+    beq Flow_CBDD                ; PRG $0BD9 | CPU $CBD9 | F0 02
+    dec GameplayObjectAnimation                       ; PRG $0BDB | CPU $CBDB | C6 55
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBDD.
+; Local behavior: Reads Ram_030E, Flow_CBF5; mutates Ram_030E, ScreenObjectCounter, Ram_0301, Ram_0300.
+; Parameters: Ram_030E, Flow_CBF5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBDD:
+    lda Ram_030E                    ; PRG $0BDD | CPU $CBDD | AD 0E 03
+    beq Flow_CBF5                ; PRG $0BE0 | CPU $CBE0 | F0 13
+    lda #$00                        ; PRG $0BE2 | CPU $CBE2 | A9 00
+    sta Ram_030E                    ; PRG $0BE4 | CPU $CBE4 | 8D 0E 03
+    lda #$01                        ; PRG $0BE7 | CPU $CBE7 | A9 01
+    sta ScreenObjectCounter                       ; PRG $0BE9 | CPU $CBE9 | 85 65
+    lda #$00                        ; PRG $0BEB | CPU $CBEB | A9 00
+    sta Ram_0301                    ; PRG $0BED | CPU $CBED | 8D 01 03
+    lda #$02                        ; PRG $0BF0 | CPU $CBF0 | A9 02
+    sta Ram_0300                    ; PRG $0BF2 | CPU $CBF2 | 8D 00 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBF5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBF5:
+    rts                             ; PRG $0BF5 | CPU $CBF5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CBF6.
+; Local behavior: Reads CoordinateValue, Ram_0303; mutates Ram_0308, Ram_0301, Ram_030B, Ram_030C, Ram_0303.
+; Parameters: CoordinateValue, Ram_0303.
+; Returns: returns to caller; flags/register result depends on final instructions: sta Ram_030C; inc Ram_0303; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CBF6:
+    lda CoordinateValue                       ; PRG $0BF6 | CPU $CBF6 | A5 13
+    sta Ram_0308                    ; PRG $0BF8 | CPU $CBF8 | 8D 08 03
+    lda #$00                        ; PRG $0BFB | CPU $CBFB | A9 00
+    sta Ram_0301                    ; PRG $0BFD | CPU $CBFD | 8D 01 03
+    sta Ram_030B                    ; PRG $0C00 | CPU $CC00 | 8D 0B 03
+    sta Ram_030C                    ; PRG $0C03 | CPU $CC03 | 8D 0C 03
+    inc Ram_0303                    ; PRG $0C06 | CPU $CC06 | EE 03 03
+    rts                             ; PRG $0C09 | CPU $CC09 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC0 A.
+; Local behavior: Reads Flow_CC22; mutates no direct memory mutation observed.
+; Parameters: Flow_CC22.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC0A:
+    lda #$80                        ; PRG $0C0A | CPU $CC0A | A9 80
+    ldx #$00                        ; PRG $0C0C | CPU $CC0C | A2 00
+    ldy #$08                        ; PRG $0C0E | CPU $CC0E | A0 08
+    bne Flow_CC22                ; PRG $0C10 | CPU $CC10 | D0 10
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch CC12.
+; Local behavior: Reads Flow_CC19; mutates no direct memory mutation observed.
+; Parameters: Flow_CC19.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_CC12:
+    lda #$00                        ; PRG $0C12 | CPU $CC12 | A9 00
+    beq Flow_CC19                ; PRG $0C14 | CPU $CC14 | F0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC16.
+; Local behavior: Reads Ram_0301; mutates no direct memory mutation observed.
+; Parameters: Ram_0301.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC16:
+    lda Ram_0301                    ; PRG $0C16 | CPU $CC16 | AD 01 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC19.
+; Local behavior: Reads Ram_0308; mutates Ram_0308.
+; Parameters: Ram_0308.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC19:
+    inc Ram_0308                    ; PRG $0C19 | CPU $CC19 | EE 08 03
+    ora #$40                        ; PRG $0C1C | CPU $CC1C | 09 40
+    ldx #$12                        ; PRG $0C1E | CPU $CC1E | A2 12
+    ldy #$10                        ; PRG $0C20 | CPU $CC20 | A0 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC22.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioEffectRequest, Ram_0301, Ram_030B, Ram_0303.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta Ram_0303; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC22:
+    sty AudioEffectRequest                       ; PRG $0C22 | CPU $CC22 | 84 FE
+    sta Ram_0301                    ; PRG $0C24 | CPU $CC24 | 8D 01 03
+    stx Ram_030B                    ; PRG $0C27 | CPU $CC27 | 8E 0B 03
+    lda #$01                        ; PRG $0C2A | CPU $CC2A | A9 01
+    sta Ram_0303                    ; PRG $0C2C | CPU $CC2C | 8D 03 03
+    rts                             ; PRG $0C2F | CPU $CC2F | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC30.
+; Local behavior: Reads ComputeOrDispatch_CC12; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_CC12.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC30:
+    jsr ComputeOrDispatch_CC12                ; PRG $0C30 | CPU $CC30 | 20 12 CC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC33.
+; Local behavior: Reads CalculateAndClampValue_CDF6, Flow_CBF6, Ram_0301, Flow_CC45, Flow_CC4D; mutates no direct memory mutation observed.
+; Parameters: CalculateAndClampValue_CDF6, Flow_CBF6, Ram_0301, Flow_CC45, Flow_CC4D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC33:
+    jsr CalculateAndClampValue_CDF6                ; PRG $0C33 | CPU $CC33 | 20 F6 CD
+    bcc Flow_CBF6                ; PRG $0C36 | CPU $CC36 | 90 BE
+    ldy #$01                        ; PRG $0C38 | CPU $CC38 | A0 01
+    lda Ram_0301                    ; PRG $0C3A | CPU $CC3A | AD 01 03
+    lsr a                           ; PRG $0C3D | CPU $CC3D | 4A
+    bcs Flow_CC45                ; PRG $0C3E | CPU $CC3E | B0 05
+    lsr a                           ; PRG $0C40 | CPU $CC40 | 4A
+    bcc Flow_CC4D                ; PRG $0C41 | CPU $CC41 | 90 0A
+    ldy #$FF                        ; PRG $0C43 | CPU $CC43 | A0 FF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC45.
+; Local behavior: Reads Ram_0309; mutates Ram_0309.
+; Parameters: Ram_0309.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC45:
+    tya                             ; PRG $0C45 | CPU $CC45 | 98
+    clc                             ; PRG $0C46 | CPU $CC46 | 18
+    adc Ram_0309                    ; PRG $0C47 | CPU $CC47 | 6D 09 03
+    sta Ram_0309                    ; PRG $0C4A | CPU $CC4A | 8D 09 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC4 D.
+; Local behavior: Reads Ram_030B, IndexedGameplayLookupTable_CD85, Flow_CC30, Ram_0308, Ram_0303; mutates Ram_030B, Ram_0308, Ram_0303.
+; Parameters: Ram_030B, IndexedGameplayLookupTable_CD85, Flow_CC30, Ram_0308, Ram_0303.
+; Returns: returns to caller; flags/register result depends on final instructions: sta Ram_0308; inc Ram_0303; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC4D:
+    ldy Ram_030B                    ; PRG $0C4D | CPU $CC4D | AC 0B 03
+    inc Ram_030B                    ; PRG $0C50 | CPU $CC50 | EE 0B 03
+    lda IndexedGameplayLookupTable_CD85,y                 ; PRG $0C53 | CPU $CC53 | B9 85 CD
+    cmp #$AA                        ; PRG $0C56 | CPU $CC56 | C9 AA
+    beq Flow_CC30                ; PRG $0C58 | CPU $CC58 | F0 D6
+    clc                             ; PRG $0C5A | CPU $CC5A | 18
+    adc Ram_0308                    ; PRG $0C5B | CPU $CC5B | 6D 08 03
+    sta Ram_0308                    ; PRG $0C5E | CPU $CC5E | 8D 08 03
+    inc Ram_0303                    ; PRG $0C61 | CPU $CC61 | EE 03 03
+    rts                             ; PRG $0C64 | CPU $CC64 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch CC65.
+; Local behavior: Reads Ram_0300, Flow_CC6F, Continuation_CD2E; mutates no direct memory mutation observed.
+; Parameters: Ram_0300, Flow_CC6F, Continuation_CD2E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_CC65:
+    lda Ram_0300                    ; PRG $0C65 | CPU $CC65 | AD 00 03
+    cmp #$01                        ; PRG $0C68 | CPU $CC68 | C9 01
+    beq Flow_CC6F                ; PRG $0C6A | CPU $CC6A | F0 03
+    jmp Continuation_CD2E                ; PRG $0C6C | CPU $CC6C | 4C 2E CD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC6 F.
+; Local behavior: Reads Ram_0301, Flow_CC4D, Flow_CC33, CollisionExtent, Flow_CC0A, Flow_CC89, Ram_0308, ComputeOrDispatch_CC12; mutates no direct memory mutation observed.
+; Parameters: Ram_0301, Flow_CC4D, Flow_CC33, CollisionExtent, Flow_CC0A, Flow_CC89, Ram_0308, ComputeOrDispatch_CC12.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC6F:
+    bit Ram_0301                    ; PRG $0C6F | CPU $CC6F | 2C 01 03
+    bmi Flow_CC4D                ; PRG $0C72 | CPU $CC72 | 30 D9
+    bvs Flow_CC33                ; PRG $0C74 | CPU $CC74 | 70 BD
+    lda CollisionExtent                       ; PRG $0C76 | CPU $CC76 | A5 C0
+    and #$0C                        ; PRG $0C78 | CPU $CC78 | 29 0C
+    cmp #$08                        ; PRG $0C7A | CPU $CC7A | C9 08
+    beq Flow_CC0A                ; PRG $0C7C | CPU $CC7C | F0 8C
+    cmp #$04                        ; PRG $0C7E | CPU $CC7E | C9 04
+    bne Flow_CC89                ; PRG $0C80 | CPU $CC80 | D0 07
+    lda Ram_0308                    ; PRG $0C82 | CPU $CC82 | AD 08 03
+    cmp #$C8                        ; PRG $0C85 | CPU $CC85 | C9 C8
+    bne ComputeOrDispatch_CC12                ; PRG $0C87 | CPU $CC87 | D0 89
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CC89.
+; Local behavior: Reads CalculateAndClampValue_CDF6, Flow_CC16, CollisionExtent, Flow_CCF6, Ram_0301, Flow_CCA3, ObjectSlotOrFieldIndex, Flow_CCA8; mutates ObjectSlotOrFieldIndex.
+; Parameters: CalculateAndClampValue_CDF6, Flow_CC16, CollisionExtent, Flow_CCF6, Ram_0301, Flow_CCA3, ObjectSlotOrFieldIndex, Flow_CCA8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CC89:
+    jsr CalculateAndClampValue_CDF6                ; PRG $0C89 | CPU $CC89 | 20 F6 CD
+    bcs Flow_CC16                ; PRG $0C8C | CPU $CC8C | B0 88
+    lda CollisionExtent                       ; PRG $0C8E | CPU $CC8E | A5 C0
+    and #$03                        ; PRG $0C90 | CPU $CC90 | 29 03
+    sta ObjectSlotOrFieldIndex                       ; PRG $0C92 | CPU $CC92 | 85 0E
+    beq Flow_CCF6                ; PRG $0C94 | CPU $CC94 | F0 60
+    lda Ram_0301                    ; PRG $0C96 | CPU $CC96 | AD 01 03
+    and #$03                        ; PRG $0C99 | CPU $CC99 | 29 03
+    beq Flow_CCA3                ; PRG $0C9B | CPU $CC9B | F0 06
+    and ObjectSlotOrFieldIndex                       ; PRG $0C9D | CPU $CC9D | 25 0E
+    bne Flow_CCA8                ; PRG $0C9F | CPU $CC9F | D0 07
+    bne Flow_CCF2                ; PRG $0CA1 | CPU $CCA1 | D0 4F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCA3.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0303.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCA3:
+    lda #$01                        ; PRG $0CA3 | CPU $CCA3 | A9 01
+    sta Ram_0303                    ; PRG $0CA5 | CPU $CCA5 | 8D 03 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCA8.
+; Local behavior: Reads Ram_030B, Flow_CCBB; mutates Ram_030C, Ram_030B.
+; Parameters: Ram_030B, Flow_CCBB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCA8:
+    lda #$00                        ; PRG $0CA8 | CPU $CCA8 | A9 00
+    sta Ram_030C                    ; PRG $0CAA | CPU $CCAA | 8D 0C 03
+    ldy #$03                        ; PRG $0CAD | CPU $CCAD | A0 03
+    lda Ram_030B                    ; PRG $0CAF | CPU $CCAF | AD 0B 03
+    cmp #$05                        ; PRG $0CB2 | CPU $CCB2 | C9 05
+    beq Flow_CCBB                ; PRG $0CB4 | CPU $CCB4 | F0 05
+    inc Ram_030B                    ; PRG $0CB6 | CPU $CCB6 | EE 0B 03
+    ldy #$01                        ; PRG $0CB9 | CPU $CCB9 | A0 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCBB.
+; Local behavior: Reads SignedOffsetAccumulator, Flow_CCC9, FrameCounter; mutates SignedOffsetAccumulator.
+; Parameters: SignedOffsetAccumulator, Flow_CCC9, FrameCounter.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCBB:
+    sty SignedOffsetAccumulator                       ; PRG $0CBB | CPU $CCBB | 84 10
+    lsr SignedOffsetAccumulator                       ; PRG $0CBD | CPU $CCBD | 46 10
+    bcc Flow_CCC9                ; PRG $0CBF | CPU $CCBF | 90 08
+    lda FrameCounter                       ; PRG $0CC1 | CPU $CCC1 | A5 27
+    and #$01                        ; PRG $0CC3 | CPU $CCC3 | 29 01
+    bne Flow_CCC9                ; PRG $0CC5 | CPU $CCC5 | D0 02
+    inc SignedOffsetAccumulator                       ; PRG $0CC7 | CPU $CCC7 | E6 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCC9.
+; Local behavior: Reads CollisionExtent, Flow_CCD7, Ram_0309, SignedOffsetAccumulator, Continuation_CCDD; mutates no direct memory mutation observed.
+; Parameters: CollisionExtent, Flow_CCD7, Ram_0309, SignedOffsetAccumulator, Continuation_CCDD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCC9:
+    lda CollisionExtent                       ; PRG $0CC9 | CPU $CCC9 | A5 C0
+    lsr a                           ; PRG $0CCB | CPU $CCCB | 4A
+    bcc Flow_CCD7                ; PRG $0CCC | CPU $CCCC | 90 09
+    lda Ram_0309                    ; PRG $0CCE | CPU $CCCE | AD 09 03
+    clc                             ; PRG $0CD1 | CPU $CCD1 | 18
+    adc SignedOffsetAccumulator                       ; PRG $0CD2 | CPU $CCD2 | 65 10
+    jmp Continuation_CCDD                ; PRG $0CD4 | CPU $CCD4 | 4C DD CC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCD7.
+; Local behavior: Reads Ram_0309, SignedOffsetAccumulator; mutates no direct memory mutation observed.
+; Parameters: Ram_0309, SignedOffsetAccumulator.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCD7:
+    lda Ram_0309                    ; PRG $0CD7 | CPU $CCD7 | AD 09 03
+    sec                             ; PRG $0CDA | CPU $CCDA | 38
+    sbc SignedOffsetAccumulator                       ; PRG $0CDB | CPU $CCDB | E5 10
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation CCDD.
+; Local behavior: Reads UpdateZp_13_CDCE, Flow_CCF2, FrameCounter, Flow_CD28; mutates Ram_0309, AudioPendingFlags.
+; Parameters: UpdateZp_13_CDCE, Flow_CCF2, FrameCounter, Flow_CD28.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_CCDD:
+    tay                             ; PRG $0CDD | CPU $CCDD | A8
+    jsr UpdateZp_13_CDCE                ; PRG $0CDE | CPU $CCDE | 20 CE CD
+    bcs Flow_CCF2                ; PRG $0CE1 | CPU $CCE1 | B0 0F
+    sty Ram_0309                    ; PRG $0CE3 | CPU $CCE3 | 8C 09 03
+    lda FrameCounter                       ; PRG $0CE6 | CPU $CCE6 | A5 27
+    and #$07                        ; PRG $0CE8 | CPU $CCE8 | 29 07
+    bne Flow_CD28                ; PRG $0CEA | CPU $CCEA | D0 3C
+    lda #$08                        ; PRG $0CEC | CPU $CCEC | A9 08
+    sta AudioPendingFlags                       ; PRG $0CEE | CPU $CCEE | 85 FD
+    bne Flow_CD28                ; PRG $0CF0 | CPU $CCF0 | D0 36
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCF2.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectSlotOrFieldIndex.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCF2:
+    ldx #$00                        ; PRG $0CF2 | CPU $CCF2 | A2 00
+    stx ObjectSlotOrFieldIndex                       ; PRG $0CF4 | CPU $CCF4 | 86 0E
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CCF6.
+; Local behavior: Reads Ram_0303, Ram_030C, Flow_CD10; mutates Ram_030B, Ram_0303, Ram_030C, Ram_0306.
+; Parameters: Ram_0303, Ram_030C, Flow_CD10.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CCF6:
+    lda #$00                        ; PRG $0CF6 | CPU $CCF6 | A9 00
+    sta Ram_030B                    ; PRG $0CF8 | CPU $CCF8 | 8D 0B 03
+    inc Ram_0303                    ; PRG $0CFB | CPU $CCFB | EE 03 03
+    inc Ram_030C                    ; PRG $0CFE | CPU $CCFE | EE 0C 03
+    lda Ram_030C                    ; PRG $0D01 | CPU $CD01 | AD 0C 03
+    cmp #$80                        ; PRG $0D04 | CPU $CD04 | C9 80
+    bne Flow_CD10                ; PRG $0D06 | CPU $CD06 | D0 08
+    dec Ram_030C                    ; PRG $0D08 | CPU $CD08 | CE 0C 03
+    lda #$08                        ; PRG $0D0B | CPU $CD0B | A9 08
+    sta Ram_0306                    ; PRG $0D0D | CPU $CD0D | 8D 06 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD10.
+; Local behavior: Reads Ram_0304, Flow_CD28, Ram_0306, Flow_CD23; mutates Ram_0303.
+; Parameters: Ram_0304, Flow_CD28, Ram_0306, Flow_CD23.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD10:
+    lda Ram_0304                    ; PRG $0D10 | CPU $CD10 | AD 04 03
+    cmp #$08                        ; PRG $0D13 | CPU $CD13 | C9 08
+    bne Flow_CD28                ; PRG $0D15 | CPU $CD15 | D0 11
+    lda Ram_0306                    ; PRG $0D17 | CPU $CD17 | AD 06 03
+    cmp #$08                        ; PRG $0D1A | CPU $CD1A | C9 08
+    bne Flow_CD23                ; PRG $0D1C | CPU $CD1C | D0 05
+    lda #$01                        ; PRG $0D1E | CPU $CD1E | A9 01
+    sta Ram_0303                    ; PRG $0D20 | CPU $CD20 | 8D 03 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD23.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_030C.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD23:
+    lda #$00                        ; PRG $0D23 | CPU $CD23 | A9 00
+    sta Ram_030C                    ; PRG $0D25 | CPU $CD25 | 8D 0C 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD28.
+; Local behavior: Reads ObjectSlotOrFieldIndex; mutates Ram_0301.
+; Parameters: ObjectSlotOrFieldIndex.
+; Returns: returns to caller; flags/register result depends on final instructions: lda ObjectSlotOrFieldIndex; sta Ram_0301; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD28:
+    lda ObjectSlotOrFieldIndex                       ; PRG $0D28 | CPU $CD28 | A5 0E
+    sta Ram_0301                    ; PRG $0D2A | CPU $CD2A | 8D 01 03
+    rts                             ; PRG $0D2D | CPU $CD2D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation CD2 E.
+; Local behavior: Reads Ram_0301, Flow_CD40, Flow_CD5B, Flow_CD64, Flow_CD68, Flow_CD7B; mutates no direct memory mutation observed.
+; Parameters: Ram_0301, Flow_CD40, Flow_CD5B, Flow_CD64, Flow_CD68, Flow_CD7B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_CD2E:
+    ldx #$00                        ; PRG $0D2E | CPU $CD2E | A2 00
+    ldy Ram_0301                    ; PRG $0D30 | CPU $CD30 | AC 01 03
+    beq Flow_CD40                ; PRG $0D33 | CPU $CD33 | F0 0B
+    dey                             ; PRG $0D35 | CPU $CD35 | 88
+    beq Flow_CD5B                ; PRG $0D36 | CPU $CD36 | F0 23
+    dey                             ; PRG $0D38 | CPU $CD38 | 88
+    beq Flow_CD64                ; PRG $0D39 | CPU $CD39 | F0 29
+    dey                             ; PRG $0D3B | CPU $CD3B | 88
+    beq Flow_CD68                ; PRG $0D3C | CPU $CD3C | F0 2A
+    bne Flow_CD7B                ; PRG $0D3E | CPU $CD3E | D0 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD40.
+; Local behavior: Reads Ram_0301; mutates Ram_0303, Ram_0305, Ram_030C, Ram_0301, AudioChannelRequest, AudioRequestFlags.
+; Parameters: Ram_0301.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$04; sta AudioRequestFlags; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD40:
+    lda #$01                        ; PRG $0D40 | CPU $CD40 | A9 01
+    sta Ram_0303                    ; PRG $0D42 | CPU $CD42 | 8D 03 03
+    lda #$32                        ; PRG $0D45 | CPU $CD45 | A9 32
+    sta Ram_0305                    ; PRG $0D47 | CPU $CD47 | 8D 05 03
+    lda #$40                        ; PRG $0D4A | CPU $CD4A | A9 40
+    sta Ram_030C                    ; PRG $0D4C | CPU $CD4C | 8D 0C 03
+    inc Ram_0301                    ; PRG $0D4F | CPU $CD4F | EE 01 03
+    lda #$01                        ; PRG $0D52 | CPU $CD52 | A9 01
+    sta AudioChannelRequest                       ; PRG $0D54 | CPU $CD54 | 85 FF
+    lda #$04                        ; PRG $0D56 | CPU $CD56 | A9 04
+    sta AudioRequestFlags                       ; PRG $0D58 | CPU $CD58 | 85 FB
+    rts                             ; PRG $0D5A | CPU $CD5A | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD5 B.
+; Local behavior: Reads Ram_030C, Flow_CD63, UpdateRam_0301_CEE5; mutates Ram_030C.
+; Parameters: Ram_030C, Flow_CD63, UpdateRam_0301_CEE5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD5B:
+    dec Ram_030C                    ; PRG $0D5B | CPU $CD5B | CE 0C 03
+    bne Flow_CD63                ; PRG $0D5E | CPU $CD5E | D0 03
+    jsr UpdateRam_0301_CEE5                ; PRG $0D60 | CPU $CD60 | 20 E5 CE
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD63.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD63:
+    rts                             ; PRG $0D63 | CPU $CD63 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD64.
+; Local behavior: Reads UpdateRam_030C_CEF2; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_030C_CEF2.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr UpdateRam_030C_CEF2; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD64:
+    jsr UpdateRam_030C_CEF2                ; PRG $0D64 | CPU $CD64 | 20 F2 CE
+    rts                             ; PRG $0D67 | CPU $CD67 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD68.
+; Local behavior: Reads Ram_0301; mutates Ram_0305, Ram_030C, Ram_0308, Ram_0301.
+; Parameters: Ram_0301.
+; Returns: returns to caller; flags/register result depends on final instructions: sta Ram_0308; inc Ram_0301; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD68:
+    lda #$36                        ; PRG $0D68 | CPU $CD68 | A9 36
+    sta Ram_0305                    ; PRG $0D6A | CPU $CD6A | 8D 05 03
+    lda #$C0                        ; PRG $0D6D | CPU $CD6D | A9 C0
+    sta Ram_030C                    ; PRG $0D6F | CPU $CD6F | 8D 0C 03
+    lda #$C8                        ; PRG $0D72 | CPU $CD72 | A9 C8
+    sta Ram_0308                    ; PRG $0D74 | CPU $CD74 | 8D 08 03
+    inc Ram_0301                    ; PRG $0D77 | CPU $CD77 | EE 01 03
+    rts                             ; PRG $0D7A | CPU $CD7A | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD7 B.
+; Local behavior: Reads Ram_030C, Flow_CD84; mutates Ram_030C, ObjectSpawnDelay.
+; Parameters: Ram_030C, Flow_CD84.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD7B:
+    dec Ram_030C                    ; PRG $0D7B | CPU $CD7B | CE 0C 03
+    bne Flow_CD84                ; PRG $0D7E | CPU $CD7E | D0 04
+    lda #$01                        ; PRG $0D80 | CPU $CD80 | A9 01
+    sta ObjectSpawnDelay                       ; PRG $0D82 | CPU $CD82 | 85 47
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CD84.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CD84:
+    rts                             ; PRG $0D84 | CPU $CD84 | 60
+
+IndexedGameplayLookupTable_CD85:
+    .byte $FD,$FE,$FE,$FE,$FE,$FF,$FF,$FE,$FF,$FF,$FF,$FF,$00,$FF,$00,$FF ; PRG $0D85 | CPU $CD85
+    .byte $00,$AA,$00,$01,$00,$01,$00,$01,$01,$01,$01,$02,$01,$01,$02,$02 ; PRG $0D95 | CPU $CD95
+    .byte $02,$03,$02,$03,$02,$03,$AA ; PRG $0DA5 | CPU $CDA5
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0304 CDAC.
+; Local behavior: Reads Ram_0300, Flow_CDCD, Ram_0304, Ram_0306, Flow_CDC8, Flow_CDCA; mutates Ram_0304.
+; Parameters: Ram_0300, Flow_CDCD, Ram_0304, Ram_0306, Flow_CDC8, Flow_CDCA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0304_CDAC:
+    lda Ram_0300                    ; PRG $0DAC | CPU $CDAC | AD 00 03
+    cmp #$01                        ; PRG $0DAF | CPU $CDAF | C9 01
+    bne Flow_CDCD                ; PRG $0DB1 | CPU $CDB1 | D0 1A
+    ldy Ram_0304                    ; PRG $0DB3 | CPU $CDB3 | AC 04 03
+    beq Flow_CDCD                ; PRG $0DB6 | CPU $CDB6 | F0 15
+    lda Ram_0306                    ; PRG $0DB8 | CPU $CDB8 | AD 06 03
+    dec Ram_0304                    ; PRG $0DBB | CPU $CDBB | CE 04 03
+    beq Flow_CDC8                ; PRG $0DBE | CPU $CDBE | F0 08
+    cpy #$08                        ; PRG $0DC0 | CPU $CDC0 | C0 08
+    bne Flow_CDCD                ; PRG $0DC2 | CPU $CDC2 | D0 09
+    ora #$04                        ; PRG $0DC4 | CPU $CDC4 | 09 04
+    bne Flow_CDCA                ; PRG $0DC6 | CPU $CDC6 | D0 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDC8.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDC8:
+    and #$FB                        ; PRG $0DC8 | CPU $CDC8 | 29 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDCA.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0306.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDCA:
+    sta Ram_0306                    ; PRG $0DCA | CPU $CDCA | 8D 06 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDCD.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDCD:
+    rts                             ; PRG $0DCD | CPU $CDCD | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 13 CDCE.
+; Local behavior: Reads Ram_0308; mutates CoordinateValue.
+; Parameters: Ram_0308.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_13_CDCE:
+    lda Ram_0308                    ; PRG $0DCE | CPU $CDCE | AD 08 03
+    sta CoordinateValue                       ; PRG $0DD1 | CPU $CDD1 | 85 13
+    ldx #$00                        ; PRG $0DD3 | CPU $CDD3 | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Update Current Sprite Tile Id CDD5.
+; Local behavior: Reads implicit CPU state or none observed; mutates CurrentSpriteTileId.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateCurrentSpriteTileId_CDD5:
+    lda #$04                        ; PRG $0DD5 | CPU $CDD5 | A9 04
+    sta CurrentSpriteTileId                       ; PRG $0DD7 | CPU $CDD7 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDD9.
+; Local behavior: Reads CoordinateValue, Flow_CDE9, CurrentSpriteTileId, Flow_CDD9; mutates CurrentSpriteTileId.
+; Parameters: CoordinateValue, Flow_CDE9, CurrentSpriteTileId, Flow_CDD9.
+; Returns: returns to caller; flags/register result depends on final instructions: bne Flow_CDD9; sec; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDD9:
+    lda $CE3B,x                     ; PRG $0DD9 | CPU $CDD9 | BD 3B CE
+    cmp CoordinateValue                       ; PRG $0DDC | CPU $CDDC | C5 13
+    beq Flow_CDE9                ; PRG $0DDE | CPU $CDDE | F0 09
+    inx                             ; PRG $0DE0 | CPU $CDE0 | E8
+    inx                             ; PRG $0DE1 | CPU $CDE1 | E8
+    inx                             ; PRG $0DE2 | CPU $CDE2 | E8
+    dec CurrentSpriteTileId                       ; PRG $0DE3 | CPU $CDE3 | C6 11
+    bne Flow_CDD9                ; PRG $0DE5 | CPU $CDE5 | D0 F2
+    sec                             ; PRG $0DE7 | CPU $CDE7 | 38
+    rts                             ; PRG $0DE8 | CPU $CDE8 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDE9.
+; Local behavior: Reads Flow_CDF4, Flow_CDF5; mutates no direct memory mutation observed.
+; Parameters: Flow_CDF4, Flow_CDF5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDE9:
+    tya                             ; PRG $0DE9 | CPU $CDE9 | 98
+    cmp $CE3C,x                     ; PRG $0DEA | CPU $CDEA | DD 3C CE
+    bcc Flow_CDF4                ; PRG $0DED | CPU $CDED | 90 05
+    cmp $CE3D,x                     ; PRG $0DEF | CPU $CDEF | DD 3D CE
+    bcc Flow_CDF5                ; PRG $0DF2 | CPU $CDF2 | 90 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDF4.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDF4:
+    sec                             ; PRG $0DF4 | CPU $CDF4 | 38
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CDF5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CDF5:
+    rts                             ; PRG $0DF5 | CPU $CDF5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value CDF6.
+; Local behavior: Reads Ram_0308, ScreenObjectMode, Flow_CE0A; mutates CoordinateValue.
+; Parameters: Ram_0308, ScreenObjectMode, Flow_CE0A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_CDF6:
+    lda Ram_0308                    ; PRG $0DF6 | CPU $CDF6 | AD 08 03
+    clc                             ; PRG $0DF9 | CPU $CDF9 | 18
+    adc #$03                        ; PRG $0DFA | CPU $CDFA | 69 03
+    and #$FC                        ; PRG $0DFC | CPU $CDFC | 29 FC
+    sta CoordinateValue                       ; PRG $0DFE | CPU $CDFE | 85 13
+    ldx #$0C                        ; PRG $0E00 | CPU $CE00 | A2 0C
+    lda ScreenObjectMode                       ; PRG $0E02 | CPU $CE02 | A5 62
+    cmp #$02                        ; PRG $0E04 | CPU $CE04 | C9 02
+    bne Flow_CE0A                ; PRG $0E06 | CPU $CE06 | D0 02
+    ldx #$18                        ; PRG $0E08 | CPU $CE08 | A2 18
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CE0 A.
+; Local behavior: Reads Ram_0309; mutates no direct memory mutation observed.
+; Parameters: Ram_0309.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CE0A:
+    ldy Ram_0309                    ; PRG $0E0A | CPU $CE0A | AC 09 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CE0 D.
+; Local behavior: Reads UpdateCurrentSpriteTileId_CDD5, Flow_CDF4, ScreenObjectMode, Flow_CE25, CoordinateValue; mutates no direct memory mutation observed.
+; Parameters: UpdateCurrentSpriteTileId_CDD5, Flow_CDF4, ScreenObjectMode, Flow_CE25, CoordinateValue.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CE0D:
+    jsr UpdateCurrentSpriteTileId_CDD5                ; PRG $0E0D | CPU $CE0D | 20 D5 CD
+    bcs Flow_CDF4                ; PRG $0E10 | CPU $CE10 | B0 E2
+    ldx ScreenObjectMode                       ; PRG $0E12 | CPU $CE12 | A6 62
+    dex                             ; PRG $0E14 | CPU $CE14 | CA
+    bne Flow_CE25                ; PRG $0E15 | CPU $CE15 | D0 0E
+    lda #$A8                        ; PRG $0E17 | CPU $CE17 | A9 A8
+    cmp CoordinateValue                       ; PRG $0E19 | CPU $CE19 | C5 13
+    bne Flow_CE25                ; PRG $0E1B | CPU $CE1B | D0 08
+    cpy #$6F                        ; PRG $0E1D | CPU $CE1D | C0 6F
+    bcc Flow_CE25                ; PRG $0E1F | CPU $CE1F | 90 04
+    cpy #$93                        ; PRG $0E21 | CPU $CE21 | C0 93
+    bcc Flow_CDF4                ; PRG $0E23 | CPU $CE23 | 90 CF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CE25.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: clc; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CE25:
+    clc                             ; PRG $0E25 | CPU $CE25 | 18
+    rts                             ; PRG $0E26 | CPU $CE26 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value CE27.
+; Local behavior: Reads Ram_0608, ScreenObjectMode, Flow_CE0D; mutates CoordinateValue.
+; Parameters: Ram_0608, ScreenObjectMode, Flow_CE0D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_CE27:
+    lda Ram_0608,x                  ; PRG $0E27 | CPU $CE27 | BD 08 06
+    clc                             ; PRG $0E2A | CPU $CE2A | 18
+    adc #$FC                        ; PRG $0E2B | CPU $CE2B | 69 FC
+    sta CoordinateValue                       ; PRG $0E2D | CPU $CE2D | 85 13
+    ldx #$24                        ; PRG $0E2F | CPU $CE2F | A2 24
+    lda ScreenObjectMode                       ; PRG $0E31 | CPU $CE31 | A5 62
+    cmp #$02                        ; PRG $0E33 | CPU $CE33 | C9 02
+    bne Flow_CE0D                ; PRG $0E35 | CPU $CE35 | D0 D6
+    ldx #$30                        ; PRG $0E37 | CPU $CE37 | A2 30
+    bne Flow_CE0D                ; PRG $0E39 | CPU $CE39 | D0 D2
+    tya                             ; PRG $0E3B | CPU $CE3B | 98
+    lsr a                           ; PRG $0E3C | CPU $CE3C | 4A
+    clv                             ; PRG $0E3D | CPU $CE3D | B8
+    tay                             ; PRG $0E3E | CPU $CE3E | A8
+    .byte $3A,$C8,$B8,$2A,$D8,$C8,$1A,$E8,$98,$4A,$B8,$A8,$3A,$C8,$B8,$2A ; PRG $0E3F | CPU $CE3F
+    .byte $D8,$C8,$00,$FF,$98,$FF,$00,$A8,$3B,$C7,$B8,$2B,$D7,$C8,$00,$FF ; PRG $0E4F | CPU $CE4F
+    .byte $98,$48,$B8,$A8,$38,$C8,$B8,$28,$D8,$C8,$20,$E0,$68,$20,$E0,$70 ; PRG $0E5F | CPU $CE5F
+    .byte $20,$E0,$78,$20,$E0,$80,$20,$E0 ; PRG $0E6F | CPU $CE6F
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch CE77.
+; Local behavior: Reads ScreenObjectMode, Flow_CE81; mutates no direct memory mutation observed.
+; Parameters: ScreenObjectMode, Flow_CE81.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_CE77:
+    ldy #$90                        ; PRG $0E77 | CPU $CE77 | A0 90
+    lda ScreenObjectMode                       ; PRG $0E79 | CPU $CE79 | A5 62
+    cmp #$02                        ; PRG $0E7B | CPU $CE7B | C9 02
+    bne Flow_CE81                ; PRG $0E7D | CPU $CE7D | D0 02
+    ldy #$80                        ; PRG $0E7F | CPU $CE7F | A0 80
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CE81.
+; Local behavior: Reads ObjectSpawnType, Flow_CEA8; mutates Ram_032A, ObjectSpawnType, Ram_0320, Ram_0326, Ram_0327, Ram_0328, Ram_0329, Ram_0321.
+; Parameters: ObjectSpawnType, Flow_CEA8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CE81:
+    sty Ram_032A                    ; PRG $0E81 | CPU $CE81 | 8C 2A 03
+    lda ObjectSpawnType                       ; PRG $0E84 | CPU $CE84 | A5 48
+    beq Flow_CEA8                ; PRG $0E86 | CPU $CE86 | F0 20
+    dec ObjectSpawnType                       ; PRG $0E88 | CPU $CE88 | C6 48
+    lda #$01                        ; PRG $0E8A | CPU $CE8A | A9 01
+    sta Ram_0320                    ; PRG $0E8C | CPU $CE8C | 8D 20 03
+    lda #$0E                        ; PRG $0E8F | CPU $CE8F | A9 0E
+    sta Ram_0326                    ; PRG $0E91 | CPU $CE91 | 8D 26 03
+    lda #$02                        ; PRG $0E94 | CPU $CE94 | A9 02
+    sta Ram_0327                    ; PRG $0E96 | CPU $CE96 | 8D 27 03
+    lda #$30                        ; PRG $0E99 | CPU $CE99 | A9 30
+    sta Ram_0328                    ; PRG $0E9B | CPU $CE9B | 8D 28 03
+    lda #$96                        ; PRG $0E9E | CPU $CE9E | A9 96
+    sta Ram_0329                    ; PRG $0EA0 | CPU $CEA0 | 8D 29 03
+    lda #$00                        ; PRG $0EA3 | CPU $CEA3 | A9 00
+    sta Ram_0321                    ; PRG $0EA5 | CPU $CEA5 | 8D 21 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CEA8.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CEA8:
+    rts                             ; PRG $0EA8 | CPU $CEA8 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 CEA9.
+; Local behavior: Reads Ram_0320, Flow_CEBE, ComputeOrDispatch_CEBF, LoadObjectSpriteRenderState; mutates ObjectRecordPointerLo, ObjectRecordPointerHi.
+; Parameters: Ram_0320, Flow_CEBE, ComputeOrDispatch_CEBF, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_CEA9:
+    lda Ram_0320                    ; PRG $0EA9 | CPU $CEA9 | AD 20 03
+    beq Flow_CEBE                ; PRG $0EAC | CPU $CEAC | F0 10
+    lda #$20                        ; PRG $0EAE | CPU $CEAE | A9 20
+    sta ObjectRecordPointerLo                       ; PRG $0EB0 | CPU $CEB0 | 85 A8
+    lda #$03                        ; PRG $0EB2 | CPU $CEB2 | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $0EB4 | CPU $CEB4 | 85 A9
+    ldx #$20                        ; PRG $0EB6 | CPU $CEB6 | A2 20
+    jsr ComputeOrDispatch_CEBF                ; PRG $0EB8 | CPU $CEB8 | 20 BF CE
+    jsr LoadObjectSpriteRenderState                ; PRG $0EBB | CPU $CEBB | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CEBE.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CEBE:
+    rts                             ; PRG $0EBE | CPU $CEBE | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch CEBF.
+; Local behavior: Reads Ram_0301, Flow_CECD, UpdateRam_030C_CEF2, Flow_CF33, UpdateRam_032E_CF6D; mutates no direct memory mutation observed.
+; Parameters: Ram_0301, Flow_CECD, UpdateRam_030C_CEF2, Flow_CF33, UpdateRam_032E_CF6D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_CEBF:
+    ldy Ram_0301,x                  ; PRG $0EBF | CPU $CEBF | BC 01 03
+    beq Flow_CECD                ; PRG $0EC2 | CPU $CEC2 | F0 09
+    dey                             ; PRG $0EC4 | CPU $CEC4 | 88
+    beq UpdateRam_030C_CEF2                ; PRG $0EC5 | CPU $CEC5 | F0 2B
+    dey                             ; PRG $0EC7 | CPU $CEC7 | 88
+    beq Flow_CF33                ; PRG $0EC8 | CPU $CEC8 | F0 69
+    jmp UpdateRam_032E_CF6D                ; PRG $0ECA | CPU $CECA | 4C 6D CF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CECD.
+; Local behavior: Reads Ram_0368, Ram_0328, UpdateRam_0301_CEE5, Flow_CEE4; mutates Ram_0329.
+; Parameters: Ram_0368, Ram_0328, UpdateRam_0301_CEE5, Flow_CEE4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CECD:
+    lda Ram_0368                    ; PRG $0ECD | CPU $CECD | AD 68 03
+    sec                             ; PRG $0ED0 | CPU $CED0 | 38
+    sbc #$1C                        ; PRG $0ED1 | CPU $CED1 | E9 1C
+    sbc Ram_0328                    ; PRG $0ED3 | CPU $CED3 | ED 28 03
+    bcc UpdateRam_0301_CEE5                ; PRG $0ED6 | CPU $CED6 | 90 0D
+    cmp #$06                        ; PRG $0ED8 | CPU $CED8 | C9 06
+    bcs Flow_CEE4                ; PRG $0EDA | CPU $CEDA | B0 08
+    and #$01                        ; PRG $0EDC | CPU $CEDC | 29 01
+    asl a                           ; PRG $0EDE | CPU $CEDE | 0A
+    adc #$96                        ; PRG $0EDF | CPU $CEDF | 69 96
+    sta Ram_0329                    ; PRG $0EE1 | CPU $CEE1 | 8D 29 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CEE4.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CEE4:
+    rts                             ; PRG $0EE4 | CPU $CEE4 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0301 CEE5.
+; Local behavior: Reads Ram_0301; mutates Ram_0301, Ram_030B, Ram_030C.
+; Parameters: Ram_0301.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0301_CEE5:
+    inc Ram_0301,x                  ; PRG $0EE5 | CPU $CEE5 | FE 01 03
+    lda #$00                        ; PRG $0EE8 | CPU $CEE8 | A9 00
+    sta Ram_030B,x                  ; PRG $0EEA | CPU $CEEA | 9D 0B 03
+    lda #$01                        ; PRG $0EED | CPU $CEED | A9 01
+    sta Ram_030C,x                  ; PRG $0EEF | CPU $CEEF | 9D 0C 03
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 030 C CEF2.
+; Local behavior: Reads Ram_030C, Flow_CF0C, Ram_030B, IndexedGameplayLookupTable_CF84; mutates Ram_030C, Ram_0304, Ram_030B.
+; Parameters: Ram_030C, Flow_CF0C, Ram_030B, IndexedGameplayLookupTable_CF84.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_030C_CEF2:
+    dec Ram_030C,x                  ; PRG $0EF2 | CPU $CEF2 | DE 0C 03
+    bne Flow_CF0C                ; PRG $0EF5 | CPU $CEF5 | D0 15
+    ldy Ram_030B,x                  ; PRG $0EF7 | CPU $CEF7 | BC 0B 03
+    lda IndexedGameplayLookupTable_CF84,y                 ; PRG $0EFA | CPU $CEFA | B9 84 CF
+    sta Ram_030C,x                  ; PRG $0EFD | CPU $CEFD | 9D 0C 03
+    iny                             ; PRG $0F00 | CPU $CF00 | C8
+    lda IndexedGameplayLookupTable_CF84,y                 ; PRG $0F01 | CPU $CF01 | B9 84 CF
+    sta Ram_0304,x                  ; PRG $0F04 | CPU $CF04 | 9D 04 03
+    iny                             ; PRG $0F07 | CPU $CF07 | C8
+    tya                             ; PRG $0F08 | CPU $CF08 | 98
+    sta Ram_030B,x                  ; PRG $0F09 | CPU $CF09 | 9D 0B 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF0 C.
+; Local behavior: Reads Flow_CF14; mutates no direct memory mutation observed.
+; Parameters: Flow_CF14.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF0C:
+    lda #$C4                        ; PRG $0F0C | CPU $CF0C | A9 C4
+    cpx #$A0                        ; PRG $0F0E | CPU $CF0E | E0 A0
+    bne Flow_CF14                ; PRG $0F10 | CPU $CF10 | D0 02
+    lda #$D4                        ; PRG $0F12 | CPU $CF12 | A9 D4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF14.
+; Local behavior: Reads Ram_0308, Ram_0304, PackedHudOrObjectValue, UpdateRam_032E_CF6D, Ram_0301; mutates PackedHudOrObjectValue, Ram_0308, Ram_0301, Ram_030B.
+; Parameters: Ram_0308, Ram_0304, PackedHudOrObjectValue, UpdateRam_032E_CF6D, Ram_0301.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF14:
+    sta PackedHudOrObjectValue                       ; PRG $0F14 | CPU $CF14 | 85 16
+    lda Ram_0308,x                  ; PRG $0F16 | CPU $CF16 | BD 08 03
+    clc                             ; PRG $0F19 | CPU $CF19 | 18
+    adc Ram_0304,x                  ; PRG $0F1A | CPU $CF1A | 7D 04 03
+    sta Ram_0308,x                  ; PRG $0F1D | CPU $CF1D | 9D 08 03
+    cmp PackedHudOrObjectValue                       ; PRG $0F20 | CPU $CF20 | C5 16
+    bcc UpdateRam_032E_CF6D                ; PRG $0F22 | CPU $CF22 | 90 49
+    inc Ram_0301,x                  ; PRG $0F24 | CPU $CF24 | FE 01 03
+    lda PackedHudOrObjectValue                       ; PRG $0F27 | CPU $CF27 | A5 16
+    adc #$03                        ; PRG $0F29 | CPU $CF29 | 69 03
+    sta Ram_0308,x                  ; PRG $0F2B | CPU $CF2B | 9D 08 03
+    lda #$00                        ; PRG $0F2E | CPU $CF2E | A9 00
+    sta Ram_030B,x                  ; PRG $0F30 | CPU $CF30 | 9D 0B 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF33.
+; Local behavior: Reads FrameCounter, UpdateRam_032E_CF6D, Ram_030B, IndexedGameplayLookupTable_CF8C, Flow_CF6A, Ram_0308, Flow_CF58; mutates Ram_0308, Ram_030B.
+; Parameters: FrameCounter, UpdateRam_032E_CF6D, Ram_030B, IndexedGameplayLookupTable_CF8C, Flow_CF6A, Ram_0308, Flow_CF58.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF33:
+    lda FrameCounter                       ; PRG $0F33 | CPU $CF33 | A5 27
+    lsr a                           ; PRG $0F35 | CPU $CF35 | 4A
+    bcc UpdateRam_032E_CF6D                ; PRG $0F36 | CPU $CF36 | 90 35
+    ldy Ram_030B,x                  ; PRG $0F38 | CPU $CF38 | BC 0B 03
+    lda IndexedGameplayLookupTable_CF8C,y                 ; PRG $0F3B | CPU $CF3B | B9 8C CF
+    cmp #$AA                        ; PRG $0F3E | CPU $CF3E | C9 AA
+    beq Flow_CF6A                ; PRG $0F40 | CPU $CF40 | F0 28
+    clc                             ; PRG $0F42 | CPU $CF42 | 18
+    adc Ram_0308,x                  ; PRG $0F43 | CPU $CF43 | 7D 08 03
+    sta Ram_0308,x                  ; PRG $0F46 | CPU $CF46 | 9D 08 03
+    inc Ram_030B,x                  ; PRG $0F49 | CPU $CF49 | FE 0B 03
+    cpx #$A0                        ; PRG $0F4C | CPU $CF4C | E0 A0
+    beq Flow_CF58                ; PRG $0F4E | CPU $CF4E | F0 08
+    cpx #$60                        ; PRG $0F50 | CPU $CF50 | E0 60
+    beq Flow_CF58                ; PRG $0F52 | CPU $CF52 | F0 04
+    cpx #$80                        ; PRG $0F54 | CPU $CF54 | E0 80
+    bne UpdateRam_032E_CF6D                ; PRG $0F56 | CPU $CF56 | D0 15
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF58.
+; Local behavior: Reads Flow_CF64, UpdateRam_032E_CF6D; mutates no direct memory mutation observed.
+; Parameters: Flow_CF64, UpdateRam_032E_CF6D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF58:
+    cpy #$00                        ; PRG $0F58 | CPU $CF58 | C0 00
+    beq Flow_CF64                ; PRG $0F5A | CPU $CF5A | F0 08
+    cpy #$23                        ; PRG $0F5C | CPU $CF5C | C0 23
+    beq Flow_CF64                ; PRG $0F5E | CPU $CF5E | F0 04
+    cpy #$16                        ; PRG $0F60 | CPU $CF60 | C0 16
+    bne UpdateRam_032E_CF6D                ; PRG $0F62 | CPU $CF62 | D0 09
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF64.
+; Local behavior: Reads UpdateRam_032E_CF6D; mutates AudioPendingFlags.
+; Parameters: UpdateRam_032E_CF6D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF64:
+    lda #$04                        ; PRG $0F64 | CPU $CF64 | A9 04
+    sta AudioPendingFlags                       ; PRG $0F66 | CPU $CF66 | 85 FD
+    bne UpdateRam_032E_CF6D                ; PRG $0F68 | CPU $CF68 | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF6 A.
+; Local behavior: Reads Ram_0301; mutates Ram_0301.
+; Parameters: Ram_0301.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF6A:
+    inc Ram_0301,x                  ; PRG $0F6A | CPU $CF6A | FE 01 03
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 032 E CF6 D.
+; Local behavior: Reads Flow_CF83, Ram_032E; mutates Ram_032E, Ram_0320, Ram_0326.
+; Parameters: Flow_CF83, Ram_032E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_032E_CF6D:
+    cpx #$20                        ; PRG $0F6D | CPU $CF6D | E0 20
+    bne Flow_CF83                ; PRG $0F6F | CPU $CF6F | D0 12
+    lda Ram_032E                    ; PRG $0F71 | CPU $CF71 | AD 2E 03
+    beq Flow_CF83                ; PRG $0F74 | CPU $CF74 | F0 0D
+    dec Ram_032E                    ; PRG $0F76 | CPU $CF76 | CE 2E 03
+    lda #$00                        ; PRG $0F79 | CPU $CF79 | A9 00
+    sta Ram_0320                    ; PRG $0F7B | CPU $CF7B | 8D 20 03
+    lda #$48                        ; PRG $0F7E | CPU $CF7E | A9 48
+    sta Ram_0326                    ; PRG $0F80 | CPU $CF80 | 8D 26 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CF83.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CF83:
+    rts                             ; PRG $0F83 | CPU $CF83 | 60
+
+IndexedGameplayLookupTable_CF84:
+    .byte $06,$01,$0A,$02,$0E,$03,$80,$04 ; PRG $0F84 | CPU $CF84
+
+IndexedGameplayLookupTable_CF8C:
+    .byte $FD,$FD,$FD,$FE,$FE,$FE,$FF,$FF,$FF,$00,$FF,$00,$01,$00,$01,$01 ; PRG $0F8C | CPU $CF8C
+    .byte $01,$02,$02,$02,$03,$03,$03,$FE,$FE,$FF,$FF,$00,$FF,$00,$01,$00 ; PRG $0F9C | CPU $CF9C
+    .byte $01,$01,$02,$02,$AA ; PRG $0FAC | CPU $CFAC
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 54 CFB1.
+; Local behavior: Reads GameplayObjectFlags, Flow_CFB8; mutates GameplayObjectFlags.
+; Parameters: GameplayObjectFlags, Flow_CFB8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_54_CFB1:
+    ldy GameplayObjectFlags                       ; PRG $0FB1 | CPU $CFB1 | A4 54
+    beq Flow_CFB8                ; PRG $0FB3 | CPU $CFB3 | F0 03
+    dec GameplayObjectFlags                       ; PRG $0FB5 | CPU $CFB5 | C6 54
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CFB7.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CFB7:
+    rts                             ; PRG $0FB7 | CPU $CFB7 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CFB8.
+; Local behavior: Reads CollisionExtent, Flow_CFB7, Ram_0340, Flow_CFCC, Ram_0350, Flow_D019; mutates no direct memory mutation observed.
+; Parameters: CollisionExtent, Flow_CFB7, Ram_0340, Flow_CFCC, Ram_0350, Flow_D019.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CFB8:
+    lda CollisionExtent                       ; PRG $0FB8 | CPU $CFB8 | A5 C0
+    and #$C0                        ; PRG $0FBA | CPU $CFBA | 29 C0
+    beq Flow_CFB7                ; PRG $0FBC | CPU $CFBC | F0 F9
+    ldx #$00                        ; PRG $0FBE | CPU $CFBE | A2 00
+    lda Ram_0340                    ; PRG $0FC0 | CPU $CFC0 | AD 40 03
+    beq Flow_CFCC                ; PRG $0FC3 | CPU $CFC3 | F0 07
+    lda Ram_0350                    ; PRG $0FC5 | CPU $CFC5 | AD 50 03
+    bne Flow_D019                ; PRG $0FC8 | CPU $CFC8 | D0 4F
+    ldx #$10                        ; PRG $0FCA | CPU $CFCA | A2 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow CFCC.
+; Local behavior: Reads Ram_0308, Ram_0309, GameplayObjectAnimation, Flow_D003; mutates GameplayObjectFlags, Ram_0304, Ram_0340, Ram_034C, Ram_0343, Ram_0342, Ram_0348, Ram_0349.
+; Parameters: Ram_0308, Ram_0309, GameplayObjectAnimation, Flow_D003.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_CFCC:
+    lda #$08                        ; PRG $0FCC | CPU $CFCC | A9 08
+    sta GameplayObjectFlags                       ; PRG $0FCE | CPU $CFCE | 85 54
+    lda #$08                        ; PRG $0FD0 | CPU $CFD0 | A9 08
+    sta Ram_0304                    ; PRG $0FD2 | CPU $CFD2 | 8D 04 03
+    lda #$01                        ; PRG $0FD5 | CPU $CFD5 | A9 01
+    sta Ram_0340,x                  ; PRG $0FD7 | CPU $CFD7 | 9D 40 03
+    sta Ram_034C,x                  ; PRG $0FDA | CPU $CFDA | 9D 4C 03
+    sta Ram_0343,x                  ; PRG $0FDD | CPU $CFDD | 9D 43 03
+    sta Ram_0342,x                  ; PRG $0FE0 | CPU $CFE0 | 9D 42 03
+    lda Ram_0308                    ; PRG $0FE3 | CPU $CFE3 | AD 08 03
+    sec                             ; PRG $0FE6 | CPU $CFE6 | 38
+    sbc #$06                        ; PRG $0FE7 | CPU $CFE7 | E9 06
+    sta Ram_0348,x                  ; PRG $0FE9 | CPU $CFE9 | 9D 48 03
+    lda Ram_0309                    ; PRG $0FEC | CPU $CFEC | AD 09 03
+    sec                             ; PRG $0FEF | CPU $CFEF | 38
+    sbc #$02                        ; PRG $0FF0 | CPU $CFF0 | E9 02
+    sta Ram_0349,x                  ; PRG $0FF2 | CPU $CFF2 | 9D 49 03
+    ldy #$00                        ; PRG $0FF5 | CPU $CFF5 | A0 00
+    lda GameplayObjectAnimation                       ; PRG $0FF7 | CPU $CFF7 | A5 55
+    beq Flow_D003                ; PRG $0FF9 | CPU $CFF9 | F0 08
+    ldy #$03                        ; PRG $0FFB | CPU $CFFB | A0 03
+    cmp #$08                        ; PRG $0FFD | CPU $CFFD | C9 08
+    bcc Flow_D003                ; PRG $0FFF | CPU $CFFF | 90 02
+    ldy #$06                        ; PRG $1001 | CPU $D001 | A0 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D003.
+; Local behavior: Reads ObjectSpawnXTable, ObjectSpawnYTable, ObjectSpawnTypeTable; mutates Ram_034F, Ram_034B, Ram_0347, AudioPendingFlags.
+; Parameters: ObjectSpawnXTable, ObjectSpawnYTable, ObjectSpawnTypeTable.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D003:
+    lda ObjectSpawnXTable,y                 ; PRG $1003 | CPU $D003 | B9 1A D0
+    sta Ram_034F,x                  ; PRG $1006 | CPU $D006 | 9D 4F 03
+    lda ObjectSpawnYTable,y                 ; PRG $1009 | CPU $D009 | B9 1B D0
+    sta Ram_034B,x                  ; PRG $100C | CPU $D00C | 9D 4B 03
+    lda ObjectSpawnTypeTable,y                 ; PRG $100F | CPU $D00F | B9 1C D0
+    sta Ram_0347,x                  ; PRG $1012 | CPU $D012 | 9D 47 03
+    lda #$02                        ; PRG $1015 | CPU $D015 | A9 02
+    sta AudioPendingFlags                       ; PRG $1017 | CPU $D017 | 85 FD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D019.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D019:
+    rts                             ; PRG $1019 | CPU $D019 | 60
+
+ObjectSpawnXTable:
+    .byte $01 ; PRG $101A | CPU $D01A
+
+ObjectSpawnYTable:
+    .byte $00 ; PRG $101B | CPU $D01B
+
+ObjectSpawnTypeTable:
+    .byte $01,$02,$19,$01,$02,$32,$00 ; PRG $101C | CPU $D01C
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value D023.
+; Local behavior: Reads FrameCounter, Flow_D03B, AdvanceObjectRecordPointer; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride.
+; Parameters: FrameCounter, Flow_D03B, AdvanceObjectRecordPointer.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_D023:
+    lda #$40                        ; PRG $1023 | CPU $D023 | A9 40
+    sta ObjectRecordPointerLo                       ; PRG $1025 | CPU $D025 | 85 A8
+    lda #$03                        ; PRG $1027 | CPU $D027 | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $1029 | CPU $D029 | 85 A9
+    lda #$10                        ; PRG $102B | CPU $D02B | A9 10
+    sta ObjectRecordStride                       ; PRG $102D | CPU $D02D | 85 AA
+    ldx #$00                        ; PRG $102F | CPU $D02F | A2 00
+    lda FrameCounter                       ; PRG $1031 | CPU $D031 | A5 27
+    lsr a                           ; PRG $1033 | CPU $D033 | 4A
+    bcs Flow_D03B                ; PRG $1034 | CPU $D034 | B0 05
+    jsr AdvanceObjectRecordPointer                ; PRG $1036 | CPU $D036 | 20 0F C2
+    ldx #$10                        ; PRG $1039 | CPU $D039 | A2 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D03 B.
+; Local behavior: Reads Ram_0340, Flow_D04E, UpdateObjectScreenY_D108, UpdateRam_034E_D04F, ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState; mutates OamBufferWriteOffset.
+; Parameters: Ram_0340, Flow_D04E, UpdateObjectScreenY_D108, UpdateRam_034E_D04F, ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D03B:
+    stx OamBufferWriteOffset                       ; PRG $103B | CPU $D03B | 86 AB
+    lda Ram_0340,x                  ; PRG $103D | CPU $D03D | BD 40 03
+    beq Flow_D04E                ; PRG $1040 | CPU $D040 | F0 0C
+    jsr UpdateObjectScreenY_D108                ; PRG $1042 | CPU $D042 | 20 08 D1
+    jsr UpdateRam_034E_D04F                ; PRG $1045 | CPU $D045 | 20 4F D0
+    jsr ComputeOrDispatch_C2B4                ; PRG $1048 | CPU $D048 | 20 B4 C2
+    jsr LoadObjectSpriteRenderState                ; PRG $104B | CPU $D04B | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D04 E.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D04E:
+    rts                             ; PRG $104E | CPU $D04E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 034 E D04 F.
+; Local behavior: Reads OamBufferWriteOffset, Ram_034E, Flow_D06C, Ram_034F, Flow_D0A6, Flow_D071; mutates Ram_034E, Ram_034B.
+; Parameters: OamBufferWriteOffset, Ram_034E, Flow_D06C, Ram_034F, Flow_D0A6, Flow_D071.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_034E_D04F:
+    ldx OamBufferWriteOffset                       ; PRG $104F | CPU $D04F | A6 AB
+    ldy Ram_034E,x                  ; PRG $1051 | CPU $D051 | BC 4E 03
+    beq Flow_D06C                ; PRG $1054 | CPU $D054 | F0 16
+    lda #$00                        ; PRG $1056 | CPU $D056 | A9 00
+    sta Ram_034E,x                  ; PRG $1058 | CPU $D058 | 9D 4E 03
+    lda Ram_034F,x                  ; PRG $105B | CPU $D05B | BD 4F 03
+    cmp #$01                        ; PRG $105E | CPU $D05E | C9 01
+    beq Flow_D0A6                ; PRG $1060 | CPU $D060 | F0 44
+    dey                             ; PRG $1062 | CPU $D062 | 88
+    bne Flow_D0A6                ; PRG $1063 | CPU $D063 | D0 41
+    lda #$4B                        ; PRG $1065 | CPU $D065 | A9 4B
+    sta Ram_034B,x                  ; PRG $1067 | CPU $D067 | 9D 4B 03
+    bne Flow_D071                ; PRG $106A | CPU $D06A | D0 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D06 C.
+; Local behavior: Reads Ram_034C, Flow_D098; mutates Ram_034C.
+; Parameters: Ram_034C, Flow_D098.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D06C:
+    dec Ram_034C,x                  ; PRG $106C | CPU $D06C | DE 4C 03
+    bne Flow_D098                ; PRG $106F | CPU $D06F | D0 27
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D071.
+; Local behavior: Reads Ram_034B, CodeOrDataPointerTable_D0B4, Flow_D0A6; mutates Ram_034C, Ram_0344, Ram_0345, Ram_034D, Ram_034B.
+; Parameters: Ram_034B, CodeOrDataPointerTable_D0B4, Flow_D0A6.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D071:
+    ldy Ram_034B,x                  ; PRG $1071 | CPU $D071 | BC 4B 03
+    lda CodeOrDataPointerTable_D0B4,y                 ; PRG $1074 | CPU $D074 | B9 B4 D0
+    cmp #$AA                        ; PRG $1077 | CPU $D077 | C9 AA
+    beq Flow_D0A6                ; PRG $1079 | CPU $D079 | F0 2B
+    sta Ram_034C,x                  ; PRG $107B | CPU $D07B | 9D 4C 03
+    iny                             ; PRG $107E | CPU $D07E | C8
+    lda CodeOrDataPointerTable_D0B4,y                 ; PRG $107F | CPU $D07F | B9 B4 D0
+    sta Ram_0344,x                  ; PRG $1082 | CPU $D082 | 9D 44 03
+    iny                             ; PRG $1085 | CPU $D085 | C8
+    lda CodeOrDataPointerTable_D0B4,y                 ; PRG $1086 | CPU $D086 | B9 B4 D0
+    sta Ram_0345,x                  ; PRG $1089 | CPU $D089 | 9D 45 03
+    iny                             ; PRG $108C | CPU $D08C | C8
+    lda CodeOrDataPointerTable_D0B4,y                 ; PRG $108D | CPU $D08D | B9 B4 D0
+    sta Ram_034D,x                  ; PRG $1090 | CPU $D090 | 9D 4D 03
+    iny                             ; PRG $1093 | CPU $D093 | C8
+    tya                             ; PRG $1094 | CPU $D094 | 98
+    sta Ram_034B,x                  ; PRG $1095 | CPU $D095 | 9D 4B 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D098.
+; Local behavior: Reads Ram_0344, Ram_0348, Flow_D0B3; mutates Ram_0348.
+; Parameters: Ram_0344, Ram_0348, Flow_D0B3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D098:
+    lda Ram_0344,x                  ; PRG $1098 | CPU $D098 | BD 44 03
+    clc                             ; PRG $109B | CPU $D09B | 18
+    adc Ram_0348,x                  ; PRG $109C | CPU $D09C | 7D 48 03
+    sta Ram_0348,x                  ; PRG $109F | CPU $D09F | 9D 48 03
+    cmp #$24                        ; PRG $10A2 | CPU $D0A2 | C9 24
+    bcs Flow_D0B3                ; PRG $10A4 | CPU $D0A4 | B0 0D
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D0 A6.
+; Local behavior: Reads Ram_0343; mutates Ram_0340, Ram_0346, Ram_0343.
+; Parameters: Ram_0343.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D0A6:
+    lda #$00                        ; PRG $10A6 | CPU $D0A6 | A9 00
+    sta Ram_0340,x                  ; PRG $10A8 | CPU $D0A8 | 9D 40 03
+    lda #$47                        ; PRG $10AB | CPU $D0AB | A9 47
+    sta Ram_0346,x                  ; PRG $10AD | CPU $D0AD | 9D 46 03
+    inc Ram_0343,x                  ; PRG $10B0 | CPU $D0B0 | FE 43 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D0 B3.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D0B3:
+    rts                             ; PRG $10B3 | CPU $D0B3 | 60
+
+CodeOrDataPointerTable_D0B4:
+    .byte $03,$FB,$00,$02,$03,$FB,$05,$02,$04,$FC,$0A,$02,$04,$FC,$0F,$04 ; PRG $10B4 | CPU $D0B4
+    .byte $04,$FD,$14,$04,$02,$FE,$17,$04,$AA,$03,$FA,$00,$02,$04,$FA,$05 ; PRG $10C4 | CPU $D0C4
+    .byte $04,$05,$FB,$0A,$04,$05,$FB,$1A,$06,$06,$FC,$1F,$06,$03,$FD,$23 ; PRG $10D4 | CPU $D0D4
+    .byte $06,$AA,$03,$F9,$00,$02,$04,$FA,$05,$04,$05,$FA,$0A,$04,$06,$FB ; PRG $10E4 | CPU $D0E4
+    .byte $1A,$06,$06,$FC,$1F,$06,$04,$FC,$23,$06,$AA,$03,$FD,$1F,$06,$01 ; PRG $10F4 | CPU $D0F4
+    .byte $FE,$23,$06,$AA ; PRG $1104 | CPU $D104
+; -----------------------------------------------------------------------------
+; Global purpose: Update Object Screen Y D108.
+; Local behavior: Reads OamBufferWriteOffset, Ram_0348, Ram_0349, Ram_034D; mutates ObjectScreenY, ObjectScreenX, MovementStepIndex, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi, CurrentSpriteTileId.
+; Parameters: OamBufferWriteOffset, Ram_0348, Ram_0349, Ram_034D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateObjectScreenY_D108:
+    ldx OamBufferWriteOffset                       ; PRG $1108 | CPU $D108 | A6 AB
+    lda Ram_0348,x                  ; PRG $110A | CPU $D10A | BD 48 03
+    sta ObjectScreenY                       ; PRG $110D | CPU $D10D | 85 B8
+    lda Ram_0349,x                  ; PRG $110F | CPU $D10F | BD 49 03
+    sta ObjectScreenX                       ; PRG $1112 | CPU $D112 | 85 B9
+    lda Ram_034D,x                  ; PRG $1114 | CPU $D114 | BD 4D 03
+    sta MovementStepIndex                       ; PRG $1117 | CPU $D117 | 85 BD
+    lda #$00                        ; PRG $1119 | CPU $D119 | A9 00
+    sta MetaspriteLayoutPointerLo                       ; PRG $111B | CPU $D11B | 85 14
+    lda #$06                        ; PRG $111D | CPU $D11D | A9 06
+    sta MetaspriteLayoutPointerHi                       ; PRG $111F | CPU $D11F | 85 15
+    lda #$05                        ; PRG $1121 | CPU $D121 | A9 05
+    sta CurrentSpriteTileId                       ; PRG $1123 | CPU $D123 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D125.
+; Local behavior: Reads CalculateAndClampValue_D17F, Flow_D15E, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D125; mutates CurrentSpriteTileId, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Parameters: CalculateAndClampValue_D17F, Flow_D15E, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D125.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D125:
+    jsr CalculateAndClampValue_D17F                ; PRG $1125 | CPU $D125 | 20 7F D1
+    bcs Flow_D15E                ; PRG $1128 | CPU $D128 | B0 34
+    jsr ComputeOrDispatch_D171                ; PRG $112A | CPU $D12A | 20 71 D1
+    dec CurrentSpriteTileId                       ; PRG $112D | CPU $D12D | C6 11
+    bne Flow_D125                ; PRG $112F | CPU $D12F | D0 F4
+    lda #$00                        ; PRG $1131 | CPU $D131 | A9 00
+    sta MetaspriteLayoutPointerLo                       ; PRG $1133 | CPU $D133 | 85 14
+    lda #$04                        ; PRG $1135 | CPU $D135 | A9 04
+    sta MetaspriteLayoutPointerHi                       ; PRG $1137 | CPU $D137 | 85 15
+    lda #$05                        ; PRG $1139 | CPU $D139 | A9 05
+    sta CurrentSpriteTileId                       ; PRG $113B | CPU $D13B | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D13 D.
+; Local behavior: Reads CalculateAndClampValue_D17F, Flow_D15E, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D13D, Flow_D157; mutates CurrentSpriteTileId, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Parameters: CalculateAndClampValue_D17F, Flow_D15E, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D13D, Flow_D157.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr CalculateAndClampValue_D17F; bcs Flow_D157; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D13D:
+    jsr CalculateAndClampValue_D17F                ; PRG $113D | CPU $D13D | 20 7F D1
+    bcs Flow_D15E                ; PRG $1140 | CPU $D140 | B0 1C
+    jsr ComputeOrDispatch_D171                ; PRG $1142 | CPU $D142 | 20 71 D1
+    dec CurrentSpriteTileId                       ; PRG $1145 | CPU $D145 | C6 11
+    bne Flow_D13D                ; PRG $1147 | CPU $D147 | D0 F4
+    lda #$60                        ; PRG $1149 | CPU $D149 | A9 60
+    sta MetaspriteLayoutPointerLo                       ; PRG $114B | CPU $D14B | 85 14
+    lda #$03                        ; PRG $114D | CPU $D14D | A9 03
+    sta MetaspriteLayoutPointerHi                       ; PRG $114F | CPU $D14F | 85 15
+    jsr CalculateAndClampValue_D17F                ; PRG $1151 | CPU $D151 | 20 7F D1
+    bcs Flow_D157                ; PRG $1154 | CPU $D154 | B0 01
+    rts                             ; PRG $1156 | CPU $D156 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D157.
+; Local behavior: Reads ComputeOrDispatch_E9C6, Flow_D160; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_E9C6, Flow_D160.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D157:
+    jsr ComputeOrDispatch_E9C6                ; PRG $1157 | CPU $D157 | 20 C6 E9
+    lda #$02                        ; PRG $115A | CPU $D15A | A9 02
+    bne Flow_D160                ; PRG $115C | CPU $D15C | D0 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D15 E.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D15E:
+    lda #$01                        ; PRG $115E | CPU $D15E | A9 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D160.
+; Local behavior: Reads OamBufferWriteOffset, Ram_034F; mutates Ram_034E, MetaspriteLayoutPointerLo.
+; Parameters: OamBufferWriteOffset, Ram_034F.
+; Returns: returns to caller; flags/register result depends on final instructions: ldy #$0E; sta (MetaspriteLayoutPointerLo),y; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D160:
+    ldx OamBufferWriteOffset                       ; PRG $1160 | CPU $D160 | A6 AB
+    sta Ram_034E,x                  ; PRG $1162 | CPU $D162 | 9D 4E 03
+    lda Ram_034F,x                  ; PRG $1165 | CPU $D165 | BD 4F 03
+    ldy #$0E                        ; PRG $1168 | CPU $D168 | A0 0E
+    sta (MetaspriteLayoutPointerLo),y                   ; PRG $116A | CPU $D16A | 91 14
+    rts                             ; PRG $116C | CPU $D16C | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D16 D.
+; Local behavior: Reads Flow_D173; mutates no direct memory mutation observed.
+; Parameters: Flow_D173.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D16D:
+    lda #$10                        ; PRG $116D | CPU $D16D | A9 10
+    bne Flow_D173                ; PRG $116F | CPU $D16F | D0 02
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D171.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D171:
+    lda #$20                        ; PRG $1171 | CPU $D171 | A9 20
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D173.
+; Local behavior: Reads MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi; mutates MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Parameters: MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Returns: returns to caller; flags/register result depends on final instructions: adc #$00; sta MetaspriteLayoutPointerHi; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D173:
+    clc                             ; PRG $1173 | CPU $D173 | 18
+    adc MetaspriteLayoutPointerLo                       ; PRG $1174 | CPU $D174 | 65 14
+    sta MetaspriteLayoutPointerLo                       ; PRG $1176 | CPU $D176 | 85 14
+    lda MetaspriteLayoutPointerHi                       ; PRG $1178 | CPU $D178 | A5 15
+    adc #$00                        ; PRG $117A | CPU $D17A | 69 00
+    sta MetaspriteLayoutPointerHi                       ; PRG $117C | CPU $D17C | 85 15
+    rts                             ; PRG $117E | CPU $D17E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value D17 F.
+; Local behavior: Reads MetaspriteLayoutPointerLo, Flow_D1C5, MovementStepIndex, IndexedGameplayLookupTable_D1C7, IndexedGameplayLookupTable_D1C8, ObjectScreenY, Flow_D1AE; mutates CoordinateValue, CoordinateLimit.
+; Parameters: MetaspriteLayoutPointerLo, Flow_D1C5, MovementStepIndex, IndexedGameplayLookupTable_D1C7, IndexedGameplayLookupTable_D1C8, ObjectScreenY, Flow_D1AE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_D17F:
+    ldy #$00                        ; PRG $117F | CPU $D17F | A0 00
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $1181 | CPU $D181 | B1 14
+    cmp #$01                        ; PRG $1183 | CPU $D183 | C9 01
+    bne Flow_D1C5                ; PRG $1185 | CPU $D185 | D0 3E
+    ldy #$0D                        ; PRG $1187 | CPU $D187 | A0 0D
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $1189 | CPU $D189 | B1 14
+    tax                             ; PRG $118B | CPU $D18B | AA
+    ldy MovementStepIndex                       ; PRG $118C | CPU $D18C | A4 BD
+    lda IndexedGameplayLookupTable_D1C7,x                 ; PRG $118E | CPU $D18E | BD C7 D1
+    clc                             ; PRG $1191 | CPU $D191 | 18
+    adc IndexedGameplayLookupTable_D1C7,y                 ; PRG $1192 | CPU $D192 | 79 C7 D1
+    sta CoordinateValue                       ; PRG $1195 | CPU $D195 | 85 13
+    lda IndexedGameplayLookupTable_D1C8,x                 ; PRG $1197 | CPU $D197 | BD C8 D1
+    clc                             ; PRG $119A | CPU $D19A | 18
+    adc IndexedGameplayLookupTable_D1C8,y                 ; PRG $119B | CPU $D19B | 79 C8 D1
+    sta CoordinateLimit                       ; PRG $119E | CPU $D19E | 85 12
+    ldy #$08                        ; PRG $11A0 | CPU $D1A0 | A0 08
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $11A2 | CPU $D1A2 | B1 14
+    sec                             ; PRG $11A4 | CPU $D1A4 | 38
+    sbc ObjectScreenY                       ; PRG $11A5 | CPU $D1A5 | E5 B8
+    bpl Flow_D1AE                ; PRG $11A7 | CPU $D1A7 | 10 05
+    eor #$FF                        ; PRG $11A9 | CPU $D1A9 | 49 FF
+    clc                             ; PRG $11AB | CPU $D1AB | 18
+    adc #$01                        ; PRG $11AC | CPU $D1AC | 69 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D1 AE.
+; Local behavior: Reads CoordinateValue, Flow_D1C5, MetaspriteLayoutPointerLo, ObjectScreenX, Flow_D1BF; mutates no direct memory mutation observed.
+; Parameters: CoordinateValue, Flow_D1C5, MetaspriteLayoutPointerLo, ObjectScreenX, Flow_D1BF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D1AE:
+    cmp CoordinateValue                       ; PRG $11AE | CPU $D1AE | C5 13
+    bcs Flow_D1C5                ; PRG $11B0 | CPU $D1B0 | B0 13
+    iny                             ; PRG $11B2 | CPU $D1B2 | C8
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $11B3 | CPU $D1B3 | B1 14
+    sec                             ; PRG $11B5 | CPU $D1B5 | 38
+    sbc ObjectScreenX                       ; PRG $11B6 | CPU $D1B6 | E5 B9
+    bpl Flow_D1BF                ; PRG $11B8 | CPU $D1B8 | 10 05
+    eor #$FF                        ; PRG $11BA | CPU $D1BA | 49 FF
+    clc                             ; PRG $11BC | CPU $D1BC | 18
+    adc #$01                        ; PRG $11BD | CPU $D1BD | 69 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D1 BF.
+; Local behavior: Reads CoordinateLimit, Flow_D1C5; mutates no direct memory mutation observed.
+; Parameters: CoordinateLimit, Flow_D1C5.
+; Returns: returns to caller; flags/register result depends on final instructions: bcs Flow_D1C5; sec; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D1BF:
+    cmp CoordinateLimit                       ; PRG $11BF | CPU $D1BF | C5 12
+    bcs Flow_D1C5                ; PRG $11C1 | CPU $D1C1 | B0 02
+    sec                             ; PRG $11C3 | CPU $D1C3 | 38
+    rts                             ; PRG $11C4 | CPU $D1C4 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D1 C5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: clc; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D1C5:
+    clc                             ; PRG $11C5 | CPU $D1C5 | 18
+    rts                             ; PRG $11C6 | CPU $D1C6 | 60
+
+IndexedGameplayLookupTable_D1C7:
+    .byte $03 ; PRG $11C7 | CPU $D1C7
+
+IndexedGameplayLookupTable_D1C8:
+    .byte $03,$04,$04,$06,$06,$07,$08,$08,$0A,$04,$04,$03,$04,$02,$01 ; PRG $11C8 | CPU $D1C8
+; -----------------------------------------------------------------------------
+; Global purpose: Update Object Screen Y D1 D7.
+; Local behavior: Reads Ram_0308, Ram_0309, Ram_030D, CalculateAndClampValue_D17F, Flow_D1FB; mutates ObjectScreenY, ObjectScreenX, MovementStepIndex, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi, Ram_032E, Ram_0312.
+; Parameters: Ram_0308, Ram_0309, Ram_030D, CalculateAndClampValue_D17F, Flow_D1FB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateObjectScreenY_D1D7:
+    lda Ram_0308                    ; PRG $11D7 | CPU $D1D7 | AD 08 03
+    sta ObjectScreenY                       ; PRG $11DA | CPU $D1DA | 85 B8
+    lda Ram_0309                    ; PRG $11DC | CPU $D1DC | AD 09 03
+    sta ObjectScreenX                       ; PRG $11DF | CPU $D1DF | 85 B9
+    lda Ram_030D                    ; PRG $11E1 | CPU $D1E1 | AD 0D 03
+    sta MovementStepIndex                       ; PRG $11E4 | CPU $D1E4 | 85 BD
+    lda #$20                        ; PRG $11E6 | CPU $D1E6 | A9 20
+    sta MetaspriteLayoutPointerLo                       ; PRG $11E8 | CPU $D1E8 | 85 14
+    lda #$03                        ; PRG $11EA | CPU $D1EA | A9 03
+    sta MetaspriteLayoutPointerHi                       ; PRG $11EC | CPU $D1EC | 85 15
+    jsr CalculateAndClampValue_D17F                ; PRG $11EE | CPU $D1EE | 20 7F D1
+    bcc Flow_D1FB                ; PRG $11F1 | CPU $D1F1 | 90 08
+    lda #$01                        ; PRG $11F3 | CPU $D1F3 | A9 01
+    sta Ram_032E                    ; PRG $11F5 | CPU $D1F5 | 8D 2E 03
+    sta Ram_0312                    ; PRG $11F8 | CPU $D1F8 | 8D 12 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D1 FB.
+; Local behavior: Reads implicit CPU state or none observed; mutates MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi, CurrentSpriteTileId.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D1FB:
+    lda #$00                        ; PRG $11FB | CPU $D1FB | A9 00
+    sta MetaspriteLayoutPointerLo                       ; PRG $11FD | CPU $D1FD | 85 14
+    lda #$06                        ; PRG $11FF | CPU $D1FF | A9 06
+    sta MetaspriteLayoutPointerHi                       ; PRG $1201 | CPU $D201 | 85 15
+    lda #$05                        ; PRG $1203 | CPU $D203 | A9 05
+    sta CurrentSpriteTileId                       ; PRG $1205 | CPU $D205 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D207.
+; Local behavior: Reads MetaspriteLayoutPointerLo, Flow_D212, CalculateAndClampValue_D17F, Flow_D257; mutates no direct memory mutation observed.
+; Parameters: MetaspriteLayoutPointerLo, Flow_D212, CalculateAndClampValue_D17F, Flow_D257.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D207:
+    ldy #$11                        ; PRG $1207 | CPU $D207 | A0 11
+    lda (MetaspriteLayoutPointerLo),y                   ; PRG $1209 | CPU $D209 | B1 14
+    bne Flow_D212                ; PRG $120B | CPU $D20B | D0 05
+    jsr CalculateAndClampValue_D17F                ; PRG $120D | CPU $D20D | 20 7F D1
+    bcs Flow_D257                ; PRG $1210 | CPU $D210 | B0 45
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D212.
+; Local behavior: Reads ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D207; mutates CurrentSpriteTileId, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Parameters: ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D207.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D212:
+    jsr ComputeOrDispatch_D171                ; PRG $1212 | CPU $D212 | 20 71 D1
+    dec CurrentSpriteTileId                       ; PRG $1215 | CPU $D215 | C6 11
+    bne Flow_D207                ; PRG $1217 | CPU $D217 | D0 EE
+    lda #$C0                        ; PRG $1219 | CPU $D219 | A9 C0
+    sta MetaspriteLayoutPointerLo                       ; PRG $121B | CPU $D21B | 85 14
+    lda #$03                        ; PRG $121D | CPU $D21D | A9 03
+    sta MetaspriteLayoutPointerHi                       ; PRG $121F | CPU $D21F | 85 15
+    lda #$04                        ; PRG $1221 | CPU $D221 | A9 04
+    sta CurrentSpriteTileId                       ; PRG $1223 | CPU $D223 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D225.
+; Local behavior: Reads CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D16D, CurrentSpriteTileId, Flow_D225; mutates CurrentSpriteTileId.
+; Parameters: CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D16D, CurrentSpriteTileId, Flow_D225.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D225:
+    jsr CalculateAndClampValue_D17F                ; PRG $1225 | CPU $D225 | 20 7F D1
+    bcs Flow_D257                ; PRG $1228 | CPU $D228 | B0 2D
+    jsr ComputeOrDispatch_D16D                ; PRG $122A | CPU $D22A | 20 6D D1
+    dec CurrentSpriteTileId                       ; PRG $122D | CPU $D22D | C6 11
+    bne Flow_D225                ; PRG $122F | CPU $D22F | D0 F4
+    lda #$05                        ; PRG $1231 | CPU $D231 | A9 05
+    sta CurrentSpriteTileId                       ; PRG $1233 | CPU $D233 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D235.
+; Local behavior: Reads CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D235; mutates CurrentSpriteTileId.
+; Parameters: CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D171, CurrentSpriteTileId, Flow_D235.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D235:
+    jsr CalculateAndClampValue_D17F                ; PRG $1235 | CPU $D235 | 20 7F D1
+    bcs Flow_D257                ; PRG $1238 | CPU $D238 | B0 1D
+    jsr ComputeOrDispatch_D171                ; PRG $123A | CPU $D23A | 20 71 D1
+    dec CurrentSpriteTileId                       ; PRG $123D | CPU $D23D | C6 11
+    bne Flow_D235                ; PRG $123F | CPU $D23F | D0 F4
+    lda #$04                        ; PRG $1241 | CPU $D241 | A9 04
+    sta CurrentSpriteTileId                       ; PRG $1243 | CPU $D243 | 85 11
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D245.
+; Local behavior: Reads CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D16D, CurrentSpriteTileId, Flow_D245; mutates CurrentSpriteTileId.
+; Parameters: CalculateAndClampValue_D17F, Flow_D257, ComputeOrDispatch_D16D, CurrentSpriteTileId, Flow_D245.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr CalculateAndClampValue_D17F; bcs Flow_D257; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D245:
+    jsr CalculateAndClampValue_D17F                ; PRG $1245 | CPU $D245 | 20 7F D1
+    bcs Flow_D257                ; PRG $1248 | CPU $D248 | B0 0D
+    jsr ComputeOrDispatch_D16D                ; PRG $124A | CPU $D24A | 20 6D D1
+    dec CurrentSpriteTileId                       ; PRG $124D | CPU $D24D | C6 11
+    bne Flow_D245                ; PRG $124F | CPU $D24F | D0 F4
+    jsr CalculateAndClampValue_D17F                ; PRG $1251 | CPU $D251 | 20 7F D1
+    bcs Flow_D257                ; PRG $1254 | CPU $D254 | B0 01
+    rts                             ; PRG $1256 | CPU $D256 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D257.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_030E, MetaspriteLayoutPointerLo.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: ldy #$0E; sta (MetaspriteLayoutPointerLo),y; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D257:
+    lda #$01                        ; PRG $1257 | CPU $D257 | A9 01
+    sta Ram_030E                    ; PRG $1259 | CPU $D259 | 8D 0E 03
+    lda #$80                        ; PRG $125C | CPU $D25C | A9 80
+    ldy #$0E                        ; PRG $125E | CPU $D25E | A0 0E
+    sta (MetaspriteLayoutPointerLo),y                   ; PRG $1260 | CPU $D260 | 91 14
+    rts                             ; PRG $1262 | CPU $D262 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value D263.
+; Local behavior: Reads ScreenObjectTimer, ScreenObjectMode, PackedHudOrObjectValue; mutates CurrentSpriteTileId, PackedHudOrObjectValue.
+; Parameters: ScreenObjectTimer, ScreenObjectMode, PackedHudOrObjectValue.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_D263:
+    lda ScreenObjectTimer                       ; PRG $1263 | CPU $D263 | A5 63
+    sta CurrentSpriteTileId                       ; PRG $1265 | CPU $D265 | 85 11
+    lda ScreenObjectMode                       ; PRG $1267 | CPU $D267 | A5 62
+    asl a                           ; PRG $1269 | CPU $D269 | 0A
+    sta PackedHudOrObjectValue                       ; PRG $126A | CPU $D26A | 85 16
+    asl a                           ; PRG $126C | CPU $D26C | 0A
+    asl a                           ; PRG $126D | CPU $D26D | 0A
+    clc                             ; PRG $126E | CPU $D26E | 18
+    adc PackedHudOrObjectValue                       ; PRG $126F | CPU $D26F | 65 16
+    tay                             ; PRG $1271 | CPU $D271 | A8
+    ldx #$00                        ; PRG $1272 | CPU $D272 | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D274.
+; Local behavior: Reads PackedHudOrObjectValue, ScreenObjectMode, Flow_D292; mutates Ram_0600, Ram_0602, PackedHudOrObjectValue.
+; Parameters: PackedHudOrObjectValue, ScreenObjectMode, Flow_D292.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D274:
+    lda #$00                        ; PRG $1274 | CPU $D274 | A9 00
+    sta Ram_0600,x                  ; PRG $1276 | CPU $D276 | 9D 00 06
+    lda #$02                        ; PRG $1279 | CPU $D279 | A9 02
+    sta Ram_0602,x                  ; PRG $127B | CPU $D27B | 9D 02 06
+    txa                             ; PRG $127E | CPU $D27E | 8A
+    lsr a                           ; PRG $127F | CPU $D27F | 4A
+    lsr a                           ; PRG $1280 | CPU $D280 | 4A
+    sta PackedHudOrObjectValue                       ; PRG $1281 | CPU $D281 | 85 16
+    lda #$C8                        ; PRG $1283 | CPU $D283 | A9 C8
+    sec                             ; PRG $1285 | CPU $D285 | 38
+    sbc PackedHudOrObjectValue                       ; PRG $1286 | CPU $D286 | E5 16
+    pha                             ; PRG $1288 | CPU $D288 | 48
+    lda ScreenObjectMode                       ; PRG $1289 | CPU $D289 | A5 62
+    cmp #$02                        ; PRG $128B | CPU $D28B | C9 02
+    pla                             ; PRG $128D | CPU $D28D | 68
+    bcc Flow_D292                ; PRG $128E | CPU $D28E | 90 02
+    sbc #$10                        ; PRG $1290 | CPU $D290 | E9 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D292.
+; Local behavior: Reads ScreenObjectMode, Flow_D2A6, AdvancePseudoRandomState; mutates Ram_060A, PackedHudOrObjectValue.
+; Parameters: ScreenObjectMode, Flow_D2A6, AdvancePseudoRandomState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D292:
+    sta Ram_060A,x                  ; PRG $1292 | CPU $D292 | 9D 0A 06
+    lda #$00                        ; PRG $1295 | CPU $D295 | A9 00
+    sta PackedHudOrObjectValue                       ; PRG $1297 | CPU $D297 | 85 16
+    lda ScreenObjectMode                       ; PRG $1299 | CPU $D299 | A5 62
+    cmp #$02                        ; PRG $129B | CPU $D29B | C9 02
+    bne Flow_D2A6                ; PRG $129D | CPU $D29D | D0 07
+    jsr AdvancePseudoRandomState                ; PRG $129F | CPU $D29F | 20 2F C4
+    and #$80                        ; PRG $12A2 | CPU $D2A2 | 29 80
+    sta PackedHudOrObjectValue                       ; PRG $12A4 | CPU $D2A4 | 85 16
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D2 A6.
+; Local behavior: Reads IndexedGameplayLookupTable_D2D4, PackedHudOrObjectValue, CurrentSpriteTileId, Flow_D274; mutates Ram_060F, Ram_0618, CurrentSpriteTileId.
+; Parameters: IndexedGameplayLookupTable_D2D4, PackedHudOrObjectValue, CurrentSpriteTileId, Flow_D274.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D2A6:
+    lda IndexedGameplayLookupTable_D2D4,y                 ; PRG $12A6 | CPU $D2A6 | B9 D4 D2
+    eor PackedHudOrObjectValue                       ; PRG $12A9 | CPU $D2A9 | 45 16
+    iny                             ; PRG $12AB | CPU $D2AB | C8
+    sta Ram_060F,x                  ; PRG $12AC | CPU $D2AC | 9D 0F 06
+    lda IndexedGameplayLookupTable_D2D4,y                 ; PRG $12AF | CPU $D2AF | B9 D4 D2
+    iny                             ; PRG $12B2 | CPU $D2B2 | C8
+    sta Ram_0618,x                  ; PRG $12B3 | CPU $D2B3 | 9D 18 06
+    txa                             ; PRG $12B6 | CPU $D2B6 | 8A
+    clc                             ; PRG $12B7 | CPU $D2B7 | 18
+    adc #$20                        ; PRG $12B8 | CPU $D2B8 | 69 20
+    tax                             ; PRG $12BA | CPU $D2BA | AA
+    dec CurrentSpriteTileId                       ; PRG $12BB | CPU $D2BB | C6 11
+    bne Flow_D274                ; PRG $12BD | CPU $D2BD | D0 B5
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D2 BF.
+; Local behavior: Reads Flow_D2D3, Continuation_D2BF; mutates Ram_0600, Ram_0618.
+; Parameters: Flow_D2D3, Continuation_D2BF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D2BF:
+    cpx #$A0                        ; PRG $12BF | CPU $D2BF | E0 A0
+    beq Flow_D2D3                ; PRG $12C1 | CPU $D2C1 | F0 10
+    lda #$00                        ; PRG $12C3 | CPU $D2C3 | A9 00
+    sta Ram_0600,x                  ; PRG $12C5 | CPU $D2C5 | 9D 00 06
+    sta Ram_0618,x                  ; PRG $12C8 | CPU $D2C8 | 9D 18 06
+    txa                             ; PRG $12CB | CPU $D2CB | 8A
+    clc                             ; PRG $12CC | CPU $D2CC | 18
+    adc #$20                        ; PRG $12CD | CPU $D2CD | 69 20
+    tax                             ; PRG $12CF | CPU $D2CF | AA
+    jmp Continuation_D2BF                ; PRG $12D0 | CPU $D2D0 | 4C BF D2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D2 D3.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D2D3:
+    rts                             ; PRG $12D3 | CPU $D2D3 | 60
+
+IndexedGameplayLookupTable_D2D4:
+    .byte $00,$10,$81,$20,$02,$30,$83,$40,$FF,$FF,$00,$10,$81,$20,$01,$20 ; PRG $12D4 | CPU $D2D4
+    .byte $02,$30,$83,$40,$04,$05,$85,$06,$06,$07,$87,$08,$84,$05 ; PRG $12E4 | CPU $D2E4
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 D2 F2.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_D2F2:
+    lda #$00                        ; PRG $12F2 | CPU $D2F2 | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $12F4 | CPU $D2F4 | 85 A8
+    lda #$06                        ; PRG $12F6 | CPU $D2F6 | A9 06
+    sta ObjectRecordPointerHi                       ; PRG $12F8 | CPU $D2F8 | 85 A9
+    lda #$20                        ; PRG $12FA | CPU $D2FA | A9 20
+    sta ObjectRecordStride                       ; PRG $12FC | CPU $D2FC | 85 AA
+    lda #$00                        ; PRG $12FE | CPU $D2FE | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D300.
+; Local behavior: Reads TransformPackedValue_D32E, OamBufferWriteOffset, Ram_0600, Flow_D321, FrameCounter, EvaluateCollisionState_D3EC, ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState; mutates OamBufferWriteOffset.
+; Parameters: TransformPackedValue_D32E, OamBufferWriteOffset, Ram_0600, Flow_D321, FrameCounter, EvaluateCollisionState_D3EC, ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D300:
+    sta OamBufferWriteOffset                       ; PRG $1300 | CPU $D300 | 85 AB
+    jsr TransformPackedValue_D32E                ; PRG $1302 | CPU $D302 | 20 2E D3
+    ldx OamBufferWriteOffset                       ; PRG $1305 | CPU $D305 | A6 AB
+    lda Ram_0600,x                  ; PRG $1307 | CPU $D307 | BD 00 06
+    beq Flow_D321                ; PRG $130A | CPU $D30A | F0 15
+    txa                             ; PRG $130C | CPU $D30C | 8A
+    lsr a                           ; PRG $130D | CPU $D30D | 4A
+    lsr a                           ; PRG $130E | CPU $D30E | 4A
+    lsr a                           ; PRG $130F | CPU $D30F | 4A
+    lsr a                           ; PRG $1310 | CPU $D310 | 4A
+    lsr a                           ; PRG $1311 | CPU $D311 | 4A
+    eor FrameCounter                       ; PRG $1312 | CPU $D312 | 45 27
+    and #$03                        ; PRG $1314 | CPU $D314 | 29 03
+    bne Flow_D321                ; PRG $1316 | CPU $D316 | D0 09
+    jsr EvaluateCollisionState_D3EC                ; PRG $1318 | CPU $D318 | 20 EC D3
+    jsr ComputeOrDispatch_C2B4                ; PRG $131B | CPU $D31B | 20 B4 C2
+    jsr LoadObjectSpriteRenderState                ; PRG $131E | CPU $D31E | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D321.
+; Local behavior: Reads AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_D300; mutates no direct memory mutation observed.
+; Parameters: AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_D300.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D321:
+    jsr AdvanceObjectRecordPointer                ; PRG $1321 | CPU $D321 | 20 0F C2
+    lda OamBufferWriteOffset                       ; PRG $1324 | CPU $D324 | A5 AB
+    clc                             ; PRG $1326 | CPU $D326 | 18
+    adc #$20                        ; PRG $1327 | CPU $D327 | 69 20
+    cmp #$A0                        ; PRG $1329 | CPU $D329 | C9 A0
+    bne Flow_D300                ; PRG $132B | CPU $D32B | D0 D3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D32 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D32D:
+    rts                             ; PRG $132D | CPU $D32D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value D32 E.
+; Local behavior: Reads FrameCounter, Flow_D32D, OamBufferWriteOffset, Ram_0600, Flow_D3B4, Ram_0618, Ram_060F, IndexedGameplayLookupTable_D3B5; mutates Ram_0618, Ram_0600, Ram_0611, Ram_0612, Ram_060E, PackedHudOrObjectValue, Ram_0608.
+; Parameters: FrameCounter, Flow_D32D, OamBufferWriteOffset, Ram_0600, Flow_D3B4, Ram_0618, Ram_060F, IndexedGameplayLookupTable_D3B5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_D32E:
+    lda FrameCounter                       ; PRG $132E | CPU $D32E | A5 27
+    and #$1F                        ; PRG $1330 | CPU $D330 | 29 1F
+    bne Flow_D32D                ; PRG $1332 | CPU $D332 | D0 F9
+    ldx OamBufferWriteOffset                       ; PRG $1334 | CPU $D334 | A6 AB
+    lda Ram_0600,x                  ; PRG $1336 | CPU $D336 | BD 00 06
+    bne Flow_D3B4                ; PRG $1339 | CPU $D339 | D0 79
+    lda Ram_0618,x                  ; PRG $133B | CPU $D33B | BD 18 06
+    beq Flow_D3B4                ; PRG $133E | CPU $D33E | F0 74
+    dec Ram_0618,x                  ; PRG $1340 | CPU $D340 | DE 18 06
+    bne Flow_D3B4                ; PRG $1343 | CPU $D343 | D0 6F
+    lda #$01                        ; PRG $1345 | CPU $D345 | A9 01
+    sta Ram_0600,x                  ; PRG $1347 | CPU $D347 | 9D 00 06
+    lda #$00                        ; PRG $134A | CPU $D34A | A9 00
+    sta Ram_0611,x                  ; PRG $134C | CPU $D34C | 9D 11 06
+    sta Ram_0612,x                  ; PRG $134F | CPU $D34F | 9D 12 06
+    sta Ram_060E,x                  ; PRG $1352 | CPU $D352 | 9D 0E 06
+    lda Ram_060F,x                  ; PRG $1355 | CPU $D355 | BD 0F 06
+    sta PackedHudOrObjectValue                       ; PRG $1358 | CPU $D358 | 85 16
+    and #$07                        ; PRG $135A | CPU $D35A | 29 07
+    asl a                           ; PRG $135C | CPU $D35C | 0A
+    asl a                           ; PRG $135D | CPU $D35D | 0A
+    tay                             ; PRG $135E | CPU $D35E | A8
+    lda IndexedGameplayLookupTable_D3B5,y                 ; PRG $135F | CPU $D35F | B9 B5 D3
+    sta Ram_0608,x                  ; PRG $1362 | CPU $D362 | 9D 08 06
+    lda IndexedGameplayLookupTable_D3B6,y                 ; PRG $1365 | CPU $D365 | B9 B6 D3
+    bit PackedHudOrObjectValue                       ; PRG $1368 | CPU $D368 | 24 16
+    bpl Flow_D371                ; PRG $136A | CPU $D36A | 10 05
+    eor #$FF                        ; PRG $136C | CPU $D36C | 49 FF
+    clc                             ; PRG $136E | CPU $D36E | 18
+    adc #$01                        ; PRG $136F | CPU $D36F | 69 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D371.
+; Local behavior: Reads IndexedGameplayLookupTable_D3B7, IndexedGameplayLookupTable_D3B8, PackedHudOrObjectValue, Flow_D388; mutates Ram_0609, Ram_060B, Ram_0601.
+; Parameters: IndexedGameplayLookupTable_D3B7, IndexedGameplayLookupTable_D3B8, PackedHudOrObjectValue, Flow_D388.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D371:
+    sta Ram_0609,x                  ; PRG $1371 | CPU $D371 | 9D 09 06
+    lda IndexedGameplayLookupTable_D3B7,y                 ; PRG $1374 | CPU $D374 | B9 B7 D3
+    sta Ram_060B,x                  ; PRG $1377 | CPU $D377 | 9D 0B 06
+    lda IndexedGameplayLookupTable_D3B8,y                 ; PRG $137A | CPU $D37A | B9 B8 D3
+    sta Ram_0601,x                  ; PRG $137D | CPU $D37D | 9D 01 06
+    lda #$01                        ; PRG $1380 | CPU $D380 | A9 01
+    bit PackedHudOrObjectValue                       ; PRG $1382 | CPU $D382 | 24 16
+    bmi Flow_D388                ; PRG $1384 | CPU $D384 | 30 02
+    lda #$FF                        ; PRG $1386 | CPU $D386 | A9 FF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D388.
+; Local behavior: Reads PackedHudOrObjectValue, Flow_D393; mutates Ram_060C.
+; Parameters: PackedHudOrObjectValue, Flow_D393.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D388:
+    sta Ram_060C,x                  ; PRG $1388 | CPU $D388 | 9D 0C 06
+    lda #$00                        ; PRG $138B | CPU $D38B | A9 00
+    bit PackedHudOrObjectValue                       ; PRG $138D | CPU $D38D | 24 16
+    bpl Flow_D393                ; PRG $138F | CPU $D38F | 10 02
+    lda #$06                        ; PRG $1391 | CPU $D391 | A9 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D393.
+; Local behavior: Reads Ram_060F, Flow_D3B0; mutates Ram_0605, Ram_0603, Ram_0607, Ram_060D.
+; Parameters: Ram_060F, Flow_D3B0.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D393:
+    sta Ram_0605,x                  ; PRG $1393 | CPU $D393 | 9D 05 06
+    lda #$01                        ; PRG $1396 | CPU $D396 | A9 01
+    sta Ram_0603,x                  ; PRG $1398 | CPU $D398 | 9D 03 06
+    sta Ram_0607,x                  ; PRG $139B | CPU $D39B | 9D 07 06
+    lda #$0C                        ; PRG $139E | CPU $D39E | A9 0C
+    sta Ram_060D,x                  ; PRG $13A0 | CPU $D3A0 | 9D 0D 06
+    ldy #$30                        ; PRG $13A3 | CPU $D3A3 | A0 30
+    lda Ram_060F,x                  ; PRG $13A5 | CPU $D3A5 | BD 0F 06
+    and #$0F                        ; PRG $13A8 | CPU $D3A8 | 29 0F
+    cmp #$02                        ; PRG $13AA | CPU $D3AA | C9 02
+    bcs Flow_D3B0                ; PRG $13AC | CPU $D3AC | B0 02
+    ldy #$38                        ; PRG $13AE | CPU $D3AE | A0 38
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D3 B0.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0615.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D3B0:
+    tya                             ; PRG $13B0 | CPU $D3B0 | 98
+    sta Ram_0615,x                  ; PRG $13B1 | CPU $D3B1 | 9D 15 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D3 B4.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D3B4:
+    rts                             ; PRG $13B4 | CPU $D3B4 | 60
+
+IndexedGameplayLookupTable_D3B5:
+    .byte $3C ; PRG $13B5 | CPU $D3B5
+
+IndexedGameplayLookupTable_D3B6:
+    .byte $F8 ; PRG $13B6 | CPU $D3B6
+
+IndexedGameplayLookupTable_D3B7:
+    .byte $00 ; PRG $13B7 | CPU $D3B7
+
+IndexedGameplayLookupTable_D3B8:
+    .byte $00,$3C,$F8,$00,$00,$5C,$F8,$5F,$00,$5C,$F8,$5F,$00,$6C,$D8,$00 ; PRG $13B8 | CPU $D3B8
+    .byte $04,$74,$D8,$00,$04,$7C,$D8,$00,$04,$84,$D8,$00,$04 ; PRG $13C8 | CPU $D3C8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D3 D5.
+; Local behavior: Reads GameplayStateFlags, Flow_D3E8, OamBufferWriteOffset; mutates Ram_0606, Ram_0600, Ram_0618.
+; Parameters: GameplayStateFlags, Flow_D3E8, OamBufferWriteOffset.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D3D5:
+    lda GameplayStateFlags                       ; PRG $13D5 | CPU $D3D5 | A5 23
+    bne Flow_D3E8                ; PRG $13D7 | CPU $D3D7 | D0 0F
+    ldx OamBufferWriteOffset                       ; PRG $13D9 | CPU $D3D9 | A6 AB
+    lda #$48                        ; PRG $13DB | CPU $D3DB | A9 48
+    sta Ram_0606,x                  ; PRG $13DD | CPU $D3DD | 9D 06 06
+    lda #$00                        ; PRG $13E0 | CPU $D3E0 | A9 00
+    sta Ram_0600,x                  ; PRG $13E2 | CPU $D3E2 | 9D 00 06
+    sta Ram_0618,x                  ; PRG $13E5 | CPU $D3E5 | 9D 18 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D3 E8.
+; Local behavior: Reads Ram_0603; mutates Ram_0603.
+; Parameters: Ram_0603.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D3E8:
+    inc Ram_0603,x                  ; PRG $13E8 | CPU $D3E8 | FE 03 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D3 EB.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D3EB:
+    rts                             ; PRG $13EB | CPU $D3EB | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State D3 EC.
+; Local behavior: Reads ScreenCollisionState, Flow_D3D5, OamBufferWriteOffset, Ram_060F, Ram_060E, Flow_D440, Flow_D40A, Flow_D47A; mutates CollisionMask, Ram_060E.
+; Parameters: ScreenCollisionState, Flow_D3D5, OamBufferWriteOffset, Ram_060F, Ram_060E, Flow_D440, Flow_D40A, Flow_D47A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_D3EC:
+    lda ScreenCollisionState                       ; PRG $13EC | CPU $D3EC | A5 44
+    cmp #$02                        ; PRG $13EE | CPU $D3EE | C9 02
+    bcs Flow_D3D5                ; PRG $13F0 | CPU $D3F0 | B0 E3
+    ldx OamBufferWriteOffset                       ; PRG $13F2 | CPU $D3F2 | A6 AB
+    lda Ram_060F,x                  ; PRG $13F4 | CPU $D3F4 | BD 0F 06
+    sta CollisionMask                       ; PRG $13F7 | CPU $D3F7 | 85 BF
+    ldy Ram_060E,x                  ; PRG $13F9 | CPU $D3F9 | BC 0E 06
+    beq Flow_D440                ; PRG $13FC | CPU $D3FC | F0 42
+    dec Ram_060E,x                  ; PRG $13FE | CPU $D3FE | DE 0E 06
+    beq Flow_D40A                ; PRG $1401 | CPU $D401 | F0 07
+    dec Ram_060E,x                  ; PRG $1403 | CPU $D403 | DE 0E 06
+    beq Flow_D47A                ; PRG $1406 | CPU $D406 | F0 72
+    bne Flow_D3EB                ; PRG $1408 | CPU $D408 | D0 E1
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D40 A.
+; Local behavior: Reads ComputeOrDispatch_E9C6, OamBufferWriteOffset, Ram_0611, Flow_D41F; mutates AudioEffectRequest.
+; Parameters: ComputeOrDispatch_E9C6, OamBufferWriteOffset, Ram_0611, Flow_D41F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D40A:
+    lda #$02                        ; PRG $140A | CPU $D40A | A9 02
+    sta AudioEffectRequest                       ; PRG $140C | CPU $D40C | 85 FE
+    jsr ComputeOrDispatch_E9C6                ; PRG $140E | CPU $D40E | 20 C6 E9
+    ldx OamBufferWriteOffset                       ; PRG $1411 | CPU $D411 | A6 AB
+    lda Ram_0611,x                  ; PRG $1413 | CPU $D413 | BD 11 06
+    clc                             ; PRG $1416 | CPU $D416 | 18
+    adc #$20                        ; PRG $1417 | CPU $D417 | 69 20
+    cmp #$D8                        ; PRG $1419 | CPU $D419 | C9 D8
+    bcc Flow_D41F                ; PRG $141B | CPU $D41B | 90 02
+    lda #$D8                        ; PRG $141D | CPU $D41D | A9 D8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D41 F.
+; Local behavior: Reads Ram_0601, Flow_D433, Flow_D438, Flow_D43D, UpdateZp_BC_D5EA, Flow_D440; mutates Ram_0611.
+; Parameters: Ram_0601, Flow_D433, Flow_D438, Flow_D43D, UpdateZp_BC_D5EA, Flow_D440.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D41F:
+    sta Ram_0611,x                  ; PRG $141F | CPU $D41F | 9D 11 06
+    ldy Ram_0601,x                  ; PRG $1422 | CPU $D422 | BC 01 06
+    dey                             ; PRG $1425 | CPU $D425 | 88
+    beq Flow_D433                ; PRG $1426 | CPU $D426 | F0 0B
+    dey                             ; PRG $1428 | CPU $D428 | 88
+    beq Flow_D438                ; PRG $1429 | CPU $D429 | F0 0D
+    dey                             ; PRG $142B | CPU $D42B | 88
+    beq Flow_D43D                ; PRG $142C | CPU $D42C | F0 0F
+    jsr UpdateZp_BC_D5EA                ; PRG $142E | CPU $D42E | 20 EA D5
+    bne Flow_D440                ; PRG $1431 | CPU $D431 | D0 0D
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D433.
+; Local behavior: Reads ComputeOrDispatch_D5D1, Flow_D440; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_D5D1, Flow_D440.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D433:
+    jsr ComputeOrDispatch_D5D1                ; PRG $1433 | CPU $D433 | 20 D1 D5
+    bne Flow_D440                ; PRG $1436 | CPU $D436 | D0 08
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D438.
+; Local behavior: Reads ComputeOrDispatch_D603, Flow_D440; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_D603, Flow_D440.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D438:
+    jsr ComputeOrDispatch_D603                ; PRG $1438 | CPU $D438 | 20 03 D6
+    bne Flow_D440                ; PRG $143B | CPU $D43B | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D43 D.
+; Local behavior: Reads UpdateZp_0F_D60D; mutates no direct memory mutation observed.
+; Parameters: UpdateZp_0F_D60D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D43D:
+    jsr UpdateZp_0F_D60D                ; PRG $143D | CPU $D43D | 20 0D D6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D440.
+; Local behavior: Reads Ram_0611, Flow_D498, Flow_D464, Flow_D461, Ram_0601, Flow_D45E, UpdateZp_BC_D5DB; mutates Ram_0611.
+; Parameters: Ram_0611, Flow_D498, Flow_D464, Flow_D461, Ram_0601, Flow_D45E, UpdateZp_BC_D5DB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D440:
+    lda Ram_0611,x                  ; PRG $1440 | CPU $D440 | BD 11 06
+    beq Flow_D498                ; PRG $1443 | CPU $D443 | F0 53
+    dec Ram_0611,x                  ; PRG $1445 | CPU $D445 | DE 11 06
+    beq Flow_D464                ; PRG $1448 | CPU $D448 | F0 1A
+    cmp #$10                        ; PRG $144A | CPU $D44A | C9 10
+    bne Flow_D461                ; PRG $144C | CPU $D44C | D0 13
+    lda Ram_0601,x                  ; PRG $144E | CPU $D44E | BD 01 06
+    cmp #$03                        ; PRG $1451 | CPU $D451 | C9 03
+    beq Flow_D45E                ; PRG $1453 | CPU $D453 | F0 09
+    cmp #$04                        ; PRG $1455 | CPU $D455 | C9 04
+    bne Flow_D461                ; PRG $1457 | CPU $D457 | D0 08
+    jsr UpdateZp_BC_D5DB                ; PRG $1459 | CPU $D459 | 20 DB D5
+    bne Flow_D461                ; PRG $145C | CPU $D45C | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D45 E.
+; Local behavior: Reads ComputeOrDispatch_D5D1; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_D5D1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D45E:
+    jsr ComputeOrDispatch_D5D1                ; PRG $145E | CPU $D45E | 20 D1 D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D461.
+; Local behavior: Reads Continuation_D500; mutates no direct memory mutation observed.
+; Parameters: Continuation_D500.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D461:
+    jmp Continuation_D500                ; PRG $1461 | CPU $D461 | 4C 00 D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D464.
+; Local behavior: Reads Ram_0601, Flow_D477, Flow_D474, ComputeOrDispatch_D5C0; mutates no direct memory mutation observed.
+; Parameters: Ram_0601, Flow_D477, Flow_D474, ComputeOrDispatch_D5C0.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D464:
+    lda Ram_0601,x                  ; PRG $1464 | CPU $D464 | BD 01 06
+    cmp #$03                        ; PRG $1467 | CPU $D467 | C9 03
+    bcs Flow_D477                ; PRG $1469 | CPU $D469 | B0 0C
+    cmp #$02                        ; PRG $146B | CPU $D46B | C9 02
+    beq Flow_D474                ; PRG $146D | CPU $D46D | F0 05
+    jsr ComputeOrDispatch_D5C0                ; PRG $146F | CPU $D46F | 20 C0 D5
+    bne Flow_D477                ; PRG $1472 | CPU $D472 | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D474.
+; Local behavior: Reads ComputeOrDispatch_D5F9; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_D5F9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D474:
+    jsr ComputeOrDispatch_D5F9                ; PRG $1474 | CPU $D474 | 20 F9 D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D477.
+; Local behavior: Reads Flow_D498; mutates no direct memory mutation observed.
+; Parameters: Flow_D498.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D477:
+    jmp Flow_D498                ; PRG $1477 | CPU $D477 | 4C 98 D4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D47 A.
+; Local behavior: Reads ComputeOrDispatch_E9C6, OamBufferWriteOffset; mutates Ram_0618, AudioEffectRequest.
+; Parameters: ComputeOrDispatch_E9C6, OamBufferWriteOffset.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D47A:
+    lda #$04                        ; PRG $147A | CPU $D47A | A9 04
+    sta Ram_0618,x                  ; PRG $147C | CPU $D47C | 9D 18 06
+    lda #$02                        ; PRG $147F | CPU $D47F | A9 02
+    sta AudioEffectRequest                       ; PRG $1481 | CPU $D481 | 85 FE
+    jsr ComputeOrDispatch_E9C6                ; PRG $1483 | CPU $D483 | 20 C6 E9
+    ldx OamBufferWriteOffset                       ; PRG $1486 | CPU $D486 | A6 AB
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D488.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0600, Ram_0606, Ram_0603.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$02; sta Ram_0603,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D488:
+    lda #$00                        ; PRG $1488 | CPU $D488 | A9 00
+    sta Ram_0600,x                  ; PRG $148A | CPU $D48A | 9D 00 06
+    lda #$48                        ; PRG $148D | CPU $D48D | A9 48
+    sta Ram_0606,x                  ; PRG $148F | CPU $D48F | 9D 06 06
+    lda #$02                        ; PRG $1492 | CPU $D492 | A9 02
+    sta Ram_0603,x                  ; PRG $1494 | CPU $D494 | 9D 03 06
+    rts                             ; PRG $1497 | CPU $D497 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D498.
+; Local behavior: Reads Ram_0601, Flow_D4CA, Flow_D4A6, Continuation_D59E; mutates no direct memory mutation observed.
+; Parameters: Ram_0601, Flow_D4CA, Flow_D4A6, Continuation_D59E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D498:
+    lda Ram_0601,x                  ; PRG $1498 | CPU $D498 | BD 01 06
+    cmp #$02                        ; PRG $149B | CPU $D49B | C9 02
+    beq Flow_D4CA                ; PRG $149D | CPU $D49D | F0 2B
+    cmp #$04                        ; PRG $149F | CPU $D49F | C9 04
+    bne Flow_D4A6                ; PRG $14A1 | CPU $D4A1 | D0 03
+    jmp Continuation_D59E                ; PRG $14A3 | CPU $D4A3 | 4C 9E D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D4 A6.
+; Local behavior: Reads Ram_060B, Flow_D4B4, Flow_D559; mutates Ram_060B.
+; Parameters: Ram_060B, Flow_D4B4, Flow_D559.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D4A6:
+    ldy Ram_060B,x                  ; PRG $14A6 | CPU $D4A6 | BC 0B 06
+    inc Ram_060B,x                  ; PRG $14A9 | CPU $D4A9 | FE 0B 06
+    lda $D617,y                     ; PRG $14AC | CPU $D4AC | B9 17 D6
+    bmi Flow_D4B4                ; PRG $14AF | CPU $D4AF | 30 03
+    jmp Flow_D559                ; PRG $14B1 | CPU $D4B1 | 4C 59 D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D4 B4.
+; Local behavior: Reads Flow_D4C2, ComputeOrDispatch_D5C0, Flow_D498; mutates Ram_0601.
+; Parameters: Flow_D4C2, ComputeOrDispatch_D5C0, Flow_D498.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D4B4:
+    and #$07                        ; PRG $14B4 | CPU $D4B4 | 29 07
+    sta Ram_0601,x                  ; PRG $14B6 | CPU $D4B6 | 9D 01 06
+    cmp #$02                        ; PRG $14B9 | CPU $D4B9 | C9 02
+    beq Flow_D4C2                ; PRG $14BB | CPU $D4BB | F0 05
+    jsr ComputeOrDispatch_D5C0                ; PRG $14BD | CPU $D4BD | 20 C0 D5
+    bne Flow_D498                ; PRG $14C0 | CPU $D4C0 | D0 D6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D4 C2.
+; Local behavior: Reads ComputeOrDispatch_D5F9; mutates Ram_0614.
+; Parameters: ComputeOrDispatch_D5F9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D4C2:
+    lda #$00                        ; PRG $14C2 | CPU $D4C2 | A9 00
+    sta Ram_0614,x                  ; PRG $14C4 | CPU $D4C4 | 9D 14 06
+    jsr ComputeOrDispatch_D5F9                ; PRG $14C7 | CPU $D4C7 | 20 F9 D5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D4 CA.
+; Local behavior: Reads Ram_060B, Ram_0614, Ram_0615, Flow_D4E6; mutates Ram_060B, Ram_0614.
+; Parameters: Ram_060B, Ram_0614, Ram_0615, Flow_D4E6.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D4CA:
+    ldy Ram_060B,x                  ; PRG $14CA | CPU $D4CA | BC 0B 06
+    inc Ram_060B,x                  ; PRG $14CD | CPU $D4CD | FE 0B 06
+    inc Ram_0614,x                  ; PRG $14D0 | CPU $D4D0 | FE 14 06
+    lda Ram_0614,x                  ; PRG $14D3 | CPU $D4D3 | BD 14 06
+    cmp Ram_0615,x                  ; PRG $14D6 | CPU $D4D6 | DD 15 06
+    beq Flow_D4E6                ; PRG $14D9 | CPU $D4D9 | F0 0B
+    and #$07                        ; PRG $14DB | CPU $D4DB | 29 07
+    bne Flow_D4E6                ; PRG $14DD | CPU $D4DD | D0 07
+    tya                             ; PRG $14DF | CPU $D4DF | 98
+    sec                             ; PRG $14E0 | CPU $D4E0 | 38
+    sbc #$07                        ; PRG $14E1 | CPU $D4E1 | E9 07
+    sta Ram_060B,x                  ; PRG $14E3 | CPU $D4E3 | 9D 0B 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D4 E6.
+; Local behavior: Reads Flow_D559, CollisionMask, CodeOrDataPointerTable_D6EF, ComputeOrDispatch_D5D1, Flow_D4A6; mutates Ram_0601, Ram_060B.
+; Parameters: Flow_D559, CollisionMask, CodeOrDataPointerTable_D6EF, ComputeOrDispatch_D5D1, Flow_D4A6.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D4E6:
+    lda $D617,y                     ; PRG $14E6 | CPU $D4E6 | B9 17 D6
+    bpl Flow_D559                ; PRG $14E9 | CPU $D4E9 | 10 6E
+    lda #$03                        ; PRG $14EB | CPU $D4EB | A9 03
+    sta Ram_0601,x                  ; PRG $14ED | CPU $D4ED | 9D 01 06
+    lda CollisionMask                       ; PRG $14F0 | CPU $D4F0 | A5 BF
+    and #$7F                        ; PRG $14F2 | CPU $D4F2 | 29 7F
+    tay                             ; PRG $14F4 | CPU $D4F4 | A8
+    lda CodeOrDataPointerTable_D6EF,y                 ; PRG $14F5 | CPU $D4F5 | B9 EF D6
+    sta Ram_060B,x                  ; PRG $14F8 | CPU $D4F8 | 9D 0B 06
+    jsr ComputeOrDispatch_D5D1                ; PRG $14FB | CPU $D4FB | 20 D1 D5
+    bne Flow_D4A6                ; PRG $14FE | CPU $D4FE | D0 A6
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D500.
+; Local behavior: Reads Ram_0601, Flow_D50C, Flow_D52A; mutates no direct memory mutation observed.
+; Parameters: Ram_0601, Flow_D50C, Flow_D52A.
+; Returns: returns to caller; flags/register result depends on final instructions: cmp #$02; beq Flow_D52A; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D500:
+    lda Ram_0601,x                  ; PRG $1500 | CPU $D500 | BD 01 06
+    cmp #$01                        ; PRG $1503 | CPU $D503 | C9 01
+    beq Flow_D50C                ; PRG $1505 | CPU $D505 | F0 05
+    cmp #$02                        ; PRG $1507 | CPU $D507 | C9 02
+    beq Flow_D52A                ; PRG $1509 | CPU $D509 | F0 1F
+    rts                             ; PRG $150B | CPU $D50B | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D50 C.
+; Local behavior: Reads Ram_060B, Flow_D55D, Ram_0611, Continuation_D488; mutates Ram_060B, Ram_0618, Ram_0601.
+; Parameters: Ram_060B, Flow_D55D, Ram_0611, Continuation_D488.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D50C:
+    dec Ram_060B,x                  ; PRG $150C | CPU $D50C | DE 0B 06
+    ldy Ram_060B,x                  ; PRG $150F | CPU $D50F | BC 0B 06
+    lda $D617,y                     ; PRG $1512 | CPU $D512 | B9 17 D6
+    bpl Flow_D55D                ; PRG $1515 | CPU $D515 | 10 46
+    lda Ram_0611,x                  ; PRG $1517 | CPU $D517 | BD 11 06
+    lsr a                           ; PRG $151A | CPU $D51A | 4A
+    lsr a                           ; PRG $151B | CPU $D51B | 4A
+    lsr a                           ; PRG $151C | CPU $D51C | 4A
+    adc #$01                        ; PRG $151D | CPU $D51D | 69 01
+    sta Ram_0618,x                  ; PRG $151F | CPU $D51F | 9D 18 06
+    lda #$00                        ; PRG $1522 | CPU $D522 | A9 00
+    sta Ram_0601,x                  ; PRG $1524 | CPU $D524 | 9D 01 06
+    jmp Continuation_D488                ; PRG $1527 | CPU $D527 | 4C 88 D4
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D52 A.
+; Local behavior: Reads Ram_0614, Flow_D544, Ram_0615, Ram_060B; mutates Ram_0614, Ram_060B.
+; Parameters: Ram_0614, Flow_D544, Ram_0615, Ram_060B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D52A:
+    lda Ram_0614,x                  ; PRG $152A | CPU $D52A | BD 14 06
+    beq Flow_D544                ; PRG $152D | CPU $D52D | F0 15
+    dec Ram_0614,x                  ; PRG $152F | CPU $D52F | DE 14 06
+    cmp Ram_0615,x                  ; PRG $1532 | CPU $D532 | DD 15 06
+    beq Flow_D544                ; PRG $1535 | CPU $D535 | F0 0D
+    and #$07                        ; PRG $1537 | CPU $D537 | 29 07
+    bne Flow_D544                ; PRG $1539 | CPU $D539 | D0 09
+    lda Ram_060B,x                  ; PRG $153B | CPU $D53B | BD 0B 06
+    clc                             ; PRG $153E | CPU $D53E | 18
+    adc #$08                        ; PRG $153F | CPU $D53F | 69 08
+    sta Ram_060B,x                  ; PRG $1541 | CPU $D541 | 9D 0B 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D544.
+; Local behavior: Reads Ram_060B, Flow_D55D, ComputeOrDispatch_D5D1, Flow_D50C; mutates Ram_060B, Ram_0601.
+; Parameters: Ram_060B, Flow_D55D, ComputeOrDispatch_D5D1, Flow_D50C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D544:
+    dec Ram_060B,x                  ; PRG $1544 | CPU $D544 | DE 0B 06
+    ldy Ram_060B,x                  ; PRG $1547 | CPU $D547 | BC 0B 06
+    lda $D617,y                     ; PRG $154A | CPU $D54A | B9 17 D6
+    bpl Flow_D55D                ; PRG $154D | CPU $D54D | 10 0E
+    lda #$01                        ; PRG $154F | CPU $D54F | A9 01
+    sta Ram_0601,x                  ; PRG $1551 | CPU $D551 | 9D 01 06
+    jsr ComputeOrDispatch_D5D1                ; PRG $1554 | CPU $D554 | 20 D1 D5
+    bne Flow_D50C                ; PRG $1557 | CPU $D557 | D0 B3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D559.
+; Local behavior: Reads Flow_D55F; mutates no direct memory mutation observed.
+; Parameters: Flow_D55F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D559:
+    ldy #$00                        ; PRG $1559 | CPU $D559 | A0 00
+    beq Flow_D55F                ; PRG $155B | CPU $D55B | F0 02
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D55 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D55D:
+    ldy #$80                        ; PRG $155D | CPU $D55D | A0 80
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D55 F.
+; Local behavior: Reads CurrentSpriteTileId, Flow_D570; mutates CurrentSpriteTileId, CoordinateLimit.
+; Parameters: CurrentSpriteTileId, Flow_D570.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D55F:
+    sty CurrentSpriteTileId                       ; PRG $155F | CPU $D55F | 84 11
+    sta CoordinateLimit                       ; PRG $1561 | CPU $D561 | 85 12
+    and #$70                        ; PRG $1563 | CPU $D563 | 29 70
+    lsr a                           ; PRG $1565 | CPU $D565 | 4A
+    lsr a                           ; PRG $1566 | CPU $D566 | 4A
+    lsr a                           ; PRG $1567 | CPU $D567 | 4A
+    lsr a                           ; PRG $1568 | CPU $D568 | 4A
+    ldy CurrentSpriteTileId                       ; PRG $1569 | CPU $D569 | A4 11
+    beq Flow_D570                ; PRG $156B | CPU $D56B | F0 03
+    eor #$FF                        ; PRG $156D | CPU $D56D | 49 FF
+    sec                             ; PRG $156F | CPU $D56F | 38
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D570.
+; Local behavior: Reads Ram_0608, CoordinateLimit, Flow_D584; mutates Ram_0608, CoordinateLimit.
+; Parameters: Ram_0608, CoordinateLimit, Flow_D584.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D570:
+    adc Ram_0608,x                  ; PRG $1570 | CPU $D570 | 7D 08 06
+    sta Ram_0608,x                  ; PRG $1573 | CPU $D573 | 9D 08 06
+    ldy #$00                        ; PRG $1576 | CPU $D576 | A0 00
+    lda CoordinateLimit                       ; PRG $1578 | CPU $D578 | A5 12
+    and #$0F                        ; PRG $157A | CPU $D57A | 29 0F
+    sta CoordinateLimit                       ; PRG $157C | CPU $D57C | 85 12
+    and #$08                        ; PRG $157E | CPU $D57E | 29 08
+    beq Flow_D584                ; PRG $1580 | CPU $D580 | F0 02
+    ldy #$F0                        ; PRG $1582 | CPU $D582 | A0 F0
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D584.
+; Local behavior: Reads CoordinateLimit, CollisionMask, CurrentSpriteTileId, Flow_D596; mutates no direct memory mutation observed.
+; Parameters: CoordinateLimit, CollisionMask, CurrentSpriteTileId, Flow_D596.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D584:
+    tya                             ; PRG $1584 | CPU $D584 | 98
+    ora CoordinateLimit                       ; PRG $1585 | CPU $D585 | 05 12
+    tay                             ; PRG $1587 | CPU $D587 | A8
+    clc                             ; PRG $1588 | CPU $D588 | 18
+    lda CollisionMask                       ; PRG $1589 | CPU $D589 | A5 BF
+    and #$80                        ; PRG $158B | CPU $D58B | 29 80
+    eor CurrentSpriteTileId                       ; PRG $158D | CPU $D58D | 45 11
+    bpl Flow_D596                ; PRG $158F | CPU $D58F | 10 05
+    tya                             ; PRG $1591 | CPU $D591 | 98
+    eor #$FF                        ; PRG $1592 | CPU $D592 | 49 FF
+    sec                             ; PRG $1594 | CPU $D594 | 38
+    tay                             ; PRG $1595 | CPU $D595 | A8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D596.
+; Local behavior: Reads Ram_0609; mutates Ram_0609.
+; Parameters: Ram_0609.
+; Returns: returns to caller; flags/register result depends on final instructions: adc Ram_0609,x; sta Ram_0609,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D596:
+    tya                             ; PRG $1596 | CPU $D596 | 98
+    adc Ram_0609,x                  ; PRG $1597 | CPU $D597 | 7D 09 06
+    sta Ram_0609,x                  ; PRG $159A | CPU $D59A | 9D 09 06
+    rts                             ; PRG $159D | CPU $D59D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D59 E.
+; Local behavior: Reads Ram_0609, Ram_060C, CalculateAndClampValue_CE27, OamBufferWriteOffset, Flow_D5B2; mutates Ram_0609.
+; Parameters: Ram_0609, Ram_060C, CalculateAndClampValue_CE27, OamBufferWriteOffset, Flow_D5B2.
+; Returns: returns to caller; flags/register result depends on final instructions: tya; sta Ram_0609,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D59E:
+    lda Ram_0609,x                  ; PRG $159E | CPU $D59E | BD 09 06
+    clc                             ; PRG $15A1 | CPU $D5A1 | 18
+    adc Ram_060C,x                  ; PRG $15A2 | CPU $D5A2 | 7D 0C 06
+    tay                             ; PRG $15A5 | CPU $D5A5 | A8
+    jsr CalculateAndClampValue_CE27                ; PRG $15A6 | CPU $D5A6 | 20 27 CE
+    ldx OamBufferWriteOffset                       ; PRG $15A9 | CPU $D5A9 | A6 AB
+    bcs Flow_D5B2                ; PRG $15AB | CPU $D5AB | B0 05
+    tya                             ; PRG $15AD | CPU $D5AD | 98
+    sta Ram_0609,x                  ; PRG $15AE | CPU $D5AE | 9D 09 06
+    rts                             ; PRG $15B1 | CPU $D5B1 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D5 B2.
+; Local behavior: Reads Ram_060C, UpdateZp_BC_D5DB; mutates Ram_060C.
+; Parameters: Ram_060C, UpdateZp_BC_D5DB.
+; Returns: returns to caller; flags/register result depends on final instructions: sta Ram_060C,x; jsr UpdateZp_BC_D5DB; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D5B2:
+    lda Ram_060C,x                  ; PRG $15B2 | CPU $D5B2 | BD 0C 06
+    eor #$FF                        ; PRG $15B5 | CPU $D5B5 | 49 FF
+    adc #$00                        ; PRG $15B7 | CPU $D5B7 | 69 00
+    sta Ram_060C,x                  ; PRG $15B9 | CPU $D5B9 | 9D 0C 06
+    jsr UpdateZp_BC_D5DB                ; PRG $15BC | CPU $D5BC | 20 DB D5
+    rts                             ; PRG $15BF | CPU $D5BF | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D5 C0.
+; Local behavior: Reads CollisionMask, Flow_D5C8; mutates no direct memory mutation observed.
+; Parameters: CollisionMask, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D5C0:
+    lda #$00                        ; PRG $15C0 | CPU $D5C0 | A9 00
+    bit CollisionMask                       ; PRG $15C2 | CPU $D5C2 | 24 BF
+    bpl Flow_D5C8                ; PRG $15C4 | CPU $D5C4 | 10 02
+    lda #$06                        ; PRG $15C6 | CPU $D5C6 | A9 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D5 C8.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0605, Ram_0603.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta Ram_0603,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D5C8:
+    sta Ram_0605,x                  ; PRG $15C8 | CPU $D5C8 | 9D 05 06
+    lda #$01                        ; PRG $15CB | CPU $D5CB | A9 01
+    sta Ram_0603,x                  ; PRG $15CD | CPU $D5CD | 9D 03 06
+    rts                             ; PRG $15D0 | CPU $D5D0 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D5 D1.
+; Local behavior: Reads CollisionMask, Flow_D5C8; mutates no direct memory mutation observed.
+; Parameters: CollisionMask, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D5D1:
+    lda #$00                        ; PRG $15D1 | CPU $D5D1 | A9 00
+    bit CollisionMask                       ; PRG $15D3 | CPU $D5D3 | 24 BF
+    bmi Flow_D5C8                ; PRG $15D5 | CPU $D5D5 | 30 F1
+    lda #$06                        ; PRG $15D7 | CPU $D5D7 | A9 06
+    bne Flow_D5C8                ; PRG $15D9 | CPU $D5D9 | D0 ED
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp BC D5 DB.
+; Local behavior: Reads Ram_060C, MovementDirectionFlags, Flow_D5C8; mutates MovementDirectionFlags.
+; Parameters: Ram_060C, MovementDirectionFlags, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_BC_D5DB:
+    lda Ram_060C,x                  ; PRG $15DB | CPU $D5DB | BD 0C 06
+    sta MovementDirectionFlags                       ; PRG $15DE | CPU $D5DE | 85 BC
+    lda #$00                        ; PRG $15E0 | CPU $D5E0 | A9 00
+    bit MovementDirectionFlags                       ; PRG $15E2 | CPU $D5E2 | 24 BC
+    bmi Flow_D5C8                ; PRG $15E4 | CPU $D5E4 | 30 E2
+    lda #$06                        ; PRG $15E6 | CPU $D5E6 | A9 06
+    bne Flow_D5C8                ; PRG $15E8 | CPU $D5E8 | D0 DE
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp BC D5 EA.
+; Local behavior: Reads Ram_060C, MovementDirectionFlags, Flow_D5C8; mutates MovementDirectionFlags.
+; Parameters: Ram_060C, MovementDirectionFlags, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_BC_D5EA:
+    lda Ram_060C,x                  ; PRG $15EA | CPU $D5EA | BD 0C 06
+    sta MovementDirectionFlags                       ; PRG $15ED | CPU $D5ED | 85 BC
+    lda #$18                        ; PRG $15EF | CPU $D5EF | A9 18
+    bit MovementDirectionFlags                       ; PRG $15F1 | CPU $D5F1 | 24 BC
+    bmi Flow_D5C8                ; PRG $15F3 | CPU $D5F3 | 30 D3
+    lda #$1E                        ; PRG $15F5 | CPU $D5F5 | A9 1E
+    bne Flow_D5C8                ; PRG $15F7 | CPU $D5F7 | D0 CF
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D5 F9.
+; Local behavior: Reads CollisionMask, Flow_D5C8; mutates no direct memory mutation observed.
+; Parameters: CollisionMask, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D5F9:
+    lda #$0C                        ; PRG $15F9 | CPU $D5F9 | A9 0C
+    bit CollisionMask                       ; PRG $15FB | CPU $D5FB | 24 BF
+    bpl Flow_D5C8                ; PRG $15FD | CPU $D5FD | 10 C9
+    lda #$12                        ; PRG $15FF | CPU $D5FF | A9 12
+    bne Flow_D5C8                ; PRG $1601 | CPU $D601 | D0 C5
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch D603.
+; Local behavior: Reads CollisionMask, Flow_D5C8; mutates no direct memory mutation observed.
+; Parameters: CollisionMask, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_D603:
+    lda #$18                        ; PRG $1603 | CPU $D603 | A9 18
+    bit CollisionMask                       ; PRG $1605 | CPU $D605 | 24 BF
+    bpl Flow_D5C8                ; PRG $1607 | CPU $D607 | 10 BF
+    lda #$1E                        ; PRG $1609 | CPU $D609 | A9 1E
+    bne Flow_D5C8                ; PRG $160B | CPU $D60B | D0 BB
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 0 F D60 D.
+; Local behavior: Reads CollisionMask, Flow_D5C8; mutates IndirectStorePointer.
+; Parameters: CollisionMask, Flow_D5C8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_0F_D60D:
+    lda #$18                        ; PRG $160D | CPU $D60D | A9 18
+    bit CollisionMask                       ; PRG $160F | CPU $D60F | 24 BF
+    bmi Flow_D5C8                ; PRG $1611 | CPU $D611 | 30 B5
+    lda #$1E                        ; PRG $1613 | CPU $D613 | A9 1E
+    bne Flow_D5C8                ; PRG $1615 | CPU $D615 | D0 B1
+    sta (IndirectStorePointer,x)                   ; PRG $1617 | CPU $D617 | 81 0F
+    .byte $0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F ; PRG $1619 | CPU $D619
+    .byte $0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F ; PRG $1629 | CPU $D629
+    .byte $0F,$1F,$0F,$0F,$1F,$0F,$0F,$1F,$0F,$0F,$1F,$0F,$1F,$1F,$1F,$10 ; PRG $1639 | CPU $D639
+    .byte $0F,$1F,$1F,$10,$0F,$1F,$10,$1F,$1F,$1F,$0F,$10,$1F,$1F,$10,$1F ; PRG $1649 | CPU $D649
+    .byte $10,$1F,$10,$1F,$10,$1F,$10,$10,$1F,$10,$10,$10,$1F,$10,$10,$10 ; PRG $1659 | CPU $D659
+    .byte $1F,$10,$10,$82,$10,$10,$10,$10,$10,$10,$10,$10,$83,$81,$0F,$0F ; PRG $1669 | CPU $D669
+    .byte $0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F ; PRG $1679 | CPU $D679
+    .byte $0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$1F,$0F,$0F,$1F,$0F,$0F,$1F,$0F ; PRG $1689 | CPU $D689
+    .byte $0F,$1F,$0F,$1F,$1F,$1F,$10,$0F,$10,$1F,$1F,$10,$1F,$10,$1F,$10 ; PRG $1699 | CPU $D699
+    .byte $1F,$10,$1F,$10,$10,$1F,$10,$10,$10,$1F,$10,$10,$10,$1F,$10,$10 ; PRG $16A9 | CPU $D6A9
+    .byte $82,$10,$10,$10,$10,$10,$10,$10,$10,$83,$00,$11,$10,$11,$10,$11 ; PRG $16B9 | CPU $D6B9
+    .byte $10,$11,$10,$11,$10,$11,$10,$11,$10,$11,$10,$01,$01,$01,$01,$01 ; PRG $16C9 | CPU $D6C9
+    .byte $01,$01,$01,$00,$11,$10,$11,$10,$11,$10,$11,$10,$11,$10,$11,$10 ; PRG $16D9 | CPU $D6D9
+    .byte $11,$10,$11,$10,$00,$84 ; PRG $16E9 | CPU $D6E9
+
+CodeOrDataPointerTable_D6EF:
+    .byte $D6,$C5,$C5,$AC ; PRG $16EF | CPU $D6EF
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 036 C D6 F3.
+; Local behavior: Reads ScreenObjectMode, Flow_D739; mutates Ram_036C, Ram_0360, Ram_0361, Ram_036B, Ram_0372, Ram_0373, Ram_0374, Ram_0375.
+; Parameters: ScreenObjectMode, Flow_D739.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_036C_D6F3:
+    lda #$01                        ; PRG $16F3 | CPU $D6F3 | A9 01
+    sta Ram_036C                    ; PRG $16F5 | CPU $D6F5 | 8D 6C 03
+    lda #$00                        ; PRG $16F8 | CPU $D6F8 | A9 00
+    sta Ram_0360                    ; PRG $16FA | CPU $D6FA | 8D 60 03
+    sta Ram_0361                    ; PRG $16FD | CPU $D6FD | 8D 61 03
+    sta Ram_036B                    ; PRG $1700 | CPU $D700 | 8D 6B 03
+    sta Ram_0372                    ; PRG $1703 | CPU $D703 | 8D 72 03
+    sta Ram_0373                    ; PRG $1706 | CPU $D706 | 8D 73 03
+    sta Ram_0374                    ; PRG $1709 | CPU $D709 | 8D 74 03
+    sta Ram_0375                    ; PRG $170C | CPU $D70C | 8D 75 03
+    sta Ram_0377                    ; PRG $170F | CPU $D70F | 8D 77 03
+    lda #$80                        ; PRG $1712 | CPU $D712 | A9 80
+    sta Ram_0369                    ; PRG $1714 | CPU $D714 | 8D 69 03
+    lda #$70                        ; PRG $1717 | CPU $D717 | A9 70
+    sta Ram_0368                    ; PRG $1719 | CPU $D719 | 8D 68 03
+    lda #$08                        ; PRG $171C | CPU $D71C | A9 08
+    sta Ram_036D                    ; PRG $171E | CPU $D71E | 8D 6D 03
+    lda #$9C                        ; PRG $1721 | CPU $D721 | A9 9C
+    sta Ram_0371                    ; PRG $1723 | CPU $D723 | 8D 71 03
+    lda ScreenObjectMode                       ; PRG $1726 | CPU $D726 | A5 62
+    cmp #$02                        ; PRG $1728 | CPU $D728 | C9 02
+    bne Flow_D739                ; PRG $172A | CPU $D72A | D0 0D
+    ldx #$00                        ; PRG $172C | CPU $D72C | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D72 E.
+; Local behavior: Reads CodeOrDataPointerTable_D73A, Flow_D72E; mutates Ram_02E0.
+; Parameters: CodeOrDataPointerTable_D73A, Flow_D72E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D72E:
+    lda CodeOrDataPointerTable_D73A,x                 ; PRG $172E | CPU $D72E | BD 3A D7
+    sta Ram_02E0,x                  ; PRG $1731 | CPU $D731 | 9D E0 02
+    inx                             ; PRG $1734 | CPU $D734 | E8
+    cpx #$20                        ; PRG $1735 | CPU $D735 | E0 20
+    bne Flow_D72E                ; PRG $1737 | CPU $D737 | D0 F5
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D739.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D739:
+    rts                             ; PRG $1739 | CPU $D739 | 60
+
+CodeOrDataPointerTable_D73A:
+    .byte $6F,$E5,$03,$70,$6F,$E6,$03,$88,$6F,$E6,$03,$78,$6F,$E5,$03,$80 ; PRG $173A | CPU $D73A
+    .byte $77,$E5,$03,$70,$77,$E7,$03,$88,$77,$E7,$03,$78,$77,$E5,$03,$80 ; PRG $174A | CPU $D74A
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0371 D75 A.
+; Local behavior: Reads Ram_0360, Flow_D77A, Flow_D77D, Flow_D785, Flow_D78B, Flow_D788, Flow_D78E, Ram_0371; mutates Ram_0371.
+; Parameters: Ram_0360, Flow_D77A, Flow_D77D, Flow_D785, Flow_D78B, Flow_D788, Flow_D78E, Ram_0371.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0371_D75A:
+    ldy Ram_0360                    ; PRG $175A | CPU $D75A | AC 60 03
+    beq Flow_D77A                ; PRG $175D | CPU $D75D | F0 1B
+    dey                             ; PRG $175F | CPU $D75F | 88
+    beq Flow_D77D                ; PRG $1760 | CPU $D760 | F0 1B
+    dey                             ; PRG $1762 | CPU $D762 | 88
+    beq Flow_D785                ; PRG $1763 | CPU $D763 | F0 20
+    dey                             ; PRG $1765 | CPU $D765 | 88
+    beq Flow_D78B                ; PRG $1766 | CPU $D766 | F0 23
+    dey                             ; PRG $1768 | CPU $D768 | 88
+    beq Flow_D788                ; PRG $1769 | CPU $D769 | F0 1D
+    dey                             ; PRG $176B | CPU $D76B | 88
+    bne Flow_D78E                ; PRG $176C | CPU $D76C | D0 20
+    lda Ram_0371                    ; PRG $176E | CPU $D76E | AD 71 03
+    clc                             ; PRG $1771 | CPU $D771 | 18
+    adc #$04                        ; PRG $1772 | CPU $D772 | 69 04
+    sta Ram_0371                    ; PRG $1774 | CPU $D774 | 8D 71 03
+    jmp Flow_D84A                ; PRG $1777 | CPU $D777 | 4C 4A D8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D77 A.
+; Local behavior: Reads Continuation_D7B1; mutates no direct memory mutation observed.
+; Parameters: Continuation_D7B1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D77A:
+    jmp Continuation_D7B1                ; PRG $177A | CPU $D77A | 4C B1 D7
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D77 D.
+; Local behavior: Reads FrameCounter, Flow_D78E, Continuation_D80A; mutates no direct memory mutation observed.
+; Parameters: FrameCounter, Flow_D78E, Continuation_D80A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D77D:
+    lda FrameCounter                       ; PRG $177D | CPU $D77D | A5 27
+    lsr a                           ; PRG $177F | CPU $D77F | 4A
+    bcs Flow_D78E                ; PRG $1780 | CPU $D780 | B0 0C
+    jmp Continuation_D80A                ; PRG $1782 | CPU $D782 | 4C 0A D8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D785.
+; Local behavior: Reads Continuation_D78F; mutates no direct memory mutation observed.
+; Parameters: Continuation_D78F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D785:
+    jmp Continuation_D78F                ; PRG $1785 | CPU $D785 | 4C 8F D7
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D788.
+; Local behavior: Reads Continuation_D8D7; mutates no direct memory mutation observed.
+; Parameters: Continuation_D8D7.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D788:
+    jmp Continuation_D8D7                ; PRG $1788 | CPU $D788 | 4C D7 D8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D78 B.
+; Local behavior: Reads Continuation_D952; mutates no direct memory mutation observed.
+; Parameters: Continuation_D952.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D78B:
+    jmp Continuation_D952                ; PRG $178B | CPU $D78B | 4C 52 D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D78 E.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D78E:
+    rts                             ; PRG $178E | CPU $D78E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D78 F.
+; Local behavior: Reads FrameCounter, Flow_D7A9, Ram_0372, Flow_D7AC, ComputeOrDispatch_DDF8; mutates Ram_0372.
+; Parameters: FrameCounter, Flow_D7A9, Ram_0372, Flow_D7AC, ComputeOrDispatch_DDF8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D78F:
+    lda FrameCounter                       ; PRG $178F | CPU $D78F | A5 27
+    and #$07                        ; PRG $1791 | CPU $D791 | 29 07
+    bne Flow_D7A9                ; PRG $1793 | CPU $D793 | D0 14
+    lda Ram_0372                    ; PRG $1795 | CPU $D795 | AD 72 03
+    and #$3F                        ; PRG $1798 | CPU $D798 | 29 3F
+    sec                             ; PRG $179A | CPU $D79A | 38
+    sbc #$01                        ; PRG $179B | CPU $D79B | E9 01
+    sta Ram_0372                    ; PRG $179D | CPU $D79D | 8D 72 03
+    beq Flow_D7AC                ; PRG $17A0 | CPU $D7A0 | F0 0A
+    cmp #$0F                        ; PRG $17A2 | CPU $D7A2 | C9 0F
+    bne Flow_D7A9                ; PRG $17A4 | CPU $D7A4 | D0 03
+    jsr ComputeOrDispatch_DDF8                ; PRG $17A6 | CPU $D7A6 | 20 F8 DD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 A9.
+; Local behavior: Reads Flow_D7ED; mutates no direct memory mutation observed.
+; Parameters: Flow_D7ED.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7A9:
+    jmp Flow_D7ED                ; PRG $17A9 | CPU $D7A9 | 4C ED D7
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 AC.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectSpawnDelay.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta ObjectSpawnDelay; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7AC:
+    lda #$01                        ; PRG $17AC | CPU $D7AC | A9 01
+    sta ObjectSpawnDelay                       ; PRG $17AE | CPU $D7AE | 85 47
+    rts                             ; PRG $17B0 | CPU $D7B0 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D7 B1.
+; Local behavior: Reads Ram_036C, Flow_D7F0, Ram_036B; mutates Ram_036C.
+; Parameters: Ram_036C, Flow_D7F0, Ram_036B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D7B1:
+    dec Ram_036C                    ; PRG $17B1 | CPU $D7B1 | CE 6C 03
+    bne Flow_D7F0                ; PRG $17B4 | CPU $D7B4 | D0 3A
+    ldy Ram_036B                    ; PRG $17B6 | CPU $D7B6 | AC 6B 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 B9.
+; Local behavior: Reads IndexedGameplayLookupTable_D968, Flow_D7F1, Flow_D7D1, Flow_D7CC; mutates no direct memory mutation observed.
+; Parameters: IndexedGameplayLookupTable_D968, Flow_D7F1, Flow_D7D1, Flow_D7CC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7B9:
+    lda IndexedGameplayLookupTable_D968,y                 ; PRG $17B9 | CPU $D7B9 | B9 68 D9
+    cmp #$AA                        ; PRG $17BC | CPU $D7BC | C9 AA
+    beq Flow_D7F1                ; PRG $17BE | CPU $D7BE | F0 31
+    and #$C0                        ; PRG $17C0 | CPU $D7C0 | 29 C0
+    beq Flow_D7D1                ; PRG $17C2 | CPU $D7C2 | F0 0D
+    ldx #$00                        ; PRG $17C4 | CPU $D7C4 | A2 00
+    and #$FF                        ; PRG $17C6 | CPU $D7C6 | 29 FF
+    bmi Flow_D7CC                ; PRG $17C8 | CPU $D7C8 | 30 02
+    ldx #$10                        ; PRG $17CA | CPU $D7CA | A2 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 CC.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_038E.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7CC:
+    lda #$01                        ; PRG $17CC | CPU $D7CC | A9 01
+    sta Ram_038E,x                  ; PRG $17CE | CPU $D7CE | 9D 8E 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 D1.
+; Local behavior: Reads IndexedGameplayLookupTable_D968, Ram_0361, Flow_D7ED, UpdateZp_03_DADD; mutates Ram_036C, Ram_0372, Ram_036B.
+; Parameters: IndexedGameplayLookupTable_D968, Ram_0361, Flow_D7ED, UpdateZp_03_DADD.
+; Returns: returns to caller; flags/register result depends on final instructions: bne Flow_D7ED; jsr UpdateZp_03_DADD; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7D1:
+    lda IndexedGameplayLookupTable_D968,y                 ; PRG $17D1 | CPU $D7D1 | B9 68 D9
+    and #$3F                        ; PRG $17D4 | CPU $D7D4 | 29 3F
+    sta Ram_036C                    ; PRG $17D6 | CPU $D7D6 | 8D 6C 03
+    iny                             ; PRG $17D9 | CPU $D7D9 | C8
+    lda IndexedGameplayLookupTable_D968,y                 ; PRG $17DA | CPU $D7DA | B9 68 D9
+    sta Ram_0372                    ; PRG $17DD | CPU $D7DD | 8D 72 03
+    iny                             ; PRG $17E0 | CPU $D7E0 | C8
+    sty Ram_036B                    ; PRG $17E1 | CPU $D7E1 | 8C 6B 03
+    ldy Ram_0361                    ; PRG $17E4 | CPU $D7E4 | AC 61 03
+    bne Flow_D7ED                ; PRG $17E7 | CPU $D7E7 | D0 04
+    jsr UpdateZp_03_DADD                ; PRG $17E9 | CPU $D7E9 | 20 DD DA
+    rts                             ; PRG $17EC | CPU $D7EC | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 ED.
+; Local behavior: Reads TransformPackedValue_D9D3; mutates no direct memory mutation observed.
+; Parameters: TransformPackedValue_D9D3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7ED:
+    jsr TransformPackedValue_D9D3                ; PRG $17ED | CPU $D7ED | 20 D3 D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 F0.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7F0:
+    rts                             ; PRG $17F0 | CPU $D7F0 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 F1.
+; Local behavior: Reads Ram_0361, Flow_D7FC, Flow_D7B9; mutates Ram_0361.
+; Parameters: Ram_0361, Flow_D7FC, Flow_D7B9.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7F1:
+    lda Ram_0361                    ; PRG $17F1 | CPU $D7F1 | AD 61 03
+    bne Flow_D7FC                ; PRG $17F4 | CPU $D7F4 | D0 06
+    inc Ram_0361                    ; PRG $17F6 | CPU $D7F6 | EE 61 03
+    iny                             ; PRG $17F9 | CPU $D7F9 | C8
+    bne Flow_D7B9                ; PRG $17FA | CPU $D7FA | D0 BD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D7 FC.
+; Local behavior: Reads Ram_0360; mutates Ram_0360, Ram_0361, Ram_038D.
+; Parameters: Ram_0360.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta Ram_038D; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D7FC:
+    inc Ram_0360                    ; PRG $17FC | CPU $D7FC | EE 60 03
+    lda #$00                        ; PRG $17FF | CPU $D7FF | A9 00
+    sta Ram_0361                    ; PRG $1801 | CPU $D801 | 8D 61 03
+    lda #$01                        ; PRG $1804 | CPU $D804 | A9 01
+    sta Ram_038D                    ; PRG $1806 | CPU $D806 | 8D 8D 03
+    rts                             ; PRG $1809 | CPU $D809 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D80 A.
+; Local behavior: Reads Ram_0377, Flow_D815, Flow_D84A; mutates Ram_0377.
+; Parameters: Ram_0377, Flow_D815, Flow_D84A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D80A:
+    lda Ram_0377                    ; PRG $180A | CPU $D80A | AD 77 03
+    beq Flow_D815                ; PRG $180D | CPU $D80D | F0 06
+    dec Ram_0377                    ; PRG $180F | CPU $D80F | CE 77 03
+    jmp Flow_D84A                ; PRG $1812 | CPU $D812 | 4C 4A D8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D815.
+; Local behavior: Reads Ram_036E, Flow_D83E, Flow_D824, Ram_0371; mutates Ram_0371.
+; Parameters: Ram_036E, Flow_D83E, Flow_D824, Ram_0371.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D815:
+    lda Ram_036E                    ; PRG $1815 | CPU $D815 | AD 6E 03
+    beq Flow_D83E                ; PRG $1818 | CPU $D818 | F0 24
+    cmp #$01                        ; PRG $181A | CPU $D81A | C9 01
+    beq Flow_D824                ; PRG $181C | CPU $D81C | F0 06
+    dec Ram_0371                    ; PRG $181E | CPU $D81E | CE 71 03
+    dec Ram_0371                    ; PRG $1821 | CPU $D821 | CE 71 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D824.
+; Local behavior: Reads Ram_0371, SelectedScreenVariant, Flow_D834; mutates Ram_0371.
+; Parameters: Ram_0371, SelectedScreenVariant, Flow_D834.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D824:
+    dec Ram_0371                    ; PRG $1824 | CPU $D824 | CE 71 03
+    dec Ram_0371                    ; PRG $1827 | CPU $D827 | CE 71 03
+    dec Ram_0371                    ; PRG $182A | CPU $D82A | CE 71 03
+    lda SelectedScreenVariant                       ; PRG $182D | CPU $D82D | A5 41
+    bne Flow_D834                ; PRG $182F | CPU $D82F | D0 03
+    dec Ram_0371                    ; PRG $1831 | CPU $D831 | CE 71 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D834.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_036E, Ram_0376.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D834:
+    lda #$00                        ; PRG $1834 | CPU $D834 | A9 00
+    sta Ram_036E                    ; PRG $1836 | CPU $D836 | 8D 6E 03
+    lda #$06                        ; PRG $1839 | CPU $D839 | A9 06
+    sta Ram_0376                    ; PRG $183B | CPU $D83B | 8D 76 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D83 E.
+; Local behavior: Reads FrameCounter, Flow_D84A, Ram_0371; mutates Ram_0371.
+; Parameters: FrameCounter, Flow_D84A, Ram_0371.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D83E:
+    lda FrameCounter                       ; PRG $183E | CPU $D83E | A5 27
+    and #$1F                        ; PRG $1840 | CPU $D840 | 29 1F
+    bne Flow_D84A                ; PRG $1842 | CPU $D842 | D0 06
+    inc Ram_0371                    ; PRG $1844 | CPU $D844 | EE 71 03
+    inc Ram_0371                    ; PRG $1847 | CPU $D847 | EE 71 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D84 A.
+; Local behavior: Reads Ram_0371, Flow_D8AC, ScreenObjectMode, Flow_D85E, Flow_D8BB; mutates no direct memory mutation observed.
+; Parameters: Ram_0371, Flow_D8AC, ScreenObjectMode, Flow_D85E, Flow_D8BB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D84A:
+    lda Ram_0371                    ; PRG $184A | CPU $D84A | AD 71 03
+    cmp #$40                        ; PRG $184D | CPU $D84D | C9 40
+    bcc Flow_D8AC                ; PRG $184F | CPU $D84F | 90 5B
+    lda ScreenObjectMode                       ; PRG $1851 | CPU $D851 | A5 62
+    cmp #$02                        ; PRG $1853 | CPU $D853 | C9 02
+    bne Flow_D85E                ; PRG $1855 | CPU $D855 | D0 07
+    lda Ram_0371                    ; PRG $1857 | CPU $D857 | AD 71 03
+    cmp #$50                        ; PRG $185A | CPU $D85A | C9 50
+    bcc Flow_D8BB                ; PRG $185C | CPU $D85C | 90 5D
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D85 E.
+; Local behavior: Reads ScreenObjectMode, Flow_D868; mutates no direct memory mutation observed.
+; Parameters: ScreenObjectMode, Flow_D868.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D85E:
+    ldy #$CC                        ; PRG $185E | CPU $D85E | A0 CC
+    lda ScreenObjectMode                       ; PRG $1860 | CPU $D860 | A5 62
+    cmp #$02                        ; PRG $1862 | CPU $D862 | C9 02
+    bne Flow_D868                ; PRG $1864 | CPU $D864 | D0 02
+    ldy #$AC                        ; PRG $1866 | CPU $D866 | A0 AC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D868.
+; Local behavior: Reads Ram_0371, Flow_D8CD, Ram_0376, Flow_D88B; mutates PackedHudOrObjectValue, Ram_0372, Ram_0376.
+; Parameters: Ram_0371, Flow_D8CD, Ram_0376, Flow_D88B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D868:
+    cpy Ram_0371                    ; PRG $1868 | CPU $D868 | CC 71 03
+    bcc Flow_D8CD                ; PRG $186B | CPU $D86B | 90 60
+    lda Ram_0371                    ; PRG $186D | CPU $D86D | AD 71 03
+    sec                             ; PRG $1870 | CPU $D870 | 38
+    sbc #$40                        ; PRG $1871 | CPU $D871 | E9 40
+    sta PackedHudOrObjectValue                       ; PRG $1873 | CPU $D873 | 85 16
+    lsr a                           ; PRG $1875 | CPU $D875 | 4A
+    lsr a                           ; PRG $1876 | CPU $D876 | 4A
+    lsr a                           ; PRG $1877 | CPU $D877 | 4A
+    clc                             ; PRG $1878 | CPU $D878 | 18
+    adc #$10                        ; PRG $1879 | CPU $D879 | 69 10
+    sta Ram_0372                    ; PRG $187B | CPU $D87B | 8D 72 03
+    ldy Ram_0376                    ; PRG $187E | CPU $D87E | AC 76 03
+    beq Flow_D88B                ; PRG $1881 | CPU $D881 | F0 08
+    dec Ram_0376                    ; PRG $1883 | CPU $D883 | CE 76 03
+    ora #$80                        ; PRG $1886 | CPU $D886 | 09 80
+    sta Ram_0372                    ; PRG $1888 | CPU $D888 | 8D 72 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D88 B.
+; Local behavior: Reads PackedHudOrObjectValue, Ram_0377, Flow_D8A5, Ram_0374; mutates Ram_0368.
+; Parameters: PackedHudOrObjectValue, Ram_0377, Flow_D8A5, Ram_0374.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D88B:
+    lda PackedHudOrObjectValue                       ; PRG $188B | CPU $D88B | A5 16
+    lsr a                           ; PRG $188D | CPU $D88D | 4A
+    adc #$3C                        ; PRG $188E | CPU $D88E | 69 3C
+    sta Ram_0368                    ; PRG $1890 | CPU $D890 | 8D 68 03
+    ldy #$00                        ; PRG $1893 | CPU $D893 | A0 00
+    lda Ram_0377                    ; PRG $1895 | CPU $D895 | AD 77 03
+    beq Flow_D8A5                ; PRG $1898 | CPU $D898 | F0 0B
+    ldy Ram_0374                    ; PRG $189A | CPU $D89A | AC 74 03
+    cmp #$20                        ; PRG $189D | CPU $D89D | C9 20
+    bne Flow_D8A5                ; PRG $189F | CPU $D89F | D0 04
+    tya                             ; PRG $18A1 | CPU $D8A1 | 98
+    ora #$C0                        ; PRG $18A2 | CPU $D8A2 | 09 C0
+    tay                             ; PRG $18A4 | CPU $D8A4 | A8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 A5.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0374.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8A5:
+    sty Ram_0374                    ; PRG $18A5 | CPU $D8A5 | 8C 74 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 A8.
+; Local behavior: Reads TransformPackedValue_D9D3; mutates no direct memory mutation observed.
+; Parameters: TransformPackedValue_D9D3.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr TransformPackedValue_D9D3; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8A8:
+    jsr TransformPackedValue_D9D3                ; PRG $18A8 | CPU $D8A8 | 20 D3 D9
+    rts                             ; PRG $18AB | CPU $D8AB | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 AC.
+; Local behavior: Reads Flow_D8A8; mutates AudioRequestFlags, Ram_0360, ScreenObjectTrigger.
+; Parameters: Flow_D8A8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8AC:
+    lda #$07                        ; PRG $18AC | CPU $D8AC | A9 07
+    sta AudioRequestFlags                       ; PRG $18AE | CPU $D8AE | 85 FB
+    lda #$02                        ; PRG $18B0 | CPU $D8B0 | A9 02
+    sta Ram_0360                    ; PRG $18B2 | CPU $D8B2 | 8D 60 03
+    lda #$01                        ; PRG $18B5 | CPU $D8B5 | A9 01
+    sta ScreenObjectTrigger                       ; PRG $18B7 | CPU $D8B7 | 85 64
+    bne Flow_D8A8                ; PRG $18B9 | CPU $D8B9 | D0 ED
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 BB.
+; Local behavior: Reads Flow_D8A8; mutates Ram_0360, AudioRequestFlags, Ram_036C, ScreenObjectTrigger.
+; Parameters: Flow_D8A8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8BB:
+    lda #$03                        ; PRG $18BB | CPU $D8BB | A9 03
+    sta Ram_0360                    ; PRG $18BD | CPU $D8BD | 8D 60 03
+    sta AudioRequestFlags                       ; PRG $18C0 | CPU $D8C0 | 85 FB
+    lda #$A0                        ; PRG $18C2 | CPU $D8C2 | A9 A0
+    sta Ram_036C                    ; PRG $18C4 | CPU $D8C4 | 8D 6C 03
+    lda #$01                        ; PRG $18C7 | CPU $D8C7 | A9 01
+    sta ScreenObjectTrigger                       ; PRG $18C9 | CPU $D8C9 | 85 64
+    bne Flow_D8A8                ; PRG $18CB | CPU $D8CB | D0 DB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 CD.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0360, ScreenObjectCounter.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta ScreenObjectCounter; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8CD:
+    lda #$04                        ; PRG $18CD | CPU $D8CD | A9 04
+    sta Ram_0360                    ; PRG $18CF | CPU $D8CF | 8D 60 03
+    lda #$01                        ; PRG $18D2 | CPU $D8D2 | A9 01
+    sta ScreenObjectCounter                       ; PRG $18D4 | CPU $D8D4 | 85 65
+    rts                             ; PRG $18D6 | CPU $D8D6 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D8 D7.
+; Local behavior: Reads Ram_0361, Flow_D8E2, Flow_D925, Flow_D91D; mutates no direct memory mutation observed.
+; Parameters: Ram_0361, Flow_D8E2, Flow_D925, Flow_D91D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D8D7:
+    ldy Ram_0361                    ; PRG $18D7 | CPU $D8D7 | AC 61 03
+    beq Flow_D8E2                ; PRG $18DA | CPU $D8DA | F0 06
+    cpy #$03                        ; PRG $18DC | CPU $D8DC | C0 03
+    beq Flow_D925                ; PRG $18DE | CPU $D8DE | F0 45
+    bne Flow_D91D                ; PRG $18E0 | CPU $D8E0 | D0 3B
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 E2.
+; Local behavior: Reads ScreenObjectMode, Flow_D8F1; mutates Ram_0366.
+; Parameters: ScreenObjectMode, Flow_D8F1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8E2:
+    lda #$4A                        ; PRG $18E2 | CPU $D8E2 | A9 4A
+    sta Ram_0366                    ; PRG $18E4 | CPU $D8E4 | 8D 66 03
+    ldy #$A8                        ; PRG $18E7 | CPU $D8E7 | A0 A8
+    lda ScreenObjectMode                       ; PRG $18E9 | CPU $D8E9 | A5 62
+    cmp #$02                        ; PRG $18EB | CPU $D8EB | C9 02
+    bne Flow_D8F1                ; PRG $18ED | CPU $D8ED | D0 02
+    ldy #$98                        ; PRG $18EF | CPU $D8EF | A0 98
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D8 F1.
+; Local behavior: Reads ScreenObjectMode, Flow_D912; mutates Ram_036A, Ram_0368, Ram_0365, Ram_0363, Ram_0362.
+; Parameters: ScreenObjectMode, Flow_D912.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D8F1:
+    sty Ram_036A                    ; PRG $18F1 | CPU $D8F1 | 8C 6A 03
+    lda #$80                        ; PRG $18F4 | CPU $D8F4 | A9 80
+    sta Ram_0368                    ; PRG $18F6 | CPU $D8F6 | 8D 68 03
+    lda #$C0                        ; PRG $18F9 | CPU $D8F9 | A9 C0
+    sta Ram_0365                    ; PRG $18FB | CPU $D8FB | 8D 65 03
+    lda #$01                        ; PRG $18FE | CPU $D8FE | A9 01
+    sta Ram_0363                    ; PRG $1900 | CPU $D900 | 8D 63 03
+    lda #$10                        ; PRG $1903 | CPU $D903 | A9 10
+    sta Ram_0362                    ; PRG $1905 | CPU $D905 | 8D 62 03
+    lda #$20                        ; PRG $1908 | CPU $D908 | A9 20
+    ldx ScreenObjectMode                       ; PRG $190A | CPU $D90A | A6 62
+    cpx #$02                        ; PRG $190C | CPU $D90C | E0 02
+    bne Flow_D912                ; PRG $190E | CPU $D90E | D0 02
+    lda #$24                        ; PRG $1910 | CPU $D910 | A9 24
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D912.
+; Local behavior: Reads UpdateZp_03_DADD, UpdateRam_0301_CEE5, UpdateZp_A8_D941; mutates no direct memory mutation observed.
+; Parameters: UpdateZp_03_DADD, UpdateRam_0301_CEE5, UpdateZp_A8_D941.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D912:
+    jsr UpdateZp_03_DADD                ; PRG $1912 | CPU $D912 | 20 DD DA
+    ldx #$60                        ; PRG $1915 | CPU $D915 | A2 60
+    jsr UpdateRam_0301_CEE5                ; PRG $1917 | CPU $D917 | 20 E5 CE
+    jmp UpdateZp_A8_D941                ; PRG $191A | CPU $D91A | 4C 41 D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D91 D.
+; Local behavior: Reads ComputeOrDispatch_CEBF, UpdateZp_A8_D941; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_CEBF, UpdateZp_A8_D941.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D91D:
+    ldx #$60                        ; PRG $191D | CPU $D91D | A2 60
+    jsr ComputeOrDispatch_CEBF                ; PRG $191F | CPU $D91F | 20 BF CE
+    jmp UpdateZp_A8_D941                ; PRG $1922 | CPU $D922 | 4C 41 D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D925.
+; Local behavior: Reads Ram_0365, Flow_D94D, Ram_0363, UpdateZp_A8_D941, Ram_0362, Ram_0367; mutates Ram_0365, Ram_0363, Ram_0367, AudioPendingFlags.
+; Parameters: Ram_0365, Flow_D94D, Ram_0363, UpdateZp_A8_D941, Ram_0362, Ram_0367.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D925:
+    dec Ram_0365                    ; PRG $1925 | CPU $D925 | CE 65 03
+    beq Flow_D94D                ; PRG $1928 | CPU $D928 | F0 23
+    dec Ram_0363                    ; PRG $192A | CPU $D92A | CE 63 03
+    bne UpdateZp_A8_D941                ; PRG $192D | CPU $D92D | D0 12
+    lda Ram_0362                    ; PRG $192F | CPU $D92F | AD 62 03
+    sta Ram_0363                    ; PRG $1932 | CPU $D932 | 8D 63 03
+    lda Ram_0367                    ; PRG $1935 | CPU $D935 | AD 67 03
+    eor #$40                        ; PRG $1938 | CPU $D938 | 49 40
+    sta Ram_0367                    ; PRG $193A | CPU $D93A | 8D 67 03
+    lda #$04                        ; PRG $193D | CPU $D93D | A9 04
+    sta AudioPendingFlags                       ; PRG $193F | CPU $D93F | 85 FD
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 D941.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates ObjectRecordPointerLo, ObjectRecordPointerHi.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: returns to caller; flags/register result depends on final instructions: sta ObjectRecordPointerHi; jsr LoadObjectSpriteRenderState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_D941:
+    lda #$60                        ; PRG $1941 | CPU $D941 | A9 60
+    sta ObjectRecordPointerLo                       ; PRG $1943 | CPU $D943 | 85 A8
+    lda #$03                        ; PRG $1945 | CPU $D945 | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $1947 | CPU $D947 | 85 A9
+    jsr LoadObjectSpriteRenderState                ; PRG $1949 | CPU $D949 | 20 17 C2
+    rts                             ; PRG $194C | CPU $D94C | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D94 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectSpawnDelay.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$01; sta ObjectSpawnDelay; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D94D:
+    lda #$01                        ; PRG $194D | CPU $D94D | A9 01
+    sta ObjectSpawnDelay                       ; PRG $194F | CPU $D94F | 85 47
+    rts                             ; PRG $1951 | CPU $D951 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D952.
+; Local behavior: Reads Ram_036C, Flow_D94D, Flow_D967; mutates Ram_036C, AudioRequestFlags, Ram_03B8.
+; Parameters: Ram_036C, Flow_D94D, Flow_D967.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D952:
+    dec Ram_036C                    ; PRG $1952 | CPU $D952 | CE 6C 03
+    beq Flow_D94D                ; PRG $1955 | CPU $D955 | F0 F6
+    lda Ram_036C                    ; PRG $1957 | CPU $D957 | AD 6C 03
+    cmp #$58                        ; PRG $195A | CPU $D95A | C9 58
+    bne Flow_D967                ; PRG $195C | CPU $D95C | D0 09
+    lda #$07                        ; PRG $195E | CPU $D95E | A9 07
+    sta AudioRequestFlags                       ; PRG $1960 | CPU $D960 | 85 FB
+    lda #$32                        ; PRG $1962 | CPU $D962 | A9 32
+    sta Ram_03B8                    ; PRG $1964 | CPU $D964 | 8D B8 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D967.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D967:
+    rts                             ; PRG $1967 | CPU $D967 | 60
+
+IndexedGameplayLookupTable_D968:
+    .byte $08,$00,$08,$04,$88,$14,$08,$10,$08,$14,$88,$10,$08,$14,$10,$00 ; PRG $1968 | CPU $D968
+    .byte $08,$0C,$48,$1C,$08,$18,$08,$1C,$48,$18,$08,$1C,$08,$08,$AA,$06 ; PRG $1978 | CPU $D978
+    .byte $16,$06,$17,$06,$18,$06,$19,$06,$1A,$AA ; PRG $1988 | CPU $D988
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D992.
+; Local behavior: Reads CollisionFlags, Flow_D99E, PackedHudOrObjectValue, Continuation_D9B3; mutates PackedHudOrObjectValue.
+; Parameters: CollisionFlags, Flow_D99E, PackedHudOrObjectValue, Continuation_D9B3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D992:
+    lda CollisionFlags                       ; PRG $1992 | CPU $D992 | A5 C4
+    bpl Flow_D99E                ; PRG $1994 | CPU $D994 | 10 08
+    lsr a                           ; PRG $1996 | CPU $D996 | 4A
+    rol PackedHudOrObjectValue                       ; PRG $1997 | CPU $D997 | 26 16
+    lda PackedHudOrObjectValue                       ; PRG $1999 | CPU $D999 | A5 16
+    jmp Continuation_D9B3                ; PRG $199B | CPU $D99B | 4C B3 D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D99 E.
+; Local behavior: Reads UpdateRam_0375_D9CD, Flow_D9FF; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_0375_D9CD, Flow_D9FF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D99E:
+    jsr UpdateRam_0375_D9CD                ; PRG $199E | CPU $D99E | 20 CD D9
+    jmp Flow_D9FF                ; PRG $19A1 | CPU $D9A1 | 4C FF D9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D9 A4.
+; Local behavior: Reads CollisionFlags, PackedHudOrObjectValue; mutates PackedHudOrObjectValue.
+; Parameters: CollisionFlags, PackedHudOrObjectValue.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D9A4:
+    lda CollisionFlags                       ; PRG $19A4 | CPU $D9A4 | A5 C4
+    lsr a                           ; PRG $19A6 | CPU $D9A6 | 4A
+    rol PackedHudOrObjectValue                       ; PRG $19A7 | CPU $D9A7 | 26 16
+    asl a                           ; PRG $19A9 | CPU $D9A9 | 0A
+    asl a                           ; PRG $19AA | CPU $D9AA | 0A
+    asl a                           ; PRG $19AB | CPU $D9AB | 0A
+    rol PackedHudOrObjectValue                       ; PRG $19AC | CPU $D9AC | 26 16
+    lda PackedHudOrObjectValue                       ; PRG $19AE | CPU $D9AE | A5 16
+    clc                             ; PRG $19B0 | CPU $D9B0 | 18
+    adc #$02                        ; PRG $19B1 | CPU $D9B1 | 69 02
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation D9 B3.
+; Local behavior: Reads IndexedGameplayLookupTable_DBC2, IndexedGameplayLookupTable_DBC3, IndexedGameplayLookupTable_DBC4, IndexedGameplayLookupTable_DBC5, TransformPackedValue_DB15, ExpandPackedScoreOrHudData; mutates SourceRecordPointerLo, PackedCoordinateOrValue.
+; Parameters: IndexedGameplayLookupTable_DBC2, IndexedGameplayLookupTable_DBC3, IndexedGameplayLookupTable_DBC4, IndexedGameplayLookupTable_DBC5, TransformPackedValue_DB15, ExpandPackedScoreOrHudData.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_D9B3:
+    asl a                           ; PRG $19B3 | CPU $D9B3 | 0A
+    asl a                           ; PRG $19B4 | CPU $D9B4 | 0A
+    tax                             ; PRG $19B5 | CPU $D9B5 | AA
+    lda IndexedGameplayLookupTable_DBC2,x                 ; PRG $19B6 | CPU $D9B6 | BD C2 DB
+    sta SourceRecordPointerLo                       ; PRG $19B9 | CPU $D9B9 | 85 03
+    lda IndexedGameplayLookupTable_DBC3,x                 ; PRG $19BB | CPU $D9BB | BD C3 DB
+    sta PackedCoordinateOrValue                       ; PRG $19BE | CPU $D9BE | 85 04
+    ldy IndexedGameplayLookupTable_DBC4,x                 ; PRG $19C0 | CPU $D9C0 | BC C4 DB
+    lda IndexedGameplayLookupTable_DBC5,x                 ; PRG $19C3 | CPU $D9C3 | BD C5 DB
+    tax                             ; PRG $19C6 | CPU $D9C6 | AA
+    jsr TransformPackedValue_DB15                ; PRG $19C7 | CPU $D9C7 | 20 15 DB
+    jsr ExpandPackedScoreOrHudData                ; PRG $19CA | CPU $D9CA | 20 51 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0375 D9 CD.
+; Local behavior: Reads CollisionFlags; mutates Ram_0375.
+; Parameters: CollisionFlags.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0375_D9CD:
+    lda CollisionFlags                       ; PRG $19CD | CPU $D9CD | A5 C4
+    sta Ram_0375                    ; PRG $19CF | CPU $D9CF | 8D 75 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D9 D2.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D9D2:
+    rts                             ; PRG $19D2 | CPU $D9D2 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value D9 D3.
+; Local behavior: Reads Ram_0372, Ram_0374, Ram_0375, Flow_D992, CollisionFlags, Flow_D9A4, CollisionCoordinate, Flow_D9FC; mutates PackedHudOrObjectValue, CollisionCoordinate, CollisionFlags.
+; Parameters: Ram_0372, Ram_0374, Ram_0375, Flow_D992, CollisionFlags, Flow_D9A4, CollisionCoordinate, Flow_D9FC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_D9D3:
+    lda #$00                        ; PRG $19D3 | CPU $D9D3 | A9 00
+    sta PackedHudOrObjectValue                       ; PRG $19D5 | CPU $D9D5 | 85 16
+    lda Ram_0372                    ; PRG $19D7 | CPU $D9D7 | AD 72 03
+    sta CollisionCoordinate                       ; PRG $19DA | CPU $D9DA | 85 C2
+    lda Ram_0374                    ; PRG $19DC | CPU $D9DC | AD 74 03
+    sta CollisionFlags                       ; PRG $19DF | CPU $D9DF | 85 C4
+    eor Ram_0375                    ; PRG $19E1 | CPU $D9E1 | 4D 75 03
+    asl a                           ; PRG $19E4 | CPU $D9E4 | 0A
+    bcs Flow_D992                ; PRG $19E5 | CPU $D9E5 | B0 AB
+    bit CollisionFlags                       ; PRG $19E7 | CPU $D9E7 | 24 C4
+    bmi Flow_D9A4                ; PRG $19E9 | CPU $D9E9 | 30 B9
+    lda CollisionCoordinate                       ; PRG $19EB | CPU $D9EB | A5 C2
+    cmp #$10                        ; PRG $19ED | CPU $D9ED | C9 10
+    bcc Flow_D9FC                ; PRG $19EF | CPU $D9EF | 90 0B
+    eor Ram_0373                    ; PRG $19F1 | CPU $D9F1 | 4D 73 03
+    asl a                           ; PRG $19F4 | CPU $D9F4 | 0A
+    bne Flow_D9FF                ; PRG $19F5 | CPU $D9F5 | D0 08
+    bcc Flow_D9D2                ; PRG $19F7 | CPU $D9F7 | 90 D9
+    jmp Continuation_DABC                ; PRG $19F9 | CPU $D9F9 | 4C BC DA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D9 FC.
+; Local behavior: Reads Continuation_DA8B; mutates no direct memory mutation observed.
+; Parameters: Continuation_DA8B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D9FC:
+    jmp Continuation_DA8B                ; PRG $19FC | CPU $D9FC | 4C 8B DA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow D9 FF.
+; Local behavior: Reads TransformPackedValue_DB15, TransformPackedValue_DAF5, ScreenObjectMode, Flow_DA13; mutates no direct memory mutation observed.
+; Parameters: TransformPackedValue_DB15, TransformPackedValue_DAF5, ScreenObjectMode, Flow_DA13.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_D9FF:
+    ldx #$20                        ; PRG $19FF | CPU $D9FF | A2 20
+    ldy #$8D                        ; PRG $1A01 | CPU $DA01 | A0 8D
+    jsr TransformPackedValue_DB15                ; PRG $1A03 | CPU $DA03 | 20 15 DB
+    jsr TransformPackedValue_DAF5                ; PRG $1A06 | CPU $DA06 | 20 F5 DA
+    ldy #$0B                        ; PRG $1A09 | CPU $DA09 | A0 0B
+    lda ScreenObjectMode                       ; PRG $1A0B | CPU $DA0B | A5 62
+    cmp #$02                        ; PRG $1A0D | CPU $DA0D | C9 02
+    bne Flow_DA13                ; PRG $1A0F | CPU $DA0F | D0 02
+    ldy #$09                        ; PRG $1A11 | CPU $DA11 | A0 09
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DA13.
+; Local behavior: Reads CollisionCoordinate, CoordinateDelta, UpdateRam_0373_DA82, Flow_DA30; mutates CoordinateDelta, CollisionCoordinate, CurrentSpriteTileId.
+; Parameters: CollisionCoordinate, CoordinateDelta, UpdateRam_0373_DA82, Flow_DA30.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DA13:
+    sty CoordinateDelta                       ; PRG $1A13 | CPU $DA13 | 84 17
+    lda CollisionCoordinate                       ; PRG $1A15 | CPU $DA15 | A5 C2
+    and #$7F                        ; PRG $1A17 | CPU $DA17 | 29 7F
+    sta CollisionCoordinate                       ; PRG $1A19 | CPU $DA19 | 85 C2
+    lsr a                           ; PRG $1A1B | CPU $DA1B | 4A
+    sec                             ; PRG $1A1C | CPU $DA1C | 38
+    sbc CoordinateDelta                       ; PRG $1A1D | CPU $DA1D | E5 17
+    bcc UpdateRam_0373_DA82                ; PRG $1A1F | CPU $DA1F | 90 61
+    beq UpdateRam_0373_DA82                ; PRG $1A21 | CPU $DA21 | F0 5F
+    sta CurrentSpriteTileId                       ; PRG $1A23 | CPU $DA23 | 85 11
+    ldx #$2A                        ; PRG $1A25 | CPU $DA25 | A2 2A
+    ldy #$0B                        ; PRG $1A27 | CPU $DA27 | A0 0B
+    lda CollisionCoordinate                       ; PRG $1A29 | CPU $DA29 | A5 C2
+    lsr a                           ; PRG $1A2B | CPU $DA2B | 4A
+    bcc Flow_DA30                ; PRG $1A2C | CPU $DA2C | 90 02
+    ldy #$17                        ; PRG $1A2E | CPU $DA2E | A0 17
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DA30.
+; Local behavior: Reads CodeOrDataPointerTable_DB88, CurrentSpriteTileId, Flow_DA30, ScreenObjectMode, UpdateRam_0373_DA82, CollisionCoordinate; mutates Ram_06C0, CurrentSpriteTileId.
+; Parameters: CodeOrDataPointerTable_DB88, CurrentSpriteTileId, Flow_DA30, ScreenObjectMode, UpdateRam_0373_DA82, CollisionCoordinate.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DA30:
+    lda CodeOrDataPointerTable_DB88,y                 ; PRG $1A30 | CPU $DA30 | B9 88 DB
+    sta Ram_06C0,x                  ; PRG $1A33 | CPU $DA33 | 9D C0 06
+    dey                             ; PRG $1A36 | CPU $DA36 | 88
+    dex                             ; PRG $1A37 | CPU $DA37 | CA
+    dex                             ; PRG $1A38 | CPU $DA38 | CA
+    dex                             ; PRG $1A39 | CPU $DA39 | CA
+    dex                             ; PRG $1A3A | CPU $DA3A | CA
+    dex                             ; PRG $1A3B | CPU $DA3B | CA
+    lda CodeOrDataPointerTable_DB88,y                 ; PRG $1A3C | CPU $DA3C | B9 88 DB
+    sta Ram_06C0,x                  ; PRG $1A3F | CPU $DA3F | 9D C0 06
+    dey                             ; PRG $1A42 | CPU $DA42 | 88
+    dex                             ; PRG $1A43 | CPU $DA43 | CA
+    dec CurrentSpriteTileId                       ; PRG $1A44 | CPU $DA44 | C6 11
+    bne Flow_DA30                ; PRG $1A46 | CPU $DA46 | D0 E8
+    lda ScreenObjectMode                       ; PRG $1A48 | CPU $DA48 | A5 62
+    cmp #$02                        ; PRG $1A4A | CPU $DA4A | C9 02
+    bne UpdateRam_0373_DA82                ; PRG $1A4C | CPU $DA4C | D0 34
+    lda CollisionCoordinate                       ; PRG $1A4E | CPU $DA4E | A5 C2
+    lsr a                           ; PRG $1A50 | CPU $DA50 | 4A
+    sec                             ; PRG $1A51 | CPU $DA51 | 38
+    sbc #$0C                        ; PRG $1A52 | CPU $DA52 | E9 0C
+    bcc UpdateRam_0373_DA82                ; PRG $1A54 | CPU $DA54 | 90 2C
+    sta CurrentSpriteTileId                       ; PRG $1A56 | CPU $DA56 | 85 11
+    asl a                           ; PRG $1A58 | CPU $DA58 | 0A
+    tay                             ; PRG $1A59 | CPU $DA59 | A8
+    iny                             ; PRG $1A5A | CPU $DA5A | C8
+    inc CurrentSpriteTileId                       ; PRG $1A5B | CPU $DA5B | E6 11
+    ldx #$2A                        ; PRG $1A5D | CPU $DA5D | A2 2A
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DA5 F.
+; Local behavior: Reads IndexedGameplayLookupTable_DBA0, CurrentSpriteTileId, Flow_DA5F, CollisionCoordinate, UpdateRam_0373_DA82; mutates Ram_06C0, CurrentSpriteTileId.
+; Parameters: IndexedGameplayLookupTable_DBA0, CurrentSpriteTileId, Flow_DA5F, CollisionCoordinate, UpdateRam_0373_DA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DA5F:
+    lda IndexedGameplayLookupTable_DBA0,y                 ; PRG $1A5F | CPU $DA5F | B9 A0 DB
+    sta Ram_06C0,x                  ; PRG $1A62 | CPU $DA62 | 9D C0 06
+    dey                             ; PRG $1A65 | CPU $DA65 | 88
+    dex                             ; PRG $1A66 | CPU $DA66 | CA
+    dex                             ; PRG $1A67 | CPU $DA67 | CA
+    dex                             ; PRG $1A68 | CPU $DA68 | CA
+    dex                             ; PRG $1A69 | CPU $DA69 | CA
+    dex                             ; PRG $1A6A | CPU $DA6A | CA
+    lda IndexedGameplayLookupTable_DBA0,y                 ; PRG $1A6B | CPU $DA6B | B9 A0 DB
+    sta Ram_06C0,x                  ; PRG $1A6E | CPU $DA6E | 9D C0 06
+    dey                             ; PRG $1A71 | CPU $DA71 | 88
+    dex                             ; PRG $1A72 | CPU $DA72 | CA
+    dec CurrentSpriteTileId                       ; PRG $1A73 | CPU $DA73 | C6 11
+    bne Flow_DA5F                ; PRG $1A75 | CPU $DA75 | D0 E8
+    lda CollisionCoordinate                       ; PRG $1A77 | CPU $DA77 | A5 C2
+    cmp #$1D                        ; PRG $1A79 | CPU $DA79 | C9 1D
+    bne UpdateRam_0373_DA82                ; PRG $1A7B | CPU $DA7B | D0 05
+    lda #$66                        ; PRG $1A7D | CPU $DA7D | A9 66
+    sta Ram_06C0                    ; PRG $1A7F | CPU $DA7F | 8D C0 06
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0373 DA82.
+; Local behavior: Reads ExpandPackedScoreOrHudData, CollisionCoordinate; mutates Ram_0373.
+; Parameters: ExpandPackedScoreOrHudData, CollisionCoordinate.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0373_DA82:
+    jsr ExpandPackedScoreOrHudData                ; PRG $1A82 | CPU $DA82 | 20 51 C4
+    lda CollisionCoordinate                       ; PRG $1A85 | CPU $DA85 | A5 C2
+    sta Ram_0373                    ; PRG $1A87 | CPU $DA87 | 8D 73 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DA8 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DA8A:
+    rts                             ; PRG $1A8A | CPU $DA8A | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation DA8 B.
+; Local behavior: Reads Flow_DA8A, SignedOffsetAccumulator, TransformPackedValue_DAF5; mutates SignedOffsetAccumulator, CurrentSpriteTileId.
+; Parameters: Flow_DA8A, SignedOffsetAccumulator, TransformPackedValue_DAF5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_DA8B:
+    cmp #$05                        ; PRG $1A8B | CPU $DA8B | C9 05
+    bcc Flow_DA8A                ; PRG $1A8D | CPU $DA8D | 90 FB
+    lsr a                           ; PRG $1A8F | CPU $DA8F | 4A
+    sta SignedOffsetAccumulator                       ; PRG $1A90 | CPU $DA90 | 85 10
+    lda #$08                        ; PRG $1A92 | CPU $DA92 | A9 08
+    sec                             ; PRG $1A94 | CPU $DA94 | 38
+    sbc SignedOffsetAccumulator                       ; PRG $1A95 | CPU $DA95 | E5 10
+    sta CurrentSpriteTileId                       ; PRG $1A97 | CPU $DA97 | 85 11
+    jsr TransformPackedValue_DAF5                ; PRG $1A99 | CPU $DA99 | 20 F5 DA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DA9 C.
+; Local behavior: Reads SourceRecordPointerLo, CurrentSpriteTileId, Flow_DA9C, UpdateRam_0373_DA82; mutates SourceRecordPointerLo, CurrentSpriteTileId, WorkPointerOrValueHi, WorkPointerOrValueLo.
+; Parameters: SourceRecordPointerLo, CurrentSpriteTileId, Flow_DA9C, UpdateRam_0373_DA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DA9C:
+    ldy #$00                        ; PRG $1A9C | CPU $DA9C | A0 00
+    lda (SourceRecordPointerLo),y                   ; PRG $1A9E | CPU $DA9E | B1 03
+    sec                             ; PRG $1AA0 | CPU $DAA0 | 38
+    sbc #$10                        ; PRG $1AA1 | CPU $DAA1 | E9 10
+    tax                             ; PRG $1AA3 | CPU $DAA3 | AA
+    lda SourceRecordPointerLo                       ; PRG $1AA4 | CPU $DAA4 | A5 03
+    clc                             ; PRG $1AA6 | CPU $DAA6 | 18
+    adc #$06                        ; PRG $1AA7 | CPU $DAA7 | 69 06
+    sta SourceRecordPointerLo                       ; PRG $1AA9 | CPU $DAA9 | 85 03
+    txa                             ; PRG $1AAB | CPU $DAAB | 8A
+    sta (SourceRecordPointerLo),y                   ; PRG $1AAC | CPU $DAAC | 91 03
+    dec CurrentSpriteTileId                       ; PRG $1AAE | CPU $DAAE | C6 11
+    bne Flow_DA9C                ; PRG $1AB0 | CPU $DAB0 | D0 EA
+    lda #$20                        ; PRG $1AB2 | CPU $DAB2 | A9 20
+    sta WorkPointerOrValueHi                       ; PRG $1AB4 | CPU $DAB4 | 85 02
+    lda #$8D                        ; PRG $1AB6 | CPU $DAB6 | A9 8D
+    sta WorkPointerOrValueLo                       ; PRG $1AB8 | CPU $DAB8 | 85 01
+    bne UpdateRam_0373_DA82                ; PRG $1ABA | CPU $DABA | D0 C6
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation DABC.
+; Local behavior: Reads CollisionCoordinate, PackedHudOrObjectValue, IndexedGameplayLookupTable_DBA6, IndexedGameplayLookupTable_DBA7, TransformPackedValue_DB15, UpdateRam_0373_DA82; mutates PackedHudOrObjectValue, SourceRecordPointerLo, PackedCoordinateOrValue.
+; Parameters: CollisionCoordinate, PackedHudOrObjectValue, IndexedGameplayLookupTable_DBA6, IndexedGameplayLookupTable_DBA7, TransformPackedValue_DB15, UpdateRam_0373_DA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_DABC:
+    lda CollisionCoordinate                       ; PRG $1ABC | CPU $DABC | A5 C2
+    asl a                           ; PRG $1ABE | CPU $DABE | 0A
+    rol PackedHudOrObjectValue                       ; PRG $1ABF | CPU $DABF | 26 16
+    lsr a                           ; PRG $1AC1 | CPU $DAC1 | 4A
+    lsr a                           ; PRG $1AC2 | CPU $DAC2 | 4A
+    rol PackedHudOrObjectValue                       ; PRG $1AC3 | CPU $DAC3 | 26 16
+    lda PackedHudOrObjectValue                       ; PRG $1AC5 | CPU $DAC5 | A5 16
+    asl a                           ; PRG $1AC7 | CPU $DAC7 | 0A
+    tax                             ; PRG $1AC8 | CPU $DAC8 | AA
+    lda IndexedGameplayLookupTable_DBA6,x                 ; PRG $1AC9 | CPU $DAC9 | BD A6 DB
+    sta SourceRecordPointerLo                       ; PRG $1ACC | CPU $DACC | 85 03
+    lda IndexedGameplayLookupTable_DBA7,x                 ; PRG $1ACE | CPU $DACE | BD A7 DB
+    sta PackedCoordinateOrValue                       ; PRG $1AD1 | CPU $DAD1 | 85 04
+    ldx #$20                        ; PRG $1AD3 | CPU $DAD3 | A2 20
+    ldy #$AF                        ; PRG $1AD5 | CPU $DAD5 | A0 AF
+    jsr TransformPackedValue_DB15                ; PRG $1AD7 | CPU $DAD7 | 20 15 DB
+    jmp UpdateRam_0373_DA82                ; PRG $1ADA | CPU $DADA | 4C 82 DA
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 03 DADD.
+; Local behavior: Reads IndexedGameplayLookupTable_DC24, IndexedGameplayLookupTable_DC25, IndexedGameplayLookupTable_DC26, IndexedGameplayLookupTable_DC27, ExpandPackedScoreOrHudData; mutates SourceRecordPointerLo, PackedCoordinateOrValue, WorkPointerOrValueLo, WorkPointerOrValueHi.
+; Parameters: IndexedGameplayLookupTable_DC24, IndexedGameplayLookupTable_DC25, IndexedGameplayLookupTable_DC26, IndexedGameplayLookupTable_DC27, ExpandPackedScoreOrHudData.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_03_DADD:
+    tax                             ; PRG $1ADD | CPU $DADD | AA
+    lda IndexedGameplayLookupTable_DC24,x                 ; PRG $1ADE | CPU $DADE | BD 24 DC
+    sta SourceRecordPointerLo                       ; PRG $1AE1 | CPU $DAE1 | 85 03
+    lda IndexedGameplayLookupTable_DC25,x                 ; PRG $1AE3 | CPU $DAE3 | BD 25 DC
+    sta PackedCoordinateOrValue                       ; PRG $1AE6 | CPU $DAE6 | 85 04
+    lda IndexedGameplayLookupTable_DC26,x                 ; PRG $1AE8 | CPU $DAE8 | BD 26 DC
+    sta WorkPointerOrValueLo                       ; PRG $1AEB | CPU $DAEB | 85 01
+    lda IndexedGameplayLookupTable_DC27,x                 ; PRG $1AED | CPU $DAED | BD 27 DC
+    sta WorkPointerOrValueHi                       ; PRG $1AF0 | CPU $DAF0 | 85 02
+    jmp ExpandPackedScoreOrHudData                ; PRG $1AF2 | CPU $DAF2 | 4C 51 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value DAF5.
+; Local behavior: Reads CollisionCoordinate, Flow_DAFE; mutates no direct memory mutation observed.
+; Parameters: CollisionCoordinate, Flow_DAFE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_DAF5:
+    ldy #$00                        ; PRG $1AF5 | CPU $DAF5 | A0 00
+    lda CollisionCoordinate                       ; PRG $1AF7 | CPU $DAF7 | A5 C2
+    lsr a                           ; PRG $1AF9 | CPU $DAF9 | 4A
+    bcc Flow_DAFE                ; PRG $1AFA | CPU $DAFA | 90 02
+    ldy #$25                        ; PRG $1AFC | CPU $DAFC | A0 25
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DAFE.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DAFE:
+    ldx #$00                        ; PRG $1AFE | CPU $DAFE | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DB00.
+; Local behavior: Reads IndexedGameplayLookupTable_DB38, Flow_DB00; mutates Ram_06C0, SourceRecordPointerLo, PackedCoordinateOrValue.
+; Parameters: IndexedGameplayLookupTable_DB38, Flow_DB00.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$06; sta PackedCoordinateOrValue; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DB00:
+    lda IndexedGameplayLookupTable_DB38,y                 ; PRG $1B00 | CPU $DB00 | B9 38 DB
+    sta Ram_06C0,x                  ; PRG $1B03 | CPU $DB03 | 9D C0 06
+    iny                             ; PRG $1B06 | CPU $DB06 | C8
+    inx                             ; PRG $1B07 | CPU $DB07 | E8
+    cpx #$30                        ; PRG $1B08 | CPU $DB08 | E0 30
+    bne Flow_DB00                ; PRG $1B0A | CPU $DB0A | D0 F4
+    lda #$C0                        ; PRG $1B0C | CPU $DB0C | A9 C0
+    sta SourceRecordPointerLo                       ; PRG $1B0E | CPU $DB0E | 85 03
+    lda #$06                        ; PRG $1B10 | CPU $DB10 | A9 06
+    sta PackedCoordinateOrValue                       ; PRG $1B12 | CPU $DB12 | 85 04
+    rts                             ; PRG $1B14 | CPU $DB14 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value DB15.
+; Local behavior: Reads CollisionCoordinate, WorkPointerOrValueHi, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi; mutates MetaspriteLayoutPointerHi, MetaspriteLayoutPointerLo, WorkPointerOrValueHi, WorkPointerOrValueLo.
+; Parameters: CollisionCoordinate, WorkPointerOrValueHi, MetaspriteLayoutPointerLo, MetaspriteLayoutPointerHi.
+; Returns: returns to caller; flags/register result depends on final instructions: adc MetaspriteLayoutPointerHi; sta WorkPointerOrValueHi; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_DB15:
+    stx MetaspriteLayoutPointerHi                       ; PRG $1B15 | CPU $DB15 | 86 15
+    sty MetaspriteLayoutPointerLo                       ; PRG $1B17 | CPU $DB17 | 84 14
+    lda #$00                        ; PRG $1B19 | CPU $DB19 | A9 00
+    sta WorkPointerOrValueHi                       ; PRG $1B1B | CPU $DB1B | 85 02
+    lda CollisionCoordinate                       ; PRG $1B1D | CPU $DB1D | A5 C2
+    and #$3E                        ; PRG $1B1F | CPU $DB1F | 29 3E
+    sec                             ; PRG $1B21 | CPU $DB21 | 38
+    sbc #$10                        ; PRG $1B22 | CPU $DB22 | E9 10
+    asl a                           ; PRG $1B24 | CPU $DB24 | 0A
+    asl a                           ; PRG $1B25 | CPU $DB25 | 0A
+    asl a                           ; PRG $1B26 | CPU $DB26 | 0A
+    rol WorkPointerOrValueHi                       ; PRG $1B27 | CPU $DB27 | 26 02
+    asl a                           ; PRG $1B29 | CPU $DB29 | 0A
+    rol WorkPointerOrValueHi                       ; PRG $1B2A | CPU $DB2A | 26 02
+    clc                             ; PRG $1B2C | CPU $DB2C | 18
+    adc MetaspriteLayoutPointerLo                       ; PRG $1B2D | CPU $DB2D | 65 14
+    sta WorkPointerOrValueLo                       ; PRG $1B2F | CPU $DB2F | 85 01
+    lda WorkPointerOrValueHi                       ; PRG $1B31 | CPU $DB31 | A5 02
+    adc MetaspriteLayoutPointerHi                       ; PRG $1B33 | CPU $DB33 | 65 15
+    sta WorkPointerOrValueHi                       ; PRG $1B35 | CPU $DB35 | 85 02
+    rts                             ; PRG $1B37 | CPU $DB37 | 60
+
+IndexedGameplayLookupTable_DB38:
+    .byte $66,$90,$91,$92,$93,$24,$8C,$94,$95,$A7,$A8,$98,$99,$8B,$9A,$A9 ; PRG $1B38 | CPU $DB38
+    .byte $AA,$9D,$9E,$8B,$9F,$A0,$A1,$A2,$8C,$8B,$A3,$A4,$A5,$A6,$8C,$8B ; PRG $1B48 | CPU $DB48
+    .byte $24,$F1,$F2,$24,$8C,$76,$8B,$24,$24,$24,$24,$8C,$AB,$AC,$AD,$AE ; PRG $1B58 | CPU $DB58
+    .byte $AF,$B0,$B1,$B2,$13,$14,$B5,$B6,$8B,$B7,$B8,$B9,$BA,$8C,$8B,$BB ; PRG $1B68 | CPU $DB68
+    .byte $BC,$BD,$BE,$8C,$8B,$24,$24,$24,$24,$8C,$8B,$24,$24,$24,$24,$8C ; PRG $1B78 | CPU $DB78
+
+CodeOrDataPointerTable_DB88:
+    .byte $F3,$F5,$24,$F6,$24,$24,$24,$24,$24,$24,$24,$24,$AB,$F9,$F7,$FA ; PRG $1B88 | CPU $DB88
+    .byte $F8,$24,$24,$24,$24,$24,$24,$24 ; PRG $1B98 | CPU $DB98
+
+IndexedGameplayLookupTable_DBA0:
+    .byte $81,$7E,$82,$7E,$81,$7E ; PRG $1BA0 | CPU $DBA0
+
+IndexedGameplayLookupTable_DBA6:
+    .byte $AE ; PRG $1BA6 | CPU $DBA6
+
+IndexedGameplayLookupTable_DBA7:
+    .byte $DB,$B3,$DB,$B8,$DB,$BD,$DB,$22,$A7,$A8,$A9,$AA,$22,$AD,$AE,$13 ; PRG $1BA7 | CPU $DBA7
+    .byte $14,$22,$96,$97,$9B,$9C,$22,$AD,$AE,$B3,$B4 ; PRG $1BB7 | CPU $DBB7
+
+IndexedGameplayLookupTable_DBC2:
+    .byte $DA ; PRG $1BC2 | CPU $DBC2
+
+IndexedGameplayLookupTable_DBC3:
+    .byte $DB ; PRG $1BC3 | CPU $DBC3
+
+IndexedGameplayLookupTable_DBC4:
+    .byte $8D ; PRG $1BC4 | CPU $DBC4
+
+IndexedGameplayLookupTable_DBC5:
+    .byte $20,$FF,$DB,$8D,$20,$04,$DD,$AE,$20,$09,$DD,$AE,$20,$0E,$DD,$B1 ; PRG $1BC5 | CPU $DBC5
+    .byte $20,$13,$DD,$B1,$20,$66,$8B,$24,$24,$24,$24,$8C,$8B,$BF,$C0,$C1 ; PRG $1BD5 | CPU $DBD5
+    .byte $C2,$C3,$8B,$C4,$C5,$C6,$C7,$C8,$8B,$C9,$CA,$CB,$CC,$24,$8B,$24 ; PRG $1BE5 | CPU $DBE5
+    .byte $CD,$CE,$CF,$D0,$8B,$24,$D1,$D2,$D3,$D4,$66,$8B,$24,$24,$24,$24 ; PRG $1BF5 | CPU $DBF5
+    .byte $8C,$DC,$DB,$DA,$D9,$D8,$8C,$E1,$E0,$DF,$DE,$DD,$8C,$24,$E5,$E4 ; PRG $1C05 | CPU $DC05
+    .byte $E3,$E2,$8C,$E9,$E8,$E7,$E6,$24,$8C,$ED,$EC,$EB,$EA,$24,$8C ; PRG $1C15 | CPU $DC15
+
+IndexedGameplayLookupTable_DC24:
+    .byte $4C ; PRG $1C24 | CPU $DC24
+
+IndexedGameplayLookupTable_DC25:
+    .byte $DC ; PRG $1C25 | CPU $DC25
+
+IndexedGameplayLookupTable_DC26:
+    .byte $EA ; PRG $1C26 | CPU $DC26
+
+IndexedGameplayLookupTable_DC27:
+    .byte $20,$7A,$DC,$EA,$20,$A8,$DC,$ED,$20,$D6,$DC,$ED,$20,$04,$DD,$EA ; PRG $1C27 | CPU $DC27
+    .byte $20,$09,$DD,$EA,$20,$0E,$DD,$F5,$20,$13,$DD,$F5,$20,$18,$DD,$AD ; PRG $1C37 | CPU $DC37
+    .byte $21,$31,$DD,$6D,$21,$59,$24,$24,$24,$AB,$AC,$AD,$AE,$AF,$B0,$24 ; PRG $1C47 | CPU $DC47
+    .byte $24,$24,$B1,$B2,$B3,$B4,$B5,$B6,$24,$24,$24,$8B,$B7,$B8,$B9,$BA ; PRG $1C57 | CPU $DC57
+    .byte $8C,$24,$24,$24,$8B,$BB,$BC,$BD,$BE,$8C,$24,$24,$24,$8B,$24,$24 ; PRG $1C67 | CPU $DC67
+    .byte $24,$24,$8C,$59,$BF,$C0,$C1,$C2,$C3,$24,$24,$24,$8C,$C4,$C5,$C6 ; PRG $1C77 | CPU $DC77
+    .byte $C7,$C8,$24,$24,$24,$8C,$C9,$CA,$CB,$CC,$24,$24,$24,$24,$8C,$24 ; PRG $1C87 | CPU $DC87
+    .byte $CD,$CE,$CF,$D0,$24,$24,$24,$8C,$24,$D1,$D2,$D3,$D4,$24,$24,$24 ; PRG $1C97 | CPU $DC97
+    .byte $8C,$59,$AB,$AC,$AD,$AE,$AF,$B0,$24,$24,$24,$B1,$B2,$B3,$B4,$B5 ; PRG $1CA7 | CPU $DCA7
+    .byte $B6,$24,$24,$24,$8B,$B7,$B8,$B9,$BA,$8C,$24,$24,$24,$8B,$BB,$BC ; PRG $1CB7 | CPU $DCB7
+    .byte $BD,$BE,$8C,$24,$24,$24,$8B,$24,$24,$24,$24,$8C,$24,$24,$24,$59 ; PRG $1CC7 | CPU $DCC7
+    .byte $8B,$24,$24,$24,$DC,$DB,$DA,$D9,$D8,$8B,$24,$24,$24,$E1,$E0,$DF ; PRG $1CD7 | CPU $DCD7
+    .byte $DE,$DD,$8B,$24,$24,$24,$24,$E5,$E4,$E3,$E2,$8B,$24,$24,$24,$E9 ; PRG $1CE7 | CPU $DCE7
+    .byte $E8,$E7,$E6,$24,$8B,$24,$24,$24,$ED,$EC,$EB,$EA,$24,$41,$BF,$C4 ; PRG $1CF7 | CPU $DCF7
+    .byte $C9,$24,$41,$24,$D5,$D6,$D7,$41,$D8,$DD,$E2,$24,$41,$24,$EE,$EF ; PRG $1D07 | CPU $DD07
+    .byte $F0,$46,$8B,$24,$24,$24,$24,$8C,$24,$24,$24,$24,$24,$24,$24,$24 ; PRG $1D17 | CPU $DD17
+    .byte $24,$24,$24,$24,$24,$24,$24,$24,$24,$24,$46,$8B,$24,$24,$24,$24 ; PRG $1D27 | CPU $DD27
+    .byte $8C,$24,$24,$24,$24,$24,$24,$24,$24,$24,$24,$24,$24,$81,$24,$24 ; PRG $1D37 | CPU $DD37
+    .byte $24,$24,$7E ; PRG $1D47 | CPU $DD47
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DD4 A.
+; Local behavior: Reads Ram_0381, Flow_DD57, UpdateRam_0398_DD60, Flow_DD5D; mutates no direct memory mutation observed.
+; Parameters: Ram_0381, Flow_DD57, UpdateRam_0398_DD60, Flow_DD5D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DD4A:
+    ldx #$80                        ; PRG $1D4A | CPU $DD4A | A2 80
+    ldy Ram_0381                    ; PRG $1D4C | CPU $DD4C | AC 81 03
+    beq Flow_DD57                ; PRG $1D4F | CPU $DD4F | F0 06
+    cpy #$03                        ; PRG $1D51 | CPU $DD51 | C0 03
+    beq UpdateRam_0398_DD60                ; PRG $1D53 | CPU $DD53 | F0 0B
+    bne Flow_DD5D                ; PRG $1D55 | CPU $DD55 | D0 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DD57.
+; Local behavior: Reads UpdateRam_0301_CEE5, UpdateRam_0398_DD60; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_0301_CEE5, UpdateRam_0398_DD60.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DD57:
+    jsr UpdateRam_0301_CEE5                ; PRG $1D57 | CPU $DD57 | 20 E5 CE
+    jmp UpdateRam_0398_DD60                ; PRG $1D5A | CPU $DD5A | 4C 60 DD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DD5 D.
+; Local behavior: Reads ComputeOrDispatch_CEBF; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_CEBF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DD5D:
+    jsr ComputeOrDispatch_CEBF                ; PRG $1D5D | CPU $DD5D | 20 BF CE
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0398 DD60.
+; Local behavior: Reads LoadObjectSpriteRenderState, Ram_0388, AdvanceObjectRecordPointer; mutates Ram_0398.
+; Parameters: LoadObjectSpriteRenderState, Ram_0388, AdvanceObjectRecordPointer.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr AdvanceObjectRecordPointer; jsr LoadObjectSpriteRenderState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0398_DD60:
+    jsr LoadObjectSpriteRenderState                ; PRG $1D60 | CPU $DD60 | 20 17 C2
+    lda Ram_0388                    ; PRG $1D63 | CPU $DD63 | AD 88 03
+    sta Ram_0398                    ; PRG $1D66 | CPU $DD66 | 8D 98 03
+    jsr AdvanceObjectRecordPointer                ; PRG $1D69 | CPU $DD69 | 20 0F C2
+    jsr LoadObjectSpriteRenderState                ; PRG $1D6C | CPU $DD6C | 20 17 C2
+    rts                             ; PRG $1D6F | CPU $DD6F | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DD70.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DD70:
+    rts                             ; PRG $1D70 | CPU $DD70 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State DD71.
+; Local behavior: Reads Ram_0380, Flow_DD70, ScreenCollisionState, Flow_DD8D, Flow_DD4A; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride, OamBufferWriteOffset.
+; Parameters: Ram_0380, Flow_DD70, ScreenCollisionState, Flow_DD8D, Flow_DD4A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_DD71:
+    lda Ram_0380                    ; PRG $1D71 | CPU $DD71 | AD 80 03
+    beq Flow_DD70                ; PRG $1D74 | CPU $DD74 | F0 FA
+    lda #$80                        ; PRG $1D76 | CPU $DD76 | A9 80
+    sta ObjectRecordPointerLo                       ; PRG $1D78 | CPU $DD78 | 85 A8
+    lda #$03                        ; PRG $1D7A | CPU $DD7A | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $1D7C | CPU $DD7C | 85 A9
+    lda #$10                        ; PRG $1D7E | CPU $DD7E | A9 10
+    sta ObjectRecordStride                       ; PRG $1D80 | CPU $DD80 | 85 AA
+    ldx #$00                        ; PRG $1D82 | CPU $DD82 | A2 00
+    stx OamBufferWriteOffset                       ; PRG $1D84 | CPU $DD84 | 86 AB
+    ldy ScreenCollisionState                       ; PRG $1D86 | CPU $DD86 | A4 44
+    beq Flow_DD8D                ; PRG $1D88 | CPU $DD88 | F0 03
+    dey                             ; PRG $1D8A | CPU $DD8A | 88
+    bne Flow_DD4A                ; PRG $1D8B | CPU $DD8B | D0 BD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DD8 D.
+; Local behavior: Reads OamBufferWriteOffset, Ram_0380, Flow_DDCD, Ram_038E, Flow_DDA1; mutates Ram_038E, Ram_038B.
+; Parameters: OamBufferWriteOffset, Ram_0380, Flow_DDCD, Ram_038E, Flow_DDA1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DD8D:
+    ldx OamBufferWriteOffset                       ; PRG $1D8D | CPU $DD8D | A6 AB
+    lda Ram_0380,x                  ; PRG $1D8F | CPU $DD8F | BD 80 03
+    beq Flow_DDCD                ; PRG $1D92 | CPU $DD92 | F0 39
+    lda Ram_038E,x                  ; PRG $1D94 | CPU $DD94 | BD 8E 03
+    beq Flow_DDA1                ; PRG $1D97 | CPU $DD97 | F0 08
+    dec Ram_038E,x                  ; PRG $1D99 | CPU $DD99 | DE 8E 03
+    lda #$0A                        ; PRG $1D9C | CPU $DD9C | A9 0A
+    sta Ram_038B,x                  ; PRG $1D9E | CPU $DD9E | 9D 8B 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DDA1.
+; Local behavior: Reads Ram_038B, Flow_DDC5, Flow_DDB2; mutates Ram_038B, AudioPendingFlags.
+; Parameters: Ram_038B, Flow_DDC5, Flow_DDB2.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DDA1:
+    lda Ram_038B,x                  ; PRG $1DA1 | CPU $DDA1 | BD 8B 03
+    beq Flow_DDC5                ; PRG $1DA4 | CPU $DDA4 | F0 1F
+    dec Ram_038B,x                  ; PRG $1DA6 | CPU $DDA6 | DE 8B 03
+    pha                             ; PRG $1DA9 | CPU $DDA9 | 48
+    and #$04                        ; PRG $1DAA | CPU $DDAA | 29 04
+    bne Flow_DDB2                ; PRG $1DAC | CPU $DDAC | D0 04
+    lda #$08                        ; PRG $1DAE | CPU $DDAE | A9 08
+    sta AudioPendingFlags                       ; PRG $1DB0 | CPU $DDB0 | 85 FD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DDB2.
+; Local behavior: Reads Flow_DDBF; mutates PackedHudOrObjectValue.
+; Parameters: Flow_DDBF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DDB2:
+    pla                             ; PRG $1DB2 | CPU $DDB2 | 68
+    and #$02                        ; PRG $1DB3 | CPU $DDB3 | 29 02
+    sta PackedHudOrObjectValue                       ; PRG $1DB5 | CPU $DDB5 | 85 16
+    lda #$48                        ; PRG $1DB7 | CPU $DDB7 | A9 48
+    cpx #$00                        ; PRG $1DB9 | CPU $DDB9 | E0 00
+    beq Flow_DDBF                ; PRG $1DBB | CPU $DDBB | F0 02
+    lda #$B8                        ; PRG $1DBD | CPU $DDBD | A9 B8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DDBF.
+; Local behavior: Reads PackedHudOrObjectValue; mutates Ram_0389.
+; Parameters: PackedHudOrObjectValue.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DDBF:
+    clc                             ; PRG $1DBF | CPU $DDBF | 18
+    adc PackedHudOrObjectValue                       ; PRG $1DC0 | CPU $DDC0 | 65 16
+    sta Ram_0389,x                  ; PRG $1DC2 | CPU $DDC2 | 9D 89 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DDC5.
+; Local behavior: Reads Ram_038D, Flow_DDCD, UpdateRam_038D_DDDF; mutates no direct memory mutation observed.
+; Parameters: Ram_038D, Flow_DDCD, UpdateRam_038D_DDDF.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DDC5:
+    lda Ram_038D                    ; PRG $1DC5 | CPU $DDC5 | AD 8D 03
+    beq Flow_DDCD                ; PRG $1DC8 | CPU $DDC8 | F0 03
+    jsr UpdateRam_038D_DDDF                ; PRG $1DCA | CPU $DDCA | 20 DF DD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DDCD.
+; Local behavior: Reads LoadObjectSpriteRenderState, AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_DD8D; mutates OamBufferWriteOffset.
+; Parameters: LoadObjectSpriteRenderState, AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_DD8D.
+; Returns: returns to caller; flags/register result depends on final instructions: cmp #$20; bne Flow_DD8D; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DDCD:
+    jsr LoadObjectSpriteRenderState                ; PRG $1DCD | CPU $DDCD | 20 17 C2
+    jsr AdvanceObjectRecordPointer                ; PRG $1DD0 | CPU $DDD0 | 20 0F C2
+    lda OamBufferWriteOffset                       ; PRG $1DD3 | CPU $DDD3 | A5 AB
+    clc                             ; PRG $1DD5 | CPU $DDD5 | 18
+    adc #$10                        ; PRG $1DD6 | CPU $DDD6 | 69 10
+    sta OamBufferWriteOffset                       ; PRG $1DD8 | CPU $DDD8 | 85 AB
+    cmp #$20                        ; PRG $1DDA | CPU $DDDA | C9 20
+    bne Flow_DD8D                ; PRG $1DDC | CPU $DDDC | D0 AF
+    rts                             ; PRG $1DDE | CPU $DDDE | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 038 D DDDF.
+; Local behavior: Reads SelectDigitGlyphTable; mutates Ram_038D, Ram_0380, Ram_0390, Ram_0386, Ram_0396.
+; Parameters: SelectDigitGlyphTable.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$09; jsr SelectDigitGlyphTable; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_038D_DDDF:
+    lda #$00                        ; PRG $1DDF | CPU $DDDF | A9 00
+    sta Ram_038D                    ; PRG $1DE1 | CPU $DDE1 | 8D 8D 03
+    sta Ram_0380                    ; PRG $1DE4 | CPU $DDE4 | 8D 80 03
+    sta Ram_0390                    ; PRG $1DE7 | CPU $DDE7 | 8D 90 03
+    lda #$47                        ; PRG $1DEA | CPU $DDEA | A9 47
+    sta Ram_0386                    ; PRG $1DEC | CPU $DDEC | 8D 86 03
+    sta Ram_0396                    ; PRG $1DEF | CPU $DDEF | 8D 96 03
+    lda #$09                        ; PRG $1DF2 | CPU $DDF2 | A9 09
+    jsr SelectDigitGlyphTable                ; PRG $1DF4 | CPU $DDF4 | 20 99 C4
+    rts                             ; PRG $1DF7 | CPU $DDF7 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch DDF8.
+; Local behavior: Reads SelectDigitGlyphTable; mutates no direct memory mutation observed.
+; Parameters: SelectDigitGlyphTable.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_DDF8:
+    lda #$0A                        ; PRG $1DF8 | CPU $DDF8 | A9 0A
+    jsr SelectDigitGlyphTable                ; PRG $1DFA | CPU $DDFA | 20 99 C4
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0380 DDFD.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_0380, Ram_0390, Ram_0386, Ram_0396, Ram_0388, Ram_0398, Ram_0389, Ram_0399.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: dey; sty Ram_0381; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0380_DDFD:
+    ldy #$01                        ; PRG $1DFD | CPU $DDFD | A0 01
+    sty Ram_0380                    ; PRG $1DFF | CPU $DDFF | 8C 80 03
+    sty Ram_0390                    ; PRG $1E02 | CPU $DE02 | 8C 90 03
+    lda #$4E                        ; PRG $1E05 | CPU $DE05 | A9 4E
+    sta Ram_0386                    ; PRG $1E07 | CPU $DE07 | 8D 86 03
+    sta Ram_0396                    ; PRG $1E0A | CPU $DE0A | 8D 96 03
+    lda #$38                        ; PRG $1E0D | CPU $DE0D | A9 38
+    sta Ram_0388                    ; PRG $1E0F | CPU $DE0F | 8D 88 03
+    sta Ram_0398                    ; PRG $1E12 | CPU $DE12 | 8D 98 03
+    lda #$48                        ; PRG $1E15 | CPU $DE15 | A9 48
+    sta Ram_0389                    ; PRG $1E17 | CPU $DE17 | 8D 89 03
+    lda #$B8                        ; PRG $1E1A | CPU $DE1A | A9 B8
+    sta Ram_0399                    ; PRG $1E1C | CPU $DE1C | 8D 99 03
+    lda #$B0                        ; PRG $1E1F | CPU $DE1F | A9 B0
+    sta Ram_038A                    ; PRG $1E21 | CPU $DE21 | 8D 8A 03
+    lda #$C0                        ; PRG $1E24 | CPU $DE24 | A9 C0
+    sta Ram_039A                    ; PRG $1E26 | CPU $DE26 | 8D 9A 03
+    dey                             ; PRG $1E29 | CPU $DE29 | 88
+    sty Ram_0381                    ; PRG $1E2A | CPU $DE2A | 8C 81 03
+    rts                             ; PRG $1E2D | CPU $DE2D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State DE2 E.
+; Local behavior: Reads ScreenObjectMode, Flow_DE61, ScreenCollisionState, Flow_DE5E; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, Ram_03B0, Ram_03B6, Ram_03B7, Ram_03B8, Ram_03B9, Ram_03BA.
+; Parameters: ScreenObjectMode, Flow_DE61, ScreenCollisionState, Flow_DE5E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_DE2E:
+    lda ScreenObjectMode                       ; PRG $1E2E | CPU $DE2E | A5 62
+    cmp #$02                        ; PRG $1E30 | CPU $DE30 | C9 02
+    bne Flow_DE61                ; PRG $1E32 | CPU $DE32 | D0 2D
+    lda #$B0                        ; PRG $1E34 | CPU $DE34 | A9 B0
+    sta ObjectRecordPointerLo                       ; PRG $1E36 | CPU $DE36 | 85 A8
+    lda #$03                        ; PRG $1E38 | CPU $DE38 | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $1E3A | CPU $DE3A | 85 A9
+    lda ScreenCollisionState                       ; PRG $1E3C | CPU $DE3C | A5 44
+    bne Flow_DE5E                ; PRG $1E3E | CPU $DE3E | D0 1E
+    lda #$01                        ; PRG $1E40 | CPU $DE40 | A9 01
+    sta Ram_03B0                    ; PRG $1E42 | CPU $DE42 | 8D B0 03
+    lda #$4F                        ; PRG $1E45 | CPU $DE45 | A9 4F
+    sta Ram_03B6                    ; PRG $1E47 | CPU $DE47 | 8D B6 03
+    lda #$00                        ; PRG $1E4A | CPU $DE4A | A9 00
+    sta Ram_03B7                    ; PRG $1E4C | CPU $DE4C | 8D B7 03
+    lda #$28                        ; PRG $1E4F | CPU $DE4F | A9 28
+    sta Ram_03B8                    ; PRG $1E51 | CPU $DE51 | 8D B8 03
+    lda #$80                        ; PRG $1E54 | CPU $DE54 | A9 80
+    sta Ram_03B9                    ; PRG $1E56 | CPU $DE56 | 8D B9 03
+    lda #$60                        ; PRG $1E59 | CPU $DE59 | A9 60
+    sta Ram_03BA                    ; PRG $1E5B | CPU $DE5B | 8D BA 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DE5 E.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DE5E:
+    jsr LoadObjectSpriteRenderState                ; PRG $1E5E | CPU $DE5E | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DE61.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DE61:
+    rts                             ; PRG $1E61 | CPU $DE61 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 50 DE62.
+; Local behavior: Reads ScreenObjectMode, Flow_DE77, ScreenVariantInitialState; mutates GameplayObjectState, GameplayObjectX, Ram_04E0, GameplayObjectTimer.
+; Parameters: ScreenObjectMode, Flow_DE77, ScreenVariantInitialState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_50_DE62:
+    lda ScreenObjectMode                       ; PRG $1E62 | CPU $DE62 | A5 62
+    cmp #$02                        ; PRG $1E64 | CPU $DE64 | C9 02
+    bne Flow_DE77                ; PRG $1E66 | CPU $DE66 | D0 0F
+    lda ScreenVariantInitialState                       ; PRG $1E68 | CPU $DE68 | A5 78
+    sta GameplayObjectState                       ; PRG $1E6A | CPU $DE6A | 85 50
+    lda #$00                        ; PRG $1E6C | CPU $DE6C | A9 00
+    sta GameplayObjectX                       ; PRG $1E6E | CPU $DE6E | 85 52
+    sta Ram_04E0                    ; PRG $1E70 | CPU $DE70 | 8D E0 04
+    lda #$20                        ; PRG $1E73 | CPU $DE73 | A9 20
+    sta GameplayObjectTimer                       ; PRG $1E75 | CPU $DE75 | 85 51
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DE77.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DE77:
+    rts                             ; PRG $1E77 | CPU $DE77 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State DE78.
+; Local behavior: Reads ScreenCollisionState, Flow_DECC, FrameCounter, GameplayObjectTimer, GameplayObjectState, ActorCollisionOrStateTable_DECD, Ram_0371, Flow_DEBA; mutates GameplayObjectTimer, Ram_04EF, Ram_04E5, Ram_04E2, Ram_04E0, Ram_04E3, Ram_04E1, Ram_04EE.
+; Parameters: ScreenCollisionState, Flow_DECC, FrameCounter, GameplayObjectTimer, GameplayObjectState, ActorCollisionOrStateTable_DECD, Ram_0371, Flow_DEBA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_DE78:
+    lda ScreenCollisionState                       ; PRG $1E78 | CPU $DE78 | A5 44
+    cmp #$01                        ; PRG $1E7A | CPU $DE7A | C9 01
+    bne Flow_DECC                ; PRG $1E7C | CPU $DE7C | D0 4E
+    lda FrameCounter                       ; PRG $1E7E | CPU $DE7E | A5 27
+    and #$0F                        ; PRG $1E80 | CPU $DE80 | 29 0F
+    bne Flow_DECC                ; PRG $1E82 | CPU $DE82 | D0 48
+    dec GameplayObjectTimer                       ; PRG $1E84 | CPU $DE84 | C6 51
+    bne Flow_DECC                ; PRG $1E86 | CPU $DE86 | D0 44
+    ldy GameplayObjectState                       ; PRG $1E88 | CPU $DE88 | A4 50
+    lda ActorCollisionOrStateTable_DECD,y                 ; PRG $1E8A | CPU $DE8A | B9 CD DE
+    sta GameplayObjectTimer                       ; PRG $1E8D | CPU $DE8D | 85 51
+    lda Ram_0371                    ; PRG $1E8F | CPU $DE8F | AD 71 03
+    cmp #$6E                        ; PRG $1E92 | CPU $DE92 | C9 6E
+    bcs Flow_DEBA                ; PRG $1E94 | CPU $DE94 | B0 24
+    lda ScreenEffectState                       ; PRG $1E96 | CPU $DE96 | A5 4E
+    cmp #$03                        ; PRG $1E98 | CPU $DE98 | C9 03
+    bcc Flow_DEBA                ; PRG $1E9A | CPU $DE9A | 90 1E
+    lda GameplayObjectX                       ; PRG $1E9C | CPU $DE9C | A5 52
+    sta Ram_04EF                    ; PRG $1E9E | CPU $DE9E | 8D EF 04
+    ldy #$74                        ; PRG $1EA1 | CPU $DEA1 | A0 74
+    sty Ram_04E5                    ; PRG $1EA3 | CPU $DEA3 | 8C E5 04
+    ldy #$02                        ; PRG $1EA6 | CPU $DEA6 | A0 02
+    sty Ram_04E2                    ; PRG $1EA8 | CPU $DEA8 | 8C E2 04
+    ldy #$01                        ; PRG $1EAB | CPU $DEAB | A0 01
+    sty Ram_04E0                    ; PRG $1EAD | CPU $DEAD | 8C E0 04
+    sty Ram_04E3                    ; PRG $1EB0 | CPU $DEB0 | 8C E3 04
+    dey                             ; PRG $1EB3 | CPU $DEB3 | 88
+    sty Ram_04E1                    ; PRG $1EB4 | CPU $DEB4 | 8C E1 04
+    sty Ram_04EE                    ; PRG $1EB7 | CPU $DEB7 | 8C EE 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DEBA.
+; Local behavior: Reads GameplayObjectX, Flow_DECC, GameplayObjectState; mutates GameplayObjectX, GameplayObjectState.
+; Parameters: GameplayObjectX, Flow_DECC, GameplayObjectState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DEBA:
+    ldy GameplayObjectX                       ; PRG $1EBA | CPU $DEBA | A4 52
+    iny                             ; PRG $1EBC | CPU $DEBC | C8
+    tya                             ; PRG $1EBD | CPU $DEBD | 98
+    and #$03                        ; PRG $1EBE | CPU $DEBE | 29 03
+    sta GameplayObjectX                       ; PRG $1EC0 | CPU $DEC0 | 85 52
+    bne Flow_DECC                ; PRG $1EC2 | CPU $DEC2 | D0 08
+    lda GameplayObjectState                       ; PRG $1EC4 | CPU $DEC4 | A5 50
+    cmp #$08                        ; PRG $1EC6 | CPU $DEC6 | C9 08
+    beq Flow_DECC                ; PRG $1EC8 | CPU $DEC8 | F0 02
+    inc GameplayObjectState                       ; PRG $1ECA | CPU $DECA | E6 50
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DECC.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DECC:
+    rts                             ; PRG $1ECC | CPU $DECC | 60
+
+ActorCollisionOrStateTable_DECD:
+    .byte $24,$20,$1C,$18,$14,$10,$0E,$0C ; PRG $1ECD | CPU $DECD
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State DED5.
+; Local behavior: Reads ScreenObjectMode, Flow_DECC, ScreenCollisionState, EvaluateCollisionState_DE78, Ram_04E0, Ram_04E1, Flow_DEFD, Flow_DF24; mutates ObjectRecordPointerLo, ObjectRecordPointerHi.
+; Parameters: ScreenObjectMode, Flow_DECC, ScreenCollisionState, EvaluateCollisionState_DE78, Ram_04E0, Ram_04E1, Flow_DEFD, Flow_DF24.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_DED5:
+    lda ScreenObjectMode                       ; PRG $1ED5 | CPU $DED5 | A5 62
+    cmp #$02                        ; PRG $1ED7 | CPU $DED7 | C9 02
+    bne Flow_DECC                ; PRG $1ED9 | CPU $DED9 | D0 F1
+    lda ScreenCollisionState                       ; PRG $1EDB | CPU $DEDB | A5 44
+    beq Flow_DECC                ; PRG $1EDD | CPU $DEDD | F0 ED
+    jsr EvaluateCollisionState_DE78                ; PRG $1EDF | CPU $DEDF | 20 78 DE
+    lda Ram_04E0                    ; PRG $1EE2 | CPU $DEE2 | AD E0 04
+    beq Flow_DECC                ; PRG $1EE5 | CPU $DEE5 | F0 E5
+    lda #$E0                        ; PRG $1EE7 | CPU $DEE7 | A9 E0
+    sta ObjectRecordPointerLo                       ; PRG $1EE9 | CPU $DEE9 | 85 A8
+    lda #$04                        ; PRG $1EEB | CPU $DEEB | A9 04
+    sta ObjectRecordPointerHi                       ; PRG $1EED | CPU $DEED | 85 A9
+    ldy Ram_04E1                    ; PRG $1EEF | CPU $DEEF | AC E1 04
+    beq Flow_DEFD                ; PRG $1EF2 | CPU $DEF2 | F0 09
+    dey                             ; PRG $1EF4 | CPU $DEF4 | 88
+    beq Flow_DF24                ; PRG $1EF5 | CPU $DEF5 | F0 2D
+    dey                             ; PRG $1EF7 | CPU $DEF7 | 88
+    beq Flow_DF51                ; PRG $1EF8 | CPU $DEF8 | F0 57
+    dey                             ; PRG $1EFA | CPU $DEFA | 88
+    beq Flow_DF66                ; PRG $1EFB | CPU $DEFB | F0 69
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DEFD.
+; Local behavior: Reads Ram_04EF, Flow_DF1C; mutates Ram_04EA, Ram_04E6, Ram_04E8, Ram_04ED.
+; Parameters: Ram_04EF, Flow_DF1C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DEFD:
+    lda #$40                        ; PRG $1EFD | CPU $DEFD | A9 40
+    sta Ram_04EA                    ; PRG $1EFF | CPU $DEFF | 8D EA 04
+    lda #$0C                        ; PRG $1F02 | CPU $DF02 | A9 0C
+    sta Ram_04E6                    ; PRG $1F04 | CPU $DF04 | 8D E6 04
+    lda #$28                        ; PRG $1F07 | CPU $DF07 | A9 28
+    sta Ram_04E8                    ; PRG $1F09 | CPU $DF09 | 8D E8 04
+    lda #$0A                        ; PRG $1F0C | CPU $DF0C | A9 0A
+    sta Ram_04ED                    ; PRG $1F0E | CPU $DF0E | 8D ED 04
+    lda Ram_04EF                    ; PRG $1F11 | CPU $DF11 | AD EF 04
+    lsr a                           ; PRG $1F14 | CPU $DF14 | 4A
+    lsr a                           ; PRG $1F15 | CPU $DF15 | 4A
+    ldx #$70                        ; PRG $1F16 | CPU $DF16 | A2 70
+    bcs Flow_DF1C                ; PRG $1F18 | CPU $DF18 | B0 02
+    ldx #$90                        ; PRG $1F1A | CPU $DF1A | A2 90
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF1 C.
+; Local behavior: Reads Ram_04E1, Flow_DF84; mutates Ram_04E9, Ram_04E1.
+; Parameters: Ram_04E1, Flow_DF84.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF1C:
+    stx Ram_04E9                    ; PRG $1F1C | CPU $DF1C | 8E E9 04
+    inc Ram_04E1                    ; PRG $1F1F | CPU $DF1F | EE E1 04
+    bne Flow_DF84                ; PRG $1F22 | CPU $DF22 | D0 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF24.
+; Local behavior: Reads Ram_04E8, Ram_0368, Flow_DF84, Ram_04E1, Ram_04EF, Flow_DF4C; mutates Ram_04E8, Ram_04E1, Ram_04EB, Ram_0377.
+; Parameters: Ram_04E8, Ram_0368, Flow_DF84, Ram_04E1, Ram_04EF, Flow_DF4C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF24:
+    inc Ram_04E8                    ; PRG $1F24 | CPU $DF24 | EE E8 04
+    inc Ram_04E8                    ; PRG $1F27 | CPU $DF27 | EE E8 04
+    lda Ram_0368                    ; PRG $1F2A | CPU $DF2A | AD 68 03
+    sec                             ; PRG $1F2D | CPU $DF2D | 38
+    sbc #$12                        ; PRG $1F2E | CPU $DF2E | E9 12
+    cmp Ram_04E8                    ; PRG $1F30 | CPU $DF30 | CD E8 04
+    bcs Flow_DF84                ; PRG $1F33 | CPU $DF33 | B0 4F
+    inc Ram_04E1                    ; PRG $1F35 | CPU $DF35 | EE E1 04
+    lda #$30                        ; PRG $1F38 | CPU $DF38 | A9 30
+    sta Ram_04EB                    ; PRG $1F3A | CPU $DF3A | 8D EB 04
+    lda #$38                        ; PRG $1F3D | CPU $DF3D | A9 38
+    sta Ram_0377                    ; PRG $1F3F | CPU $DF3F | 8D 77 03
+    ldy #$80                        ; PRG $1F42 | CPU $DF42 | A0 80
+    lda Ram_04EF                    ; PRG $1F44 | CPU $DF44 | AD EF 04
+    lsr a                           ; PRG $1F47 | CPU $DF47 | 4A
+    lsr a                           ; PRG $1F48 | CPU $DF48 | 4A
+    bcs Flow_DF4C                ; PRG $1F49 | CPU $DF49 | B0 01
+    iny                             ; PRG $1F4B | CPU $DF4B | C8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF4 C.
+; Local behavior: Reads Flow_DF84; mutates Ram_0374.
+; Parameters: Flow_DF84.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF4C:
+    sty Ram_0374                    ; PRG $1F4C | CPU $DF4C | 8C 74 03
+    bne Flow_DF84                ; PRG $1F4F | CPU $DF4F | D0 33
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF51.
+; Local behavior: Reads Ram_04EB, Flow_DF84, Ram_04E1, UpdateRam_04A4_EA9F; mutates Ram_04EB, AudioEffectRequest, Ram_04E1.
+; Parameters: Ram_04EB, Flow_DF84, Ram_04E1, UpdateRam_04A4_EA9F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF51:
+    dec Ram_04EB                    ; PRG $1F51 | CPU $DF51 | CE EB 04
+    bne Flow_DF84                ; PRG $1F54 | CPU $DF54 | D0 2E
+    lda #$04                        ; PRG $1F56 | CPU $DF56 | A9 04
+    sta AudioEffectRequest                       ; PRG $1F58 | CPU $DF58 | 85 FE
+    inc Ram_04E1                    ; PRG $1F5A | CPU $DF5A | EE E1 04
+    ldx #$40                        ; PRG $1F5D | CPU $DF5D | A2 40
+    lda #$03                        ; PRG $1F5F | CPU $DF5F | A9 03
+    jsr UpdateRam_04A4_EA9F                ; PRG $1F61 | CPU $DF61 | 20 9F EA
+    bne Flow_DF84                ; PRG $1F64 | CPU $DF64 | D0 1E
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF66.
+; Local behavior: Reads Ram_04EE, Flow_DF88, CalculateAndClampValue_EB36, Ram_04E0, Flow_DF81; mutates no direct memory mutation observed.
+; Parameters: Ram_04EE, Flow_DF88, CalculateAndClampValue_EB36, Ram_04E0, Flow_DF81.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF66:
+    lda Ram_04EE                    ; PRG $1F66 | CPU $DF66 | AD EE 04
+    bne Flow_DF88                ; PRG $1F69 | CPU $DF69 | D0 1D
+    ldx #$40                        ; PRG $1F6B | CPU $DF6B | A2 40
+    jsr CalculateAndClampValue_EB36                ; PRG $1F6D | CPU $DF6D | 20 36 EB
+    lda Ram_04E0                    ; PRG $1F70 | CPU $DF70 | AD E0 04
+    bne Flow_DF81                ; PRG $1F73 | CPU $DF73 | D0 0C
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF75.
+; Local behavior: Reads Flow_DF84; mutates Ram_04E0, Ram_04E6.
+; Parameters: Flow_DF84.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF75:
+    lda #$00                        ; PRG $1F75 | CPU $DF75 | A9 00
+    sta Ram_04E0                    ; PRG $1F77 | CPU $DF77 | 8D E0 04
+    lda #$47                        ; PRG $1F7A | CPU $DF7A | A9 47
+    sta Ram_04E6                    ; PRG $1F7C | CPU $DF7C | 8D E6 04
+    bne Flow_DF84                ; PRG $1F7F | CPU $DF7F | D0 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF81.
+; Local behavior: Reads ComputeOrDispatch_C2B4; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_C2B4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF81:
+    jsr ComputeOrDispatch_C2B4                ; PRG $1F81 | CPU $DF81 | 20 B4 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF84.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr LoadObjectSpriteRenderState; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF84:
+    jsr LoadObjectSpriteRenderState                ; PRG $1F84 | CPU $DF84 | 20 17 C2
+    rts                             ; PRG $1F87 | CPU $DF87 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DF88.
+; Local behavior: Reads ScreenCollisionState, Flow_DF84, GameplayStateFlags, Flow_DF75; mutates no direct memory mutation observed.
+; Parameters: ScreenCollisionState, Flow_DF84, GameplayStateFlags, Flow_DF75.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DF88:
+    lda ScreenCollisionState                       ; PRG $1F88 | CPU $DF88 | A5 44
+    cmp #$01                        ; PRG $1F8A | CPU $DF8A | C9 01
+    beq Flow_DF84                ; PRG $1F8C | CPU $DF8C | F0 F6
+    lda GameplayStateFlags                       ; PRG $1F8E | CPU $DF8E | A5 23
+    beq Flow_DF75                ; PRG $1F90 | CPU $DF90 | F0 E3
+    bne Flow_DF84                ; PRG $1F92 | CPU $DF92 | D0 F0
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State DF94.
+; Local behavior: Reads ScreenCollisionState, Flow_DFDB; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride, ObjectSlotOrFieldIndex, OamBufferWriteOffset.
+; Parameters: ScreenCollisionState, Flow_DFDB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_DF94:
+    lda ScreenCollisionState                       ; PRG $1F94 | CPU $DF94 | A5 44
+    beq Flow_DFDB                ; PRG $1F96 | CPU $DF96 | F0 43
+    lda #$00                        ; PRG $1F98 | CPU $DF98 | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $1F9A | CPU $DF9A | 85 A8
+    lda #$04                        ; PRG $1F9C | CPU $DF9C | A9 04
+    sta ObjectRecordPointerHi                       ; PRG $1F9E | CPU $DF9E | 85 A9
+    lda #$20                        ; PRG $1FA0 | CPU $DFA0 | A9 20
+    sta ObjectRecordStride                       ; PRG $1FA2 | CPU $DFA2 | 85 AA
+    lda #$00                        ; PRG $1FA4 | CPU $DFA4 | A9 00
+    sta ObjectSlotOrFieldIndex                       ; PRG $1FA6 | CPU $DFA6 | 85 0E
+    lda #$05                        ; PRG $1FA8 | CPU $DFA8 | A9 05
+    sta OamBufferWriteOffset                       ; PRG $1FAA | CPU $DFAA | 85 AB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFAC.
+; Local behavior: Reads ObjectSlotOrFieldIndex, Ram_0401, Flow_DFBB, ScreenCollisionState, Flow_DFDC; mutates no direct memory mutation observed.
+; Parameters: ObjectSlotOrFieldIndex, Ram_0401, Flow_DFBB, ScreenCollisionState, Flow_DFDC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFAC:
+    ldx ObjectSlotOrFieldIndex                       ; PRG $1FAC | CPU $DFAC | A6 0E
+    lda Ram_0401,x                  ; PRG $1FAE | CPU $DFAE | BD 01 04
+    cmp #$0B                        ; PRG $1FB1 | CPU $DFB1 | C9 0B
+    beq Flow_DFBB                ; PRG $1FB3 | CPU $DFB3 | F0 06
+    lda ScreenCollisionState                       ; PRG $1FB5 | CPU $DFB5 | A5 44
+    cmp #$01                        ; PRG $1FB7 | CPU $DFB7 | C9 01
+    bne Flow_DFDC                ; PRG $1FB9 | CPU $DFB9 | D0 21
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFBB.
+; Local behavior: Reads UpdateRam_0402_E000, ObjectSlotOrFieldIndex, Ram_0400, Flow_DFCD, ComputeOrDispatch_C2B4; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_0402_E000, ObjectSlotOrFieldIndex, Ram_0400, Flow_DFCD, ComputeOrDispatch_C2B4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFBB:
+    jsr UpdateRam_0402_E000                ; PRG $1FBB | CPU $DFBB | 20 00 E0
+    ldx ObjectSlotOrFieldIndex                       ; PRG $1FBE | CPU $DFBE | A6 0E
+    lda Ram_0400,x                  ; PRG $1FC0 | CPU $DFC0 | BD 00 04
+    cmp #$01                        ; PRG $1FC3 | CPU $DFC3 | C9 01
+    bne Flow_DFCD                ; PRG $1FC5 | CPU $DFC5 | D0 06
+    jsr ComputeOrDispatch_C2B4                ; PRG $1FC7 | CPU $DFC7 | 20 B4 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFCA.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFCA:
+    jsr LoadObjectSpriteRenderState                ; PRG $1FCA | CPU $DFCA | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFCD.
+; Local behavior: Reads AdvanceObjectRecordPointer, ObjectSlotOrFieldIndex, OamBufferWriteOffset, Flow_DFAC; mutates ObjectSlotOrFieldIndex, OamBufferWriteOffset.
+; Parameters: AdvanceObjectRecordPointer, ObjectSlotOrFieldIndex, OamBufferWriteOffset, Flow_DFAC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFCD:
+    jsr AdvanceObjectRecordPointer                ; PRG $1FCD | CPU $DFCD | 20 0F C2
+    lda ObjectSlotOrFieldIndex                       ; PRG $1FD0 | CPU $DFD0 | A5 0E
+    clc                             ; PRG $1FD2 | CPU $DFD2 | 18
+    adc #$20                        ; PRG $1FD3 | CPU $DFD3 | 69 20
+    sta ObjectSlotOrFieldIndex                       ; PRG $1FD5 | CPU $DFD5 | 85 0E
+    dec OamBufferWriteOffset                       ; PRG $1FD7 | CPU $DFD7 | C6 AB
+    bne Flow_DFAC                ; PRG $1FD9 | CPU $DFD9 | D0 D1
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFDB.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFDB:
+    rts                             ; PRG $1FDB | CPU $DFDB | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFDC.
+; Local behavior: Reads GameplayStateFlags, Flow_DFCA, ObjectSlotOrFieldIndex, Ram_0415, Flow_DFF4, ScreenCollisionState, Flow_DFF1; mutates no direct memory mutation observed.
+; Parameters: GameplayStateFlags, Flow_DFCA, ObjectSlotOrFieldIndex, Ram_0415, Flow_DFF4, ScreenCollisionState, Flow_DFF1.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFDC:
+    lda GameplayStateFlags                       ; PRG $1FDC | CPU $DFDC | A5 23
+    bne Flow_DFCA                ; PRG $1FDE | CPU $DFDE | D0 EA
+    ldx ObjectSlotOrFieldIndex                       ; PRG $1FE0 | CPU $DFE0 | A6 0E
+    lda Ram_0415,x                  ; PRG $1FE2 | CPU $DFE2 | BD 15 04
+    bpl Flow_DFF4                ; PRG $1FE5 | CPU $DFE5 | 10 0D
+    lda #$02                        ; PRG $1FE7 | CPU $DFE7 | A9 02
+    ldy ScreenCollisionState                       ; PRG $1FE9 | CPU $DFE9 | A4 44
+    cpy #$03                        ; PRG $1FEB | CPU $DFEB | C0 03
+    bne Flow_DFF1                ; PRG $1FED | CPU $DFED | D0 02
+    lda #$01                        ; PRG $1FEF | CPU $DFEF | A9 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFF1.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_03AE.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFF1:
+    sta Ram_03AE                    ; PRG $1FF1 | CPU $DFF1 | 8D AE 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow DFF4.
+; Local behavior: Reads Flow_DFCA; mutates Ram_0400, Ram_0406.
+; Parameters: Flow_DFCA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_DFF4:
+    lda #$00                        ; PRG $1FF4 | CPU $DFF4 | A9 00
+    sta Ram_0400,x                  ; PRG $1FF6 | CPU $DFF6 | 9D 00 04
+    lda #$47                        ; PRG $1FF9 | CPU $DFF9 | A9 47
+    sta Ram_0406,x                  ; PRG $1FFB | CPU $DFFB | 9D 06 04
+    bpl Flow_DFCA                ; PRG $1FFE | CPU $DFFE | 10 CA
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 0402 E000.
+; Local behavior: Reads ObjectSlotOrFieldIndex, Ram_0400, Flow_DFDB, Ram_0402, Ram_040E, Flow_E012, Continuation_E0D2; mutates Ram_0402.
+; Parameters: ObjectSlotOrFieldIndex, Ram_0400, Flow_DFDB, Ram_0402, Ram_040E, Flow_E012, Continuation_E0D2.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_0402_E000:
+    ldx ObjectSlotOrFieldIndex                       ; PRG $2000 | CPU $E000 | A6 0E
+    lda Ram_0400,x                  ; PRG $2002 | CPU $E002 | BD 00 04
+    beq Flow_DFDB                ; PRG $2005 | CPU $E005 | F0 D4
+    inc Ram_0402,x                  ; PRG $2007 | CPU $E007 | FE 02 04
+    lda Ram_040E,x                  ; PRG $200A | CPU $E00A | BD 0E 04
+    bne Flow_E012                ; PRG $200D | CPU $E00D | D0 03
+    jmp Continuation_E0D2                ; PRG $200F | CPU $E00F | 4C D2 E0
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E012.
+; Local behavior: Reads Flow_E01F, Ram_0415, Flow_E01E; mutates Ram_03AE.
+; Parameters: Flow_E01F, Ram_0415, Flow_E01E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E012:
+    bpl Flow_E01F                ; PRG $2012 | CPU $E012 | 10 0B
+    lda Ram_0415,x                  ; PRG $2014 | CPU $E014 | BD 15 04
+    bpl Flow_E01E                ; PRG $2017 | CPU $E017 | 10 05
+    lda #$01                        ; PRG $2019 | CPU $E019 | A9 01
+    sta Ram_03AE                    ; PRG $201B | CPU $E01B | 8D AE 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E01 E.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E01E:
+    rts                             ; PRG $201E | CPU $E01E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E01 F.
+; Local behavior: Reads Ram_0400, Flow_E029, Continuation_E0D2; mutates no direct memory mutation observed.
+; Parameters: Ram_0400, Flow_E029, Continuation_E0D2.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E01F:
+    lda Ram_0400,x                  ; PRG $201F | CPU $E01F | BD 00 04
+    cmp #$02                        ; PRG $2022 | CPU $E022 | C9 02
+    bne Flow_E029                ; PRG $2024 | CPU $E024 | D0 03
+    jmp Continuation_E0D2                ; PRG $2026 | CPU $E026 | 4C D2 E0
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E029.
+; Local behavior: Reads Ram_040F, Flow_E037, Ram_041D; mutates no direct memory mutation observed.
+; Parameters: Ram_040F, Flow_E037, Ram_041D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E029:
+    ldy Ram_040F,x                  ; PRG $2029 | CPU $E029 | BC 0F 04
+    cpy #$01                        ; PRG $202C | CPU $E02C | C0 01
+    bne Flow_E037                ; PRG $202E | CPU $E02E | D0 07
+    lda Ram_041D,x                  ; PRG $2030 | CPU $E030 | BD 1D 04
+    clc                             ; PRG $2033 | CPU $E033 | 18
+    adc #$08                        ; PRG $2034 | CPU $E034 | 69 08
+    tay                             ; PRG $2036 | CPU $E036 | A8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E037.
+; Local behavior: Reads IndexedGameplayLookupTable_E0F0, UpdateActorCoordinates_C54B, ComputeOrDispatch_E9C6, ObjectSlotOrFieldIndex, Ram_040F, Flow_E0BD, Flow_E07E; mutates Ram_0401, AudioPendingFlags.
+; Parameters: IndexedGameplayLookupTable_E0F0, UpdateActorCoordinates_C54B, ComputeOrDispatch_E9C6, ObjectSlotOrFieldIndex, Ram_040F, Flow_E0BD, Flow_E07E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E037:
+    lda IndexedGameplayLookupTable_E0F0,y                 ; PRG $2037 | CPU $E037 | B9 F0 E0
+    jsr UpdateActorCoordinates_C54B                ; PRG $203A | CPU $E03A | 20 4B C5
+    jsr ComputeOrDispatch_E9C6                ; PRG $203D | CPU $E03D | 20 C6 E9
+    ldx ObjectSlotOrFieldIndex                       ; PRG $2040 | CPU $E040 | A6 0E
+    lda Ram_040F,x                  ; PRG $2042 | CPU $E042 | BD 0F 04
+    beq Flow_E0BD                ; PRG $2045 | CPU $E045 | F0 76
+    cmp #$01                        ; PRG $2047 | CPU $E047 | C9 01
+    bne Flow_E07E                ; PRG $2049 | CPU $E049 | D0 33
+    lda #$0B                        ; PRG $204B | CPU $E04B | A9 0B
+    sta Ram_0401,x                  ; PRG $204D | CPU $E04D | 9D 01 04
+    lda #$01                        ; PRG $2050 | CPU $E050 | A9 01
+    sta AudioPendingFlags                       ; PRG $2052 | CPU $E052 | 85 FD
+    ldy #$00                        ; PRG $2054 | CPU $E054 | A0 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E056.
+; Local behavior: Reads Ram_0408, Ram_0409, Flow_E056, Flow_E090; mutates Ram_03C0, Ram_03C6, Ram_03CE, Ram_03C8, Ram_03C9.
+; Parameters: Ram_0408, Ram_0409, Flow_E056, Flow_E090.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E056:
+    lda #$01                        ; PRG $2056 | CPU $E056 | A9 01
+    sta Ram_03C0,y                  ; PRG $2058 | CPU $E058 | 99 C0 03
+    lda #$50                        ; PRG $205B | CPU $E05B | A9 50
+    sta Ram_03C6,y                  ; PRG $205D | CPU $E05D | 99 C6 03
+    lda #$00                        ; PRG $2060 | CPU $E060 | A9 00
+    sta Ram_03CE,y                  ; PRG $2062 | CPU $E062 | 99 CE 03
+    lda Ram_0408,x                  ; PRG $2065 | CPU $E065 | BD 08 04
+    sta Ram_03C8,y                  ; PRG $2068 | CPU $E068 | 99 C8 03
+    lda Ram_0409,x                  ; PRG $206B | CPU $E06B | BD 09 04
+    sta Ram_03C9,y                  ; PRG $206E | CPU $E06E | 99 C9 03
+    tya                             ; PRG $2071 | CPU $E071 | 98
+    clc                             ; PRG $2072 | CPU $E072 | 18
+    adc #$10                        ; PRG $2073 | CPU $E073 | 69 10
+    tay                             ; PRG $2075 | CPU $E075 | A8
+    cmp #$40                        ; PRG $2076 | CPU $E076 | C9 40
+    bne Flow_E056                ; PRG $2078 | CPU $E078 | D0 DC
+    lda #$02                        ; PRG $207A | CPU $E07A | A9 02
+    bpl Flow_E090                ; PRG $207C | CPU $E07C | 10 12
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E07 E.
+; Local behavior: Reads Flow_E08A, Ram_041D; mutates Ram_041D.
+; Parameters: Flow_E08A, Ram_041D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E07E:
+    cmp #$02                        ; PRG $207E | CPU $E07E | C9 02
+    bne Flow_E08A                ; PRG $2080 | CPU $E080 | D0 08
+    lda Ram_041D,x                  ; PRG $2082 | CPU $E082 | BD 1D 04
+    beq Flow_E08A                ; PRG $2085 | CPU $E085 | F0 03
+    dec Ram_041D                    ; PRG $2087 | CPU $E087 | CE 1D 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E08 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioEffectRequest.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E08A:
+    lda #$01                        ; PRG $208A | CPU $E08A | A9 01
+    sta AudioEffectRequest                       ; PRG $208C | CPU $E08C | 85 FE
+    lda #$00                        ; PRG $208E | CPU $E08E | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E090.
+; Local behavior: Reads Ram_041B, Ram_0415, Flow_E0AD; mutates Ram_0400, Ram_040E, Ram_0500, Ram_0406, Ram_03AE.
+; Parameters: Ram_041B, Ram_0415, Flow_E0AD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E090:
+    sta Ram_0400,x                  ; PRG $2090 | CPU $E090 | 9D 00 04
+    lda #$00                        ; PRG $2093 | CPU $E093 | A9 00
+    sta Ram_040E,x                  ; PRG $2095 | CPU $E095 | 9D 0E 04
+    ldy Ram_041B,x                  ; PRG $2098 | CPU $E098 | BC 1B 04
+    sta Ram_0500,y                  ; PRG $209B | CPU $E09B | 99 00 05
+    lda #$47                        ; PRG $209E | CPU $E09E | A9 47
+    sta Ram_0406,x                  ; PRG $20A0 | CPU $E0A0 | 9D 06 04
+    lda Ram_0415,x                  ; PRG $20A3 | CPU $E0A3 | BD 15 04
+    bpl Flow_E0AD                ; PRG $20A6 | CPU $E0A6 | 10 05
+    lda #$01                        ; PRG $20A8 | CPU $E0A8 | A9 01
+    sta Ram_03AE                    ; PRG $20AA | CPU $E0AA | 8D AE 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E0 AD.
+; Local behavior: Reads Ram_040F, ActorTimerArray, ActorTableIndex, Flow_E0BA; mutates ActorTimerArray, ActorTableIndex.
+; Parameters: Ram_040F, ActorTimerArray, ActorTableIndex, Flow_E0BA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E0AD:
+    lda Ram_040F,x                  ; PRG $20AD | CPU $E0AD | BD 0F 04
+    tax                             ; PRG $20B0 | CPU $E0B0 | AA
+    dec ActorTimerArray,x                     ; PRG $20B1 | CPU $E0B1 | D6 68
+    ldy ActorTableIndex                       ; PRG $20B3 | CPU $E0B3 | A4 6F
+    beq Flow_E0BA                ; PRG $20B5 | CPU $E0B5 | F0 03
+    dey                             ; PRG $20B7 | CPU $E0B7 | 88
+    sty ActorTableIndex                       ; PRG $20B8 | CPU $E0B8 | 84 6F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E0 BA.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E0BA:
+    jmp LoadObjectSpriteRenderState                ; PRG $20BA | CPU $E0BA | 4C 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E0 BD.
+; Local behavior: Reads ActorTimerArray, ActorSequenceStep, Ram_040F; mutates ActorTimerArray, ActorSequenceStep, Ram_040F, AudioChannelRequest, Ram_040E, Ram_0407.
+; Parameters: ActorTimerArray, ActorSequenceStep, Ram_040F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E0BD:
+    dec ActorTimerArray                       ; PRG $20BD | CPU $E0BD | C6 68
+    inc ActorSequenceStep                       ; PRG $20BF | CPU $E0BF | E6 69
+    inc Ram_040F,x                  ; PRG $20C1 | CPU $E0C1 | FE 0F 04
+    lda #$08                        ; PRG $20C4 | CPU $E0C4 | A9 08
+    sta AudioChannelRequest                       ; PRG $20C6 | CPU $E0C6 | 85 FF
+    lda #$00                        ; PRG $20C8 | CPU $E0C8 | A9 00
+    sta Ram_040E,x                  ; PRG $20CA | CPU $E0CA | 9D 0E 04
+    lda #$02                        ; PRG $20CD | CPU $E0CD | A9 02
+    sta Ram_0407,x                  ; PRG $20CF | CPU $E0CF | 9D 07 04
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation E0 D2.
+; Local behavior: Reads Ram_0401, DispatchScreenStateHandler, GameplayTimerArray; mutates GameplayTimerArray.
+; Parameters: Ram_0401, DispatchScreenStateHandler, GameplayTimerArray.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_E0D2:
+    lda Ram_0401,x                  ; PRG $20D2 | CPU $E0D2 | BD 01 04
+    jsr DispatchScreenStateHandler                ; PRG $20D5 | CPU $E0D5 | 20 C6 C3
+    cld                             ; PRG $20D8 | CPU $E0D8 | D8
+    inc GameplayTimerArray                       ; PRG $20D9 | CPU $E0D9 | E6 20
+    .byte $E7,$D3,$E2,$25,$E3,$C9,$E3,$D6,$E3,$1D,$E4,$30,$E7,$20,$E7,$3C ; PRG $20DB | CPU $E0DB
+    .byte $E7,$35,$E5,$10,$E1 ; PRG $20EB | CPU $E0EB
+
+IndexedGameplayLookupTable_E0F0:
+    .byte $00,$04,$01,$03,$07,$02,$05,$07,$04,$07,$10,$00,$10,$00,$10,$0A ; PRG $20F0 | CPU $E0F0
+    .byte $00,$1E,$00,$28,$00,$14,$20,$32,$20,$00,$02,$01,$01,$00,$02,$00 ; PRG $2100 | CPU $E100
+    .byte $A6,$0E,$A5,$27,$29,$03,$F0,$78,$A5,$A8,$85,$01,$A5,$A9,$85,$02 ; PRG $2110 | CPU $E110
+    .byte $A9,$C0,$85,$A8,$A9,$03,$85,$A9,$A9,$10,$85,$AA,$A9,$03,$85,$04 ; PRG $2120 | CPU $E120
+    .byte $A2,$00,$86,$03,$86,$0F,$BD,$C0,$03,$F0,$2E,$A9,$01,$85,$03,$BD ; PRG $2130 | CPU $E130
+    .byte $CE,$03,$D0,$4D,$A9,$50,$9D,$C6,$03,$BD,$C8,$03,$C9,$D0,$B0,$41 ; PRG $2140 | CPU $E140
+    .byte $18,$7D,$CB,$03,$9D,$C8,$03,$BD,$C9,$03,$C9,$F0,$B0,$33,$C9,$10 ; PRG $2150 | CPU $E150
+    .byte $90,$2F,$18,$7D,$CC,$03,$9D,$C9,$03,$20,$17,$C2,$20,$0F,$C2,$A5 ; PRG $2160 | CPU $E160
+    .byte $0F,$18,$69,$10,$AA,$C6,$04,$10,$BB,$A5,$01,$85,$A8,$A5,$02,$85 ; PRG $2170 | CPU $E170
+    .byte $A9,$A9,$20,$85,$AA,$A5,$03,$D0,$07,$A6,$0E,$A9,$00,$9D,$00,$04 ; PRG $2180 | CPU $E180
+    .byte $60,$A9,$00,$9D,$C0,$03,$9D,$CE,$03,$A9,$49,$9D,$C6,$03,$10,$C9 ; PRG $2190 | CPU $E190
+    .byte $A9,$50,$BC,$1C,$04,$F0,$02,$A9,$B0,$9D,$19,$04,$A9,$88,$9D,$1A ; PRG $21A0 | CPU $E1A0
+    .byte $04,$BD,$15,$04,$09,$08,$9D,$15,$04,$60,$BD,$0F,$04,$C9,$02,$90 ; PRG $21B0 | CPU $E1B0
+    .byte $DF,$C9,$05,$B0,$37,$A5,$75,$F0,$34,$A9,$05,$85,$06,$20,$2F,$C4 ; PRG $21C0 | CPU $E1C0
+    .byte $C6,$06,$18,$69,$34,$90,$F9,$A4,$06,$B9,$70,$00,$D0,$07,$88,$10 ; PRG $21D0 | CPU $E1D0
+    .byte $F8,$A0,$04,$F0,$F4,$98,$9D,$1E,$04,$A9,$D8,$9D,$1A,$04,$B9,$0B ; PRG $21E0 | CPU $E1E0
+    .byte $E2,$9D,$19,$04,$BD,$15,$04,$09,$04,$9D,$15,$04,$60,$AD,$08,$03 ; PRG $21F0 | CPU $E1F0
+    .byte $9D,$1A,$04,$AD,$09,$03,$9D,$19,$04,$D0,$E9,$40,$60,$80,$A0,$C0 ; PRG $2200 | CPU $E200
+    .byte $BD,$19,$04,$38,$FD,$09,$04,$10,$03,$20,$95,$E6,$C9,$10,$B0,$71 ; PRG $2210 | CPU $E210
+    .byte $BD,$1A,$04,$38,$FD,$08,$04,$10,$03,$20,$95,$E6,$C9,$10,$B0,$61 ; PRG $2220 | CPU $E220
+    .byte $BD,$15,$04,$29,$10,$F0,$10,$A9,$07,$9D,$01,$04,$BD,$15,$04,$10 ; PRG $2230 | CPU $E230
+    .byte $05,$A9,$02,$8D,$AE,$03,$60,$A9,$38,$9D,$1A,$04,$A9,$B8,$BC,$1C ; PRG $2240 | CPU $E240
+    .byte $04,$F0,$02,$A9,$48,$9D,$19,$04,$BD,$15,$04,$29,$D9,$09,$10,$9D ; PRG $2250 | CPU $E250
+    .byte $15,$04,$BD,$0F,$04,$C9,$02,$90,$28,$C9,$05,$B0,$24,$BD,$1D,$04 ; PRG $2260 | CPU $E260
+    .byte $D0,$1F,$BC,$1E,$04,$B9,$70,$00,$F0,$17,$AD,$A0,$03,$D0,$12,$A9 ; PRG $2270 | CPU $E270
+    .byte $00,$99,$70,$00,$BD,$15,$04,$09,$80,$9D,$15,$04,$20,$8E,$EB,$A6 ; PRG $2280 | CPU $E280
+    .byte $0E,$60,$A5,$27,$4A,$90,$FA,$BD,$0F,$04,$C9,$03,$F0,$05,$C9,$04 ; PRG $2290 | CPU $E290
+    .byte $F0,$01,$60,$BC,$04,$04,$B9,$CA,$E2,$C9,$AA,$D0,$07,$A9,$00,$9D ; PRG $22A0 | CPU $E2A0
+    .byte $04,$04,$F0,$EF,$DD,$02,$04,$B0,$06,$FE,$04,$04,$FE,$04,$04,$B9 ; PRG $22B0 | CPU $E2B0
+    .byte $CB,$E2,$18,$7D,$08,$04,$9D,$08,$04,$60,$40,$01,$60,$00,$A0,$FF ; PRG $22C0 | CPU $E2C0
+    .byte $FE,$00,$AA,$A6,$0E,$BD,$0F,$04,$0A,$A8,$B9,$FB,$E0,$9D,$05,$04 ; PRG $22D0 | CPU $E2D0
+    .byte $B9,$FC,$E0,$9D,$11,$04,$A9,$0C,$9D,$10,$04,$BD,$15,$04,$29,$1C ; PRG $22E0 | CPU $E2E0
+    .byte $F0,$03,$4C,$7C,$E3,$BD,$0F,$04,$C9,$02,$90,$0D,$C9,$05,$F0,$11 ; PRG $22F0 | CPU $E2F0
+    .byte $C9,$06,$F0,$0D,$BD,$1D,$04,$D0,$0F,$20,$BA,$E1,$FE,$01,$04,$10 ; PRG $2300 | CPU $E300
+    .byte $6B,$A9,$04,$9D,$01,$04,$10,$64,$C9,$02,$F0,$05,$A9,$01,$9D,$1F ; PRG $2310 | CPU $E310
+    .byte $04,$A9,$0A,$10,$EE,$A6,$0E,$BD,$0F,$04,$C9,$05,$B0,$37,$DE,$0C ; PRG $2320 | CPU $E320
+    .byte $04,$D0,$32,$A5,$6F,$A0,$00,$D9,$AB,$E4,$B0,$03,$C8,$10,$F8,$A5 ; PRG $2330 | CPU $E330
+    .byte $41,$F0,$05,$98,$18,$69,$0C,$A8,$B9,$AF,$E4,$9D,$0C,$04,$BD,$08 ; PRG $2340 | CPU $E340
+    .byte $04,$CD,$08,$03,$B0,$0F,$D9,$B3,$E4,$90,$0A,$D9,$B7,$E4,$B0,$05 ; PRG $2350 | CPU $E350
+    .byte $20,$61,$EA,$A6,$0E,$BD,$0F,$04,$C9,$02,$B0,$05,$A5,$27,$4A,$B0 ; PRG $2360 | CPU $E360
+    .byte $57,$20,$10,$E2,$20,$92,$E2,$20,$ED,$E5,$90,$4C,$BD,$10,$04,$4A ; PRG $2370 | CPU $E370
+    .byte $4A,$85,$12,$C9,$02,$90,$0B,$20,$C7,$E4,$B0,$0E,$20,$19,$E5,$4C ; PRG $2380 | CPU $E380
+    .byte $9A,$E3,$20,$F0,$E4,$B0,$03,$20,$27,$E5,$05,$12,$9D,$10,$04,$0A ; PRG $2390 | CPU $E390
+    .byte $18,$7D,$11,$04,$A8,$B9,$1B,$ED,$85,$14,$B9,$1C,$ED,$85,$15,$A0 ; PRG $23A0 | CPU $E3A0
+    .byte $00,$B1,$14,$9D,$12,$04,$E8,$C8,$C0,$03,$D0,$F5,$A6,$0E,$BD,$15 ; PRG $23B0 | CPU $E3B0
+    .byte $04,$29,$FE,$11,$14,$9D,$15,$04,$60,$A6,$0E,$BD,$15,$04,$09,$02 ; PRG $23C0 | CPU $E3C0
+    .byte $9D,$15,$04,$FE,$01,$04,$A6,$0E,$20,$ED,$E5,$A5,$27,$29,$03,$D0 ; PRG $23D0 | CPU $E3D0
+    .byte $09,$BD,$08,$04,$18,$69,$01,$9D,$08,$04,$BD,$08,$04,$CD,$08,$03 ; PRG $23E0 | CPU $E3E0
+    .byte $90,$2A,$FE,$01,$04,$A9,$10,$85,$FF,$A9,$00,$9D,$1D,$04,$9D,$1F ; PRG $23F0 | CPU $E3F0
+    .byte $04,$BC,$0F,$04,$C0,$06,$D0,$02,$A9,$1E,$9D,$1E,$04,$A9,$00,$BC ; PRG $2400 | CPU $E400
+    .byte $09,$04,$CC,$09,$03,$90,$02,$A9,$FF,$9D,$0B,$04,$60,$A6,$0E,$BC ; PRG $2410 | CPU $E410
+    .byte $1D,$04,$B9,$89,$E4,$C9,$80,$D0,$05,$A9,$00,$9D,$1D,$04,$18,$7D ; PRG $2420 | CPU $E420
+    .byte $08,$04,$9D,$08,$04,$FE,$1D,$04,$A6,$0E,$BC,$1F,$04,$B9,$9E,$E4 ; PRG $2430 | CPU $E430
+    .byte $C9,$FF,$F0,$20,$DD,$1E,$04,$B0,$06,$FE,$1F,$04,$FE,$1F,$04,$B9 ; PRG $2440 | CPU $E440
+    .byte $9F,$E4,$BC,$0B,$04,$10,$03,$20,$95,$E6,$18,$7D,$09,$04,$9D,$09 ; PRG $2450 | CPU $E450
+    .byte $04,$FE,$1E,$04,$A9,$30,$BC,$0B,$04,$10,$09,$DD,$09,$04,$90,$18 ; PRG $2460 | CPU $E460
+    .byte $A9,$02,$B0,$09,$A9,$D0,$DD,$09,$04,$B0,$0D,$A9,$06,$20,$9C,$E3 ; PRG $2470 | CPU $E470
+    .byte $A9,$03,$9D,$01,$04,$4C,$47,$E2,$60,$01,$01,$00,$01,$00,$00,$FF ; PRG $2480 | CPU $E480
+    .byte $00,$FF,$FF,$FF,$FF,$00,$FF,$00,$00,$01,$00,$01,$01,$80,$20,$00 ; PRG $2490 | CPU $E490
+    .byte $28,$01,$30,$02,$36,$03,$48,$04,$7F,$02,$FF,$18,$0C,$02,$00,$FF ; PRG $24A0 | CPU $E4A0
+    .byte $FF,$FF,$E8,$40,$40,$40,$40,$78,$78,$88,$90,$80,$80,$60,$40,$40 ; PRG $24B0 | CPU $E4B0
+    .byte $40,$40,$40,$80,$80,$88,$90,$BD,$0F,$04,$C9,$02,$90,$0D,$BD,$09 ; PRG $24C0 | CPU $E4C0
+    .byte $04,$C9,$20,$90,$17,$18,$69,$20,$B0,$0E,$60,$BD,$09,$04,$C9,$40 ; PRG $24D0 | CPU $E4D0
+    .byte $90,$0A,$18,$69,$40,$B0,$01,$60,$A9,$04,$38,$60,$A9,$00,$38,$60 ; PRG $24E0 | CPU $E4E0
+    .byte $BD,$0F,$04,$C9,$02,$90,$0D,$BD,$08,$04,$C9,$20,$90,$17,$18,$69 ; PRG $24F0 | CPU $E4F0
+    .byte $34,$B0,$0E,$60,$BD,$08,$04,$C9,$60,$90,$0A,$18,$69,$90,$B0,$01 ; PRG $2500 | CPU $E500
+    .byte $60,$A9,$08,$38,$60,$A9,$0C,$38,$60,$BD,$19,$04,$DD,$09,$04,$90 ; PRG $2510 | CPU $E510
+    .byte $03,$A9,$00,$60,$A9,$04,$60,$BD,$1A,$04,$DD,$08,$04,$90,$03,$A9 ; PRG $2520 | CPU $E520
+    .byte $0C,$60,$A9,$08,$60,$A6,$0E,$AD,$00,$04,$D0,$10,$BD,$15,$04,$09 ; PRG $2530 | CPU $E530
+    .byte $40,$9D,$15,$04,$A9,$03,$9D,$01,$04,$4C,$47,$E2,$A5,$27,$4A,$B0 ; PRG $2540 | CPU $E540
+    .byte $E3,$BC,$1F,$04,$B9,$B9,$E5,$85,$01,$BD,$1E,$04,$0A,$A8,$84,$0C ; PRG $2550 | CPU $E550
+    .byte $BD,$1F,$04,$C9,$01,$F0,$05,$C9,$02,$F0,$01,$C8,$B9,$BD,$E5,$C9 ; PRG $2560 | CPU $E560
+    .byte $FF,$D0,$11,$BC,$1F,$04,$B9,$B9,$E5,$9D,$1F,$04,$A0,$00,$98,$9D ; PRG $2570 | CPU $E570
+    .byte $1E,$04,$F0,$DA,$46,$01,$90,$03,$20,$95,$E6,$18,$6D,$09,$04,$9D ; PRG $2580 | CPU $E580
+    .byte $09,$04,$A6,$0E,$A4,$0C,$BD,$1F,$04,$C9,$00,$F0,$05,$C9,$03,$F0 ; PRG $2590 | CPU $E590
+    .byte $01,$C8,$B9,$BD,$E5,$46,$01,$B0,$03,$20,$95,$E6,$18,$6D,$08,$04 ; PRG $25A0 | CPU $E5A0
+    .byte $9D,$08,$04,$A6,$0E,$FE,$1E,$04,$60,$02,$00,$03,$01,$00,$10,$01 ; PRG $25B0 | CPU $E5B0
+    .byte $10,$02,$0F,$03,$0F,$04,$0F,$05,$0E,$06,$0E,$07,$0E,$08,$0D,$09 ; PRG $25C0 | CPU $E5C0
+    .byte $0D,$0A,$0C,$0B,$0B,$0C,$0A,$0D,$09,$0D,$08,$0E,$07,$0E,$06,$0E ; PRG $25D0 | CPU $E5D0
+    .byte $05,$0F,$04,$0F,$03,$0F,$02,$10,$01,$10,$00,$FF,$FF,$BD,$15,$04 ; PRG $25E0 | CPU $E5E0
+    .byte $29,$02,$D0,$08,$BD,$12,$04,$F0,$49,$DE,$12,$04,$FE,$13,$04,$D0 ; PRG $25F0 | CPU $E5F0
+    .byte $03,$FE,$14,$04,$BD,$13,$04,$85,$14,$BD,$14,$04,$85,$15,$A0,$00 ; PRG $2600 | CPU $E600
+    .byte $B1,$14,$C9,$FF,$D0,$14,$C8,$B1,$14,$9D,$13,$04,$85,$16,$C8,$B1 ; PRG $2610 | CPU $E610
+    .byte $14,$9D,$14,$04,$85,$15,$A5,$16,$85,$14,$A0,$00,$B1,$14,$85,$16 ; PRG $2620 | CPU $E620
+    .byte $BD,$15,$04,$29,$01,$F0,$06,$A5,$16,$49,$80,$85,$16,$20,$44,$E6 ; PRG $2630 | CPU $E630
+    .byte $18,$60,$38,$60,$BD,$15,$04,$29,$02,$D0,$24,$BD,$15,$04,$29,$10 ; PRG $2640 | CPU $E640
+    .byte $F0,$1D,$BD,$09,$04,$DD,$19,$04,$D0,$15,$BD,$08,$04,$38,$FD,$1A ; PRG $2650 | CPU $E650
+    .byte $04,$B0,$08,$20,$95,$E6,$49,$FF,$18,$69,$01,$C9,$20,$90,$03,$20 ; PRG $2660 | CPU $E660
+    .byte $9B,$E6,$BD,$15,$04,$29,$10,$F0,$18,$BD,$08,$04,$DD,$1A,$04,$D0 ; PRG $2670 | CPU $E670
+    .byte $10,$BD,$09,$04,$38,$FD,$19,$04,$B0,$03,$20,$95,$E6,$C9,$20,$90 ; PRG $2680 | CPU $E680
+    .byte $03,$20,$BD,$E6,$60 ; PRG $2690 | CPU $E690
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch E695.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: .byte $01,$01,$91,$01,$01,$01,$01,$01,$01,$01,$01,$91,$01,$90,$01,$90; .byte $91,$90,$90,$09,$90,$99,$00,$90,$09,$99,$09,$90,$09,$19,$09,$19; .byte $09,$19,$09,$09,$19,$09,$09,$19,$09,$09.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_E695:
+    eor #$FF                        ; PRG $2695 | CPU $E695 | 49 FF
+    clc                             ; PRG $2697 | CPU $E697 | 18
+    adc #$01                        ; PRG $2698 | CPU $E698 | 69 01
+    rts                             ; PRG $269A | CPU $E69A | 60
+    .byte $A5,$16,$4A,$4A,$4A,$4A,$A8,$29,$08,$F0,$0A,$98,$29,$07,$20,$95 ; PRG $269B | CPU $E69B
+    .byte $E6,$A8,$4C,$B4,$E6,$98,$29,$07,$A8,$98,$18,$7D,$09,$04,$9D,$09 ; PRG $26AB | CPU $E6AB
+    .byte $04,$60,$A5,$16,$29,$08,$D0,$06,$A5,$16,$29,$07,$10,$07,$A5,$16 ; PRG $26BB | CPU $E6BB
+    .byte $29,$07,$20,$95,$E6,$18,$7D,$08,$04,$9D,$08,$04,$60,$A6,$0E,$A9 ; PRG $26CB | CPU $E6CB
+    .byte $3C,$9D,$05,$04,$BC,$0F,$04,$B9,$09,$E1,$9D,$07,$04,$A9,$30,$9D ; PRG $26DB | CPU $E6DB
+    .byte $08,$04,$A9,$48,$BC,$1C,$04,$D0,$02,$A9,$B8,$9D,$09,$04,$A0,$00 ; PRG $26EB | CPU $E6EB
+    .byte $B9,$5C,$E7,$85,$14,$B9,$5D,$E7,$85,$15,$20,$AF,$E3,$BD,$1D,$04 ; PRG $26FB | CPU $E6FB
+    .byte $F0,$08,$AD,$15,$04,$9D,$15,$04,$10,$08,$20,$2F,$C4,$29,$01,$9D ; PRG $270B | CPU $E70B
+    .byte $15,$04,$FE,$01,$04,$A5,$27,$4A,$90,$0A,$A6,$0E,$20,$ED,$E5,$90 ; PRG $271B | CPU $E71B
+    .byte $03,$FE,$01,$04,$60,$A6,$0E,$A9,$54,$9D,$05,$04,$A0,$02,$4C,$FB ; PRG $272B | CPU $E72B
+    .byte $E6,$A6,$0E,$BC,$1B,$04,$A9,$01,$99,$00,$05,$BD,$0F,$04,$99,$01 ; PRG $273B | CPU $E73B
+    .byte $05,$A9,$00,$9D,$00,$04,$9D,$01,$04,$A9,$47,$9D,$06,$04,$4C,$17 ; PRG $274B | CPU $E74B
+    .byte $C2,$60,$E7,$64,$E7,$3A,$68,$E7,$00,$22,$A2,$E7,$01,$09,$19,$09 ; PRG $275B | CPU $E75B
+    .byte $19,$09,$19,$19,$19,$19,$19,$10,$10,$19,$10,$10,$10,$10,$11,$10 ; PRG $276B | CPU $E76B
+    .byte $11,$11,$10,$11,$01,$11,$01,$01,$11,$01,$01,$01,$01,$01,$01,$91 ; PRG $277B | CPU $E77B
+    .byte $01,$01,$01,$01,$91,$01,$91,$01,$91,$01,$91,$01,$91,$01,$01,$91 ; PRG $278B | CPU $E78B
+    .byte $01,$01,$91,$01,$01,$01,$01,$01,$01,$01,$01,$91,$01,$90,$01,$90 ; PRG $279B | CPU $E79B
+    .byte $91,$90,$90,$09,$90,$99,$00,$90,$09,$99,$09,$90,$09,$19,$09,$19 ; PRG $27AB | CPU $E7AB
+    .byte $09,$19,$09,$09,$19,$09,$09,$19,$09,$09 ; PRG $27BB | CPU $E7BB
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 04 E7 C5.
+; Local behavior: Reads implicit CPU state or none observed; mutates PackedCoordinateOrValue.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_04_E7C5:
+    lda #$03                        ; PRG $27C5 | CPU $E7C5 | A9 03
+    sta PackedCoordinateOrValue                       ; PRG $27C7 | CPU $E7C7 | 85 04
+    ldx #$00                        ; PRG $27C9 | CPU $E7C9 | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E7 CB.
+; Local behavior: Reads PackedCoordinateOrValue, ScreenObjectInitialXTable, ScreenObjectInitialYTable, ScreenObjectInitialStateTable, Flow_E7CB, ComputeOrDispatch_E9BE; mutates Ram_03C0, Ram_03C6, Ram_03C7, Ram_03CD, Ram_03CA, Ram_03CB, Ram_03CC, PackedCoordinateOrValue.
+; Parameters: PackedCoordinateOrValue, ScreenObjectInitialXTable, ScreenObjectInitialYTable, ScreenObjectInitialStateTable, Flow_E7CB, ComputeOrDispatch_E9BE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E7CB:
+    lda #$00                        ; PRG $27CB | CPU $E7CB | A9 00
+    sta Ram_03C0,x                  ; PRG $27CD | CPU $E7CD | 9D C0 03
+    lda #$50                        ; PRG $27D0 | CPU $E7D0 | A9 50
+    sta Ram_03C6,x                  ; PRG $27D2 | CPU $E7D2 | 9D C6 03
+    lda #$02                        ; PRG $27D5 | CPU $E7D5 | A9 02
+    sta Ram_03C7,x                  ; PRG $27D7 | CPU $E7D7 | 9D C7 03
+    lda #$0E                        ; PRG $27DA | CPU $E7DA | A9 0E
+    sta Ram_03CD,x                  ; PRG $27DC | CPU $E7DC | 9D CD 03
+    lda PackedCoordinateOrValue                       ; PRG $27DF | CPU $E7DF | A5 04
+    asl a                           ; PRG $27E1 | CPU $E7E1 | 0A
+    clc                             ; PRG $27E2 | CPU $E7E2 | 18
+    adc PackedCoordinateOrValue                       ; PRG $27E3 | CPU $E7E3 | 65 04
+    tay                             ; PRG $27E5 | CPU $E7E5 | A8
+    lda ScreenObjectInitialXTable,y                 ; PRG $27E6 | CPU $E7E6 | B9 5E E8
+    sta Ram_03CA,x                  ; PRG $27E9 | CPU $E7E9 | 9D CA 03
+    lda ScreenObjectInitialYTable,y                 ; PRG $27EC | CPU $E7EC | B9 5F E8
+    sta Ram_03CB,x                  ; PRG $27EF | CPU $E7EF | 9D CB 03
+    lda ScreenObjectInitialStateTable,y                 ; PRG $27F2 | CPU $E7F2 | B9 60 E8
+    sta Ram_03CC,x                  ; PRG $27F5 | CPU $E7F5 | 9D CC 03
+    txa                             ; PRG $27F8 | CPU $E7F8 | 8A
+    clc                             ; PRG $27F9 | CPU $E7F9 | 18
+    adc #$10                        ; PRG $27FA | CPU $E7FA | 69 10
+    tax                             ; PRG $27FC | CPU $E7FC | AA
+    dec PackedCoordinateOrValue                       ; PRG $27FD | CPU $E7FD | C6 04
+    bpl Flow_E7CB                ; PRG $27FF | CPU $E7FF | 10 CA
+    lda #$00                        ; PRG $2801 | CPU $E801 | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $2803 | CPU $E803 | 85 A8
+    lda #$05                        ; PRG $2805 | CPU $E805 | A9 05
+    sta ObjectRecordPointerHi                       ; PRG $2807 | CPU $E807 | 85 A9
+    ldy #$80                        ; PRG $2809 | CPU $E809 | A0 80
+    jsr ComputeOrDispatch_E9BE                ; PRG $280B | CPU $E80B | 20 BE E9
+    lda #$00                        ; PRG $280E | CPU $E80E | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $2810 | CPU $E810 | 85 A8
+    lda #$04                        ; PRG $2812 | CPU $E812 | A9 04
+    sta ObjectRecordPointerHi                       ; PRG $2814 | CPU $E814 | 85 A9
+    ldy #$E0                        ; PRG $2816 | CPU $E816 | A0 E0
+    jsr ComputeOrDispatch_E9BE                ; PRG $2818 | CPU $E818 | 20 BE E9
+    ldx #$00                        ; PRG $281B | CPU $E81B | A2 00
+    stx RecordFieldCount                       ; PRG $281D | CPU $E81D | 86 06
+    stx ObjectScanIndex                       ; PRG $281F | CPU $E81F | 86 08
+    lda #$07                        ; PRG $2821 | CPU $E821 | A9 07
+    sta WorkPointerOrValueLo                       ; PRG $2823 | CPU $E823 | 85 01
+    ldy #$00                        ; PRG $2825 | CPU $E825 | A0 00
+    sty MetaspriteLayoutOffset                       ; PRG $2827 | CPU $E827 | 84 0C
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E829.
+; Local behavior: Reads MetaspriteLayoutOffset, ActorTimerArray; mutates WorkPointerOrValueHi.
+; Parameters: MetaspriteLayoutOffset, ActorTimerArray.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E829:
+    ldy MetaspriteLayoutOffset                       ; PRG $2829 | CPU $E829 | A4 0C
+    lda ActorTimerArray,y                     ; PRG $282B | CPU $E82B | B9 68 00
+    sta WorkPointerOrValueHi                       ; PRG $282E | CPU $E82E | 85 02
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation E830.
+; Local behavior: Reads Flow_E855, ObjectScanIndex; mutates LoopCounter05.
+; Parameters: Flow_E855, ObjectScanIndex.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_E830:
+    beq Flow_E855                ; PRG $2830 | CPU $E830 | F0 23
+    lda ObjectScanIndex                       ; PRG $2832 | CPU $E832 | A5 08
+    asl a                           ; PRG $2834 | CPU $E834 | 0A
+    asl a                           ; PRG $2835 | CPU $E835 | 0A
+    tay                             ; PRG $2836 | CPU $E836 | A8
+    lda #$04                        ; PRG $2837 | CPU $E837 | A9 04
+    sta LoopCounter05                       ; PRG $2839 | CPU $E839 | 85 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E83 B.
+; Local behavior: Reads IndexedGameplayLookupTable_ED03, LoopCounter05, Flow_E83B, RecordFieldCount, WorkPointerOrValueHi, Continuation_E830; mutates Ram_0500, LoopCounter05, Ram_04FE, RecordFieldCount, WorkPointerOrValueHi.
+; Parameters: IndexedGameplayLookupTable_ED03, LoopCounter05, Flow_E83B, RecordFieldCount, WorkPointerOrValueHi, Continuation_E830.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E83B:
+    lda IndexedGameplayLookupTable_ED03,y                 ; PRG $283B | CPU $E83B | B9 03 ED
+    sta Ram_0500,x                  ; PRG $283E | CPU $E83E | 9D 00 05
+    inx                             ; PRG $2841 | CPU $E841 | E8
+    iny                             ; PRG $2842 | CPU $E842 | C8
+    dec LoopCounter05                       ; PRG $2843 | CPU $E843 | C6 05
+    bne Flow_E83B                ; PRG $2845 | CPU $E845 | D0 F4
+    lda RecordFieldCount                       ; PRG $2847 | CPU $E847 | A5 06
+    and #$01                        ; PRG $2849 | CPU $E849 | 29 01
+    sta Ram_04FE,x                  ; PRG $284B | CPU $E84B | 9D FE 04
+    inc RecordFieldCount                       ; PRG $284E | CPU $E84E | E6 06
+    dec WorkPointerOrValueHi                       ; PRG $2850 | CPU $E850 | C6 02
+    jmp Continuation_E830                ; PRG $2852 | CPU $E852 | 4C 30 E8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E855.
+; Local behavior: Reads MetaspriteLayoutOffset, ObjectScanIndex, WorkPointerOrValueLo, Flow_E829; mutates MetaspriteLayoutOffset, ObjectScanIndex, WorkPointerOrValueLo.
+; Parameters: MetaspriteLayoutOffset, ObjectScanIndex, WorkPointerOrValueLo, Flow_E829.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E855:
+    inc MetaspriteLayoutOffset                       ; PRG $2855 | CPU $E855 | E6 0C
+    inc ObjectScanIndex                       ; PRG $2857 | CPU $E857 | E6 08
+    dec WorkPointerOrValueLo                       ; PRG $2859 | CPU $E859 | C6 01
+    bne Flow_E829                ; PRG $285B | CPU $E85B | D0 CC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E85 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E85D:
+    rts                             ; PRG $285D | CPU $E85D | 60
+
+ScreenObjectInitialXTable:
+    .byte $3C ; PRG $285E | CPU $E85E
+
+ScreenObjectInitialYTable:
+    .byte $02 ; PRG $285F | CPU $E85F
+
+ScreenObjectInitialStateTable:
+    .byte $02,$38,$03,$01,$34,$03,$FF,$30,$02,$FE ; PRG $2860 | CPU $E860
+; -----------------------------------------------------------------------------
+; Global purpose: Evaluate Collision State E86 A.
+; Local behavior: Reads ScreenCollisionState, Flow_E85D, ActorTableIndex, GameplayStateBackup, FrameCounter, ScreenObjectMode, Flow_E8AA, Ram_0400; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, WorkPointerOrValueLo, WorkPointerOrValueHi, Ram_0502, ObjectSpawnState, ActorTableIndex.
+; Parameters: ScreenCollisionState, Flow_E85D, ActorTableIndex, GameplayStateBackup, FrameCounter, ScreenObjectMode, Flow_E8AA, Ram_0400.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+EvaluateCollisionState_E86A:
+    lda ScreenCollisionState                       ; PRG $286A | CPU $E86A | A5 44
+    cmp #$01                        ; PRG $286C | CPU $E86C | C9 01
+    bne Flow_E85D                ; PRG $286E | CPU $E86E | D0 ED
+    lda ActorTableIndex                       ; PRG $2870 | CPU $E870 | A5 6F
+    beq Flow_E85D                ; PRG $2872 | CPU $E872 | F0 E9
+    lda GameplayStateBackup                       ; PRG $2874 | CPU $E874 | A5 22
+    bne Flow_E85D                ; PRG $2876 | CPU $E876 | D0 E5
+    lda FrameCounter                       ; PRG $2878 | CPU $E878 | A5 27
+    and #$7F                        ; PRG $287A | CPU $E87A | 29 7F
+    cmp #$20                        ; PRG $287C | CPU $E87C | C9 20
+    bcs Flow_E85D                ; PRG $287E | CPU $E87E | B0 DD
+    lda #$00                        ; PRG $2880 | CPU $E880 | A9 00
+    sta ObjectRecordPointerLo                       ; PRG $2882 | CPU $E882 | 85 A8
+    lda #$04                        ; PRG $2884 | CPU $E884 | A9 04
+    sta ObjectRecordPointerHi                       ; PRG $2886 | CPU $E886 | 85 A9
+    lda #$00                        ; PRG $2888 | CPU $E888 | A9 00
+    sta WorkPointerOrValueLo                       ; PRG $288A | CPU $E88A | 85 01
+    sta WorkPointerOrValueHi                       ; PRG $288C | CPU $E88C | 85 02
+    lda ScreenObjectMode                       ; PRG $288E | CPU $E88E | A5 62
+    cmp #$02                        ; PRG $2890 | CPU $E890 | C9 02
+    bne Flow_E8AA                ; PRG $2892 | CPU $E892 | D0 16
+    lda Ram_0400                    ; PRG $2894 | CPU $E894 | AD 00 04
+    bne Flow_E8C9                ; PRG $2897 | CPU $E897 | D0 30
+    lda ObjectSpawnState                       ; PRG $2899 | CPU $E899 | A5 4B
+    sta Ram_0502                    ; PRG $289B | CPU $E89B | 8D 02 05
+    eor #$01                        ; PRG $289E | CPU $E89E | 49 01
+    sta ObjectSpawnState                       ; PRG $28A0 | CPU $E8A0 | 85 4B
+    ldx #$20                        ; PRG $28A2 | CPU $E8A2 | A2 20
+    stx ActorTableIndex                       ; PRG $28A4 | CPU $E8A4 | 86 6F
+    ldx #$00                        ; PRG $28A6 | CPU $E8A6 | A2 00
+    beq Flow_E912                ; PRG $28A8 | CPU $E8A8 | F0 68
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 AA.
+; Local behavior: Reads ActiveActorState, Flow_E8B8; mutates ObjectRecordStride.
+; Parameters: ActiveActorState, Flow_E8B8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8AA:
+    lda #$20                        ; PRG $28AA | CPU $E8AA | A9 20
+    sta ObjectRecordStride                       ; PRG $28AC | CPU $E8AC | 85 AA
+    lda #$04                        ; PRG $28AE | CPU $E8AE | A9 04
+    ldy ActiveActorState                       ; PRG $28B0 | CPU $E8B0 | A4 61
+    cpy #$01                        ; PRG $28B2 | CPU $E8B2 | C0 01
+    bne Flow_E8B8                ; PRG $28B4 | CPU $E8B4 | D0 02
+    lda #$03                        ; PRG $28B6 | CPU $E8B6 | A9 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 B8.
+; Local behavior: Reads implicit CPU state or none observed; mutates OamBufferWriteOffset.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8B8:
+    sta OamBufferWriteOffset                       ; PRG $28B8 | CPU $E8B8 | 85 AB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 BA.
+; Local behavior: Reads ObjectRecordPointerLo, Flow_E8CA; mutates no direct memory mutation observed.
+; Parameters: ObjectRecordPointerLo, Flow_E8CA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8BA:
+    ldy #$00                        ; PRG $28BA | CPU $E8BA | A0 00
+    lda (ObjectRecordPointerLo),y                   ; PRG $28BC | CPU $E8BC | B1 A8
+    beq Flow_E8CA                ; PRG $28BE | CPU $E8BE | F0 0A
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp 01 E8 C0.
+; Local behavior: Reads AdvanceObjectRecordPointer, WorkPointerOrValueLo, OamBufferWriteOffset, Flow_E8BA; mutates WorkPointerOrValueLo, OamBufferWriteOffset.
+; Parameters: AdvanceObjectRecordPointer, WorkPointerOrValueLo, OamBufferWriteOffset, Flow_E8BA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_01_E8C0:
+    jsr AdvanceObjectRecordPointer                ; PRG $28C0 | CPU $E8C0 | 20 0F C2
+    inc WorkPointerOrValueLo                       ; PRG $28C3 | CPU $E8C3 | E6 01
+    dec OamBufferWriteOffset                       ; PRG $28C5 | CPU $E8C5 | C6 AB
+    bpl Flow_E8BA                ; PRG $28C7 | CPU $E8C7 | 10 F1
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 C9.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8C9:
+    rts                             ; PRG $28C9 | CPU $E8C9 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 CA.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_E8D7, Flow_E94A; mutates no direct memory mutation observed.
+; Parameters: WorkPointerOrValueLo, Flow_E8D7, Flow_E94A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8CA:
+    lda WorkPointerOrValueLo                       ; PRG $28CA | CPU $E8CA | A5 01
+    bne Flow_E8D7                ; PRG $28CC | CPU $E8CC | D0 09
+    lda #$E8                        ; PRG $28CE | CPU $E8CE | A9 E8
+    pha                             ; PRG $28D0 | CPU $E8D0 | 48
+    lda #$BF                        ; PRG $28D1 | CPU $E8D1 | A9 BF
+    pha                             ; PRG $28D3 | CPU $E8D3 | 48
+    jmp Flow_E94A                ; PRG $28D4 | CPU $E8D4 | 4C 4A E9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 D7.
+; Local behavior: Reads WorkPointerOrValueHi, Flow_E94A, AdvancePseudoRandomState; mutates ObjectScanIndex.
+; Parameters: WorkPointerOrValueHi, Flow_E94A, AdvancePseudoRandomState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8D7:
+    lda WorkPointerOrValueHi                       ; PRG $28D7 | CPU $E8D7 | A5 02
+    bne Flow_E94A                ; PRG $28D9 | CPU $E8D9 | D0 6F
+    jsr AdvancePseudoRandomState                ; PRG $28DB | CPU $E8DB | 20 2F C4
+    and #$7C                        ; PRG $28DE | CPU $E8DE | 29 7C
+    sta ObjectScanIndex                       ; PRG $28E0 | CPU $E8E0 | 85 08
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 E2.
+; Local behavior: Reads Ram_0500, Flow_E8F1, Ram_0501, Flow_E912; mutates no direct memory mutation observed.
+; Parameters: Ram_0500, Flow_E8F1, Ram_0501, Flow_E912.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8E2:
+    tax                             ; PRG $28E2 | CPU $E8E2 | AA
+    ldy Ram_0500,x                  ; PRG $28E3 | CPU $E8E3 | BC 00 05
+    cpy #$01                        ; PRG $28E6 | CPU $E8E6 | C0 01
+    bne Flow_E8F1                ; PRG $28E8 | CPU $E8E8 | D0 07
+    ldy Ram_0501,x                  ; PRG $28EA | CPU $E8EA | BC 01 05
+    cpy #$02                        ; PRG $28ED | CPU $E8ED | C0 02
+    bcs Flow_E912                ; PRG $28EF | CPU $E8EF | B0 21
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E8 F1.
+; Local behavior: Reads ObjectScanIndex, Flow_E8C9, Flow_E8E2; mutates no direct memory mutation observed.
+; Parameters: ObjectScanIndex, Flow_E8C9, Flow_E8E2.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E8F1:
+    txa                             ; PRG $28F1 | CPU $E8F1 | 8A
+    clc                             ; PRG $28F2 | CPU $E8F2 | 18
+    adc #$04                        ; PRG $28F3 | CPU $E8F3 | 69 04
+    cmp ObjectScanIndex                       ; PRG $28F5 | CPU $E8F5 | C5 08
+    beq Flow_E8C9                ; PRG $28F7 | CPU $E8F7 | F0 D0
+    ora #$00                        ; PRG $28F9 | CPU $E8F9 | 09 00
+    bpl Flow_E8E2                ; PRG $28FB | CPU $E8FB | 10 E5
+    lda #$00                        ; PRG $28FD | CPU $E8FD | A9 00
+    cmp ObjectScanIndex                       ; PRG $28FF | CPU $E8FF | C5 08
+    beq Flow_E8C9                ; PRG $2901 | CPU $E901 | F0 C6
+    bne Flow_E8E2                ; PRG $2903 | CPU $E903 | D0 DD
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E905.
+; Local behavior: Reads ComputeOrDispatch_E9BC, WorkPointerOrValueHi, Flow_E915; mutates SignedOffsetAccumulator, ObjectRecordPointerLo.
+; Parameters: ComputeOrDispatch_E9BC, WorkPointerOrValueHi, Flow_E915.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E905:
+    jsr ComputeOrDispatch_E9BC                ; PRG $2905 | CPU $E905 | 20 BC E9
+    ldy #$1D                        ; PRG $2908 | CPU $E908 | A0 1D
+    lda WorkPointerOrValueHi                       ; PRG $290A | CPU $E90A | A5 02
+    sta (SignedOffsetAccumulator),y                   ; PRG $290C | CPU $E90C | 91 10
+    sta (ObjectRecordPointerLo),y                   ; PRG $290E | CPU $E90E | 91 A8
+    bpl Flow_E915                ; PRG $2910 | CPU $E910 | 10 03
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E912.
+; Local behavior: Reads ComputeOrDispatch_E9BC; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_E9BC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E912:
+    jsr ComputeOrDispatch_E9BC                ; PRG $2912 | CPU $E912 | 20 BC E9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E915.
+; Local behavior: Reads WorkPointerOrValueLo, Ram_0501, Ram_0502; mutates ObjectRecordPointerLo, Ram_0500, GameplayStateBackup.
+; Parameters: WorkPointerOrValueLo, Ram_0501, Ram_0502.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$14; sta GameplayStateBackup; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E915:
+    ldy #$0A                        ; PRG $2915 | CPU $E915 | A0 0A
+    lda WorkPointerOrValueLo                       ; PRG $2917 | CPU $E917 | A5 01
+    asl a                           ; PRG $2919 | CPU $E919 | 0A
+    asl a                           ; PRG $291A | CPU $E91A | 0A
+    asl a                           ; PRG $291B | CPU $E91B | 0A
+    asl a                           ; PRG $291C | CPU $E91C | 0A
+    clc                             ; PRG $291D | CPU $E91D | 18
+    adc #$30                        ; PRG $291E | CPU $E91E | 69 30
+    sta (ObjectRecordPointerLo),y                   ; PRG $2920 | CPU $E920 | 91 A8
+    ldy #$1B                        ; PRG $2922 | CPU $E922 | A0 1B
+    txa                             ; PRG $2924 | CPU $E924 | 8A
+    sta (ObjectRecordPointerLo),y                   ; PRG $2925 | CPU $E925 | 91 A8
+    ldy #$00                        ; PRG $2927 | CPU $E927 | A0 00
+    tya                             ; PRG $2929 | CPU $E929 | 98
+    sta (ObjectRecordPointerLo),y                   ; PRG $292A | CPU $E92A | 91 A8
+    ldy #$0F                        ; PRG $292C | CPU $E92C | A0 0F
+    lda Ram_0501,x                  ; PRG $292E | CPU $E92E | BD 01 05
+    sta (ObjectRecordPointerLo),y                   ; PRG $2931 | CPU $E931 | 91 A8
+    lda #$02                        ; PRG $2933 | CPU $E933 | A9 02
+    sta Ram_0500,x                  ; PRG $2935 | CPU $E935 | 9D 00 05
+    ldy #$1C                        ; PRG $2938 | CPU $E938 | A0 1C
+    lda Ram_0502,x                  ; PRG $293A | CPU $E93A | BD 02 05
+    sta (ObjectRecordPointerLo),y                   ; PRG $293D | CPU $E93D | 91 A8
+    ldy #$00                        ; PRG $293F | CPU $E93F | A0 00
+    lda #$01                        ; PRG $2941 | CPU $E941 | A9 01
+    sta (ObjectRecordPointerLo),y                   ; PRG $2943 | CPU $E943 | 91 A8
+    lda #$14                        ; PRG $2945 | CPU $E945 | A9 14
+    sta GameplayStateBackup                       ; PRG $2947 | CPU $E947 | 85 22
+    rts                             ; PRG $2949 | CPU $E949 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E94 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E94A:
+    ldx #$00                        ; PRG $294A | CPU $E94A | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E94 C.
+; Local behavior: Reads Ram_0500, Flow_E974, WorkPointerOrValueHi, Flow_E967, Ram_0501, Ram_0502, SourceRecordPointerLo, Flow_E905; mutates no direct memory mutation observed.
+; Parameters: Ram_0500, Flow_E974, WorkPointerOrValueHi, Flow_E967, Ram_0501, Ram_0502, SourceRecordPointerLo, Flow_E905.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E94C:
+    lda Ram_0500,x                  ; PRG $294C | CPU $E94C | BD 00 05
+    cmp #$01                        ; PRG $294F | CPU $E94F | C9 01
+    bne Flow_E974                ; PRG $2951 | CPU $E951 | D0 21
+    lda WorkPointerOrValueHi                       ; PRG $2953 | CPU $E953 | A5 02
+    beq Flow_E967                ; PRG $2955 | CPU $E955 | F0 10
+    lda Ram_0501,x                  ; PRG $2957 | CPU $E957 | BD 01 05
+    cmp #$02                        ; PRG $295A | CPU $E95A | C9 02
+    bne Flow_E974                ; PRG $295C | CPU $E95C | D0 16
+    lda Ram_0502,x                  ; PRG $295E | CPU $E95E | BD 02 05
+    cmp SourceRecordPointerLo                       ; PRG $2961 | CPU $E961 | C5 03
+    beq Flow_E905                ; PRG $2963 | CPU $E963 | F0 A0
+    bne Flow_E974                ; PRG $2965 | CPU $E965 | D0 0D
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E967.
+; Local behavior: Reads Ram_0501, Flow_E97B, FrameCounter, Flow_E97C; mutates no direct memory mutation observed.
+; Parameters: Ram_0501, Flow_E97B, FrameCounter, Flow_E97C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E967:
+    lda Ram_0501,x                  ; PRG $2967 | CPU $E967 | BD 01 05
+    cmp #$02                        ; PRG $296A | CPU $E96A | C9 02
+    bcs Flow_E97B                ; PRG $296C | CPU $E96C | B0 0D
+    lda FrameCounter                       ; PRG $296E | CPU $E96E | A5 27
+    and #$7F                        ; PRG $2970 | CPU $E970 | 29 7F
+    beq Flow_E97C                ; PRG $2972 | CPU $E972 | F0 08
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E974.
+; Local behavior: Reads Flow_E94C; mutates no direct memory mutation observed.
+; Parameters: Flow_E94C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E974:
+    txa                             ; PRG $2974 | CPU $E974 | 8A
+    clc                             ; PRG $2975 | CPU $E975 | 18
+    adc #$04                        ; PRG $2976 | CPU $E976 | 69 04
+    tax                             ; PRG $2978 | CPU $E978 | AA
+    bpl Flow_E94C                ; PRG $2979 | CPU $E979 | 10 D1
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E97 B.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E97B:
+    rts                             ; PRG $297B | CPU $E97B | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E97 C.
+; Local behavior: Reads ComputeOrDispatch_E9BC, Ram_0502, Ram_0501, ObjectRecordPointerLo, ObjectRecordPointerHi, WorkPointerOrValueHi, UpdateZp_01_E8C0; mutates ObjectRecordPointerLo, Ram_0500, SourceRecordPointerLo, SignedOffsetAccumulator, CurrentSpriteTileId, WorkPointerOrValueHi.
+; Parameters: ComputeOrDispatch_E9BC, Ram_0502, Ram_0501, ObjectRecordPointerLo, ObjectRecordPointerHi, WorkPointerOrValueHi, UpdateZp_01_E8C0.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$00; sta WorkPointerOrValueHi; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E97C:
+    jsr ComputeOrDispatch_E9BC                ; PRG $297C | CPU $E97C | 20 BC E9
+    ldy #$1B                        ; PRG $297F | CPU $E97F | A0 1B
+    txa                             ; PRG $2981 | CPU $E981 | 8A
+    sta (ObjectRecordPointerLo),y                   ; PRG $2982 | CPU $E982 | 91 A8
+    ldy #$0A                        ; PRG $2984 | CPU $E984 | A0 0A
+    lda #$30                        ; PRG $2986 | CPU $E986 | A9 30
+    sta (ObjectRecordPointerLo),y                   ; PRG $2988 | CPU $E988 | 91 A8
+    lda #$02                        ; PRG $298A | CPU $E98A | A9 02
+    sta Ram_0500,x                  ; PRG $298C | CPU $E98C | 9D 00 05
+    ldy #$1C                        ; PRG $298F | CPU $E98F | A0 1C
+    lda Ram_0502,x                  ; PRG $2991 | CPU $E991 | BD 02 05
+    sta (ObjectRecordPointerLo),y                   ; PRG $2994 | CPU $E994 | 91 A8
+    sta SourceRecordPointerLo                       ; PRG $2996 | CPU $E996 | 85 03
+    ldy #$00                        ; PRG $2998 | CPU $E998 | A0 00
+    lda #$01                        ; PRG $299A | CPU $E99A | A9 01
+    sta (ObjectRecordPointerLo),y                   ; PRG $299C | CPU $E99C | 91 A8
+    ldy #$0F                        ; PRG $299E | CPU $E99E | A0 0F
+    lda Ram_0501,x                  ; PRG $29A0 | CPU $E9A0 | BD 01 05
+    sta (ObjectRecordPointerLo),y                   ; PRG $29A3 | CPU $E9A3 | 91 A8
+    lda ObjectRecordPointerLo                       ; PRG $29A5 | CPU $E9A5 | A5 A8
+    sta SignedOffsetAccumulator                       ; PRG $29A7 | CPU $E9A7 | 85 10
+    lda ObjectRecordPointerHi                       ; PRG $29A9 | CPU $E9A9 | A5 A9
+    sta CurrentSpriteTileId                       ; PRG $29AB | CPU $E9AB | 85 11
+    inc WorkPointerOrValueHi                       ; PRG $29AD | CPU $E9AD | E6 02
+    jsr UpdateZp_01_E8C0                ; PRG $29AF | CPU $E9AF | 20 C0 E8
+    inc WorkPointerOrValueHi                       ; PRG $29B2 | CPU $E9B2 | E6 02
+    jsr UpdateZp_01_E8C0                ; PRG $29B4 | CPU $E9B4 | 20 C0 E8
+    lda #$00                        ; PRG $29B7 | CPU $E9B7 | A9 00
+    sta WorkPointerOrValueHi                       ; PRG $29B9 | CPU $E9B9 | 85 02
+    rts                             ; PRG $29BB | CPU $E9BB | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch E9 BC.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_E9BC:
+    ldy #$20                        ; PRG $29BC | CPU $E9BC | A0 20
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch E9 BE.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_E9BE:
+    lda #$00                        ; PRG $29BE | CPU $E9BE | A9 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E9 C0.
+; Local behavior: Reads Flow_E9C0; mutates ObjectRecordPointerLo.
+; Parameters: Flow_E9C0.
+; Returns: returns to caller; flags/register result depends on final instructions: sta (ObjectRecordPointerLo),y; bne Flow_E9C0; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E9C0:
+    dey                             ; PRG $29C0 | CPU $E9C0 | 88
+    sta (ObjectRecordPointerLo),y                   ; PRG $29C1 | CPU $E9C1 | 91 A8
+    bne Flow_E9C0                ; PRG $29C3 | CPU $E9C3 | D0 FB
+    rts                             ; PRG $29C5 | CPU $E9C5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch E9 C6.
+; Local behavior: Reads CollisionCandidateIndex, Flow_E9CE; mutates no direct memory mutation observed.
+; Parameters: CollisionCandidateIndex, Flow_E9CE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_E9C6:
+    ldx #$00                        ; PRG $29C6 | CPU $E9C6 | A2 00
+    lda CollisionCandidateIndex                       ; PRG $29C8 | CPU $E9C8 | A5 45
+    beq Flow_E9CE                ; PRG $29CA | CPU $E9CA | F0 02
+    ldx #$10                        ; PRG $29CC | CPU $E9CC | A2 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow E9 CE.
+; Local behavior: Reads ObjectRecordPointerLo; mutates CollisionCandidateIndex, Ram_06A0, Ram_06A3, Ram_06A4, Ram_06A5, Ram_06A8, Ram_06A9.
+; Parameters: ObjectRecordPointerLo.
+; Returns: returns to caller; flags/register result depends on final instructions: lda (ObjectRecordPointerLo),y; sta Ram_06A9,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_E9CE:
+    eor #$01                        ; PRG $29CE | CPU $E9CE | 49 01
+    sta CollisionCandidateIndex                       ; PRG $29D0 | CPU $E9D0 | 85 45
+    lda #$01                        ; PRG $29D2 | CPU $E9D2 | A9 01
+    sta Ram_06A0,x                  ; PRG $29D4 | CPU $E9D4 | 9D A0 06
+    lda #$05                        ; PRG $29D7 | CPU $E9D7 | A9 05
+    sta Ram_06A3,x                  ; PRG $29D9 | CPU $E9D9 | 9D A3 06
+    ldy #$06                        ; PRG $29DC | CPU $E9DC | A0 06
+    lda (ObjectRecordPointerLo),y                   ; PRG $29DE | CPU $E9DE | B1 A8
+    sta Ram_06A4,x                  ; PRG $29E0 | CPU $E9E0 | 9D A4 06
+    iny                             ; PRG $29E3 | CPU $E9E3 | C8
+    lda (ObjectRecordPointerLo),y                   ; PRG $29E4 | CPU $E9E4 | B1 A8
+    sta Ram_06A5,x                  ; PRG $29E6 | CPU $E9E6 | 9D A5 06
+    iny                             ; PRG $29E9 | CPU $E9E9 | C8
+    lda (ObjectRecordPointerLo),y                   ; PRG $29EA | CPU $E9EA | B1 A8
+    sta Ram_06A8,x                  ; PRG $29EC | CPU $E9EC | 9D A8 06
+    iny                             ; PRG $29EF | CPU $E9EF | C8
+    lda (ObjectRecordPointerLo),y                   ; PRG $29F0 | CPU $E9F0 | B1 A8
+    sta Ram_06A9,x                  ; PRG $29F2 | CPU $E9F2 | 9D A9 06
+    rts                             ; PRG $29F5 | CPU $E9F5 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 E9 F6.
+; Local behavior: Reads ScreenObjectMode, Flow_EA14; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride, OamBufferWriteOffset.
+; Parameters: ScreenObjectMode, Flow_EA14.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_E9F6:
+    lda #$A0                        ; PRG $29F6 | CPU $E9F6 | A9 A0
+    sta ObjectRecordPointerLo                       ; PRG $29F8 | CPU $E9F8 | 85 A8
+    lda #$06                        ; PRG $29FA | CPU $E9FA | A9 06
+    sta ObjectRecordPointerHi                       ; PRG $29FC | CPU $E9FC | 85 A9
+    lda #$10                        ; PRG $29FE | CPU $E9FE | A9 10
+    sta ObjectRecordStride                       ; PRG $2A00 | CPU $EA00 | 85 AA
+    lda #$02                        ; PRG $2A02 | CPU $EA02 | A9 02
+    sta OamBufferWriteOffset                       ; PRG $2A04 | CPU $EA04 | 85 AB
+    ldx #$D0                        ; PRG $2A06 | CPU $EA06 | A2 D0
+    ldy #$E0                        ; PRG $2A08 | CPU $EA08 | A0 E0
+    lda ScreenObjectMode                       ; PRG $2A0A | CPU $EA0A | A5 62
+    cmp #$02                        ; PRG $2A0C | CPU $EA0C | C9 02
+    bne Flow_EA14                ; PRG $2A0E | CPU $EA0E | D0 04
+    ldx #$C0                        ; PRG $2A10 | CPU $EA10 | A2 C0
+    ldy #$D0                        ; PRG $2A12 | CPU $EA12 | A0 D0
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA14.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_06AA, Ram_06BA.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA14:
+    stx Ram_06AA                    ; PRG $2A14 | CPU $EA14 | 8E AA 06
+    sty Ram_06BA                    ; PRG $2A17 | CPU $EA17 | 8C BA 06
+    ldx #$00                        ; PRG $2A1A | CPU $EA1A | A2 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA1 C.
+; Local behavior: Reads Ram_06A0, Flow_EA45, Ram_06A3, Flow_EA4F, Flow_EA37, Ram_06A4, Ram_06A5; mutates WorkPointerOrValueLo.
+; Parameters: Ram_06A0, Flow_EA45, Ram_06A3, Flow_EA4F, Flow_EA37, Ram_06A4, Ram_06A5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA1C:
+    lda Ram_06A0,x                  ; PRG $2A1C | CPU $EA1C | BD A0 06
+    beq Flow_EA45                ; PRG $2A1F | CPU $EA1F | F0 24
+    ldy Ram_06A3,x                  ; PRG $2A21 | CPU $EA21 | BC A3 06
+    bmi Flow_EA4F                ; PRG $2A24 | CPU $EA24 | 30 29
+    lda #$01                        ; PRG $2A26 | CPU $EA26 | A9 01
+    sta WorkPointerOrValueLo                       ; PRG $2A28 | CPU $EA28 | 85 01
+    lda $EA5B,y                     ; PRG $2A2A | CPU $EA2A | B9 5B EA
+    bpl Flow_EA37                ; PRG $2A2D | CPU $EA2D | 10 08
+    lda Ram_06A4,x                  ; PRG $2A2F | CPU $EA2F | BD A4 06
+    ldy Ram_06A5,x                  ; PRG $2A32 | CPU $EA32 | BC A5 06
+    sty WorkPointerOrValueLo                       ; PRG $2A35 | CPU $EA35 | 84 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA37.
+; Local behavior: Reads WorkPointerOrValueLo, Ram_06A3; mutates Ram_06A6, Ram_06A7, Ram_06A3.
+; Parameters: WorkPointerOrValueLo, Ram_06A3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA37:
+    sta Ram_06A6,x                  ; PRG $2A37 | CPU $EA37 | 9D A6 06
+    lda WorkPointerOrValueLo                       ; PRG $2A3A | CPU $EA3A | A5 01
+    sta Ram_06A7,x                  ; PRG $2A3C | CPU $EA3C | 9D A7 06
+    dec Ram_06A3,x                  ; PRG $2A3F | CPU $EA3F | DE A3 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA42.
+; Local behavior: Reads LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA42:
+    jsr LoadObjectSpriteRenderState                ; PRG $2A42 | CPU $EA42 | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA45.
+; Local behavior: Reads AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_EA1C; mutates OamBufferWriteOffset.
+; Parameters: AdvanceObjectRecordPointer, OamBufferWriteOffset, Flow_EA1C.
+; Returns: returns to caller; flags/register result depends on final instructions: dec OamBufferWriteOffset; bne Flow_EA1C; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA45:
+    jsr AdvanceObjectRecordPointer                ; PRG $2A45 | CPU $EA45 | 20 0F C2
+    ldx #$10                        ; PRG $2A48 | CPU $EA48 | A2 10
+    dec OamBufferWriteOffset                       ; PRG $2A4A | CPU $EA4A | C6 AB
+    bne Flow_EA1C                ; PRG $2A4C | CPU $EA4C | D0 CE
+    rts                             ; PRG $2A4E | CPU $EA4E | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EA4 F.
+; Local behavior: Reads Flow_EA42, GameplayConstantTable_FF4C; mutates Ram_06A0, Ram_06A6.
+; Parameters: Flow_EA42, GameplayConstantTable_FF4C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EA4F:
+    lda #$00                        ; PRG $2A4F | CPU $EA4F | A9 00
+    sta Ram_06A0,x                  ; PRG $2A51 | CPU $EA51 | 9D A0 06
+    lda #$47                        ; PRG $2A54 | CPU $EA54 | A9 47
+    sta Ram_06A6,x                  ; PRG $2A56 | CPU $EA56 | 9D A6 06
+    bpl Flow_EA42                ; PRG $2A59 | CPU $EA59 | 10 E7
+    eor GameplayConstantTable_FF4C                   ; PRG $2A5B | CPU $EA5B | 4D 4C FF
+    .byte $4B,$FF,$4B,$A0,$00,$A9,$03,$85,$11,$B9,$A0,$04,$F0,$0A,$98,$18 ; PRG $2A5E | CPU $EA5E
+    .byte $69,$10,$A8,$C6,$11,$10,$F2,$60,$A9,$01,$99,$A0,$04,$BD,$08,$04 ; PRG $2A6E | CPU $EA6E
+    .byte $99,$A8,$04,$BD,$09,$04,$99,$A9,$04,$98,$AA,$4A,$4A,$9D,$AA,$04 ; PRG $2A7E | CPU $EA7E
+    .byte $A9,$24,$9D,$A6,$04,$A9,$00,$9D,$A7,$04,$A9,$0E,$9D,$AD,$04,$A9 ; PRG $2A8E | CPU $EA8E
+    .byte $01 ; PRG $2A9E | CPU $EA9E
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 04 A4 EA9 F.
+; Local behavior: Reads CalculateAndClampValue_EABE, WorkPointerOrValueHi, Flow_EABD, Ram_04AC; mutates Ram_04A4, Ram_04AC, Ram_04AB.
+; Parameters: CalculateAndClampValue_EABE, WorkPointerOrValueHi, Flow_EABD, Ram_04AC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_04A4_EA9F:
+    sta Ram_04A4,x                  ; PRG $2A9F | CPU $EA9F | 9D A4 04
+    jsr CalculateAndClampValue_EABE                ; PRG $2AA2 | CPU $EAA2 | 20 BE EA
+    sta Ram_04AC,x                  ; PRG $2AA5 | CPU $EAA5 | 9D AC 04
+    lda WorkPointerOrValueHi                       ; PRG $2AA8 | CPU $EAA8 | A5 02
+    sta Ram_04AB,x                  ; PRG $2AAA | CPU $EAAA | 9D AB 04
+    cpx #$40                        ; PRG $2AAD | CPU $EAAD | E0 40
+    beq Flow_EABD                ; PRG $2AAF | CPU $EAAF | F0 0C
+    lda Ram_04AC,x                  ; PRG $2AB1 | CPU $EAB1 | BD AC 04
+    cmp #$03                        ; PRG $2AB4 | CPU $EAB4 | C9 03
+    bcc Flow_EABD                ; PRG $2AB6 | CPU $EAB6 | 90 05
+    lda #$02                        ; PRG $2AB8 | CPU $EAB8 | A9 02
+    sta Ram_04AC,x                  ; PRG $2ABA | CPU $EABA | 9D AC 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EABD.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EABD:
+    rts                             ; PRG $2ABD | CPU $EABD | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value EABE.
+; Local behavior: Reads Ram_04A8, Ram_0308, Ram_0309, Ram_04A9, Flow_EADB, WorkPointerOrValueHi, ComputeOrDispatch_E695; mutates WorkPointerOrValueHi, SignedOffsetAccumulator, WorkPointerOrValueLo.
+; Parameters: Ram_04A8, Ram_0308, Ram_0309, Ram_04A9, Flow_EADB, WorkPointerOrValueHi, ComputeOrDispatch_E695.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_EABE:
+    lda #$00                        ; PRG $2ABE | CPU $EABE | A9 00
+    sta WorkPointerOrValueHi                       ; PRG $2AC0 | CPU $EAC0 | 85 02
+    sta SignedOffsetAccumulator                       ; PRG $2AC2 | CPU $EAC2 | 85 10
+    lda Ram_04A8,x                  ; PRG $2AC4 | CPU $EAC4 | BD A8 04
+    sec                             ; PRG $2AC7 | CPU $EAC7 | 38
+    sbc Ram_0308                    ; PRG $2AC8 | CPU $EAC8 | ED 08 03
+    sta WorkPointerOrValueLo                       ; PRG $2ACB | CPU $EACB | 85 01
+    lda Ram_0309                    ; PRG $2ACD | CPU $EACD | AD 09 03
+    sec                             ; PRG $2AD0 | CPU $EAD0 | 38
+    sbc Ram_04A9,x                  ; PRG $2AD1 | CPU $EAD1 | FD A9 04
+    bcs Flow_EADB                ; PRG $2AD4 | CPU $EAD4 | B0 05
+    inc WorkPointerOrValueHi                       ; PRG $2AD6 | CPU $EAD6 | E6 02
+    jsr ComputeOrDispatch_E695                ; PRG $2AD8 | CPU $EAD8 | 20 95 E6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EADB.
+; Local behavior: Reads Ram_04A4; mutates PackedHudOrObjectValue.
+; Parameters: Ram_04A4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EADB:
+    sta PackedHudOrObjectValue                       ; PRG $2ADB | CPU $EADB | 85 16
+    ldy Ram_04A4,x                  ; PRG $2ADD | CPU $EADD | BC A4 04
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EAE0.
+; Local behavior: Reads PackedHudOrObjectValue, Flow_EAE7, SignedOffsetAccumulator; mutates SignedOffsetAccumulator.
+; Parameters: PackedHudOrObjectValue, Flow_EAE7, SignedOffsetAccumulator.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EAE0:
+    clc                             ; PRG $2AE0 | CPU $EAE0 | 18
+    adc PackedHudOrObjectValue                       ; PRG $2AE1 | CPU $EAE1 | 65 16
+    bcc Flow_EAE7                ; PRG $2AE3 | CPU $EAE3 | 90 02
+    inc SignedOffsetAccumulator                       ; PRG $2AE5 | CPU $EAE5 | E6 10
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EAE7.
+; Local behavior: Reads Flow_EAE0, SignedOffsetAccumulator, ComputeOrDispatch_EAF5; mutates SignedOffsetAccumulator.
+; Parameters: Flow_EAE0, SignedOffsetAccumulator, ComputeOrDispatch_EAF5.
+; Returns: returns to caller; flags/register result depends on final instructions: jsr ComputeOrDispatch_EAF5; tya; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EAE7:
+    dey                             ; PRG $2AE7 | CPU $EAE7 | 88
+    bne Flow_EAE0                ; PRG $2AE8 | CPU $EAE8 | D0 F6
+    asl a                           ; PRG $2AEA | CPU $EAEA | 0A
+    rol SignedOffsetAccumulator                       ; PRG $2AEB | CPU $EAEB | 26 10
+    asl a                           ; PRG $2AED | CPU $EAED | 0A
+    rol SignedOffsetAccumulator                       ; PRG $2AEE | CPU $EAEE | 26 10
+    jsr ComputeOrDispatch_EAF5                ; PRG $2AF0 | CPU $EAF0 | 20 F5 EA
+    tya                             ; PRG $2AF3 | CPU $EAF3 | 98
+    rts                             ; PRG $2AF4 | CPU $EAF4 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch EAF5.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_EAF5:
+    ldy #$00                        ; PRG $2AF5 | CPU $EAF5 | A0 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EAF7.
+; Local behavior: Reads WorkPointerOrValueLo, Flow_EB00, SignedOffsetAccumulator, Flow_EB05; mutates SignedOffsetAccumulator.
+; Parameters: WorkPointerOrValueLo, Flow_EB00, SignedOffsetAccumulator, Flow_EB05.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EAF7:
+    sec                             ; PRG $2AF7 | CPU $EAF7 | 38
+    sbc WorkPointerOrValueLo                       ; PRG $2AF8 | CPU $EAF8 | E5 01
+    bcs Flow_EB00                ; PRG $2AFA | CPU $EAFA | B0 04
+    dec SignedOffsetAccumulator                       ; PRG $2AFC | CPU $EAFC | C6 10
+    bmi Flow_EB05                ; PRG $2AFE | CPU $EAFE | 30 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB00.
+; Local behavior: Reads Flow_EAF7; mutates no direct memory mutation observed.
+; Parameters: Flow_EAF7.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB00:
+    iny                             ; PRG $2B00 | CPU $EB00 | C8
+    cpy #$08                        ; PRG $2B01 | CPU $EB01 | C0 08
+    bne Flow_EAF7                ; PRG $2B03 | CPU $EB03 | D0 F2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB05.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB05:
+    rts                             ; PRG $2B05 | CPU $EB05 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 EB06.
+; Local behavior: Reads implicit CPU state or none observed; mutates ObjectRecordPointerLo, ObjectRecordPointerHi, ObjectRecordStride, OamBufferWriteOffset, ObjectSlotOrFieldIndex.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_EB06:
+    lda #$A0                        ; PRG $2B06 | CPU $EB06 | A9 A0
+    sta ObjectRecordPointerLo                       ; PRG $2B08 | CPU $EB08 | 85 A8
+    lda #$04                        ; PRG $2B0A | CPU $EB0A | A9 04
+    sta ObjectRecordPointerHi                       ; PRG $2B0C | CPU $EB0C | 85 A9
+    lda #$10                        ; PRG $2B0E | CPU $EB0E | A9 10
+    sta ObjectRecordStride                       ; PRG $2B10 | CPU $EB10 | 85 AA
+    lda #$03                        ; PRG $2B12 | CPU $EB12 | A9 03
+    sta OamBufferWriteOffset                       ; PRG $2B14 | CPU $EB14 | 85 AB
+    lda #$00                        ; PRG $2B16 | CPU $EB16 | A9 00
+    sta ObjectSlotOrFieldIndex                       ; PRG $2B18 | CPU $EB18 | 85 0E
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB1 A.
+; Local behavior: Reads ObjectSlotOrFieldIndex, Ram_04A0, Flow_EB27, CalculateAndClampValue_EB36, LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: ObjectSlotOrFieldIndex, Ram_04A0, Flow_EB27, CalculateAndClampValue_EB36, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB1A:
+    ldx ObjectSlotOrFieldIndex                       ; PRG $2B1A | CPU $EB1A | A6 0E
+    lda Ram_04A0,x                  ; PRG $2B1C | CPU $EB1C | BD A0 04
+    beq Flow_EB27                ; PRG $2B1F | CPU $EB1F | F0 06
+    jsr CalculateAndClampValue_EB36                ; PRG $2B21 | CPU $EB21 | 20 36 EB
+    jsr LoadObjectSpriteRenderState                ; PRG $2B24 | CPU $EB24 | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB27.
+; Local behavior: Reads AdvanceObjectRecordPointer, ObjectSlotOrFieldIndex, OamBufferWriteOffset, Flow_EB1A; mutates ObjectSlotOrFieldIndex, OamBufferWriteOffset.
+; Parameters: AdvanceObjectRecordPointer, ObjectSlotOrFieldIndex, OamBufferWriteOffset, Flow_EB1A.
+; Returns: returns to caller; flags/register result depends on final instructions: dec OamBufferWriteOffset; bpl Flow_EB1A; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB27:
+    jsr AdvanceObjectRecordPointer                ; PRG $2B27 | CPU $EB27 | 20 0F C2
+    lda ObjectSlotOrFieldIndex                       ; PRG $2B2A | CPU $EB2A | A5 0E
+    clc                             ; PRG $2B2C | CPU $EB2C | 18
+    adc #$10                        ; PRG $2B2D | CPU $EB2D | 69 10
+    sta ObjectSlotOrFieldIndex                       ; PRG $2B2F | CPU $EB2F | 85 0E
+    dec OamBufferWriteOffset                       ; PRG $2B31 | CPU $EB31 | C6 AB
+    bpl Flow_EB1A                ; PRG $2B33 | CPU $EB33 | 10 E5
+    rts                             ; PRG $2B35 | CPU $EB35 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Calculate And Clamp Value EB36.
+; Local behavior: Reads Ram_04AE, Flow_EB80, Ram_04A8, Ram_04A4, Ram_04AC, RecordRepeatCount, Flow_EB5A, FrameCounter; mutates Ram_04A8, RecordRepeatCount.
+; Parameters: Ram_04AE, Flow_EB80, Ram_04A8, Ram_04A4, Ram_04AC, RecordRepeatCount, Flow_EB5A, FrameCounter.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+CalculateAndClampValue_EB36:
+    lda Ram_04AE,x                  ; PRG $2B36 | CPU $EB36 | BD AE 04
+    bne Flow_EB80                ; PRG $2B39 | CPU $EB39 | D0 45
+    lda Ram_04A8,x                  ; PRG $2B3B | CPU $EB3B | BD A8 04
+    clc                             ; PRG $2B3E | CPU $EB3E | 18
+    adc Ram_04A4,x                  ; PRG $2B3F | CPU $EB3F | 7D A4 04
+    sta Ram_04A8,x                  ; PRG $2B42 | CPU $EB42 | 9D A8 04
+    cmp #$D0                        ; PRG $2B45 | CPU $EB45 | C9 D0
+    bcs Flow_EB80                ; PRG $2B47 | CPU $EB47 | B0 37
+    lda Ram_04AC,x                  ; PRG $2B49 | CPU $EB49 | BD AC 04
+    sta RecordRepeatCount                       ; PRG $2B4C | CPU $EB4C | 85 07
+    lsr RecordRepeatCount                       ; PRG $2B4E | CPU $EB4E | 46 07
+    bcc Flow_EB5A                ; PRG $2B50 | CPU $EB50 | 90 08
+    lda FrameCounter                       ; PRG $2B52 | CPU $EB52 | A5 27
+    and #$02                        ; PRG $2B54 | CPU $EB54 | 29 02
+    bne Flow_EB5A                ; PRG $2B56 | CPU $EB56 | D0 02
+    inc RecordRepeatCount                       ; PRG $2B58 | CPU $EB58 | E6 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB5 A.
+; Local behavior: Reads RecordRepeatCount, Flow_EB66, FrameCounter; mutates RecordRepeatCount.
+; Parameters: RecordRepeatCount, Flow_EB66, FrameCounter.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB5A:
+    lsr RecordRepeatCount                       ; PRG $2B5A | CPU $EB5A | 46 07
+    bcc Flow_EB66                ; PRG $2B5C | CPU $EB5C | 90 08
+    lda FrameCounter                       ; PRG $2B5E | CPU $EB5E | A5 27
+    and #$01                        ; PRG $2B60 | CPU $EB60 | 29 01
+    bne Flow_EB66                ; PRG $2B62 | CPU $EB62 | D0 02
+    inc RecordRepeatCount                       ; PRG $2B64 | CPU $EB64 | E6 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB66.
+; Local behavior: Reads RecordRepeatCount, Ram_04AB, Flow_EB70, ComputeOrDispatch_E695; mutates no direct memory mutation observed.
+; Parameters: RecordRepeatCount, Ram_04AB, Flow_EB70, ComputeOrDispatch_E695.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB66:
+    lda RecordRepeatCount                       ; PRG $2B66 | CPU $EB66 | A5 07
+    ldy Ram_04AB,x                  ; PRG $2B68 | CPU $EB68 | BC AB 04
+    beq Flow_EB70                ; PRG $2B6B | CPU $EB6B | F0 03
+    jsr ComputeOrDispatch_E695                ; PRG $2B6D | CPU $EB6D | 20 95 E6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB70.
+; Local behavior: Reads Ram_04A9, Flow_EB80; mutates Ram_04A9.
+; Parameters: Ram_04A9, Flow_EB80.
+; Returns: returns to caller; flags/register result depends on final instructions: cmp #$10; bcc Flow_EB80; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB70:
+    clc                             ; PRG $2B70 | CPU $EB70 | 18
+    adc Ram_04A9,x                  ; PRG $2B71 | CPU $EB71 | 7D A9 04
+    sta Ram_04A9,x                  ; PRG $2B74 | CPU $EB74 | 9D A9 04
+    cmp #$F0                        ; PRG $2B77 | CPU $EB77 | C9 F0
+    bcs Flow_EB80                ; PRG $2B79 | CPU $EB79 | B0 05
+    cmp #$10                        ; PRG $2B7B | CPU $EB7B | C9 10
+    bcc Flow_EB80                ; PRG $2B7D | CPU $EB7D | 90 01
+    rts                             ; PRG $2B7F | CPU $EB7F | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EB80.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_04A0, Ram_04AE, Ram_04A6.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: .byte $A9,$03,$8D,$A7,$03,$8D,$A2,$03,$A9,$2C,$8D,$A5,$03,$A0,$80,$A5; .byte $62,$C9,$02,$D0,$02,$A0,$70,$8C,$AA,$03,$8E,$AD,$03,$BD,$1E,$04; .byte $8D,$AF,$03,$C6,$75,$4C,$49,$EC.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EB80:
+    lda #$00                        ; PRG $2B80 | CPU $EB80 | A9 00
+    sta Ram_04A0,x                  ; PRG $2B82 | CPU $EB82 | 9D A0 04
+    sta Ram_04AE,x                  ; PRG $2B85 | CPU $EB85 | 9D AE 04
+    lda #$49                        ; PRG $2B88 | CPU $EB88 | A9 49
+    sta Ram_04A6,x                  ; PRG $2B8A | CPU $EB8A | 9D A6 04
+    rts                             ; PRG $2B8D | CPU $EB8D | 60
+    .byte $A9,$00,$8D,$A1,$03,$8D,$AE,$03,$A9,$01,$8D,$A0,$03,$8D,$A3,$03 ; PRG $2B8E | CPU $EB8E
+    .byte $A9,$03,$8D,$A7,$03,$8D,$A2,$03,$A9,$2C,$8D,$A5,$03,$A0,$80,$A5 ; PRG $2B9E | CPU $EB9E
+    .byte $62,$C9,$02,$D0,$02,$A0,$70,$8C,$AA,$03,$8E,$AD,$03,$BD,$1E,$04 ; PRG $2BAE | CPU $EBAE
+    .byte $8D,$AF,$03,$C6,$75,$4C,$49,$EC ; PRG $2BBE | CPU $EBBE
+; -----------------------------------------------------------------------------
+; Global purpose: Update Zp A8 EBC6.
+; Local behavior: Reads Ram_03A0, Flow_EC34, Ram_03A1, Flow_EBE4, Flow_EC1D, ComputeOrDispatch_CEBF, Continuation_EC2E; mutates ObjectRecordPointerLo, ObjectRecordPointerHi.
+; Parameters: Ram_03A0, Flow_EC34, Ram_03A1, Flow_EBE4, Flow_EC1D, ComputeOrDispatch_CEBF, Continuation_EC2E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateZp_A8_EBC6:
+    lda Ram_03A0                    ; PRG $2BC6 | CPU $EBC6 | AD A0 03
+    beq Flow_EC34                ; PRG $2BC9 | CPU $EBC9 | F0 69
+    lda #$A0                        ; PRG $2BCB | CPU $EBCB | A9 A0
+    sta ObjectRecordPointerLo                       ; PRG $2BCD | CPU $EBCD | 85 A8
+    lda #$03                        ; PRG $2BCF | CPU $EBCF | A9 03
+    sta ObjectRecordPointerHi                       ; PRG $2BD1 | CPU $EBD1 | 85 A9
+    ldy Ram_03A1                    ; PRG $2BD3 | CPU $EBD3 | AC A1 03
+    beq Flow_EBE4                ; PRG $2BD6 | CPU $EBD6 | F0 0C
+    cpy #$03                        ; PRG $2BD8 | CPU $EBD8 | C0 03
+    beq Flow_EC1D                ; PRG $2BDA | CPU $EBDA | F0 41
+    ldx #$A0                        ; PRG $2BDC | CPU $EBDC | A2 A0
+    jsr ComputeOrDispatch_CEBF                ; PRG $2BDE | CPU $EBDE | 20 BF CE
+    jmp Continuation_EC2E                ; PRG $2BE1 | CPU $EBE1 | 4C 2E EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EBE4.
+; Local behavior: Reads Ram_03AE, Flow_EC08, Flow_EC02, UpdateActorCoordinates_C54B, UpdateRam_0301_CEE5, Continuation_EC2E; mutates Ram_03AE, AudioEffectRequest.
+; Parameters: Ram_03AE, Flow_EC08, Flow_EC02, UpdateActorCoordinates_C54B, UpdateRam_0301_CEE5, Continuation_EC2E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EBE4:
+    ldy Ram_03AE                    ; PRG $2BE4 | CPU $EBE4 | AC AE 03
+    beq Flow_EC08                ; PRG $2BE7 | CPU $EBE7 | F0 1F
+    lda #$00                        ; PRG $2BE9 | CPU $EBE9 | A9 00
+    sta Ram_03AE                    ; PRG $2BEB | CPU $EBEB | 8D AE 03
+    dey                             ; PRG $2BEE | CPU $EBEE | 88
+    bne Flow_EC02                ; PRG $2BEF | CPU $EBEF | D0 11
+    lda #$03                        ; PRG $2BF1 | CPU $EBF1 | A9 03
+    jsr UpdateActorCoordinates_C54B                ; PRG $2BF3 | CPU $EBF3 | 20 4B C5
+    lda #$04                        ; PRG $2BF6 | CPU $EBF6 | A9 04
+    sta AudioEffectRequest                       ; PRG $2BF8 | CPU $EBF8 | 85 FE
+    ldx #$A0                        ; PRG $2BFA | CPU $EBFA | A2 A0
+    jsr UpdateRam_0301_CEE5                ; PRG $2BFC | CPU $EBFC | 20 E5 CE
+    jmp Continuation_EC2E                ; PRG $2BFF | CPU $EBFF | 4C 2E EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EC02.
+; Local behavior: Reads UpdateRam_03A6_EC35, Continuation_EC2E; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_03A6_EC35, Continuation_EC2E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EC02:
+    jsr UpdateRam_03A6_EC35                ; PRG $2C02 | CPU $EC02 | 20 35 EC
+    jmp Continuation_EC2E                ; PRG $2C05 | CPU $EC05 | 4C 2E EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EC08.
+; Local behavior: Reads Ram_03AD, Ram_0408, Ram_0409, Continuation_EC2E; mutates Ram_03A8, Ram_03A9.
+; Parameters: Ram_03AD, Ram_0408, Ram_0409, Continuation_EC2E.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EC08:
+    ldy Ram_03AD                    ; PRG $2C08 | CPU $EC08 | AC AD 03
+    lda Ram_0408,y                  ; PRG $2C0B | CPU $EC0B | B9 08 04
+    clc                             ; PRG $2C0E | CPU $EC0E | 18
+    adc #$06                        ; PRG $2C0F | CPU $EC0F | 69 06
+    sta Ram_03A8                    ; PRG $2C11 | CPU $EC11 | 8D A8 03
+    lda Ram_0409,y                  ; PRG $2C14 | CPU $EC14 | B9 09 04
+    sta Ram_03A9                    ; PRG $2C17 | CPU $EC17 | 8D A9 03
+    jmp Continuation_EC2E                ; PRG $2C1A | CPU $EC1A | 4C 2E EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EC1 D.
+; Local behavior: Reads Ram_03AF, ComputeOrDispatch_EC43, ActorAnimationStep, UpdateRam_03A6_EC35; mutates ActorStateArray, ActorAnimationStep.
+; Parameters: Ram_03AF, ComputeOrDispatch_EC43, ActorAnimationStep, UpdateRam_03A6_EC35.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EC1D:
+    ldy Ram_03AF                    ; PRG $2C1D | CPU $EC1D | AC AF 03
+    lda #$01                        ; PRG $2C20 | CPU $EC20 | A9 01
+    sta ActorStateArray,y                     ; PRG $2C22 | CPU $EC22 | 99 70 00
+    tya                             ; PRG $2C25 | CPU $EC25 | 98
+    jsr ComputeOrDispatch_EC43                ; PRG $2C26 | CPU $EC26 | 20 43 EC
+    inc ActorAnimationStep                       ; PRG $2C29 | CPU $EC29 | E6 75
+    jsr UpdateRam_03A6_EC35                ; PRG $2C2B | CPU $EC2B | 20 35 EC
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation EC2 E.
+; Local behavior: Reads ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_C2B4, LoadObjectSpriteRenderState.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_EC2E:
+    jsr ComputeOrDispatch_C2B4                ; PRG $2C2E | CPU $EC2E | 20 B4 C2
+    jsr LoadObjectSpriteRenderState                ; PRG $2C31 | CPU $EC31 | 20 17 C2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EC34.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EC34:
+    rts                             ; PRG $2C34 | CPU $EC34 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 03 A6 EC35.
+; Local behavior: Reads Ram_03A3; mutates Ram_03A6, Ram_03A3, Ram_03A0.
+; Parameters: Ram_03A3.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$00; sta Ram_03A0; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_03A6_EC35:
+    lda #$47                        ; PRG $2C35 | CPU $EC35 | A9 47
+    sta Ram_03A6                    ; PRG $2C37 | CPU $EC37 | 8D A6 03
+    inc Ram_03A3                    ; PRG $2C3A | CPU $EC3A | EE A3 03
+    lda #$00                        ; PRG $2C3D | CPU $EC3D | A9 00
+    sta Ram_03A0                    ; PRG $2C3F | CPU $EC3F | 8D A0 03
+    rts                             ; PRG $2C42 | CPU $EC42 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch EC43.
+; Local behavior: Reads Flow_EC4D; mutates no direct memory mutation observed.
+; Parameters: Flow_EC4D.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_EC43:
+    ldx #$5F                        ; PRG $2C43 | CPU $EC43 | A2 5F
+    ldy #$EC                        ; PRG $2C45 | CPU $EC45 | A0 EC
+    bne Flow_EC4D                ; PRG $2C47 | CPU $EC47 | D0 04
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch EC49.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_EC49:
+    ldx #$64                        ; PRG $2C49 | CPU $EC49 | A2 64
+    ldy #$EC                        ; PRG $2C4B | CPU $EC4B | A0 EC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow EC4 D.
+; Local behavior: Reads ExpandPackedScoreOrHudData; mutates SourceRecordPointerLo, PackedCoordinateOrValue, WorkPointerOrValueLo, WorkPointerOrValueHi.
+; Parameters: ExpandPackedScoreOrHudData.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_EC4D:
+    stx SourceRecordPointerLo                       ; PRG $2C4D | CPU $EC4D | 86 03
+    sty PackedCoordinateOrValue                       ; PRG $2C4F | CPU $EC4F | 84 04
+    asl a                           ; PRG $2C51 | CPU $EC51 | 0A
+    asl a                           ; PRG $2C52 | CPU $EC52 | 0A
+    clc                             ; PRG $2C53 | CPU $EC53 | 18
+    adc #$47                        ; PRG $2C54 | CPU $EC54 | 69 47
+    sta WorkPointerOrValueLo                       ; PRG $2C56 | CPU $EC56 | 85 01
+    lda #$23                        ; PRG $2C58 | CPU $EC58 | A9 23
+    sta WorkPointerOrValueHi                       ; PRG $2C5A | CPU $EC5A | 85 02
+    jmp ExpandPackedScoreOrHudData                ; PRG $2C5C | CPU $EC5C | 4C 51 C4
+    .byte $22,$46,$48,$47,$49,$22,$4C,$4C,$4C,$4C ; PRG $2C5F | CPU $EC5F
+
+ActorCollisionOrStateTable_EC69:
+    .byte $00,$01,$00,$00,$20,$00,$00,$00,$00,$02,$03,$00,$00,$20,$00,$00 ; PRG $2C69 | CPU $EC69
+    .byte $00,$00,$00,$02,$04,$00,$1C,$00,$00,$00,$00,$01,$03,$04,$00,$1C ; PRG $2C79 | CPU $EC79
+    .byte $00,$00,$00,$00,$02,$03,$00,$00,$20,$00,$00,$00,$00,$00,$04,$04 ; PRG $2C89 | CPU $EC89
+    .byte $00,$18,$00,$00,$04,$00,$01,$05,$04,$00,$14,$00,$00,$08,$00,$02 ; PRG $2C99 | CPU $EC99
+    .byte $04,$00,$00,$20,$00,$00,$00,$00,$00,$04,$04,$00,$00,$14,$00,$08 ; PRG $2CA9 | CPU $ECA9
+    .byte $00,$01,$05,$08,$00,$00,$10,$00,$08,$00,$02,$04,$00,$00,$00,$20 ; PRG $2CB9 | CPU $ECB9
+    .byte $00,$00,$00,$00,$04,$04,$00,$00,$14,$00,$00,$08,$01,$05,$08,$00 ; PRG $2CC9 | CPU $ECC9
+    .byte $00,$10,$00,$00,$08,$02,$04,$00,$00,$00,$20,$00,$00,$00,$00,$04 ; PRG $2CD9 | CPU $ECD9
+    .byte $04,$00,$00,$0A,$0A,$00,$08,$01,$05,$08,$00,$00,$08,$08,$00,$08 ; PRG $2CE9 | CPU $ECE9
+    .byte $02,$04,$00,$00,$00,$00,$20,$00,$00,$AA ; PRG $2CF9 | CPU $ECF9
+
+IndexedGameplayLookupTable_ED03:
+    .byte $01,$00,$00,$00,$01,$01,$00,$00,$01,$02,$00,$00,$01,$03,$00,$00 ; PRG $2D03 | CPU $ED03
+    .byte $01,$04,$00,$00,$01,$05,$00,$00,$01,$06,$00,$00,$67,$ED,$6F,$ED ; PRG $2D13 | CPU $ED13
+    .byte $00,$00,$00,$00,$6B,$ED,$73,$ED,$57,$ED,$5F,$ED,$87,$ED,$8F,$ED ; PRG $2D23 | CPU $ED23
+    .byte $5B,$ED,$63,$ED,$8B,$ED,$93,$ED,$77,$ED,$7F,$ED,$A7,$ED,$AF,$ED ; PRG $2D33 | CPU $ED33
+    .byte $7B,$ED,$83,$ED,$AB,$ED,$B3,$ED,$97,$ED,$9F,$ED,$00,$00,$00,$00 ; PRG $2D43 | CPU $ED43
+    .byte $9B,$ED,$A3,$ED,$20,$F7,$ED,$01,$20,$B7,$ED,$00,$20,$F7,$ED,$00 ; PRG $2D53 | CPU $ED53
+    .byte $20,$B7,$ED,$01,$20,$17,$EE,$00,$20,$17,$EE,$01,$20,$D7,$ED,$01 ; PRG $2D63 | CPU $ED63
+    .byte $20,$D7,$ED,$00,$38,$AA,$EE,$01,$38,$3A,$EE,$00,$38,$AA,$EE,$00 ; PRG $2D73 | CPU $ED73
+    .byte $38,$3A,$EE,$01,$38,$E2,$EE,$00,$38,$E2,$EE,$01,$38,$72,$EE,$01 ; PRG $2D83 | CPU $ED83
+    .byte $38,$72,$EE,$00,$17,$4B,$EF,$01,$17,$1D,$EF,$00,$17,$4B,$EF,$00 ; PRG $2D93 | CPU $ED93
+    .byte $17,$1D,$EF,$01,$17,$62,$EF,$00,$17,$62,$EF,$01,$17,$34,$EF,$01 ; PRG $2DA3 | CPU $EDA3
+    .byte $17,$34,$EF,$00,$10,$10,$00,$11,$10,$00,$10,$11,$00,$10,$11,$00 ; PRG $2DB3 | CPU $EDB3
+    .byte $11,$01,$00,$11,$01,$00,$01,$11,$00,$01,$01,$00,$11,$01,$00,$01 ; PRG $2DC3 | CPU $EDC3
+    .byte $01,$00,$01,$00,$10,$01,$00,$01,$01,$00,$91,$01,$00,$01,$91,$00 ; PRG $2DD3 | CPU $EDD3
+    .byte $01,$91,$00,$91,$91,$00,$90,$91,$00,$90,$90,$00,$91,$90,$00,$90 ; PRG $2DE3 | CPU $EDE3
+    .byte $90,$00,$90,$00,$90,$90,$00,$99,$90,$00,$90,$99,$00,$90,$99,$00 ; PRG $2DF3 | CPU $EDF3
+    .byte $99,$09,$00,$99,$09,$00,$09,$99,$00,$09,$09,$00,$99,$09,$00,$09 ; PRG $2E03 | CPU $EE03
+    .byte $09,$00,$09,$00,$10,$09,$00,$09,$09,$00,$19,$09,$00,$09,$19,$00 ; PRG $2E13 | CPU $EE13
+    .byte $09,$19,$00,$19,$19,$00,$10,$19,$00,$10,$10,$00,$19,$10,$00,$10 ; PRG $2E23 | CPU $EE23
+    .byte $10,$00,$10,$00,$FF,$B7,$ED,$10,$10,$10,$00,$10,$10,$10,$00,$11 ; PRG $2E33 | CPU $EE33
+    .byte $10,$10,$00,$11,$10,$11,$00,$10,$11,$10,$00,$11,$10,$11,$00,$11 ; PRG $2E43 | CPU $EE43
+    .byte $11,$11,$00,$11,$11,$11,$00,$11,$11,$01,$00,$11,$11,$01,$00,$11 ; PRG $2E53 | CPU $EE53
+    .byte $01,$11,$00,$01,$01,$01,$00,$11,$01,$01,$00,$01,$01,$01,$00,$01 ; PRG $2E63 | CPU $EE63
+    .byte $01,$01,$00,$01,$01,$91,$00,$01,$01,$01,$00,$91,$01,$91,$00,$01 ; PRG $2E73 | CPU $EE73
+    .byte $91,$91,$00,$01,$91,$91,$00,$91,$91,$91,$00,$91,$91,$91,$00,$90 ; PRG $2E83 | CPU $EE83
+    .byte $91,$90,$00,$91,$90,$91,$00,$90,$91,$90,$00,$90,$90,$91,$00,$90 ; PRG $2E93 | CPU $EE93
+    .byte $90,$99,$00,$90,$90,$90,$00,$90,$90,$90,$00,$90,$90,$90,$00,$99 ; PRG $2EA3 | CPU $EEA3
+    .byte $90,$90,$00,$99,$90,$99,$00,$90,$99,$90,$00,$99,$90,$99,$00,$99 ; PRG $2EB3 | CPU $EEB3
+    .byte $99,$99,$00,$99,$99,$99,$00,$99,$99,$09,$00,$99,$99,$09,$00,$99 ; PRG $2EC3 | CPU $EEC3
+    .byte $09,$99,$00,$09,$09,$09,$00,$99,$09,$09,$00,$09,$09,$09,$00,$09 ; PRG $2ED3 | CPU $EED3
+    .byte $09,$09,$00,$09,$09,$19,$00,$09,$09,$09,$00,$19,$09,$19,$00,$09 ; PRG $2EE3 | CPU $EEE3
+    .byte $19,$19,$00,$09,$19,$19,$00,$19,$19,$19,$00,$19,$19,$19,$00,$10 ; PRG $2EF3 | CPU $EEF3
+    .byte $19,$10,$00,$19,$10,$19,$00,$10,$19,$10,$00,$10,$10,$19,$00,$10 ; PRG $2F03 | CPU $EF03
+    .byte $10,$10,$00,$10,$10,$10,$00,$FF,$3A,$EE,$10,$10,$10,$10,$11,$10 ; PRG $2F13 | CPU $EF13
+    .byte $10,$10,$11,$10,$10,$01,$10,$10,$01,$10,$01,$10,$01,$01,$10,$01 ; PRG $2F23 | CPU $EF23
+    .byte $01,$01,$01,$90,$01,$01,$90,$01,$90,$01,$90,$90,$01,$90,$90,$91 ; PRG $2F33 | CPU $EF33
+    .byte $90,$90,$90,$91,$90,$90,$90,$90,$90,$90,$90,$90,$99,$90,$90,$90 ; PRG $2F43 | CPU $EF43
+    .byte $99,$90,$90,$09,$90,$90,$09,$90,$09,$90,$09,$09,$90,$09,$09,$09 ; PRG $2F53 | CPU $EF53
+    .byte $09,$10,$09,$09,$10,$09,$10,$09,$10,$10,$09,$10,$10,$19,$10,$10 ; PRG $2F63 | CPU $EF63
+    .byte $10,$19,$10,$10,$10,$10,$FF,$1D,$EF ; PRG $2F73 | CPU $EF73
+
+HudDigitGlyphPointerTableLo:
+    .byte $94 ; PRG $2F7C | CPU $EF7C
+
+HudDigitGlyphPointerTableHi:
+    .byte $EF,$98,$EF,$9C,$EF,$A0,$EF,$A4,$EF,$A8,$EF,$AC,$EF,$BC,$EF,$CC ; PRG $2F7D | CPU $EF7D
+    .byte $EF,$DC,$EF,$F1,$EF,$06,$F0,$03,$20,$6F,$06,$03,$20,$64,$06,$03 ; PRG $2F8D | CPU $EF8D
+    .byte $20,$78,$06,$03,$20,$A4,$01,$03,$20,$BA,$04,$03,$20,$84,$02,$0F ; PRG $2F9D | CPU $EF9D
+    .byte $22,$0A,$0C,$24,$24,$19,$15,$0A,$22,$0E,$1B,$24,$45,$24,$24,$0F ; PRG $2FAD | CPU $EFAD
+    .byte $22,$0A,$0C,$24,$24,$19,$15,$0A,$22,$0E,$1B,$24,$4D,$24,$24,$0F ; PRG $2FBD | CPU $EFBD
+    .byte $22,$4A,$0C,$24,$10,$0A,$16,$0E,$24,$24,$18,$1F,$0E,$1B,$24,$14 ; PRG $2FCD | CPU $EFCD
+    .byte $20,$C8,$02,$85,$87,$20,$E8,$02,$86,$88,$20,$D6,$02,$85,$87,$20 ; PRG $2FDD | CPU $EFDD
+    .byte $F6,$02,$86,$88,$14,$20,$C8,$02,$24,$24,$20,$E8,$02,$24,$24,$20 ; PRG $2FED | CPU $EFED
+    .byte $D6,$02,$24,$24,$20,$F6,$02,$24,$24,$0F,$22,$0A,$0C,$19,$0E,$1B ; PRG $2FFD | CPU $EFFD
+    .byte $0F,$0E,$0C,$1D,$24,$03,$00,$00,$00,$3F,$00,$20,$0F,$30,$27,$06 ; PRG $300D | CPU $F00D
+    .byte $0F,$30,$22,$12,$0F,$30,$2A,$1A,$0F,$2A,$16,$02,$0F,$30,$27,$06 ; PRG $301D | CPU $F01D
+    .byte $0F,$12,$30,$27,$0F,$2A,$30,$02,$0F,$16,$2A,$1A,$00,$3F,$00,$20 ; PRG $302D | CPU $F02D
+    .byte $0F,$30,$27,$06,$0F,$30,$10,$00,$0F,$30,$16,$26,$0F,$2A,$16,$02 ; PRG $303D | CPU $F03D
+    .byte $0F,$30,$27,$06,$0F,$12,$30,$27,$0F,$2A,$30,$02,$0F,$16,$2A,$1A ; PRG $304D | CPU $F04D
+    .byte $00,$3F,$00,$20,$0F,$30,$27,$06,$0F,$30,$28,$18,$0F,$30,$2A,$1A ; PRG $305D | CPU $F05D
+    .byte $0F,$2A,$16,$02,$0F,$30,$27,$06,$0F,$12,$30,$27,$0F,$2A,$30,$02 ; PRG $306D | CPU $F06D
+    .byte $0F,$16,$2A,$1A,$00,$3F,$00,$18,$0F,$2B,$21,$27,$0F,$30,$30,$0F ; PRG $307D | CPU $F07D
+    .byte $0F,$0F,$30,$30,$0F,$30,$30,$30,$0F,$27,$27,$27,$0F,$30,$27,$06 ; PRG $308D | CPU $F08D
+    .byte $00,$20,$63,$12,$FD,$5F,$FC,$FB,$5F,$FC,$FD,$24,$FE,$FD,$24,$FE ; PRG $309D | CPU $F09D
+    .byte $FD,$5F,$FE,$FD,$24,$FE,$20,$83,$12,$FD,$24,$FE,$FD,$24,$FE,$FD ; PRG $30AD | CPU $F0AD
+    .byte $FC,$FE,$FD,$FB,$5E,$FD,$24,$24,$FD,$24,$FE,$20,$A3,$12,$FD,$24 ; PRG $30BD | CPU $F0BD
+    .byte $FE,$FD,$24,$FE,$FD,$5F,$FE,$FD,$5F,$FC,$FD,$5F,$FE,$8F,$5F,$5E ; PRG $30CD | CPU $F0CD
+    .byte $20,$C3,$11,$FD,$24,$FE,$FD,$24,$FE,$FD,$8F,$FE,$FD,$8F,$FE,$FD ; PRG $30DD | CPU $F0DD
+    .byte $24,$24,$24,$5F,$20,$E3,$11,$FD,$5F,$5E,$8F,$5F,$5E,$FD,$24,$FE ; PRG $30ED | CPU $F0ED
+    .byte $FD,$24,$FE,$FD,$5F,$FE,$24,$5F,$21,$29,$0C,$FD,$24,$FE,$FB,$5F ; PRG $30FD | CPU $F0FD
+    .byte $FC,$FD,$24,$FE,$FB,$5F,$FC,$21,$49,$0C,$FD,$FB,$5E,$FD,$24,$FE ; PRG $310D | CPU $F10D
+    .byte $FD,$FC,$FE,$FD,$24,$FE,$21,$69,$0A,$FD,$5F,$FC,$FD,$24,$FE,$FD ; PRG $311D | CPU $F11D
+    .byte $5F,$FE,$FD,$21,$89,$0C,$FD,$8F,$FE,$FD,$24,$FE,$FD,$8F,$FE,$FD ; PRG $312D | CPU $F12D
+    .byte $FF,$FE,$21,$A9,$0C,$FD,$24,$FE,$8F,$5F,$5E,$FD,$24,$FE,$8F,$5F ; PRG $313D | CPU $F13D
+    .byte $FE,$20,$77,$8B,$28,$3D,$3D,$3D,$24,$24,$24,$3D,$3D,$3D,$2E,$20 ; PRG $314D | CPU $F14D
+    .byte $78,$C4,$3D,$21,$58,$C4,$3D,$20,$79,$83,$3D,$3D,$2A,$21,$79,$83 ; PRG $315D | CPU $F15D
+    .byte $2C,$3D,$3D,$20,$7A,$8B,$3D,$3D,$2B,$2D,$3D,$3D,$2B,$24,$2D,$3D ; PRG $316D | CPU $F16D
+    .byte $3D,$20,$7B,$CB,$3D,$20,$7C,$8B,$29,$3D,$3D,$3D,$2F,$29,$3D,$3D ; PRG $317D | CPU $F17D
+    .byte $3D,$3D,$2F,$22,$09,$0F,$01,$24,$19,$15,$0A,$22,$0E,$1B,$24,$10 ; PRG $318D | CPU $F18D
+    .byte $0A,$16,$0E,$24,$0A,$22,$49,$0F,$01,$24,$19,$15,$0A,$22,$0E,$1B ; PRG $319D | CPU $F19D
+    .byte $24,$10,$0A,$16,$0E,$24,$0B,$22,$89,$0F,$02,$24,$19,$15,$0A,$22 ; PRG $31AD | CPU $F1AD
+    .byte $0E,$1B,$24,$10,$0A,$16,$0E,$24,$0A,$22,$C9,$0F,$02,$24,$19,$15 ; PRG $31BD | CPU $F1BD
+    .byte $0A,$22,$0E,$1B,$24,$10,$0A,$16,$0E,$24,$0B,$23,$25,$16,$25,$01 ; PRG $31CD | CPU $F1CD
+    .byte $09,$08,$04,$24,$17,$12,$17,$1D,$0E,$17,$0D,$18,$24,$0C,$18,$27 ; PRG $31DD | CPU $F1DD
+    .byte $15,$1D,$0D,$25,$23,$F1,$06,$05,$05,$05,$05,$05,$09,$25,$CD,$05 ; PRG $31ED | CPU $F1ED
+    .byte $FA,$FB,$FC,$FD,$E4,$00,$23,$40,$60,$4C,$23,$60,$60,$4C,$23,$80 ; PRG $31FD | CPU $F1FD
+    .byte $60,$3D,$23,$A0,$60,$3D,$23,$4A,$01,$4B,$23,$69,$01,$4B,$23,$55 ; PRG $320D | CPU $F20D
+    .byte $01,$4E,$23,$76,$01,$4E,$23,$88,$01,$4A,$23,$A7,$01,$4A,$23,$97 ; PRG $321D | CPU $F21D
+    .byte $01,$4F,$23,$B8,$01,$4F,$20,$81,$06,$58,$1B,$5C,$24,$24,$5A,$20 ; PRG $322D | CPU $F22D
+    .byte $99,$06,$58,$1D,$12,$16,$0E,$5A,$20,$A1,$06,$59,$5D,$5C,$24,$24 ; PRG $323D | CPU $F23D
+    .byte $5B,$20,$B9,$06,$59,$08,$00,$00,$00,$5B,$23,$F8,$48,$FF,$00,$22 ; PRG $324D | CPU $F24D
+    .byte $88,$10,$38,$3A,$30,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$32 ; PRG $325D | CPU $F25D
+    .byte $41,$43,$22,$A8,$03,$39,$3B,$31,$22,$B5,$03,$33,$42,$44,$22,$C6 ; PRG $326D | CPU $F26D
+    .byte $14,$38,$3A,$34,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F ; PRG $327D | CPU $F27D
+    .byte $3E,$3F,$36,$41,$43,$22,$E6,$03,$39,$3B,$35,$22,$F7,$03,$37,$42 ; PRG $328D | CPU $F28D
+    .byte $44,$23,$04,$18,$38,$3A,$3C,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E ; PRG $329D | CPU $F29D
+    .byte $3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$40,$41,$43,$23,$24,$03,$39 ; PRG $32AD | CPU $F2AD
+    .byte $3B,$3D,$23,$39,$03,$3D,$42,$44,$21,$00,$07,$69,$6C,$6C,$6C,$6C ; PRG $32BD | CPU $F2BD
+    .byte $6D,$70,$21,$19,$07,$68,$69,$6C,$6C,$6C,$6C,$6D,$21,$20,$46,$6E ; PRG $32CD | CPU $F2CD
+    .byte $21,$3A,$46,$6A,$21,$40,$46,$6F,$21,$5A,$46,$6B,$21,$06,$89,$70 ; PRG $32DD | CPU $F2DD
+    .byte $5F,$74,$75,$24,$72,$73,$74,$75,$21,$19,$89,$68,$5F,$64,$62,$24 ; PRG $32ED | CPU $F2ED
+    .byte $66,$65,$64,$62,$21,$27,$8D,$71,$5F,$74,$75,$24,$24,$76,$77,$77 ; PRG $32FD | CPU $F2FD
+    .byte $78,$78,$78,$78,$21,$38,$8D,$67,$5F,$64,$62,$24,$24,$63,$61,$61 ; PRG $330D | CPU $F30D
+    .byte $60,$60,$60,$60,$21,$48,$84,$72,$73,$74,$75,$21,$57,$84,$66,$65 ; PRG $331D | CPU $F31D
+    .byte $64,$62,$21,$89,$88,$76,$77,$77,$78,$78,$78,$78,$78,$21,$96,$88 ; PRG $332D | CPU $F32D
+    .byte $63,$61,$61,$60,$60,$60,$60,$60,$21,$80,$44,$6C,$21,$A0,$45,$6E ; PRG $333D | CPU $F33D
+    .byte $21,$C0,$45,$6F,$21,$9C,$44,$6C,$21,$BB,$45,$6A,$21,$DB,$45,$6B ; PRG $334D | CPU $F34D
+    .byte $21,$84,$01,$6D,$21,$9B,$01,$69,$21,$85,$84,$70,$5F,$74,$75,$21 ; PRG $335D | CPU $F35D
+    .byte $9A,$84,$68,$5F,$64,$62,$22,$00,$04,$6C,$6C,$6D,$70,$22,$1C,$09 ; PRG $336D | CPU $F36D
+    .byte $68,$69,$6C,$6C,$6E,$6E,$6E,$5F,$72,$22,$3B,$0A,$66,$5F,$6A,$6A ; PRG $337D | CPU $F37D
+    .byte $6A,$6F,$6F,$6F,$74,$73,$22,$5B,$05,$65,$64,$6B,$6B,$6B,$22,$63 ; PRG $338D | CPU $F38D
+    .byte $03,$75,$74,$76,$22,$7A,$03,$63,$64,$62,$22,$84,$02,$75,$77,$22 ; PRG $339D | CPU $F39D
+    .byte $9A,$02,$61,$62,$20,$8B,$02,$89,$8A,$20,$93,$02,$8D,$8E,$20,$A9 ; PRG $33AD | CPU $F3AD
+    .byte $02,$89,$8A,$20,$B5,$02,$8D,$8E,$20,$8D,$CA,$8B,$20,$92,$CA,$8C ; PRG $33BD | CPU $F3BD
+    .byte $23,$C8,$02,$0D,$07,$23,$CE,$02,$0D,$07,$23,$D0,$18,$AA,$AA,$20 ; PRG $33CD | CPU $F3CD
+    .byte $00,$00,$80,$AA,$AA,$AA,$AA,$22,$00,$00,$88,$AA,$AA,$AA,$AA,$22 ; PRG $33DD | CPU $F3DD
+    .byte $00,$00,$88,$AA,$AA,$23,$E8,$10,$00,$4A,$55,$55,$55,$55,$1A,$00 ; PRG $33ED | CPU $F3ED
+    .byte $F5,$F5,$F5,$F5,$F5,$F5,$F5,$F5,$00,$22,$C7,$12,$3F,$55,$34,$3E ; PRG $33FD | CPU $F3FD
+    .byte $3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$36,$57,$3E,$22,$E8 ; PRG $340D | CPU $F40D
+    .byte $02,$56,$35,$22,$F6,$02,$37,$56,$23,$05,$16,$3F,$55,$3C,$3E,$3F ; PRG $341D | CPU $F41D
+    .byte $3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$3E,$3F,$40,$57 ; PRG $342D | CPU $F42D
+    .byte $3E,$23,$26,$02,$56,$3D,$23,$38,$02,$3D,$56,$21,$C0,$86,$7A,$7A ; PRG $343D | CPU $F43D
+    .byte $24,$7A,$7A,$7A,$21,$A1,$87,$79,$7B,$7B,$7D,$7B,$7B,$83,$21,$C2 ; PRG $344D | CPU $F44D
+    .byte $86,$7C,$7C,$24,$7C,$7C,$7C,$21,$A3,$85,$7A,$7A,$24,$7A,$7A,$21 ; PRG $345D | CPU $F45D
+    .byte $84,$86,$79,$7B,$7B,$7D,$7B,$83,$21,$A5,$85,$7C,$80,$7E,$80,$80 ; PRG $346D | CPU $F46D
+    .byte $21,$BA,$85,$7A,$7F,$7E,$7F,$7F,$21,$9B,$86,$79,$7B,$7B,$7D,$7B ; PRG $347D | CPU $F47D
+    .byte $83,$21,$BC,$85,$7C,$7C,$24,$7C,$7C,$21,$DD,$86,$7A,$7A,$24,$7A ; PRG $348D | CPU $F48D
+    .byte $7A,$7A,$21,$BE,$87,$79,$7B,$7B,$7D,$7B,$7B,$83,$21,$DF,$86,$7C ; PRG $349D | CPU $F49D
+    .byte $7C,$24,$7C,$7C,$7C,$22,$81,$C6,$84,$22,$44,$C8,$84,$22,$5B,$C8 ; PRG $34AD | CPU $F4AD
+    .byte $84,$22,$9E,$C6,$84,$21,$C6,$14,$7E,$81,$7E,$81,$7E,$81,$7E,$81 ; PRG $34BD | CPU $F4BD
+    .byte $24,$24,$24,$24,$7E,$81,$7E,$81,$7E,$81,$7E,$81,$21,$E6,$14,$7E ; PRG $34CD | CPU $F4CD
+    .byte $82,$7E,$82,$7E,$82,$7E,$82,$24,$24,$24,$24,$7E,$82,$7E,$82,$7E ; PRG $34DD | CPU $F4DD
+    .byte $82,$7E,$82,$22,$06,$14,$7E,$81,$7E,$81,$7E,$81,$7E,$81,$7E,$81 ; PRG $34ED | CPU $F4ED
+    .byte $7E,$81,$7E,$81,$7E,$81,$7E,$81,$7E,$81,$22,$26,$14,$7E,$82,$7E ; PRG $34FD | CPU $F4FD
+    .byte $82,$7E,$82,$7E,$82,$7E,$82,$7E,$82,$7E,$82,$7E,$82,$7E,$82,$7E ; PRG $350D | CPU $F50D
+    .byte $82,$20,$88,$10,$50,$51,$52,$51,$52,$51,$52,$24,$24,$51,$52,$51 ; PRG $351D | CPU $F51D
+    .byte $52,$51,$52,$50,$20,$A7,$02,$50,$53,$20,$B7,$02,$54,$50,$20,$C6 ; PRG $352D | CPU $F52D
+    .byte $02,$50,$53,$20,$D8,$02,$54,$50,$20,$E5,$02,$50,$53,$20,$F9,$02 ; PRG $353D | CPU $F53D
+    .byte $54,$50,$21,$04,$02,$50,$53,$21,$1A,$02,$54,$50,$21,$23,$02,$50 ; PRG $354D | CPU $F54D
+    .byte $53,$21,$3B,$02,$54,$50,$21,$40,$04,$52,$51,$52,$53,$21,$5C,$04 ; PRG $355D | CPU $F55D
+    .byte $54,$51,$52,$51,$20,$AD,$C7,$8B,$20,$B2,$C7,$8C,$23,$C8,$0A,$0D ; PRG $356D | CPU $F56D
+    .byte $57,$05,$05,$05,$05,$5D,$07,$55,$55,$23,$D6,$1A,$55,$55,$AA,$AA ; PRG $357D | CPU $F57D
+    .byte $A0,$20,$80,$A0,$AA,$AA,$AA,$5A,$0A,$0A,$0A,$0A,$5A,$AA,$55,$55 ; PRG $358D | CPU $F58D
+    .byte $55,$55,$55,$55,$55,$55,$23,$F0,$08,$F5,$F5,$F5,$F5,$F5,$F5,$F5 ; PRG $359D | CPU $F59D
+    .byte $F5,$00,$22,$CD,$06,$55,$24,$24,$24,$24,$57,$22,$ED,$01,$56,$22 ; PRG $35AD | CPU $F5AD
+    .byte $F2,$01,$56,$00,$20,$62,$02,$1A,$11,$20,$6B,$04,$20,$21,$23,$11 ; PRG $35BD | CPU $F5BD
+    .byte $00,$20,$76,$02,$1E,$11,$00 ; PRG $35CD | CPU $F5CD
+
+IndexedGameplayLookupTable_F5D4:
+    .byte $10,$11,$12,$FF,$00,$11,$12,$13,$FF,$05,$12,$13,$14,$FF,$0A,$14 ; PRG $35D4 | CPU $F5D4
+    .byte $15,$16,$FF,$0F,$15,$FF,$14,$15,$FF,$17,$14,$17,$18,$FF,$1A,$17 ; PRG $35E4 | CPU $F5E4
+    .byte $18,$FF,$1F,$18,$FF,$23,$00,$01,$02,$03,$FF,$26,$51,$52,$53,$52 ; PRG $35F4 | CPU $F5F4
+    .byte $FF,$2C,$09,$0A,$FF,$32,$0B,$FF,$36 ; PRG $3604 | CPU $F604
+
+IndexedGameplayLookupTable_F60D:
+    .byte $1F,$02,$20,$02,$21,$02,$20,$02,$FF,$00,$19,$02,$1A,$02,$1B,$02 ; PRG $360D | CPU $F60D
+    .byte $1A,$02,$FF,$0A,$1C,$02,$1D,$02,$1E,$02,$1D,$02,$FF,$14,$28,$02 ; PRG $361D | CPU $F61D
+    .byte $29,$02,$2A,$02,$29,$02,$FF,$1E,$2B,$02,$2C,$02,$2D,$02,$2C,$02 ; PRG $362D | CPU $F62D
+    .byte $FF,$28,$25,$02,$26,$02,$27,$02,$26,$02,$FF,$32,$2E,$14,$2F,$10 ; PRG $363D | CPU $F63D
+    .byte $30,$0E,$31,$02,$33,$02,$31,$02,$33,$02,$31,$02,$33,$02,$32,$02 ; PRG $364D | CPU $F64D
+    .byte $34,$02,$FF,$4E,$34,$02,$32,$02,$34,$02,$32,$02,$34,$02,$32,$02 ; PRG $365D | CPU $F65D
+    .byte $33,$02,$31,$02,$33,$02,$31,$02,$33,$02,$31,$02,$30,$0E,$2F,$10 ; PRG $366D | CPU $F66D
+    .byte $2E,$14,$FF,$70,$0D,$02,$0F,$02,$22,$02,$23,$02,$FF,$74 ; PRG $367D | CPU $F67D
+
+IndexedGameplayLookupTable_F68B:
+    .byte $35,$36,$37,$36,$FF,$00,$38,$39,$3A,$39,$FF,$06,$3B,$3C,$3D,$3C ; PRG $368B | CPU $F68B
+    .byte $FF,$0C,$3E,$3F,$40,$3F,$FF,$12,$43,$42,$41,$42,$FF,$18,$46,$45 ; PRG $369B | CPU $F69B
+    .byte $44,$45,$FF,$1E ; PRG $36AB | CPU $F6AB
+
+AnimationLayoutIndexTable:
+    .byte $00 ; PRG $36AF | CPU $F6AF
+
+AnimationBaseTileTable:
+    .byte $00,$00,$04,$00,$08,$00,$0C,$00,$10,$00,$14,$00,$18,$00,$1C,$00 ; PRG $36B0 | CPU $F6B0
+    .byte $20,$00,$24,$00,$28,$00,$2C,$00,$5C,$00,$60,$07,$94,$00,$64,$01 ; PRG $36C0 | CPU $F6C0
+    .byte $30,$02,$31,$02,$33,$02,$35,$03,$37,$03,$3A,$03,$3D,$00,$40,$00 ; PRG $36D0 | CPU $F6D0
+    .byte $44,$08,$A7,$09,$AA,$09,$AD,$08,$B0,$09,$B3,$09,$B6,$00,$B9,$00 ; PRG $36E0 | CPU $F6E0
+    .byte $BD,$00,$C1,$00,$68,$00,$6C,$0A,$9F,$08,$C5,$09,$C8,$09,$CB,$08 ; PRG $36F0 | CPU $F6F0
+    .byte $CE,$09,$D1,$09,$D4,$00,$D7,$00,$DB,$00,$DF,$01,$A0,$01,$A1,$01 ; PRG $3700 | CPU $F700
+    .byte $A2,$01,$A3,$01,$A4,$01,$A5,$01,$A6,$06,$70,$06,$72,$06,$74,$06 ; PRG $3710 | CPU $F710
+    .byte $76,$06,$78,$06,$7A,$04,$7C,$04,$7E,$04,$80,$04,$82,$04,$84,$04 ; PRG $3720 | CPU $F720
+    .byte $86,$04,$88,$04,$8A,$04,$8C,$04,$8E,$04,$90,$04,$92,$0B,$00,$0C ; PRG $3730 | CPU $F730
+    .byte $00,$0D,$00,$05,$E8,$00,$48,$00,$4C,$00,$50,$00,$54,$00,$58,$0A ; PRG $3740 | CPU $F740
+    .byte $A2,$00,$96,$02,$9A,$03,$9C ; PRG $3750 | CPU $F750
+
+MetaspriteLayoutPointerTable:
+    .byte $73 ; PRG $3757 | CPU $F757
+
+MetaspriteLayoutPointerTableHi:
+    .byte $F7,$80,$F7,$84,$F7,$8B,$F7,$95,$F7,$9C,$F7,$D3,$F7,$DA,$F7,$E1 ; PRG $3758 | CPU $F758
+    .byte $F7,$EB,$F7,$F5,$F7,$F9,$F7,$FA,$F7,$FB,$F7,$00,$F7,$F8,$00,$F7 ; PRG $3768 | CPU $F768
+    .byte $00,$00,$00,$F8,$00,$00,$00,$10,$00,$FB,$FC,$13,$00,$F7,$FC,$00 ; PRG $3778 | CPU $F778
+    .byte $00,$FC,$12,$00,$F7,$F8,$00,$F7,$00,$00,$00,$FC,$11,$00,$F3,$FC ; PRG $3788 | CPU $F788
+    .byte $00,$FB,$FC,$10,$00,$DF,$F0,$00,$DF,$F8,$00,$DF,$00,$00,$E7,$F0 ; PRG $3798 | CPU $F798
+    .byte $00,$E7,$F8,$00,$E7,$00,$00,$E7,$08,$00,$EF,$F0,$00,$EF,$F8,$00 ; PRG $37A8 | CPU $F7A8
+    .byte $EF,$00,$00,$EF,$08,$00,$F7,$F8,$00,$F7,$00,$00,$F7,$08,$00,$00 ; PRG $37B8 | CPU $F7B8
+    .byte $F0,$00,$00,$F8,$00,$00,$00,$00,$00,$08,$10,$00,$FB,$F8,$00,$FB ; PRG $37C8 | CPU $F7C8
+    .byte $00,$10,$00,$F7,$FC,$00,$00,$FC,$10,$00,$F7,$FC,$80,$00,$F8,$81 ; PRG $37D8 | CPU $F7D8
+    .byte $00,$00,$10,$80,$F7,$F8,$81,$F7,$00,$00,$00,$FC,$10,$00,$FB,$FC ; PRG $37E8 | CPU $F7E8
+    .byte $10,$14,$12,$11,$F4,$FE,$00,$38,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA ; PRG $37F8 | CPU $F7F8
+    .byte $EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA ; PRG $3808 | CPU $F808
+    .byte $EA,$EA,$EA,$EA,$EA,$EA,$EA,$EA ; PRG $3818 | CPU $F818
+; -----------------------------------------------------------------------------
+; Global purpose: Update Audio Engine.
+; Local behavior: Reads TransformPackedValue_F8B9; mutates JOY2, AudioChannelRequest, AudioEffectRequest, AudioPendingFlags, AudioRequestFlags.
+; Parameters: TransformPackedValue_F8B9.
+; Returns: returns to caller; flags/register result depends on final instructions: sta AudioRequestFlags; rts; .byte $A2,$00.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateAudioEngine:
+    nop                             ; PRG $3820 | CPU $F820 | EA
+    lda #$C0                        ; PRG $3821 | CPU $F821 | A9 C0
+    sta JOY2                        ; PRG $3823 | CPU $F823 | 8D 17 40
+    jsr TransformPackedValue_F8B9                ; PRG $3826 | CPU $F826 | 20 B9 F8
+    lda #$00                        ; PRG $3829 | CPU $F829 | A9 00
+    sta AudioChannelRequest                       ; PRG $382B | CPU $F82B | 85 FF
+    sta AudioEffectRequest                       ; PRG $382D | CPU $F82D | 85 FE
+    sta AudioPendingFlags                       ; PRG $382F | CPU $F82F | 85 FD
+    sta AudioRequestFlags                       ; PRG $3831 | CPU $F831 | 85 FB
+    rts                             ; PRG $3833 | CPU $F833 | 60
+    .byte $A2,$00 ; PRG $3834 | CPU $F834
+; -----------------------------------------------------------------------------
+; Global purpose: Start Sound Effect.
+; Local behavior: Reads Flow_F840; mutates no direct memory mutation observed.
+; Parameters: Flow_F840.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$10; sta $4000,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+StartSoundEffect:
+    cmp #$7E                        ; PRG $3836 | CPU $F836 | C9 7E
+    bne Flow_F840                ; PRG $3838 | CPU $F838 | D0 06
+    lda #$10                        ; PRG $383A | CPU $F83A | A9 10
+    sta $4000,x                     ; PRG $383C | CPU $F83C | 9D 00 40
+    rts                             ; PRG $383F | CPU $F83F | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F840.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_07FF.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F840:
+    pha                             ; PRG $3840 | CPU $F840 | 48
+    ldy #$00                        ; PRG $3841 | CPU $F841 | A0 00
+    sty Ram_07FF                    ; PRG $3843 | CPU $F843 | 8C FF 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F846.
+; Local behavior: Reads Ram_07FF, Flow_F846, IndexedGameplayLookupTable_FFE2, IndexedGameplayLookupTable_FFE3; mutates Ram_07FF, WorkPointerOrValueLo, ControllerSerialBits.
+; Parameters: Ram_07FF, Flow_F846, IndexedGameplayLookupTable_FFE2, IndexedGameplayLookupTable_FFE3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F846:
+    tay                             ; PRG $3846 | CPU $F846 | A8
+    sec                             ; PRG $3847 | CPU $F847 | 38
+    sbc #$18                        ; PRG $3848 | CPU $F848 | E9 18
+    inc Ram_07FF                    ; PRG $384A | CPU $F84A | EE FF 07
+    bcs Flow_F846                ; PRG $384D | CPU $F84D | B0 F7
+    lda IndexedGameplayLookupTable_FFE2,y                 ; PRG $384F | CPU $F84F | B9 E2 FF
+    sta WorkPointerOrValueLo                       ; PRG $3852 | CPU $F852 | 85 01
+    lda IndexedGameplayLookupTable_FFE3,y                 ; PRG $3854 | CPU $F854 | B9 E3 FF
+    sta ControllerSerialBits                       ; PRG $3857 | CPU $F857 | 85 00
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F859.
+; Local behavior: Reads ControllerSerialBits, WorkPointerOrValueLo, Ram_07FF, Flow_F859, Flow_F869; mutates ControllerSerialBits, WorkPointerOrValueLo, Ram_07FF.
+; Parameters: ControllerSerialBits, WorkPointerOrValueLo, Ram_07FF, Flow_F859, Flow_F869.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F859:
+    lsr ControllerSerialBits                       ; PRG $3859 | CPU $F859 | 46 00
+    ror WorkPointerOrValueLo                       ; PRG $385B | CPU $F85B | 66 01
+    dec Ram_07FF                    ; PRG $385D | CPU $F85D | CE FF 07
+    bne Flow_F859                ; PRG $3860 | CPU $F860 | D0 F7
+    pla                             ; PRG $3862 | CPU $F862 | 68
+    cmp #$38                        ; PRG $3863 | CPU $F863 | C9 38
+    bcc Flow_F869                ; PRG $3865 | CPU $F865 | 90 02
+    dec WorkPointerOrValueLo                       ; PRG $3867 | CPU $F867 | C6 01
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F869.
+; Local behavior: Reads WorkPointerOrValueLo, ControllerSerialBits; mutates no direct memory mutation observed.
+; Parameters: WorkPointerOrValueLo, ControllerSerialBits.
+; Returns: returns to caller; flags/register result depends on final instructions: ora #$08; sta $4003,x; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F869:
+    lda WorkPointerOrValueLo                       ; PRG $3869 | CPU $F869 | A5 01
+    sta $4002,x                     ; PRG $386B | CPU $F86B | 9D 02 40
+    lda ControllerSerialBits                       ; PRG $386E | CPU $F86E | A5 00
+    ora #$08                        ; PRG $3870 | CPU $F870 | 09 08
+    sta $4003,x                     ; PRG $3872 | CPU $F872 | 9D 03 40
+    rts                             ; PRG $3875 | CPU $F875 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch F876.
+; Local behavior: Reads StartSoundEffect; mutates no direct memory mutation observed.
+; Parameters: StartSoundEffect.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_F876:
+    ldx #$04                        ; PRG $3876 | CPU $F876 | A2 04
+    bne StartSoundEffect                ; PRG $3878 | CPU $F878 | D0 BC
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F87 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioFrameCounter, AudioNoteIndex, Ram_07B1.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F87A:
+    sty AudioFrameCounter                       ; PRG $387A | CPU $F87A | 84 F1
+    lda #$48                        ; PRG $387C | CPU $F87C | A9 48
+    sta AudioNoteIndex                       ; PRG $387E | CPU $F87E | 85 F6
+    lda #$91                        ; PRG $3880 | CPU $F880 | A9 91
+    sta Ram_07B1                    ; PRG $3882 | CPU $F882 | 8D B1 07
+    ldx #$0F                        ; PRG $3885 | CPU $F885 | A2 0F
+    ldy #$18                        ; PRG $3887 | CPU $F887 | A0 18
+    stx $4002                       ; PRG $3889 | CPU $F889 | 8E 02 40
+    sty $4006                       ; PRG $388C | CPU $F88C | 8C 06 40
+    lda #$08                        ; PRG $388F | CPU $F88F | A9 08
+    sta $4003                       ; PRG $3891 | CPU $F891 | 8D 03 40
+    sta $4007                       ; PRG $3894 | CPU $F894 | 8D 07 40
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F897.
+; Local behavior: Reads Ram_07B1, Flow_F8A7; mutates Ram_07B1.
+; Parameters: Ram_07B1, Flow_F8A7.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F897:
+    lda Ram_07B1                    ; PRG $3897 | CPU $F897 | AD B1 07
+    sta $4000                       ; PRG $389A | CPU $F89A | 8D 00 40
+    sta $4004                       ; PRG $389D | CPU $F89D | 8D 04 40
+    cmp #$9F                        ; PRG $38A0 | CPU $F8A0 | C9 9F
+    beq Flow_F8A7                ; PRG $38A2 | CPU $F8A2 | F0 03
+    inc Ram_07B1                    ; PRG $38A4 | CPU $F8A4 | EE B1 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 A7.
+; Local behavior: Reads AudioNoteIndex, Flow_F8B1, Flow_F91B; mutates no direct memory mutation observed.
+; Parameters: AudioNoteIndex, Flow_F8B1, Flow_F91B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8A7:
+    lda AudioNoteIndex                       ; PRG $38A7 | CPU $F8A7 | A5 F6
+    and #$07                        ; PRG $38A9 | CPU $F8A9 | 29 07
+    bne Flow_F8B1                ; PRG $38AB | CPU $F8AB | D0 04
+    lda #$83                        ; PRG $38AD | CPU $F8AD | A9 83
+    bne Flow_F91B                ; PRG $38AF | CPU $F8AF | D0 6A
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 B1.
+; Local behavior: Reads Flow_F921, Flow_F91B; mutates no direct memory mutation observed.
+; Parameters: Flow_F921, Flow_F91B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8B1:
+    and #$03                        ; PRG $38B1 | CPU $F8B1 | 29 03
+    bne Flow_F921                ; PRG $38B3 | CPU $F8B3 | D0 6C
+    lda #$CB                        ; PRG $38B5 | CPU $F8B5 | A9 CB
+    bne Flow_F91B                ; PRG $38B7 | CPU $F8B7 | D0 62
+; -----------------------------------------------------------------------------
+; Global purpose: Transform Packed Value F8 B9.
+; Local behavior: Reads AudioChannelRequest, AudioFrameCounter, Flow_F87A, Flow_F897, Flow_F8DB, Flow_F8EB, Flow_F936, Flow_F957; mutates AudioChannelRequest.
+; Parameters: AudioChannelRequest, AudioFrameCounter, Flow_F87A, Flow_F897, Flow_F8DB, Flow_F8EB, Flow_F936, Flow_F957.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+TransformPackedValue_F8B9:
+    ldy AudioChannelRequest                       ; PRG $38B9 | CPU $F8B9 | A4 FF
+    lda AudioFrameCounter                       ; PRG $38BB | CPU $F8BB | A5 F1
+    lsr AudioChannelRequest                       ; PRG $38BD | CPU $F8BD | 46 FF
+    bcs Flow_F87A                ; PRG $38BF | CPU $F8BF | B0 B9
+    lsr a                           ; PRG $38C1 | CPU $F8C1 | 4A
+    bcs Flow_F897                ; PRG $38C2 | CPU $F8C2 | B0 D3
+    lsr a                           ; PRG $38C4 | CPU $F8C4 | 4A
+    lsr AudioChannelRequest                       ; PRG $38C5 | CPU $F8C5 | 46 FF
+    lsr a                           ; PRG $38C7 | CPU $F8C7 | 4A
+    lsr AudioChannelRequest                       ; PRG $38C8 | CPU $F8C8 | 46 FF
+    lsr AudioChannelRequest                       ; PRG $38CA | CPU $F8CA | 46 FF
+    bcs Flow_F8DB                ; PRG $38CC | CPU $F8CC | B0 0D
+    lsr a                           ; PRG $38CE | CPU $F8CE | 4A
+    bcs Flow_F8EB                ; PRG $38CF | CPU $F8CF | B0 1A
+    lsr AudioChannelRequest                       ; PRG $38D1 | CPU $F8D1 | 46 FF
+    bcs Flow_F936                ; PRG $38D3 | CPU $F8D3 | B0 61
+    lsr a                           ; PRG $38D5 | CPU $F8D5 | 4A
+    bcs Flow_F957                ; PRG $38D6 | CPU $F8D6 | B0 7F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 D8.
+; Local behavior: Reads Continuation_F9FD; mutates no direct memory mutation observed.
+; Parameters: Continuation_F9FD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8D8:
+    jmp Continuation_F9FD                ; PRG $38D8 | CPU $F8D8 | 4C FD F9
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 DB.
+; Local behavior: Reads Flow_F8F0; mutates AudioFrameCounter, AudioNoteIndex.
+; Parameters: Flow_F8F0.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8DB:
+    sty AudioFrameCounter                       ; PRG $38DB | CPU $F8DB | 84 F1
+    lda #$07                        ; PRG $38DD | CPU $F8DD | A9 07
+    sta AudioNoteIndex                       ; PRG $38DF | CPU $F8DF | 85 F6
+    lda #$02                        ; PRG $38E1 | CPU $F8E1 | A9 02
+    sta $4000                       ; PRG $38E3 | CPU $F8E3 | 8D 00 40
+    sta $4004                       ; PRG $38E6 | CPU $F8E6 | 8D 04 40
+    bne Flow_F8F0                ; PRG $38E9 | CPU $F8E9 | D0 05
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 EB.
+; Local behavior: Reads Ram_07B1, Flow_F8D8; mutates Ram_07B1.
+; Parameters: Ram_07B1, Flow_F8D8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8EB:
+    dec Ram_07B1                    ; PRG $38EB | CPU $F8EB | CE B1 07
+    bne Flow_F8D8                ; PRG $38EE | CPU $F8EE | D0 E8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F8 F0.
+; Local behavior: Reads AudioNoteIndex, Flow_F96F, AudioPitchOrPeriodTable_F970, IndexedGameplayLookupTable_F97B, IndexedGameplayLookupTable_F97C, Flow_F916; mutates no direct memory mutation observed.
+; Parameters: AudioNoteIndex, Flow_F96F, AudioPitchOrPeriodTable_F970, IndexedGameplayLookupTable_F97B, IndexedGameplayLookupTable_F97C, Flow_F916.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F8F0:
+    lda AudioNoteIndex                       ; PRG $38F0 | CPU $F8F0 | A5 F6
+    asl a                           ; PRG $38F2 | CPU $F8F2 | 0A
+    tay                             ; PRG $38F3 | CPU $F8F3 | A8
+    lda Flow_F96F,y              ; PRG $38F4 | CPU $F8F4 | B9 6F F9
+    sta $4002                       ; PRG $38F7 | CPU $F8F7 | 8D 02 40
+    lda AudioPitchOrPeriodTable_F970,y                 ; PRG $38FA | CPU $F8FA | B9 70 F9
+    sta $4003                       ; PRG $38FD | CPU $F8FD | 8D 03 40
+    lda IndexedGameplayLookupTable_F97B,y                 ; PRG $3900 | CPU $F900 | B9 7B F9
+    sta $4006                       ; PRG $3903 | CPU $F903 | 8D 06 40
+    lda IndexedGameplayLookupTable_F97C,y                 ; PRG $3906 | CPU $F906 | B9 7C F9
+    sta $4007                       ; PRG $3909 | CPU $F909 | 8D 07 40
+    ldy #$05                        ; PRG $390C | CPU $F90C | A0 05
+    lda AudioNoteIndex                       ; PRG $390E | CPU $F90E | A5 F6
+    cmp #$02                        ; PRG $3910 | CPU $F910 | C9 02
+    bne Flow_F916                ; PRG $3912 | CPU $F912 | D0 02
+    ldy #$0A                        ; PRG $3914 | CPU $F914 | A0 0A
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F916.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F916:
+    lda #$86                        ; PRG $3916 | CPU $F916 | A9 86
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F918.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_07B1.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F918:
+    sty Ram_07B1                    ; PRG $3918 | CPU $F918 | 8C B1 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F91 B.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F91B:
+    sta $4001                       ; PRG $391B | CPU $F91B | 8D 01 40
+    sta $4005                       ; PRG $391E | CPU $F91E | 8D 05 40
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F921.
+; Local behavior: Reads AudioNoteIndex; mutates AudioNoteIndex.
+; Parameters: AudioNoteIndex.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F921:
+    dec AudioNoteIndex                       ; PRG $3921 | CPU $F921 | C6 F6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F923.
+; Local behavior: Reads Flow_F8D8, UpdateApuChannelState_FBD6, AudioFrameCounter, Flow_F930; mutates AudioFrameCounter, AudioRequestFlags.
+; Parameters: Flow_F8D8, UpdateApuChannelState_FBD6, AudioFrameCounter, Flow_F930.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F923:
+    bne Flow_F8D8                ; PRG $3923 | CPU $F923 | D0 B3
+    jsr UpdateApuChannelState_FBD6                ; PRG $3925 | CPU $F925 | 20 D6 FB
+    dec AudioFrameCounter                       ; PRG $3928 | CPU $F928 | C6 F1
+    bne Flow_F930                ; PRG $392A | CPU $F92A | D0 04
+    lda #$04                        ; PRG $392C | CPU $F92C | A9 04
+    sta AudioRequestFlags                       ; PRG $392E | CPU $F92E | 85 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F930.
+; Local behavior: Reads Flow_F8D8; mutates AudioFrameCounter.
+; Parameters: Flow_F8D8.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F930:
+    lda #$00                        ; PRG $3930 | CPU $F930 | A9 00
+    sta AudioFrameCounter                       ; PRG $3932 | CPU $F932 | 85 F1
+    beq Flow_F8D8                ; PRG $3934 | CPU $F934 | F0 A2
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F936.
+; Local behavior: Reads ComputeOrDispatch_F876, Flow_F96F; mutates AudioFrameCounter, AudioNoteIndex.
+; Parameters: ComputeOrDispatch_F876, Flow_F96F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F936:
+    sty AudioFrameCounter                       ; PRG $3936 | CPU $F936 | 84 F1
+    lda #$09                        ; PRG $3938 | CPU $F938 | A9 09
+    sta AudioNoteIndex                       ; PRG $393A | CPU $F93A | 85 F6
+    lda #$5F                        ; PRG $393C | CPU $F93C | A9 5F
+    sta $4000                       ; PRG $393E | CPU $F93E | 8D 00 40
+    sta $4004                       ; PRG $3941 | CPU $F941 | 8D 04 40
+    lda #$D4                        ; PRG $3944 | CPU $F944 | A9 D4
+    sta $4002                       ; PRG $3946 | CPU $F946 | 8D 02 40
+    lda #$0D                        ; PRG $3949 | CPU $F949 | A9 0D
+    sta $4003                       ; PRG $394B | CPU $F94B | 8D 03 40
+    lda #$00                        ; PRG $394E | CPU $F94E | A9 00
+    jsr ComputeOrDispatch_F876                ; PRG $3950 | CPU $F950 | 20 76 F8
+    lda #$92                        ; PRG $3953 | CPU $F953 | A9 92
+    bne Flow_F96F                ; PRG $3955 | CPU $F955 | D0 18
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F957.
+; Local behavior: Reads Ram_07B1, Flow_F96D, Flow_F923; mutates Ram_07B1.
+; Parameters: Ram_07B1, Flow_F96D, Flow_F923.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F957:
+    dec Ram_07B1                    ; PRG $3957 | CPU $F957 | CE B1 07
+    beq Flow_F96D                ; PRG $395A | CPU $F95A | F0 11
+    lda Ram_07B1                    ; PRG $395C | CPU $F95C | AD B1 07
+    cmp #$03                        ; PRG $395F | CPU $F95F | C9 03
+    bne Flow_F923                ; PRG $3961 | CPU $F961 | D0 C0
+    lda #$93                        ; PRG $3963 | CPU $F963 | A9 93
+    sta $4001                       ; PRG $3965 | CPU $F965 | 8D 01 40
+    sta $4005                       ; PRG $3968 | CPU $F968 | 8D 05 40
+    bne Flow_F923                ; PRG $396B | CPU $F96B | D0 B6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F96 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F96D:
+    lda #$9A                        ; PRG $396D | CPU $F96D | A9 9A
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F96 F.
+; Local behavior: Reads Flow_F918; mutates no direct memory mutation observed.
+; Parameters: Flow_F918.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F96F:
+    ldy #$06                        ; PRG $396F | CPU $F96F | A0 06
+    bne Flow_F918                ; PRG $3971 | CPU $F971 | D0 A5
+    .byte $44,$09,$8F,$09,$7C,$09,$3F,$09 ; PRG $3973 | CPU $F973
+
+IndexedGameplayLookupTable_F97B:
+    .byte $EE ; PRG $397B | CPU $F97B
+
+IndexedGameplayLookupTable_F97C:
+    .byte $08,$9F,$48,$5C,$09,$67,$09,$1C,$09,$EE,$08,$C8,$08,$A8,$48 ; PRG $397C | CPU $F97C
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch F98 B.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_F98B:
+    ldx #$81                        ; PRG $398B | CPU $F98B | A2 81
+; -----------------------------------------------------------------------------
+; Global purpose: Configure Sound Channel.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioSequenceDelay, Ram_07B3.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: lda #$08; sta $400B; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ConfigureSoundChannel:
+    stx $4008                       ; PRG $398D | CPU $F98D | 8E 08 40
+    sty AudioSequenceDelay                       ; PRG $3990 | CPU $F990 | 84 F2
+    sta Ram_07B3                    ; PRG $3992 | CPU $F992 | 8D B3 07
+    lda #$08                        ; PRG $3995 | CPU $F995 | A9 08
+    sta $400B                       ; PRG $3997 | CPU $F997 | 8D 0B 40
+    rts                             ; PRG $399A | CPU $F99A | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F99 B.
+; Local behavior: Reads ComputeOrDispatch_F98B, Flow_F9CD; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_F98B, Flow_F9CD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F99B:
+    lda #$07                        ; PRG $399B | CPU $F99B | A9 07
+    jsr ComputeOrDispatch_F98B                ; PRG $399D | CPU $F99D | 20 8B F9
+    lda #$30                        ; PRG $39A0 | CPU $F9A0 | A9 30
+    bne Flow_F9CD                ; PRG $39A2 | CPU $F9A2 | D0 29
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 A4.
+; Local behavior: Reads Ram_07B5, Ram_07B4, Flow_F9C4, Flow_FA2F; mutates Ram_07B5, Ram_07B4.
+; Parameters: Ram_07B5, Ram_07B4, Flow_F9C4, Flow_FA2F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9A4:
+    lda Ram_07B5                    ; PRG $39A4 | CPU $F9A4 | AD B5 07
+    tay                             ; PRG $39A7 | CPU $F9A7 | A8
+    clc                             ; PRG $39A8 | CPU $F9A8 | 18
+    sbc #$05                        ; PRG $39A9 | CPU $F9A9 | E9 05
+    and #$0F                        ; PRG $39AB | CPU $F9AB | 29 0F
+    sta Ram_07B5                    ; PRG $39AD | CPU $F9AD | 8D B5 07
+    tya                             ; PRG $39B0 | CPU $F9B0 | 98
+    and #$F0                        ; PRG $39B1 | CPU $F9B1 | 29 F0
+    ora Ram_07B5                    ; PRG $39B3 | CPU $F9B3 | 0D B5 07
+    sta Ram_07B5                    ; PRG $39B6 | CPU $F9B6 | 8D B5 07
+    sta $400A                       ; PRG $39B9 | CPU $F9B9 | 8D 0A 40
+    dec Ram_07B4                    ; PRG $39BC | CPU $F9BC | CE B4 07
+    beq Flow_F9C4                ; PRG $39BF | CPU $F9BF | F0 03
+    jmp Flow_FA2F                ; PRG $39C1 | CPU $F9C1 | 4C 2F FA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 C4.
+; Local behavior: Reads Ram_07B5; mutates no direct memory mutation observed.
+; Parameters: Ram_07B5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9C4:
+    lda Ram_07B5                    ; PRG $39C4 | CPU $F9C4 | AD B5 07
+    lsr a                           ; PRG $39C7 | CPU $F9C7 | 4A
+    lsr a                           ; PRG $39C8 | CPU $F9C8 | 4A
+    clc                             ; PRG $39C9 | CPU $F9C9 | 18
+    adc Ram_07B5                    ; PRG $39CA | CPU $F9CA | 6D B5 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 CD.
+; Local behavior: Reads Flow_F9EC; mutates Ram_07B4.
+; Parameters: Flow_F9EC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9CD:
+    ldy #$03                        ; PRG $39CD | CPU $F9CD | A0 03
+    sty Ram_07B4                    ; PRG $39CF | CPU $F9CF | 8C B4 07
+    bne Flow_F9EC                ; PRG $39D2 | CPU $F9D2 | D0 18
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 D4.
+; Local behavior: Reads ComputeOrDispatch_F98B, Flow_F9EC; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_F98B, Flow_F9EC.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9D4:
+    lda #$17                        ; PRG $39D4 | CPU $F9D4 | A9 17
+    jsr ComputeOrDispatch_F98B                ; PRG $39D6 | CPU $F9D6 | 20 8B F9
+    lda #$A0                        ; PRG $39D9 | CPU $F9D9 | A9 A0
+    bne Flow_F9EC                ; PRG $39DB | CPU $F9DB | D0 0F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 DD.
+; Local behavior: Reads Ram_07B3, Flow_F9EF, Ram_06F0; mutates Ram_07B3.
+; Parameters: Ram_07B3, Flow_F9EF, Ram_06F0.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9DD:
+    lda Ram_07B3                    ; PRG $39DD | CPU $F9DD | AD B3 07
+    and #$07                        ; PRG $39E0 | CPU $F9E0 | 29 07
+    bne Flow_F9EF                ; PRG $39E2 | CPU $F9E2 | D0 0B
+    dec Ram_07B3                    ; PRG $39E4 | CPU $F9E4 | CE B3 07
+    lda Ram_06F0                    ; PRG $39E7 | CPU $F9E7 | AD F0 06
+    ora #$80                        ; PRG $39EA | CPU $F9EA | 09 80
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 EC.
+; Local behavior: Reads UpdateRam_07B5_FA7F; mutates no direct memory mutation observed.
+; Parameters: UpdateRam_07B5_FA7F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9EC:
+    jmp UpdateRam_07B5_FA7F                ; PRG $39EC | CPU $F9EC | 4C 7F FA
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 EF.
+; Local behavior: Reads Ram_07B5, Flow_F9F7; mutates Ram_07B5.
+; Parameters: Ram_07B5, Flow_F9F7.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9EF:
+    inc Ram_07B5                    ; PRG $39EF | CPU $F9EF | EE B5 07
+    bne Flow_F9F7                ; PRG $39F2 | CPU $F9F2 | D0 03
+    dec Ram_07B5                    ; PRG $39F4 | CPU $F9F4 | CE B5 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow F9 F7.
+; Local behavior: Reads Ram_07B5, UpdateApuChannelState_FA82; mutates no direct memory mutation observed.
+; Parameters: Ram_07B5, UpdateApuChannelState_FA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_F9F7:
+    lda Ram_07B5                    ; PRG $39F7 | CPU $F9F7 | AD B5 07
+    jmp UpdateApuChannelState_FA82                ; PRG $39FA | CPU $F9FA | 4C 82 FA
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation F9 FD.
+; Local behavior: Reads AudioEnvelopeOrSequenceIndex, Flow_FA2F, AudioEffectRequest, AudioSequenceDelay, Flow_F99B, Flow_F9A4, Flow_F9D4, Flow_F9DD; mutates AudioEffectRequest.
+; Parameters: AudioEnvelopeOrSequenceIndex, Flow_FA2F, AudioEffectRequest, AudioSequenceDelay, Flow_F99B, Flow_F9A4, Flow_F9D4, Flow_F9DD.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_F9FD:
+    ldx AudioEnvelopeOrSequenceIndex                       ; PRG $39FD | CPU $F9FD | A6 F8
+    bne Flow_FA2F                ; PRG $39FF | CPU $F9FF | D0 2E
+    ldy AudioEffectRequest                       ; PRG $3A01 | CPU $FA01 | A4 FE
+    lda AudioSequenceDelay                       ; PRG $3A03 | CPU $FA03 | A5 F2
+    lsr AudioEffectRequest                       ; PRG $3A05 | CPU $FA05 | 46 FE
+    bcs Flow_F99B                ; PRG $3A07 | CPU $FA07 | B0 92
+    lsr a                           ; PRG $3A09 | CPU $FA09 | 4A
+    bcs Flow_F9A4                ; PRG $3A0A | CPU $FA0A | B0 98
+    lsr AudioEffectRequest                       ; PRG $3A0C | CPU $FA0C | 46 FE
+    bcs Flow_F9D4                ; PRG $3A0E | CPU $FA0E | B0 C4
+    lsr a                           ; PRG $3A10 | CPU $FA10 | 4A
+    bcs Flow_F9DD                ; PRG $3A11 | CPU $FA11 | B0 CA
+    lsr AudioEffectRequest                       ; PRG $3A13 | CPU $FA13 | 46 FE
+    bcs Flow_FA32                ; PRG $3A15 | CPU $FA15 | B0 1B
+    lsr a                           ; PRG $3A17 | CPU $FA17 | 4A
+    bcs Flow_FA3C                ; PRG $3A18 | CPU $FA18 | B0 22
+    lsr AudioEffectRequest                       ; PRG $3A1A | CPU $FA1A | 46 FE
+    bcs Flow_FA61                ; PRG $3A1C | CPU $FA1C | B0 43
+    lsr a                           ; PRG $3A1E | CPU $FA1E | 4A
+    bcs Flow_FA6F                ; PRG $3A1F | CPU $FA1F | B0 4E
+    lsr AudioEffectRequest                       ; PRG $3A21 | CPU $FA21 | 46 FE
+    bcs Flow_FA93                ; PRG $3A23 | CPU $FA23 | B0 6E
+    lsr a                           ; PRG $3A25 | CPU $FA25 | 4A
+    bcs Flow_FA9C                ; PRG $3A26 | CPU $FA26 | B0 74
+    lsr a                           ; PRG $3A28 | CPU $FA28 | 4A
+    bcs Flow_FA85                ; PRG $3A29 | CPU $FA29 | B0 5A
+    lsr AudioEffectRequest                       ; PRG $3A2B | CPU $FA2B | 46 FE
+    bcs Flow_FAA4                ; PRG $3A2D | CPU $FA2D | B0 75
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA2 F.
+; Local behavior: Reads Continuation_FB9A; mutates no direct memory mutation observed.
+; Parameters: Continuation_FB9A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA2F:
+    jmp Continuation_FB9A                ; PRG $3A2F | CPU $FA2F | 4C 9A FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA32.
+; Local behavior: Reads ComputeOrDispatch_F98B; mutates Ram_07B5.
+; Parameters: ComputeOrDispatch_F98B.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA32:
+    lda #$48                        ; PRG $3A32 | CPU $FA32 | A9 48
+    jsr ComputeOrDispatch_F98B                ; PRG $3A34 | CPU $FA34 | 20 8B F9
+    lda #$25                        ; PRG $3A37 | CPU $FA37 | A9 25
+    sta Ram_07B5                    ; PRG $3A39 | CPU $FA39 | 8D B5 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA3 C.
+; Local behavior: Reads Ram_07B3, Flow_FA4F, Ram_07B5, ControllerSerialBits, UpdateApuChannelState_FA82; mutates ControllerSerialBits.
+; Parameters: Ram_07B3, Flow_FA4F, Ram_07B5, ControllerSerialBits, UpdateApuChannelState_FA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA3C:
+    lda Ram_07B3                    ; PRG $3A3C | CPU $FA3C | AD B3 07
+    and #$07                        ; PRG $3A3F | CPU $FA3F | 29 07
+    sta ControllerSerialBits                       ; PRG $3A41 | CPU $FA41 | 85 00
+    lsr a                           ; PRG $3A43 | CPU $FA43 | 4A
+    bcs Flow_FA4F                ; PRG $3A44 | CPU $FA44 | B0 09
+    lda Ram_07B5                    ; PRG $3A46 | CPU $FA46 | AD B5 07
+    and #$F8                        ; PRG $3A49 | CPU $FA49 | 29 F8
+    ora ControllerSerialBits                       ; PRG $3A4B | CPU $FA4B | 05 00
+    bne UpdateApuChannelState_FA82                ; PRG $3A4D | CPU $FA4D | D0 33
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA4 F.
+; Local behavior: Reads Ram_07B5, UpdateRam_07B5_FA7F, UpdateApuChannelState_FA82; mutates no direct memory mutation observed.
+; Parameters: Ram_07B5, UpdateRam_07B5_FA7F, UpdateApuChannelState_FA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA4F:
+    lda Ram_07B5                    ; PRG $3A4F | CPU $FA4F | AD B5 07
+    lsr a                           ; PRG $3A52 | CPU $FA52 | 4A
+    lsr a                           ; PRG $3A53 | CPU $FA53 | 4A
+    lsr a                           ; PRG $3A54 | CPU $FA54 | 4A
+    lsr a                           ; PRG $3A55 | CPU $FA55 | 4A
+    clc                             ; PRG $3A56 | CPU $FA56 | 18
+    adc Ram_07B5                    ; PRG $3A57 | CPU $FA57 | 6D B5 07
+    bcc UpdateRam_07B5_FA7F                ; PRG $3A5A | CPU $FA5A | 90 23
+    lda Ram_07B5                    ; PRG $3A5C | CPU $FA5C | AD B5 07
+    bne UpdateApuChannelState_FA82                ; PRG $3A5F | CPU $FA5F | D0 21
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA61.
+; Local behavior: Reads ComputeOrDispatch_F98B, UpdateApuChannelState_FA82; mutates Ram_07B5.
+; Parameters: ComputeOrDispatch_F98B, UpdateApuChannelState_FA82.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA61:
+    lda #$19                        ; PRG $3A61 | CPU $FA61 | A9 19
+    jsr ComputeOrDispatch_F98B                ; PRG $3A63 | CPU $FA63 | 20 8B F9
+    lda #$F0                        ; PRG $3A66 | CPU $FA66 | A9 F0
+    sta Ram_07B5                    ; PRG $3A68 | CPU $FA68 | 8D B5 07
+    lda #$FF                        ; PRG $3A6B | CPU $FA6B | A9 FF
+    bne UpdateApuChannelState_FA82                ; PRG $3A6D | CPU $FA6D | D0 13
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA6 F.
+; Local behavior: Reads Ram_07B5; mutates Ram_07B5.
+; Parameters: Ram_07B5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA6F:
+    lda Ram_07B5                    ; PRG $3A6F | CPU $FA6F | AD B5 07
+    tay                             ; PRG $3A72 | CPU $FA72 | A8
+    lsr a                           ; PRG $3A73 | CPU $FA73 | 4A
+    lsr a                           ; PRG $3A74 | CPU $FA74 | 4A
+    lsr a                           ; PRG $3A75 | CPU $FA75 | 4A
+    lsr a                           ; PRG $3A76 | CPU $FA76 | 4A
+    sta Ram_07B5                    ; PRG $3A77 | CPU $FA77 | 8D B5 07
+    tya                             ; PRG $3A7A | CPU $FA7A | 98
+    clc                             ; PRG $3A7B | CPU $FA7B | 18
+    sbc Ram_07B5                    ; PRG $3A7C | CPU $FA7C | ED B5 07
+; -----------------------------------------------------------------------------
+; Global purpose: Update Ram 07 B5 FA7 F.
+; Local behavior: Reads implicit CPU state or none observed; mutates Ram_07B5.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateRam_07B5_FA7F:
+    sta Ram_07B5                    ; PRG $3A7F | CPU $FA7F | 8D B5 07
+; -----------------------------------------------------------------------------
+; Global purpose: Update Apu Channel State FA82.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateApuChannelState_FA82:
+    sta $400A                       ; PRG $3A82 | CPU $FA82 | 8D 0A 40
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA85.
+; Local behavior: Reads Ram_07B3, Flow_FA2F; mutates Ram_07B3, AudioSequenceDelay.
+; Parameters: Ram_07B3, Flow_FA2F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA85:
+    dec Ram_07B3                    ; PRG $3A85 | CPU $FA85 | CE B3 07
+    bne Flow_FA2F                ; PRG $3A88 | CPU $FA88 | D0 A5
+    lda #$00                        ; PRG $3A8A | CPU $FA8A | A9 00
+    sta AudioSequenceDelay                       ; PRG $3A8C | CPU $FA8C | 85 F2
+    sta $4008                       ; PRG $3A8E | CPU $FA8E | 8D 08 40
+    beq Flow_FA2F                ; PRG $3A91 | CPU $FA91 | F0 9C
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA93.
+; Local behavior: Reads ComputeOrDispatch_F98B, UpdateRam_07B5_FA7F; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_F98B, UpdateRam_07B5_FA7F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA93:
+    lda #$18                        ; PRG $3A93 | CPU $FA93 | A9 18
+    jsr ComputeOrDispatch_F98B                ; PRG $3A95 | CPU $FA95 | 20 8B F9
+    lda #$50                        ; PRG $3A98 | CPU $FA98 | A9 50
+    bne UpdateRam_07B5_FA7F                ; PRG $3A9A | CPU $FA9A | D0 E3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FA9 C.
+; Local behavior: Reads Ram_07B5, UpdateRam_07B5_FA7F; mutates no direct memory mutation observed.
+; Parameters: Ram_07B5, UpdateRam_07B5_FA7F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FA9C:
+    lda Ram_07B5                    ; PRG $3A9C | CPU $FA9C | AD B5 07
+    clc                             ; PRG $3A9F | CPU $FA9F | 18
+    adc #$02                        ; PRG $3AA0 | CPU $FAA0 | 69 02
+    bne UpdateRam_07B5_FA7F                ; PRG $3AA2 | CPU $FAA2 | D0 DB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FAA4.
+; Local behavior: Reads ConfigureSoundChannel, StartSoundEffect, Flow_FA85, LookupTableEntry_FAF5; mutates no direct memory mutation observed.
+; Parameters: ConfigureSoundChannel, StartSoundEffect, Flow_FA85, LookupTableEntry_FAF5.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FAA4:
+    lda #$04                        ; PRG $3AA4 | CPU $FAA4 | A9 04
+    ldx #$06                        ; PRG $3AA6 | CPU $FAA6 | A2 06
+    jsr ConfigureSoundChannel                ; PRG $3AA8 | CPU $FAA8 | 20 8D F9
+    lda #$72                        ; PRG $3AAB | CPU $FAAB | A9 72
+    ldx #$08                        ; PRG $3AAD | CPU $FAAD | A2 08
+    jsr StartSoundEffect                ; PRG $3AAF | CPU $FAAF | 20 36 F8
+    bne Flow_FA85                ; PRG $3AB2 | CPU $FAB2 | D0 D1
+    bpl LookupTableEntry_FAF5       ; PRG $3AB4 | CPU $FAB4 | 10 3F
+    .byte $3F,$3F,$30,$3F,$30,$3F,$3F,$3F,$3F,$30,$30,$30,$3F,$3F,$3F,$3F ; PRG $3AB6 | CPU $FAB6
+    .byte $30,$30,$3F,$3F,$30,$3F,$3F,$3F,$30,$3F,$3F,$30,$30,$30 ; PRG $3AC6 | CPU $FAC6
+
+IndexedGameplayLookupTable_FAD4:
+    .byte $30,$3F,$0F,$0A,$0B,$0A,$0A,$0D,$0C,$0E,$0C,$0F,$0B,$0F,$0E,$0F ; PRG $3AD4 | CPU $FAD4
+    .byte $0F,$0F,$0B,$0F,$0B,$0F,$0B,$0D,$0F,$0F,$0F,$0F,$0F,$0F,$0F,$0F ; PRG $3AE4 | CPU $FAE4
+    .byte $0F ; PRG $3AF4 | CPU $FAF4
+
+; Relative branch target; this byte is also the final entry of the preceding lookup table.
+LookupTableEntry_FAF5:
+    .byte $0F ; PRG $3AF5 | CPU $FAF5
+
+IndexedGameplayLookupTable_FAF6:
+    .byte $00,$10,$31,$31,$31,$31,$32,$32,$32,$32,$33,$33,$33,$33,$34,$34 ; PRG $3AF6 | CPU $FAF6
+    .byte $34,$34,$35,$35,$37,$37,$37,$3B,$3D,$3E,$3D,$3F,$3F,$3F,$3F,$3F ; PRG $3B06 | CPU $FB06
+    .byte $3F ; PRG $3B16 | CPU $FB16
+
+IndexedGameplayLookupTable_FB17:
+    .byte $3E,$3F,$02,$02,$02,$02,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03 ; PRG $3B17 | CPU $FB17
+    .byte $03,$03,$04,$04,$04,$04,$04,$04,$04,$05,$05,$06,$08,$08,$06,$04 ; PRG $3B27 | CPU $FB27
+    .byte $02,$00,$00 ; PRG $3B37 | CPU $FB37
+; -----------------------------------------------------------------------------
+; Global purpose: Compute Or Dispatch FB3 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+ComputeOrDispatch_FB3A:
+    ldx #$08                        ; PRG $3B3A | CPU $FB3A | A2 08
+; -----------------------------------------------------------------------------
+; Global purpose: Update Apu Channel State FB3 C.
+; Local behavior: Reads implicit CPU state or none observed; mutates AudioSequencePosition, Ram_07B6.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: sty AudioSequencePosition; sta Ram_07B6; rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateApuChannelState_FB3C:
+    stx $400F                       ; PRG $3B3C | CPU $FB3C | 8E 0F 40
+    sty AudioSequencePosition                       ; PRG $3B3F | CPU $FB3F | 84 F3
+    sta Ram_07B6                    ; PRG $3B41 | CPU $FB41 | 8D B6 07
+    rts                             ; PRG $3B44 | CPU $FB44 | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB45.
+; Local behavior: Reads ComputeOrDispatch_FB3A; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_FB3A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB45:
+    lda #$21                        ; PRG $3B45 | CPU $FB45 | A9 21
+    jsr ComputeOrDispatch_FB3A                ; PRG $3B47 | CPU $FB47 | 20 3A FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB4 A.
+; Local behavior: Reads Ram_07B6, AudioSequenceIndexTable_FAB3, IndexedGameplayLookupTable_FAD4, Flow_FB63; mutates no direct memory mutation observed.
+; Parameters: Ram_07B6, AudioSequenceIndexTable_FAB3, IndexedGameplayLookupTable_FAD4, Flow_FB63.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB4A:
+    ldy Ram_07B6                    ; PRG $3B4A | CPU $FB4A | AC B6 07
+    ldx AudioSequenceIndexTable_FAB3,y                 ; PRG $3B4D | CPU $FB4D | BE B3 FA
+    lda IndexedGameplayLookupTable_FAD4,y                 ; PRG $3B50 | CPU $FB50 | B9 D4 FA
+    bne Flow_FB63                ; PRG $3B53 | CPU $FB53 | D0 0E
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB55.
+; Local behavior: Reads ComputeOrDispatch_FB3A; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_FB3A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB55:
+    lda #$21                        ; PRG $3B55 | CPU $FB55 | A9 21
+    jsr ComputeOrDispatch_FB3A                ; PRG $3B57 | CPU $FB57 | 20 3A FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB5 A.
+; Local behavior: Reads Ram_07B6, IndexedGameplayLookupTable_FAF6, IndexedGameplayLookupTable_FB17; mutates no direct memory mutation observed.
+; Parameters: Ram_07B6, IndexedGameplayLookupTable_FAF6, IndexedGameplayLookupTable_FB17.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB5A:
+    ldy Ram_07B6                    ; PRG $3B5A | CPU $FB5A | AC B6 07
+    ldx IndexedGameplayLookupTable_FAF6,y                 ; PRG $3B5D | CPU $FB5D | BE F6 FA
+    lda IndexedGameplayLookupTable_FB17,y                 ; PRG $3B60 | CPU $FB60 | B9 17 FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB63.
+; Local behavior: Reads Ram_07B6, Flow_FBBA; mutates Ram_07B6, AudioSequencePosition.
+; Parameters: Ram_07B6, Flow_FBBA.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB63:
+    stx $400C                       ; PRG $3B63 | CPU $FB63 | 8E 0C 40
+    sta $400E                       ; PRG $3B66 | CPU $FB66 | 8D 0E 40
+    dec Ram_07B6                    ; PRG $3B69 | CPU $FB69 | CE B6 07
+    bne Flow_FBBA                ; PRG $3B6C | CPU $FB6C | D0 4C
+    lda #$00                        ; PRG $3B6E | CPU $FB6E | A9 00
+    sta AudioSequencePosition                       ; PRG $3B70 | CPU $FB70 | 85 F3
+    beq Flow_FBBA                ; PRG $3B72 | CPU $FB72 | F0 46
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB74.
+; Local behavior: Reads ComputeOrDispatch_FB3A; mutates no direct memory mutation observed.
+; Parameters: ComputeOrDispatch_FB3A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB74:
+    lda #$10                        ; PRG $3B74 | CPU $FB74 | A9 10
+    jsr ComputeOrDispatch_FB3A                ; PRG $3B76 | CPU $FB76 | 20 3A FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB79.
+; Local behavior: Reads Ram_07B6, Flow_FB86; mutates no direct memory mutation observed.
+; Parameters: Ram_07B6, Flow_FB86.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB79:
+    lda Ram_07B6                    ; PRG $3B79 | CPU $FB79 | AD B6 07
+    clc                             ; PRG $3B7C | CPU $FB7C | 18
+    adc #$FF                        ; PRG $3B7D | CPU $FB7D | 69 FF
+    asl a                           ; PRG $3B7F | CPU $FB7F | 0A
+    cmp #$0F                        ; PRG $3B80 | CPU $FB80 | C9 0F
+    bcc Flow_FB86                ; PRG $3B82 | CPU $FB82 | 90 02
+    lda #$0F                        ; PRG $3B84 | CPU $FB84 | A9 0F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB86.
+; Local behavior: Reads Flow_FB63; mutates no direct memory mutation observed.
+; Parameters: Flow_FB63.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB86:
+    ora #$10                        ; PRG $3B86 | CPU $FB86 | 09 10
+    tax                             ; PRG $3B88 | CPU $FB88 | AA
+    lda #$0E                        ; PRG $3B89 | CPU $FB89 | A9 0E
+    bne Flow_FB63                ; PRG $3B8B | CPU $FB8B | D0 D6
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB8 D.
+; Local behavior: Reads UpdateApuChannelState_FB3C; mutates no direct memory mutation observed.
+; Parameters: UpdateApuChannelState_FB3C.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB8D:
+    lda #$05                        ; PRG $3B8D | CPU $FB8D | A9 05
+    ldx #$18                        ; PRG $3B8F | CPU $FB8F | A2 18
+    jsr UpdateApuChannelState_FB3C                ; PRG $3B91 | CPU $FB91 | 20 3C FB
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FB94.
+; Local behavior: Reads Flow_FB63; mutates no direct memory mutation observed.
+; Parameters: Flow_FB63.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FB94:
+    ldx #$1B                        ; PRG $3B94 | CPU $FB94 | A2 1B
+    lda #$08                        ; PRG $3B96 | CPU $FB96 | A9 08
+    bne Flow_FB63                ; PRG $3B98 | CPU $FB98 | D0 C9
+; -----------------------------------------------------------------------------
+; Global purpose: Continuation FB9 A.
+; Local behavior: Reads AudioPendingFlags, AudioSequencePosition, Flow_FB4A, Flow_FB45, Flow_FB55, Flow_FB5A, Flow_FB74, Flow_FB79; mutates AudioPendingFlags.
+; Parameters: AudioPendingFlags, AudioSequencePosition, Flow_FB4A, Flow_FB45, Flow_FB55, Flow_FB5A, Flow_FB74, Flow_FB79.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Continuation_FB9A:
+    ldy AudioPendingFlags                       ; PRG $3B9A | CPU $FB9A | A4 FD
+    lda AudioSequencePosition                       ; PRG $3B9C | CPU $FB9C | A5 F3
+    lsr a                           ; PRG $3B9E | CPU $FB9E | 4A
+    bcs Flow_FB4A                ; PRG $3B9F | CPU $FB9F | B0 A9
+    lsr AudioPendingFlags                       ; PRG $3BA1 | CPU $FBA1 | 46 FD
+    bcs Flow_FB45                ; PRG $3BA3 | CPU $FBA3 | B0 A0
+    lsr AudioPendingFlags                       ; PRG $3BA5 | CPU $FBA5 | 46 FD
+    bcs Flow_FB55                ; PRG $3BA7 | CPU $FBA7 | B0 AC
+    lsr a                           ; PRG $3BA9 | CPU $FBA9 | 4A
+    bcs Flow_FB5A                ; PRG $3BAA | CPU $FBAA | B0 AE
+    lsr AudioPendingFlags                       ; PRG $3BAC | CPU $FBAC | 46 FD
+    bcs Flow_FB74                ; PRG $3BAE | CPU $FBAE | B0 C4
+    lsr a                           ; PRG $3BB0 | CPU $FBB0 | 4A
+    bcs Flow_FB79                ; PRG $3BB1 | CPU $FBB1 | B0 C6
+    lsr a                           ; PRG $3BB3 | CPU $FBB3 | 4A
+    bcs Flow_FB94                ; PRG $3BB4 | CPU $FBB4 | B0 DE
+    lsr AudioPendingFlags                       ; PRG $3BB6 | CPU $FBB6 | 46 FD
+    bcs Flow_FB8D                ; PRG $3BB8 | CPU $FBB8 | B0 D3
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBBA.
+; Local behavior: Reads AudioRequestFlags, Flow_FBC6, Flow_FBEB; mutates AudioEffectIndex.
+; Parameters: AudioRequestFlags, Flow_FBC6, Flow_FBEB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBBA:
+    lda AudioRequestFlags                       ; PRG $3BBA | CPU $FBBA | A5 FB
+    beq Flow_FBC6                ; PRG $3BBC | CPU $FBBC | F0 08
+    clc                             ; PRG $3BBE | CPU $FBBE | 18
+    adc #$07                        ; PRG $3BBF | CPU $FBBF | 69 07
+    sta AudioEffectIndex                       ; PRG $3BC1 | CPU $FBC1 | 85 F5
+    tay                             ; PRG $3BC3 | CPU $FBC3 | A8
+    bne Flow_FBEB                ; PRG $3BC4 | CPU $FBC4 | D0 25
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBC6.
+; Local behavior: Reads AudioEffectIndex, Flow_FC23, AudioModeOrEffectIndex, Flow_FBDF, Ram_07A8, Flow_FBDE; mutates Ram_07A8.
+; Parameters: AudioEffectIndex, Flow_FC23, AudioModeOrEffectIndex, Flow_FBDF, Ram_07A8, Flow_FBDE.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBC6:
+    lda AudioEffectIndex                       ; PRG $3BC6 | CPU $FBC6 | A5 F5
+    bne Flow_FC23                ; PRG $3BC8 | CPU $FBC8 | D0 59
+    lda AudioModeOrEffectIndex                       ; PRG $3BCA | CPU $FBCA | A5 FC
+    bne Flow_FBDF                ; PRG $3BCC | CPU $FBCC | D0 11
+    ldy Ram_07A8                    ; PRG $3BCE | CPU $FBCE | AC A8 07
+    beq Flow_FBDE                ; PRG $3BD1 | CPU $FBD1 | F0 0B
+    sta Ram_07A8                    ; PRG $3BD3 | CPU $FBD3 | 8D A8 07
+; -----------------------------------------------------------------------------
+; Global purpose: Update Apu Channel State FBD6.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateApuChannelState_FBD6:
+    lda #$90                        ; PRG $3BD6 | CPU $FBD6 | A9 90
+    sta $4000                       ; PRG $3BD8 | CPU $FBD8 | 8D 00 40
+    sta $4004                       ; PRG $3BDB | CPU $FBDB | 8D 04 40
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBDE.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBDE:
+    rts                             ; PRG $3BDE | CPU $FBDE | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBDF.
+; Local behavior: Reads Ram_07A8, Flow_FC23; mutates no direct memory mutation observed.
+; Parameters: Ram_07A8, Flow_FC23.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBDF:
+    eor Ram_07A8                    ; PRG $3BDF | CPU $FBDF | 4D A8 07
+    beq Flow_FC23                ; PRG $3BE2 | CPU $FBE2 | F0 3F
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBE4.
+; Local behavior: Reads AudioModeOrEffectIndex, UpdateApuChannelState_FBD6; mutates Ram_07A8.
+; Parameters: AudioModeOrEffectIndex, UpdateApuChannelState_FBD6.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBE4:
+    ldy AudioModeOrEffectIndex                       ; PRG $3BE4 | CPU $FBE4 | A4 FC
+    beq UpdateApuChannelState_FBD6                ; PRG $3BE6 | CPU $FBE6 | F0 EE
+    sty Ram_07A8                    ; PRG $3BE8 | CPU $FBE8 | 8C A8 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FBEB.
+; Local behavior: Reads IndexedGameplayLookupTable_FDA4, IndexedGameplayLookupTable_FDA5, IndexedGameplayLookupTable_FDA6, IndexedGameplayLookupTable_FDA7, IndexedGameplayLookupTable_FDA8, IndexedGameplayLookupTable_FDA9, IndexedGameplayLookupTable_FDAA, IndexedGameplayLookupTable_FDAB; mutates AudioPeriodBase, AudioSequencePointerLo, AudioSequencePointerHi, AudioCommandValue, AudioEnvelopeOrSequenceIndex, Ram_07F0, Ram_07F4, AudioChannelStateArray.
+; Parameters: IndexedGameplayLookupTable_FDA4, IndexedGameplayLookupTable_FDA5, IndexedGameplayLookupTable_FDA6, IndexedGameplayLookupTable_FDA7, IndexedGameplayLookupTable_FDA8, IndexedGameplayLookupTable_FDA9, IndexedGameplayLookupTable_FDAA, IndexedGameplayLookupTable_FDAB.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FBEB:
+    lda IndexedGameplayLookupTable_FDA4,y                 ; PRG $3BEB | CPU $FBEB | B9 A4 FD
+    tay                             ; PRG $3BEE | CPU $FBEE | A8
+    lda IndexedGameplayLookupTable_FDA5,y                 ; PRG $3BEF | CPU $FBEF | B9 A5 FD
+    sta AudioPeriodBase                       ; PRG $3BF2 | CPU $FBF2 | 85 F7
+    lda IndexedGameplayLookupTable_FDA6,y                 ; PRG $3BF4 | CPU $FBF4 | B9 A6 FD
+    sta AudioSequencePointerLo                       ; PRG $3BF7 | CPU $FBF7 | 85 F9
+    lda IndexedGameplayLookupTable_FDA7,y                 ; PRG $3BF9 | CPU $FBF9 | B9 A7 FD
+    sta AudioSequencePointerHi                       ; PRG $3BFC | CPU $FBFC | 85 FA
+    lda IndexedGameplayLookupTable_FDA8,y                 ; PRG $3BFE | CPU $FBFE | B9 A8 FD
+    sta AudioCommandValue                       ; PRG $3C01 | CPU $FC01 | 85 F4
+    lda IndexedGameplayLookupTable_FDA9,y                 ; PRG $3C03 | CPU $FC03 | B9 A9 FD
+    sta AudioEnvelopeOrSequenceIndex                       ; PRG $3C06 | CPU $FC06 | 85 F8
+    lda IndexedGameplayLookupTable_FDAA,y                 ; PRG $3C08 | CPU $FC08 | B9 AA FD
+    sta Ram_07F0                    ; PRG $3C0B | CPU $FC0B | 8D F0 07
+    lda IndexedGameplayLookupTable_FDAB,y                 ; PRG $3C0E | CPU $FC0E | B9 AB FD
+    sta Ram_07F4                    ; PRG $3C11 | CPU $FC11 | 8D F4 07
+    lda #$00                        ; PRG $3C14 | CPU $FC14 | A9 00
+    sta AudioChannelStateArray                       ; PRG $3C16 | CPU $FC16 | 85 F0
+    lda #$01                        ; PRG $3C18 | CPU $FC18 | A9 01
+    sta Ram_0792                    ; PRG $3C1A | CPU $FC1A | 8D 92 07
+    sta Ram_0796                    ; PRG $3C1D | CPU $FC1D | 8D 96 07
+    sta Ram_079A                    ; PRG $3C20 | CPU $FC20 | 8D 9A 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC23.
+; Local behavior: Reads Ram_0796, Flow_FC35, UpdateApuChannelState_FC6A; mutates Ram_0796.
+; Parameters: Ram_0796, Flow_FC35, UpdateApuChannelState_FC6A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC23:
+    dec Ram_0796                    ; PRG $3C23 | CPU $FC23 | CE 96 07
+    bne Flow_FC35                ; PRG $3C26 | CPU $FC26 | D0 0D
+    ldx #$04                        ; PRG $3C28 | CPU $FC28 | A2 04
+    jsr UpdateApuChannelState_FC6A                ; PRG $3C2A | CPU $FC2A | 20 6A FC
+    bne Flow_FC35                ; PRG $3C2D | CPU $FC2D | D0 06
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC2 F.
+; Local behavior: Reads Flow_FBE4; mutates AudioEffectIndex, AudioEnvelopeOrSequenceIndex.
+; Parameters: Flow_FBE4.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC2F:
+    sta AudioEffectIndex                       ; PRG $3C2F | CPU $FC2F | 85 F5
+    sta AudioEnvelopeOrSequenceIndex                       ; PRG $3C31 | CPU $FC31 | 85 F8
+    beq Flow_FBE4                ; PRG $3C33 | CPU $FC33 | F0 AF
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC35.
+; Local behavior: Reads Ram_0792, Flow_FC41, UpdateApuChannelState_FC6A, Flow_FC2F; mutates Ram_0792.
+; Parameters: Ram_0792, Flow_FC41, UpdateApuChannelState_FC6A, Flow_FC2F.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC35:
+    dec Ram_0792                    ; PRG $3C35 | CPU $FC35 | CE 92 07
+    bne Flow_FC41                ; PRG $3C38 | CPU $FC38 | D0 07
+    ldx #$00                        ; PRG $3C3A | CPU $FC3A | A2 00
+    jsr UpdateApuChannelState_FC6A                ; PRG $3C3C | CPU $FC3C | 20 6A FC
+    beq Flow_FC2F                ; PRG $3C3F | CPU $FC3F | F0 EE
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC41.
+; Local behavior: Reads AudioEnvelopeOrSequenceIndex, Flow_FC5D, Ram_079A, UpdateApuChannelState_FC6A, Flow_FC5A; mutates Ram_079A.
+; Parameters: AudioEnvelopeOrSequenceIndex, Flow_FC5D, Ram_079A, UpdateApuChannelState_FC6A, Flow_FC5A.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC41:
+    ldy AudioEnvelopeOrSequenceIndex                       ; PRG $3C41 | CPU $FC41 | A4 F8
+    beq Flow_FC5D                ; PRG $3C43 | CPU $FC43 | F0 18
+    dec Ram_079A                    ; PRG $3C45 | CPU $FC45 | CE 9A 07
+    bne Flow_FC5D                ; PRG $3C48 | CPU $FC48 | D0 13
+    ldx #$08                        ; PRG $3C4A | CPU $FC4A | A2 08
+    jsr UpdateApuChannelState_FC6A                ; PRG $3C4C | CPU $FC4C | 20 6A FC
+    clc                             ; PRG $3C4F | CPU $FC4F | 18
+    adc #$FF                        ; PRG $3C50 | CPU $FC50 | 69 FF
+    asl a                           ; PRG $3C52 | CPU $FC52 | 0A
+    asl a                           ; PRG $3C53 | CPU $FC53 | 0A
+    cmp #$38                        ; PRG $3C54 | CPU $FC54 | C9 38
+    bcc Flow_FC5A                ; PRG $3C56 | CPU $FC56 | 90 02
+    lda #$38                        ; PRG $3C58 | CPU $FC58 | A9 38
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC5 A.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC5A:
+    sta $4008                       ; PRG $3C5A | CPU $FC5A | 8D 08 40
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC5 D.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: rts.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC5D:
+    rts                             ; PRG $3C5D | CPU $FC5D | 60
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC5 E.
+; Local behavior: Reads AudioPeriodBase, IndexedGameplayLookupTable_FFC3; mutates Ram_0790.
+; Parameters: AudioPeriodBase, IndexedGameplayLookupTable_FFC3.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC5E:
+    and #$07                        ; PRG $3C5E | CPU $FC5E | 29 07
+    clc                             ; PRG $3C60 | CPU $FC60 | 18
+    adc AudioPeriodBase                       ; PRG $3C61 | CPU $FC61 | 65 F7
+    tay                             ; PRG $3C63 | CPU $FC63 | A8
+    lda IndexedGameplayLookupTable_FFC3,y                 ; PRG $3C64 | CPU $FC64 | B9 C3 FF
+    sta Ram_0790,x                  ; PRG $3C67 | CPU $FC67 | 9D 90 07
+; -----------------------------------------------------------------------------
+; Global purpose: Update Apu Channel State FC6 A.
+; Local behavior: Reads AudioChannelStateArray, AudioSequencePointerLo, Flow_FC5E, Flow_FC92, Flow_FC89, AudioFrameCounter, Flow_FC8C, Ram_07F0; mutates AudioChannelStateArray.
+; Parameters: AudioChannelStateArray, AudioSequencePointerLo, Flow_FC5E, Flow_FC92, Flow_FC89, AudioFrameCounter, Flow_FC8C, Ram_07F0.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+UpdateApuChannelState_FC6A:
+    ldy AudioChannelStateArray,x                     ; PRG $3C6A | CPU $FC6A | B4 F0
+    inc AudioChannelStateArray,x                     ; PRG $3C6C | CPU $FC6C | F6 F0
+    lda (AudioSequencePointerLo),y                   ; PRG $3C6E | CPU $FC6E | B1 F9
+    bmi Flow_FC5E                ; PRG $3C70 | CPU $FC70 | 30 EC
+    beq Flow_FC92                ; PRG $3C72 | CPU $FC72 | F0 1E
+    cpx #$08                        ; PRG $3C74 | CPU $FC74 | E0 08
+    beq Flow_FC89                ; PRG $3C76 | CPU $FC76 | F0 11
+    ldy AudioFrameCounter                       ; PRG $3C78 | CPU $FC78 | A4 F1
+    bne Flow_FC8C                ; PRG $3C7A | CPU $FC7A | D0 10
+    pha                             ; PRG $3C7C | CPU $FC7C | 48
+    lda Ram_07F0,x                  ; PRG $3C7D | CPU $FC7D | BD F0 07
+    sta $4000,x                     ; PRG $3C80 | CPU $FC80 | 9D 00 40
+    lda #$7F                        ; PRG $3C83 | CPU $FC83 | A9 7F
+    sta $4001,x                     ; PRG $3C85 | CPU $FC85 | 9D 01 40
+    pla                             ; PRG $3C88 | CPU $FC88 | 68
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC89.
+; Local behavior: Reads StartSoundEffect; mutates no direct memory mutation observed.
+; Parameters: StartSoundEffect.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC89:
+    jsr StartSoundEffect                ; PRG $3C89 | CPU $FC89 | 20 36 F8
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC8 C.
+; Local behavior: Reads Ram_0790; mutates Ram_0792.
+; Parameters: Ram_0790.
+; Returns: continues or transfers control; no independent return.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC8C:
+    lda Ram_0790,x                  ; PRG $3C8C | CPU $FC8C | BD 90 07
+    sta Ram_0792,x                  ; PRG $3C8F | CPU $FC8F | 9D 92 07
+; -----------------------------------------------------------------------------
+; Global purpose: Flow FC92.
+; Local behavior: Reads implicit CPU state or none observed; mutates no direct memory mutation observed.
+; Parameters: implicit CPU state or none observed.
+; Returns: returns to caller; flags/register result depends on final instructions: .byte $7E,$42,$52,$7E,$4C,$7E,$44,$3A,$7E,$44,$7E,$52,$7E,$4C,$44,$3A; .byte $7E,$44,$4A,$86,$7E,$81,$7E,$62,$6E,$84,$68,$62,$64,$83,$6E,$6A; .byte $68.
+; Clobbers: Determined by the instructions below; refined in Pass 3.
+; -----------------------------------------------------------------------------
+Flow_FC92:
+    rts                             ; PRG $3C92 | CPU $FC92 | 60
+    .byte $80,$48,$7E,$60,$7E,$52,$7E,$52,$00,$80,$48,$7E,$48,$7E,$60,$7E ; PRG $3C93 | CPU $FC93
+    .byte $60,$80,$60,$56,$60,$56,$60,$56,$60,$83,$56,$00,$80,$7E,$7E,$5E ; PRG $3CA3 | CPU $FCA3
+    .byte $56,$5A,$50,$64,$50,$7E,$5E,$56,$5A,$50,$4C,$50,$00,$80,$7E,$7E ; PRG $3CB3 | CPU $FCB3
+    .byte $5C,$54,$58,$4E,$4A,$4E,$7E,$5C,$54,$58,$4E,$4A,$4E,$80,$56,$58 ; PRG $3CC3 | CPU $FCC3
+    .byte $84,$7E,$7E,$81,$7E,$7E,$83,$08,$16,$82,$12,$10,$80,$1C,$10,$1C ; PRG $3CD3 | CPU $FCD3
+    .byte $02,$1C,$10,$1C,$02,$1C,$00,$81,$7E,$83,$20,$2E,$82,$2A,$28,$80 ; PRG $3CE3 | CPU $FCE3
+    .byte $34,$28,$34,$28,$34,$28,$34,$28,$34,$7E,$7E,$83,$4E,$4C,$4A,$48 ; PRG $3CF3 | CPU $FCF3
+    .byte $46,$44,$44,$85,$7E,$81,$3A,$83,$3C,$85,$3C,$81,$3A,$83,$3C,$3C ; PRG $3D03 | CPU $FD03
+    .byte $46,$82,$3C,$36,$83,$2E,$7E,$00,$83,$46,$44,$42,$40,$3E,$3C,$3A ; PRG $3D13 | CPU $FD13
+    .byte $85,$7E,$81,$2A,$83,$2C,$85,$2E,$81,$30,$83,$32,$2C,$3C,$82,$36 ; PRG $3D23 | CPU $FD23
+    .byte $46,$83,$24,$7E,$84,$7E,$7E,$7E,$7E,$82,$54,$5C,$58,$5E,$5C,$62 ; PRG $3D33 | CPU $FD33
+    .byte $6C,$54,$66,$5E,$54,$50,$84,$4E,$81,$5A,$7E,$50,$7E,$4A,$42,$7E ; PRG $3D43 | CPU $FD43
+    .byte $4A,$7E,$5A,$7E,$50,$4A,$42,$7E,$4A,$5A,$7E,$52,$7E,$4C,$44,$7E ; PRG $3D53 | CPU $FD53
+    .byte $4C,$7E,$5A,$7E,$52,$4C,$44,$7E,$4C,$50,$86,$7E,$81,$7E,$68,$62 ; PRG $3D63 | CPU $FD63
+    .byte $00,$81,$50,$7E,$4A,$7E,$42,$38,$7E,$42,$7E,$50,$7E,$4A,$42,$38 ; PRG $3D73 | CPU $FD73
+    .byte $7E,$42,$52,$7E,$4C,$7E,$44,$3A,$7E,$44,$7E,$52,$7E,$4C,$44,$3A ; PRG $3D83 | CPU $FD83
+    .byte $7E,$44,$4A,$86,$7E,$81,$7E,$62,$6E,$84,$68,$62,$64,$83,$6E,$6A ; PRG $3D93 | CPU $FD93
+    .byte $68 ; PRG $3DA3 | CPU $FDA3
+
+IndexedGameplayLookupTable_FDA4:
+    .byte $7E ; PRG $3DA4 | CPU $FDA4
+
+IndexedGameplayLookupTable_FDA5:
+    .byte $0F ; PRG $3DA5 | CPU $FDA5
+
+IndexedGameplayLookupTable_FDA6:
+    .byte $16 ; PRG $3DA6 | CPU $FDA6
+
+IndexedGameplayLookupTable_FDA7:
+    .byte $0F ; PRG $3DA7 | CPU $FDA7
+
+IndexedGameplayLookupTable_FDA8:
+    .byte $1D ; PRG $3DA8 | CPU $FDA8
+
+IndexedGameplayLookupTable_FDA9:
+    .byte $24 ; PRG $3DA9 | CPU $FDA9
+
+IndexedGameplayLookupTable_FDAA:
+    .byte $2B ; PRG $3DAA | CPU $FDAA
+
+IndexedGameplayLookupTable_FDAB:
+    .byte $24,$32,$39,$40,$47,$4E,$4E,$55,$55,$08,$01,$FE,$02,$00,$14,$94 ; PRG $3DAB | CPU $FDAB
+    .byte $08,$55,$FE,$42,$00,$81,$01,$00,$B8,$FE,$02,$00,$1B,$9B,$10,$CC ; PRG $3DBB | CPU $FDBB
+    .byte $FE,$63,$00,$84,$04,$08,$60,$FF,$32,$00,$00,$80,$00,$93,$FC,$09 ; PRG $3DCB | CPU $FDCB
+    .byte $00,$81,$53,$18,$A4,$FC,$00,$00,$84,$90,$10,$AF,$FC,$11,$21,$80 ; PRG $3DDB | CPU $FDDB
+    .byte $00,$18,$D6,$FC,$14,$14,$1F,$5F,$00,$FE,$FC,$1D,$39,$80,$00,$08 ; PRG $3DEB | CPU $FDEB
+    .byte $4B,$FD,$29,$51,$80,$00,$80,$7E,$81,$34,$32,$30,$2E,$2C,$2A,$28 ; PRG $3DFB | CPU $FDFB
+    .byte $26,$2A,$28,$26,$24,$22,$24,$26,$28,$2A,$28,$26,$24,$22,$24,$26 ; PRG $3E0B | CPU $FE0B
+    .byte $28,$2A,$28,$26,$24,$22,$24,$26,$28,$2A,$28,$26,$24,$22,$24,$26 ; PRG $3E1B | CPU $FE1B
+    .byte $28,$2A,$2C,$2E,$30,$32,$34,$36,$38,$34,$32,$30,$2E,$2C,$2E,$30 ; PRG $3E2B | CPU $FE2B
+    .byte $32,$34,$32,$30,$2E,$2C,$2E,$30,$32,$34,$32,$30,$2E,$2C,$2E,$30 ; PRG $3E3B | CPU $FE3B
+    .byte $32,$34,$32,$30,$2E,$2C,$2E,$30,$32,$00,$81,$28,$7E,$32,$7E,$36 ; PRG $3E4B | CPU $FE4B
+    .byte $32,$7E,$3C,$7E,$7E,$3A,$7E,$36,$32,$7E,$7E,$28,$7E,$32,$7E,$36 ; PRG $3E5B | CPU $FE5B
+    .byte $32,$7E,$3C,$7E,$7E,$3A,$7E,$36,$32,$7E,$7E,$2A,$7E,$34,$7E,$38 ; PRG $3E6B | CPU $FE6B
+    .byte $34,$7E,$3E,$7E,$7E,$3C,$7E,$38,$34,$7E,$7E,$2A,$7E,$34,$7E,$38 ; PRG $3E7B | CPU $FE7B
+    .byte $34,$7E,$3E,$7E,$7E,$3C,$7E,$38,$34,$7E,$7E,$00,$82,$1A,$22,$0A ; PRG $3E8B | CPU $FE8B
+    .byte $22,$1E,$24,$14,$2C,$1A,$22,$0A,$22,$1E,$24,$14,$2C,$1C,$24,$0C ; PRG $3E9B | CPU $FE9B
+    .byte $24,$20,$26,$16,$2E,$1C,$24,$0C,$24,$20,$26,$16,$2E,$81,$7E,$82 ; PRG $3EAB | CPU $FEAB
+    .byte $50,$48,$4E,$46,$4C,$44,$4A,$42,$48,$40,$46,$3E,$44,$3C,$42,$3A ; PRG $3EBB | CPU $FEBB
+    .byte $00,$80,$42,$3C,$42,$7E,$3C,$34,$3C,$7E,$42,$3C,$42,$7E,$46,$3E ; PRG $3ECB | CPU $FECB
+    .byte $46,$7E,$42,$3C,$42,$7E,$3C,$34,$3C,$7E,$42,$3C,$42,$3C,$42,$3C ; PRG $3EDB | CPU $FEDB
+    .byte $42,$3C,$3E,$38,$3E,$7E,$38,$30,$38,$7E,$3E,$38,$3E,$7E,$42,$3A ; PRG $3EEB | CPU $FEEB
+    .byte $42,$7E,$3E,$38,$3E,$7E,$38,$30,$38,$7E,$3E,$38,$3E,$38,$3E,$38 ; PRG $3EFB | CPU $FEFB
+    .byte $3E,$38,$81,$5A,$54,$4C,$42,$3E,$3C,$38,$34,$38,$3C,$42,$46,$4C ; PRG $3F0B | CPU $FF0B
+    .byte $50,$54,$5A,$56,$50,$48,$3E,$3A,$38,$34,$38,$3E,$48,$4C,$50,$56 ; PRG $3F1B | CPU $FF1B
+    .byte $5A,$60,$5A,$00,$82,$1C,$16,$12,$16,$1C,$16,$12,$16,$18,$12,$0E ; PRG $3F2B | CPU $FF2B
+    .byte $12,$18,$12,$0E,$12,$34,$2E,$2A,$26,$24,$20,$1C,$20,$30,$20,$22 ; PRG $3F3B | CPU $FF3B
+    .byte $24 ; PRG $3F4B | CPU $FF4B
+
+GameplayConstantTable_FF4C:
+    .byte $26,$2A,$2E,$30,$34,$1C,$20,$24,$2A,$2E,$34,$38,$30,$18,$1C,$20 ; PRG $3F4C | CPU $FF4C
+    .byte $26,$2A,$30,$34,$81,$50,$7E,$4C,$48,$7E,$44,$40,$7E,$44,$48,$7E ; PRG $3F5C | CPU $FF5C
+    .byte $4C,$50,$7E,$4C,$48,$7E,$44,$40,$7E,$44,$48,$7E,$4C,$58,$7E,$54 ; PRG $3F6C | CPU $FF6C
+    .byte $50,$7E,$4C,$48,$7E,$4C,$50,$7E,$54,$58,$7E,$54,$50,$7E,$4C,$48 ; PRG $3F7C | CPU $FF7C
+    .byte $7E,$4C,$50,$7E,$54,$00,$81,$44,$7E,$40,$54,$7E,$38,$34,$7E,$38 ; PRG $3F8C | CPU $FF8C
+    .byte $54,$7E,$40,$44,$7E,$40,$54,$7E,$38,$34,$7E,$38,$54,$7E,$40,$4C ; PRG $3F9C | CPU $FF9C
+    .byte $7E,$48,$44,$7E,$40,$3C,$7E,$40,$44,$7E,$48,$4C,$7E,$48,$44,$7E ; PRG $3FAC | CPU $FFAC
+    .byte $40,$3C,$7E,$40,$44,$7E,$48 ; PRG $3FBC | CPU $FFBC
+
+IndexedGameplayLookupTable_FFC3:
+    .byte $02,$04,$08,$10,$20,$0C,$18,$06,$03,$06,$0C,$18,$30,$12,$24,$09 ; PRG $3FC3 | CPU $FFC3
+    .byte $04,$08,$10,$20,$40,$18,$30,$0C,$05,$0A,$14,$28,$50,$1E,$3C ; PRG $3FD3 | CPU $FFD3
+
+IndexedGameplayLookupTable_FFE2:
+    .byte $5C ; PRG $3FE2 | CPU $FFE2
+
+IndexedGameplayLookupTable_FFE3:
+    .byte $0D,$9C,$0C,$E6,$0B,$3C,$0B,$9A,$0A,$02,$0A,$72,$09,$EA,$08,$6A ; PRG $3FE3 | CPU $FFE3
+    .byte $08,$F0,$07,$7E,$07,$12,$07 ; PRG $3FF3 | CPU $FFF3
+
+.segment "VECTORS"
+    .word NmiHandler             ; PRG $3FFA | CPU $FFFA | 8D C0
+    .word ResetHandler           ; PRG $3FFC | CPU $FFFC | 00 C0
+    .word ResetHandler           ; PRG $3FFE | CPU $FFFE | 00 C0
diff --git a/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/symbols.inc b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/symbols.inc
new file mode 100644
index 0000000..76ddb55
--- /dev/null
+++ b/_wip/Donkey Kong 3 (JUE)/DonkeyKong3_ZeroPageSemanticNames/symbols.inc	
@@ -0,0 +1,12 @@
+PPUCTRL = $2000
+PPUMASK = $2001
+PPUSTATUS = $2002
+OAMADDR = $2003
+OAMDATA = $2004
+PPUSCROLL = $2005
+PPUADDR = $2006
+PPUDATA = $2007
+OAMDMA = $4014
+SND_CHN = $4015
+JOY1 = $4016
+JOY2 = $4017
diff --git a/_wip/Donkey Kong 3 (JUE)/chr.bin b/_wip/Donkey Kong 3 (JUE)/chr.bin
new file mode 100644
index 0000000..87b88f5
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/chr.bin differ
diff --git a/_wip/Donkey Kong 3 (JUE)/dk3.nes.txt b/_wip/Donkey Kong 3 (JUE)/dk3.nes.txt
new file mode 100644
index 0000000..7b683e6
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/dk3.nes.txt differ
diff --git a/_wip/Donkey Kong 3 (JUE)/header.bin b/_wip/Donkey Kong 3 (JUE)/header.bin
new file mode 100644
index 0000000..d5ba821
Binary files /dev/null and b/_wip/Donkey Kong 3 (JUE)/header.bin differ