Promote Joypad Test Cartridge (U) from _wip to top-level project
Moves Joypad Test Cartridge (U) from _wip/ to Joypad Test Cartridge (U)/ with full ROM build: - Adds header.s, chr.s, linker.cfg (HEADER+PRG+CHR segments) - Updates Makefile to build and verify reconstructed.nes vs rom.nes - Adds rom.nes copy + copilot/rom.nes symlink per repo convention - Verified byte-identical build Pass 1 complete: full code/data classification (~3.5% code / ~96.5% data) Pass 2 complete: routine headers for all labels, semantic naming for key routines (Reset, NmiHandler, VramWrite, PpuScrollLatch, VramPtrWrite, RetAddrUpdate, etc.), zero-page aliases in locals.inc Root OVERVIEW.md updated: - Removes Joypad Test Cartridge from _wip skeleton table (22 -> 21 skeletons) - Adds Joypad Test Cartridge as #14 in numbered inventory (BYTE-IDENTICAL, Pass 2) - Updates summary count from 13 to 14 projects
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# Joypad Test Cartridge (U) — Game Flow from Power-On
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This document describes the execution flow of the disassembled Joypad Test Cartridge (U) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
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---
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## 1. ROM and Memory Layout
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| Property | Value |
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|----------|-------|
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| Format | iNES |
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| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
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| CHR | 1 × 8 KB |
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| Mirroring | Horizontal |
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| PRG bank start | CPU $C000 |
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| Source file | `copilot/prg.s` (~1,360 lines with headers) |
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| Output | `reconstructed_prg.bin` (16,384 bytes) |
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### Interrupt vectors (CPU $FFFA–$FFFF)
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| Vector | Address | Handler |
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|--------|---------|---------|
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| NMI | $CCF7 | `NmiHandler` |
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| RESET | $C000 | `Reset` |
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| IRQ / BRK | $C000 | Reuses `Reset` |
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---
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## 2. Build Status
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`make` in `copilot/` assembles `prg.s` with `ca65`, links with `ld65`, and verifies against `prg.bin`.
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**Verification result: BYTE-IDENTICAL** — `reconstructed_prg.bin` matches `prg.bin` exactly (all 16,384 bytes), and `prg.bin` matches the PRG bank of `Joypad Test Cartridge (U).nes`.
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---
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## 3. Pass Status
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| Pass | Status | Description |
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|------|--------|-------------|
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| Pass 1 | Complete | Code/data split — ~580 bytes traced code (~3.5%) or explicit `.byte` data (~96.5%) with `; CPU:$xxxx PRG:$xxxx` annotations |
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| Pass 2 | Complete | Routine headers added for all labeled positions; key routines semantically named (`Reset`, `NmiHandler`, `VramWrite`, `PpuScrollLatch`, etc.); zero-page aliases in `locals.inc` |
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| Pass 3 | Partial | Some data table references named in code; larger data regions (test patterns, button mappings) remain as `.byte` blocks |
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---
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## 4. Reset — CPU $FFFC → $C000
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**`Reset`** ($C000)
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On power-on or reset:
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1. **Wait for three PPU warm-up vblanks** — `WaitVblank2` ($C005) and `WaitVblank3` ($C00A) each poll `$2002` bit 7, following an initial poll at $C000.
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2. **Clear RAM** — `ClearRAM1_Loop` ($C013) clears pages $0000–$07FF via indirect indexed store (`STA VramPtrLo,X` / `STA $0100,X` etc.).
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3. **Initialize PPU** — `InitPPU_1` ($C031): `STA $2000` with $10 (PPUCTRL, NMI disabled), shadow in `PpuCtrlShadow` ($EF); `STA $2001` with $00 (PPUMASK off), shadow in `PpuMaskValue` ($EE).
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4. **OAM DMA** — `OamDma` ($C03F): `STA $4014` with $02 (DMA from $0200–$02FF).
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5. **Clear controller state** — `ClearController` ($C044): clears $2003 (OAMADDR) and state variables.
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6. `JSR PpuScrollLatch` ($CE3C) — latch scroll and control registers.
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7. `LDX #$FF / TXS` — initialize stack pointer.
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8. `JSR PpuMaskSetup` ($CD2F) — set PPUMASK from shadow.
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9. **Clear RAM again** — `ClearRAM2_Loop` ($C05D) clears pages $0000–$06FF.
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10. **Re-initialize PPU** — `InitPPU_2` ($C078): same as InitPPU_1.
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11. **VRAM write** — `VramWriteSetup1` ($C086): set up address/length for a VRAM write via `VramWrite` ($CDEE).
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12. `JSR ClearOAM_Routine` ($C174) — clear OAM with sprite flush value $F4.
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13. `JSR VramPtrWrite` ($CD3F) — write VRAM data via pointer table.
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14. `ToggleFlag` ($C095) — toggle `VramToggleFlag` ($CF).
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15. `JSR PpuScrollLatch` ($CE3C) and `JSR VramPtrWrite` ($CD3F) again.
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16. **Main loop** — spins, toggling $CF each iteration and calling PPU/VRAM update routines.
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---
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## 5. NMI / Frame Heartbeat — `NmiHandler` ($CCF7)
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The NMI fires once per frame:
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1. **Save registers** (`PHA / TXA / PHA / TYA / PHA`).
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2. `JSR PpuCtrlSetup` ($CD17) — latch PPUSTATUS, clear NMI bit in `PpuCtrlShadow` ($EF), write to PPUCTRL.
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3. `JSR OamDmaSetup` ($CD24) — set OAMADDR=0, trigger OAM DMA ($4014=$02).
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4. Check `$0300` (vblank flag) — if nonzero, `JSR VramBurstWrite` ($CE4F) to burst-write VRAM data from table at $0302.
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5. `JSR PpuScrollLatch` ($CE3C) — latch scroll and control.
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6. Clear `NmiFlagByte` ($E0) to 0.
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7. **Restore registers** (`PLA / TAX / PLA / TAY / PLA / RTI`).
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---
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## 6. Key Subroutines
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| Label | Address | Description |
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|-------|---------|-------------|
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| `Reset` | $C000 | Cold-start initialization: vblank waits, RAM clear, PPU init, OAM DMA |
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| `WaitVblank2` | $C005 | Wait for second PPU warm-up vblank |
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| `WaitVblank3` | $C00A | Wait for third PPU warm-up vblank |
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| `ClearRAM1_Loop` | $C013 | Clear RAM pages $00–$07 |
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| `InitPPU_1` | $C031 | Initialize PPUCTRL and PPUMASK |
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| `OamDma` | $C03F | Trigger OAM DMA via $4014 |
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| `ClearController` | $C044 | Clear OAMADDR and controller state |
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| `PpuScrollLatch` | $CE3C | Latch PPU scroll X/Y and control register |
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| `InitStack` | $C052 | Initialize stack pointer to $FF |
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| `PpuMaskSetup` | $CD2F | Set PPUMASK from shadow register |
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| `ClearRAM2_Loop` | $C05D | Clear RAM pages $00–$06 |
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| `InitPPU_2` | $C078 | Re-initialize PPU control and mask |
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| `VramWriteSetup1` | $C086 | Set up VRAM write parameters |
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| `ClearOAM_Call` | $C08F | Call OAM clear routine |
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| `VramPtrWrite1` | $C092 | Write VRAM data via pointer table |
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| `ToggleFlag` | $C095 | Toggle VramToggleFlag ($CF) |
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| `SetupScroll2` | $C097 | Latch PPU scroll and control |
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| `VramPtrWrite2` | $C09A | Write VRAM data via pointer table again |
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| `ClearOAM_Routine` | $C174 | Clear OAM ($0200–$02FF) with $F4 |
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| `NmiHandler` | $CCF7 | Per-frame NMI: PPU updates, OAM DMA, VRAM burst write |
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| `NmiContinue` | $CD0A | Continue NMI: latch PPU scroll, clear flag |
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| `PpuCtrlSetup` | $CD17 | Latch PPUSTATUS, write PPUCTRL from shadow |
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| `OamDmaSetup` | $CD24 | Set OAMADDR=0, trigger OAM DMA |
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| `PpuMaskSetup` | $CD2F | Set PPUMASK from shadow |
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| `VramPtrWrite` | $CD3F | Write VRAM via pointer table (uses RetAddrUpdate) |
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| `VramWriteLoop` | $CD45 | Loop writing bytes from indirect pointer to PPUDATA |
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| `VramPtrTableRead` | $CD99 | Read from pointer table at $0000 |
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| `RetAddrUpdate` | $CDC8 | Get return address from stack, advance by 2 |
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| `VramWrite` | $CDEE | Set PPU address, write data bytes to PPUDATA |
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| `VramBurstWrite` | $CE4F | Burst-write VRAM from table at $0302 |
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---
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## 7. Zero-Page Aliases (`locals.inc`)
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| Alias | Address | Role |
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|-------|---------|------|
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| `VramPtrLo` | $00 | VRAM write pointer low byte |
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| `VramPtrHi` | $01 | VRAM write pointer high byte |
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| `VramLen` | $02 | VRAM write data length |
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| `PpuScrollX` | $03 | PPU horizontal scroll |
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| `RetAddrTempLo` | $05 | Return address temp lo |
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| `RetAddrTempHi` | $06 | Return address temp hi |
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| `PpuMaskShadow` | $0E | PPUMASK shadow |
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| `PpuCtrlShadow` | $EF | PPUCTRL shadow (NMI bit cleared) |
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| `VramToggleFlag` | $CF | Frame toggle flag |
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| `NmiFlagByte` | $E0 | NMI flag byte |
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| `JoyBtnStateBase` | $4E | Base for indexed button states |
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| `FrameCounterLo` | $53 | Frame counter low byte |
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| `FrameCounterHi` | $54 | Frame counter high byte |
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Full list in `copilot/locals.inc`.
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---
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## 8. Data Regions
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The PRG is approximately 3.5% code / 96.5% data. The data regions include:
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- **$C09E–$C173** (214 bytes): Main loop inline code/data (pointer table references, VRAM write parameters)
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- **$C17F–$CCF6** (2,936 bytes): Test patterns, button mapping tables, screen data
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- **$CD39–$CD3E** (6 bytes): PPU mask toggle code fragment
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- **$CE98–$FFFF** (12,648 bytes): Test pattern data, button mapping tables, screen layout data
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Notable data structures:
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- Pointer table at $0000–$0001 (read by `VramPtrTableRead` at $CD99)
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- VRAM burst write table at $0302 (read by `VramBurstWrite` at $CE4F)
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- Button mapping / test pattern tables in the $C000–$FFFF range
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---
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## 9. Build
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```bash
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cd "_wip/Joypad Test Cartridge (U)/copilot"
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make # → ca65 + ld65 + cmp reconstructed_prg.bin prg.bin → "BYTE-IDENTICAL"
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```
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---
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## 10. Notes
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- The NMI handler drives per-frame updates; the main loop spins waiting for NMI phase changes.
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- `RetAddrUpdate` ($CDC8) implements a return-address modification trick: it reads the return address from the stack, advances it by 2, and stores it back. This is used with `VramPtrWrite` ($CD3F) to implement runtime-computed control flow (effectively a coroutine/threaded dispatch).
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- The IRQ vector points to $C000 (Reset) and is effectively unused.
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- Large portions of the PRG are test pattern and button mapping data, not executable code.
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---
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## 11. Next Steps
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- **Promotion** — move to a top-level `Joypad Test Cartridge (U)/` folder, add `header.s` / `chr.s` + full-ROM `make` target (as e.g. `Burger Time (U)`), then join the root `OVERVIEW.md` numbered inventory.
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- **Pass 3 continuation** — name data tables (button mappings at $C000–$FFFF, test patterns), refine zero-page aliases for the untraced code region.
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@@ -0,0 +1,25 @@
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CA65 ?= ca65
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LD65 ?= ld65
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all: reconstructed.nes verify
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prg.o: prg.s symbols.inc locals.inc
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$(CA65) -g -o $@ $<
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header.o: header.s
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$(CA65) -g -o $@ $<
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chr.o: chr.s
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$(CA65) -g -o $@ $<
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reconstructed.nes: header.o prg.o chr.o linker.cfg
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$(LD65) -C linker.cfg -m reconstructed.map -Ln reconstructed.lbl -o $@ header.o prg.o chr.o
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verify: reconstructed.nes
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cmp reconstructed.nes rom.nes
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@echo "Byte-identical ROM verified."
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clean:
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rm -f *.o reconstructed.nes reconstructed.map reconstructed.lbl
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.PHONY: all verify clean
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Binary file not shown.
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.segment "CHR"
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.incbin "chr.bin"
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Binary file not shown.
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.segment "HEADER"
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.incbin "header.bin"
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MEMORY {
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HEADER: start = $0000, size = $0010, fill = yes;
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PRG: start = $C000, size = $4000, file = %O, fill = yes;
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CHR: start = $0000, size = $2000, file = %O, fill = yes;
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}
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SEGMENTS {
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HEADER: load = HEADER, type = ro;
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PRG: load = PRG, type = ro;
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CHR: load = CHR, type = ro;
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}
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@@ -0,0 +1,46 @@
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; Joypad Test Cartridge (U) zero-page aliases - Pass 2
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; Semantic names for addresses with observed usage patterns; ZpXX names for
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; addresses whose role is not yet uniquely determined.
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VramPtrLo = $00 ; VRAM write pointer low byte (indirect, used by VramWriteLoop/VramWrite)
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VramPtrHi = $01 ; VRAM write pointer high byte (indirect)
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VramLen = $02 ; VRAM write data length counter
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PpuScrollX = $03 ; PPU horizontal scroll value (latched to $2005)
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Zp04 = $04 ; Temporary zero-page storage
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RetAddrTempLo = $05 ; Return address temp low byte (used by RetAddrUpdate)
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RetAddrTempHi = $06 ; Return address temp high byte (used by RetAddrUpdate)
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Zp0D = $0D ; Temporary zero-page storage
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PpuMaskShadow = $0E ; PPUMASK shadow register (bits cleared for sprite/bg)
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PpuScrollY = $0EC ; PPU vertical scroll value (latched to $2005)
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PpuScrollX_Init = $0ED ; PPU horizontal scroll value written during init
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PpuMaskValue = $0EE ; PPUMASK value written during init (also shadow)
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PpuCtrlShadow = $EF ; PPUCTRL shadow register (NMI bit cleared via and #$7F)
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VramToggleFlag = $CF ; Flag toggled each frame (asl/rol at $C095-$C09D)
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NmiFlagByte = $E0 ; Flag cleared during NMI ($CD0F)
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; Controller / button state (indexed by button number via $4E,X)
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JoyBtnStateBase = $4E ; Base address for indexed button states ($4E,X)
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JoyBtnState_P1_A = $4E ; Player 1 button A state/timer
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JoyBtnState_P1_B = $4F ; Player 1 button B state/timer
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JoyBtnState_P1_Select = $50 ; Player 1 select state/timer (if used)
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JoyBtnState_P1_Start = $51 ; Player 1 start state/timer
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JoyBtnState_P1_Up = $52 ; Player 1 up state/timer
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FrameCounterLo = $53 ; Frame counter low byte (incremented each frame)
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FrameCounterHi = $54 ; Frame counter high byte
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JoyBtnTimer_P1_Down = $55 ; Player 1 down button timer
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JoyBtnTimer_P1_Left = $56 ; Player 1 left button timer
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JoyBtnTimer_P1_Right = $57 ; Player 1 right button timer
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JoyBtnTimer_P1_Start2 = $5C ; Player 1 start timer (second instance)
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JoyBtnTimer_P1_A2 = $61 ; Player 1 button A timer (second instance)
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JoyBtnTimer_P2_Down = $5E ; Player 2 down button timer
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JoyBtnTimer_P2_Left = $59 ; Player 2 left button timer
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JoyBtnTimer_P2_Right = $64 ; Player 2 right button timer
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JoyBtnTimer_P2_A = $5F ; Player 2 button A timer
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JoyBtnTimer_P2_B = $5A ; Player 2 button B timer
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; Generic zero-page aliases (role not yet uniquely determined)
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Zp60 = $60 ; Temporary zero-page storage
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Zp65 = $65 ; Temporary zero-page storage
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Zp66 = $66 ; Temporary zero-page storage
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Zp68 = $68 ; Temporary zero-page storage
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Zp69 = $69 ; Temporary zero-page storage
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Binary file not shown.
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,35 @@
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al 00CE89 .Label_CE89
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al 00CE6E .Label_CE6E
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al 00CE5F .Label_CE5F
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al 00CE8A .Label_CE8A
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al 00CE4F .VramBurstWrite
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al 00CE3C .PpuScrollLatch
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al 00CE33 .Label_CE33
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al 00CE39 .Label_CE39
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al 00CE16 .Label_CE16
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al 00CE12 .Label_CE12
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al 00CDEE .VramWrite
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al 00CDC8 .RetAddrUpdate
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al 00CDB1 .Label_CDB1
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al 00CDA3 .Label_CDA3
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al 00CD99 .VramPtrTableRead
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al 00CD8D .Label_CD8D
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al 00CD74 .Label_CD74
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al 00CD71 .Label_CD71
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al 00CD6E .Label_CD6E
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al 00CD69 .Label_CD69
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al 00CD5C .Label_CD5C
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al 00CD45 .VramWriteLoop
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al 00CD3F .VramPtrWrite
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al 00CD2F .PpuMaskSetup
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al 00CD24 .OamDmaSetup
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al 00CD17 .PpuCtrlSetup
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al 00CD0A .NmiContinue
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al 00CCF7 .NmiHandler
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al 00C178 .Label_C178
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al 00C174 .ClearOAM_Routine
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al 00C05D .ClearRAM2_Loop
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al 00C013 .ClearRAM1_Loop
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al 00C00A .WaitVblank3
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al 00C005 .WaitVblank2
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al 00C000 .Reset
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@@ -0,0 +1,32 @@
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Modules list:
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-------------
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header.o:
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HEADER Offs=000000 Size=000010 Align=00001 Fill=0000
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prg.o:
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PRG Offs=000000 Size=004000 Align=00001 Fill=0000
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chr.o:
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CHR Offs=000000 Size=002000 Align=00001 Fill=0000
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Segment list:
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-------------
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Name Start End Size Align
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----------------------------------------------------
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CHR 000000 001FFF 002000 00001
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HEADER 000000 00000F 000010 00001
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PRG 00C000 00FFFF 004000 00001
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Exports list by name:
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---------------------
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||||
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||||
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||||
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Exports list by value:
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----------------------
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||||
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||||
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Imports list:
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-------------
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||||
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Binary file not shown.
Binary file not shown.
@@ -0,0 +1 @@
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../rom.nes
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@@ -0,0 +1,108 @@
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; =============================================================================
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; Nintendo Entertainment System hardware symbols
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; =============================================================================
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; -----------------------------------------------------------------------------
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; PPU registers
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; -----------------------------------------------------------------------------
|
||||
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PPUCTRL = $2000
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PPUMASK = $2001
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PPUSTATUS = $2002
|
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OAMADDR = $2003
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OAMDATA = $2004
|
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PPUSCROLL = $2005
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PPUADDR = $2006
|
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PPUDATA = $2007
|
||||
|
||||
OAMDMA = $4014
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; Controller ports
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||||
;
|
||||
; $4016:
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||||
; Write: controller strobe
|
||||
; Read: controller port 1
|
||||
;
|
||||
; $4017:
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||||
; Read: controller port 2
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||||
; Write: APU frame counter
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
JOY1 = $4016
|
||||
JOY2 = $4017
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU pulse channel 1
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUPULSE1CTRL = $4000
|
||||
APUPULSE1SWEEP = $4001
|
||||
APUPULSE1TIMERLO = $4002
|
||||
APUPULSE1TIMERHI = $4003
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU pulse channel 2
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUPULSE2CTRL = $4004
|
||||
APUPULSE2SWEEP = $4005
|
||||
APUPULSE2TIMERLO = $4006
|
||||
APUPULSE2TIMERHI = $4007
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU triangle channel
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUTRIANGLECTRL = $4008
|
||||
APUTRIANGLETIMERLO = $400A
|
||||
APUTRIANGLETIMERHI = $400B
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU noise channel
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUNOISECTRL = $400C
|
||||
APUNOISEPERIOD = $400E
|
||||
APUNOISELENGTH = $400F
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU DMC channel
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUDMCCTRL = $4010
|
||||
APUDMCDIRECT = $4011
|
||||
APUDMCADDR = $4012
|
||||
APUDMCLENGTH = $4013
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; APU status and frame counter
|
||||
;
|
||||
; $4015:
|
||||
; Write: enable or disable the five APU channels
|
||||
; Read: channel and interrupt status
|
||||
;
|
||||
; $4017:
|
||||
; Write: APU frame-counter mode and IRQ inhibit
|
||||
; Read: controller port 2
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
APUSTATUS = $4015
|
||||
APUFRAMECOUNTER = $4017
|
||||
|
||||
; -----------------------------------------------------------------------------
|
||||
; Controller masks
|
||||
; -----------------------------------------------------------------------------
|
||||
|
||||
PAD_RIGHT = $01
|
||||
PAD_LEFT = $02
|
||||
PAD_DOWN = $04
|
||||
PAD_UP = $08
|
||||
PAD_START = $10
|
||||
PAD_SELECT = $20
|
||||
PAD_B = $40
|
||||
PAD_A = $80
|
||||
|
||||
PAD_HORIZONTAL = PAD_LEFT | PAD_RIGHT
|
||||
PAD_VERTICAL = PAD_UP | PAD_DOWN
|
||||
PAD_DPAD = PAD_HORIZONTAL | PAD_VERTICAL
|
||||
Binary file not shown.
Reference in new issue
Block a user