Promote Joypad Test Cartridge (U) from _wip to top-level project
Moves Joypad Test Cartridge (U) from _wip/ to Joypad Test Cartridge (U)/ with full ROM build: - Adds header.s, chr.s, linker.cfg (HEADER+PRG+CHR segments) - Updates Makefile to build and verify reconstructed.nes vs rom.nes - Adds rom.nes copy + copilot/rom.nes symlink per repo convention - Verified byte-identical build Pass 1 complete: full code/data classification (~3.5% code / ~96.5% data) Pass 2 complete: routine headers for all labels, semantic naming for key routines (Reset, NmiHandler, VramWrite, PpuScrollLatch, VramPtrWrite, RetAddrUpdate, etc.), zero-page aliases in locals.inc Root OVERVIEW.md updated: - Removes Joypad Test Cartridge from _wip skeleton table (22 -> 21 skeletons) - Adds Joypad Test Cartridge as #14 in numbered inventory (BYTE-IDENTICAL, Pass 2) - Updates summary count from 13 to 14 projects
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# Joypad Test Cartridge (U) — Game Flow from Power-On
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This document describes the execution flow of the disassembled Joypad Test Cartridge (U) PRG bank (16 KB, mapped at CPU **$C000–$FFFF**), starting from power-on. It is based entirely on `copilot/prg.s` in the repository. The rebuild is verified **byte-identical** to the original `prg.bin`.
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---
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## 1. ROM and Memory Layout
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| Property | Value |
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|----------|-------|
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| Format | iNES |
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| PRG | 1 × 16 KB (mapped at CPU $C000–$FFFF) |
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| CHR | 1 × 8 KB |
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| Mirroring | Horizontal |
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| PRG bank start | CPU $C000 |
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| Source file | `copilot/prg.s` (~1,360 lines with headers) |
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| Output | `reconstructed_prg.bin` (16,384 bytes) |
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### Interrupt vectors (CPU $FFFA–$FFFF)
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| Vector | Address | Handler |
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|--------|---------|---------|
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| NMI | $CCF7 | `NmiHandler` |
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| RESET | $C000 | `Reset` |
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| IRQ / BRK | $C000 | Reuses `Reset` |
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---
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## 2. Build Status
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`make` in `copilot/` assembles `prg.s` with `ca65`, links with `ld65`, and verifies against `prg.bin`.
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**Verification result: BYTE-IDENTICAL** — `reconstructed_prg.bin` matches `prg.bin` exactly (all 16,384 bytes), and `prg.bin` matches the PRG bank of `Joypad Test Cartridge (U).nes`.
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---
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## 3. Pass Status
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| Pass | Status | Description |
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|------|--------|-------------|
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| Pass 1 | Complete | Code/data split — ~580 bytes traced code (~3.5%) or explicit `.byte` data (~96.5%) with `; CPU:$xxxx PRG:$xxxx` annotations |
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| Pass 2 | Complete | Routine headers added for all labeled positions; key routines semantically named (`Reset`, `NmiHandler`, `VramWrite`, `PpuScrollLatch`, etc.); zero-page aliases in `locals.inc` |
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| Pass 3 | Partial | Some data table references named in code; larger data regions (test patterns, button mappings) remain as `.byte` blocks |
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---
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## 4. Reset — CPU $FFFC → $C000
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**`Reset`** ($C000)
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On power-on or reset:
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1. **Wait for three PPU warm-up vblanks** — `WaitVblank2` ($C005) and `WaitVblank3` ($C00A) each poll `$2002` bit 7, following an initial poll at $C000.
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2. **Clear RAM** — `ClearRAM1_Loop` ($C013) clears pages $0000–$07FF via indirect indexed store (`STA VramPtrLo,X` / `STA $0100,X` etc.).
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3. **Initialize PPU** — `InitPPU_1` ($C031): `STA $2000` with $10 (PPUCTRL, NMI disabled), shadow in `PpuCtrlShadow` ($EF); `STA $2001` with $00 (PPUMASK off), shadow in `PpuMaskValue` ($EE).
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4. **OAM DMA** — `OamDma` ($C03F): `STA $4014` with $02 (DMA from $0200–$02FF).
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5. **Clear controller state** — `ClearController` ($C044): clears $2003 (OAMADDR) and state variables.
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6. `JSR PpuScrollLatch` ($CE3C) — latch scroll and control registers.
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7. `LDX #$FF / TXS` — initialize stack pointer.
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8. `JSR PpuMaskSetup` ($CD2F) — set PPUMASK from shadow.
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9. **Clear RAM again** — `ClearRAM2_Loop` ($C05D) clears pages $0000–$06FF.
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10. **Re-initialize PPU** — `InitPPU_2` ($C078): same as InitPPU_1.
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11. **VRAM write** — `VramWriteSetup1` ($C086): set up address/length for a VRAM write via `VramWrite` ($CDEE).
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12. `JSR ClearOAM_Routine` ($C174) — clear OAM with sprite flush value $F4.
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13. `JSR VramPtrWrite` ($CD3F) — write VRAM data via pointer table.
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14. `ToggleFlag` ($C095) — toggle `VramToggleFlag` ($CF).
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15. `JSR PpuScrollLatch` ($CE3C) and `JSR VramPtrWrite` ($CD3F) again.
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16. **Main loop** — spins, toggling $CF each iteration and calling PPU/VRAM update routines.
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---
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## 5. NMI / Frame Heartbeat — `NmiHandler` ($CCF7)
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The NMI fires once per frame:
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1. **Save registers** (`PHA / TXA / PHA / TYA / PHA`).
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2. `JSR PpuCtrlSetup` ($CD17) — latch PPUSTATUS, clear NMI bit in `PpuCtrlShadow` ($EF), write to PPUCTRL.
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3. `JSR OamDmaSetup` ($CD24) — set OAMADDR=0, trigger OAM DMA ($4014=$02).
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4. Check `$0300` (vblank flag) — if nonzero, `JSR VramBurstWrite` ($CE4F) to burst-write VRAM data from table at $0302.
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5. `JSR PpuScrollLatch` ($CE3C) — latch scroll and control.
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6. Clear `NmiFlagByte` ($E0) to 0.
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7. **Restore registers** (`PLA / TAX / PLA / TAY / PLA / RTI`).
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---
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## 6. Key Subroutines
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| Label | Address | Description |
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|-------|---------|-------------|
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| `Reset` | $C000 | Cold-start initialization: vblank waits, RAM clear, PPU init, OAM DMA |
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| `WaitVblank2` | $C005 | Wait for second PPU warm-up vblank |
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| `WaitVblank3` | $C00A | Wait for third PPU warm-up vblank |
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| `ClearRAM1_Loop` | $C013 | Clear RAM pages $00–$07 |
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| `InitPPU_1` | $C031 | Initialize PPUCTRL and PPUMASK |
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| `OamDma` | $C03F | Trigger OAM DMA via $4014 |
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| `ClearController` | $C044 | Clear OAMADDR and controller state |
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| `PpuScrollLatch` | $CE3C | Latch PPU scroll X/Y and control register |
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| `InitStack` | $C052 | Initialize stack pointer to $FF |
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| `PpuMaskSetup` | $CD2F | Set PPUMASK from shadow register |
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| `ClearRAM2_Loop` | $C05D | Clear RAM pages $00–$06 |
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| `InitPPU_2` | $C078 | Re-initialize PPU control and mask |
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| `VramWriteSetup1` | $C086 | Set up VRAM write parameters |
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| `ClearOAM_Call` | $C08F | Call OAM clear routine |
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| `VramPtrWrite1` | $C092 | Write VRAM data via pointer table |
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| `ToggleFlag` | $C095 | Toggle VramToggleFlag ($CF) |
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| `SetupScroll2` | $C097 | Latch PPU scroll and control |
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| `VramPtrWrite2` | $C09A | Write VRAM data via pointer table again |
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| `ClearOAM_Routine` | $C174 | Clear OAM ($0200–$02FF) with $F4 |
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| `NmiHandler` | $CCF7 | Per-frame NMI: PPU updates, OAM DMA, VRAM burst write |
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| `NmiContinue` | $CD0A | Continue NMI: latch PPU scroll, clear flag |
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| `PpuCtrlSetup` | $CD17 | Latch PPUSTATUS, write PPUCTRL from shadow |
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| `OamDmaSetup` | $CD24 | Set OAMADDR=0, trigger OAM DMA |
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| `PpuMaskSetup` | $CD2F | Set PPUMASK from shadow |
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| `VramPtrWrite` | $CD3F | Write VRAM via pointer table (uses RetAddrUpdate) |
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| `VramWriteLoop` | $CD45 | Loop writing bytes from indirect pointer to PPUDATA |
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| `VramPtrTableRead` | $CD99 | Read from pointer table at $0000 |
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| `RetAddrUpdate` | $CDC8 | Get return address from stack, advance by 2 |
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| `VramWrite` | $CDEE | Set PPU address, write data bytes to PPUDATA |
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| `VramBurstWrite` | $CE4F | Burst-write VRAM from table at $0302 |
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---
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## 7. Zero-Page Aliases (`locals.inc`)
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| Alias | Address | Role |
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|-------|---------|------|
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| `VramPtrLo` | $00 | VRAM write pointer low byte |
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| `VramPtrHi` | $01 | VRAM write pointer high byte |
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| `VramLen` | $02 | VRAM write data length |
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| `PpuScrollX` | $03 | PPU horizontal scroll |
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| `RetAddrTempLo` | $05 | Return address temp lo |
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| `RetAddrTempHi` | $06 | Return address temp hi |
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| `PpuMaskShadow` | $0E | PPUMASK shadow |
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| `PpuCtrlShadow` | $EF | PPUCTRL shadow (NMI bit cleared) |
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| `VramToggleFlag` | $CF | Frame toggle flag |
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| `NmiFlagByte` | $E0 | NMI flag byte |
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| `JoyBtnStateBase` | $4E | Base for indexed button states |
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| `FrameCounterLo` | $53 | Frame counter low byte |
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| `FrameCounterHi` | $54 | Frame counter high byte |
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Full list in `copilot/locals.inc`.
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---
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## 8. Data Regions
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The PRG is approximately 3.5% code / 96.5% data. The data regions include:
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- **$C09E–$C173** (214 bytes): Main loop inline code/data (pointer table references, VRAM write parameters)
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- **$C17F–$CCF6** (2,936 bytes): Test patterns, button mapping tables, screen data
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- **$CD39–$CD3E** (6 bytes): PPU mask toggle code fragment
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- **$CE98–$FFFF** (12,648 bytes): Test pattern data, button mapping tables, screen layout data
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Notable data structures:
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- Pointer table at $0000–$0001 (read by `VramPtrTableRead` at $CD99)
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- VRAM burst write table at $0302 (read by `VramBurstWrite` at $CE4F)
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- Button mapping / test pattern tables in the $C000–$FFFF range
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---
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## 9. Build
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```bash
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cd "_wip/Joypad Test Cartridge (U)/copilot"
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make # → ca65 + ld65 + cmp reconstructed_prg.bin prg.bin → "BYTE-IDENTICAL"
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```
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---
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## 10. Notes
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- The NMI handler drives per-frame updates; the main loop spins waiting for NMI phase changes.
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- `RetAddrUpdate` ($CDC8) implements a return-address modification trick: it reads the return address from the stack, advances it by 2, and stores it back. This is used with `VramPtrWrite` ($CD3F) to implement runtime-computed control flow (effectively a coroutine/threaded dispatch).
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- The IRQ vector points to $C000 (Reset) and is effectively unused.
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- Large portions of the PRG are test pattern and button mapping data, not executable code.
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---
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## 11. Next Steps
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- **Promotion** — move to a top-level `Joypad Test Cartridge (U)/` folder, add `header.s` / `chr.s` + full-ROM `make` target (as e.g. `Burger Time (U)`), then join the root `OVERVIEW.md` numbered inventory.
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- **Pass 3 continuation** — name data tables (button mappings at $C000–$FFFF, test patterns), refine zero-page aliases for the untraced code region.
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