use crate::periph::at28c256::At28C256;
use crate::traits::backplane::Backplane;

pub mod backplane;
pub mod new;
pub mod program;
pub mod debug_memory;
mod rom_chunks;

pub struct RomOnlyComputer {
    pub(crate) rom: At28C256,
    pub(crate) data_bus: u8,
    pub(crate) address_bus: u16,
    pub(crate) read_mode: bool,
}

impl RomOnlyComputer {
    pub fn tick2(&mut self, address: u16, control: u8, data: u8) -> (u8) {
        // tick the parts...
        println!("WIDETICK: A:${address:04x} D:${data:02x} C:b{control:08b}");

        let new_data = self.rom.signal_tick(self.address_bus, self.data_bus, true, true, true);
        println!("\nNew Data : {new_data:02x}");
        self.set_data_bus(new_data);
        new_data
    }
}