Lots of stuff.

core/src/computers/rom_only/backplane.rs

@@ -0,0 +1,59 @@
+use crate::constants::constants_system::{SIZE_32KB, SIZE_64KB};
+use crate::periph::at28c256::At28C256;
+use crate::periph::backplane::Backplane;
+use crate::periph::rom_chip::RomChip;
+pub struct RomOnlyComputer {
+    rom: At28C256,
+    data_bus: u8,
+    address_bus: u16,
+    read_mode: bool,
+}
+
+impl Backplane for RomOnlyComputer {
+    fn data_bus(&self) -> u8 { self.data_bus }
+    fn address_bus(&self) -> u16 { self.address_bus }
+    fn read_mode(&self) -> bool { self.read_mode }
+
+    fn set_read_mode(&mut self, new_mode: bool) {
+        self.read_mode = new_mode
+    }
+
+    fn set_data_bus(&mut self, new_value: u8) {
+        self.data_bus = new_value
+    }
+
+    fn set_address_bus(&mut self, new_value: u16) {
+        self.address_bus = new_value
+    }
+
+    fn tick(&mut self) {
+        println!("COMPUTER: Preparing to tick.");
+
+        // do are we being addressed?
+        println!("COMPUTER: BUSSES PRE: 0x{:04x} 0x{:02x} {}", self.address_bus, self.data_bus, self.read_mode);
+        let (new_addr, new_data) = self.rom.tick(self.address_bus, self.data_bus, self.read_mode);
+        self.set_address_bus(new_addr);
+        self.set_data_bus(new_data);
+        println!("COMPUTER: BUSSES POST: 0x{:04x} 0x{:02x} {}", self.address_bus, self.data_bus, self.read_mode);
+        println!("COMPUTER: Done ticking.");
+    }
+}
+
+impl RomOnlyComputer {
+    pub fn new() -> RomOnlyComputer {
+        let mut working = vec![0x00u8; SIZE_32KB];
+        for index in 0..SIZE_32KB {
+            working[index] = index as u8;
+        }
+        RomOnlyComputer::program(working)
+    }
+
+    pub fn program(rom: Vec<u8>) -> RomOnlyComputer {
+        RomOnlyComputer {
+            rom: At28C256::new(0x000, 0x3fff, rom),
+            address_bus: 0x0000,
+            data_bus: 0x00,
+            read_mode: true,
+        }
+    }
+}

core/src/computers/rom_only/mod.rs

@@ -0,0 +1 @@
+pub mod backplane;