RamRomComputer now reads from ROM and writes to RAM and reads back from RAM

core/src/periph/at28c256/blocks.rs

@@ -0,0 +1,37 @@
+use std::slice::Chunks;
+use crate::periph::at28c256::At28C256;
+
+impl At28C256 {
+    pub fn chunks(&self, size: usize) -> Chunks<u8> {
+        self.data.chunks(size)
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    #[test]
+    fn smoke() { assert!(true); }
+
+    #[test]
+    fn full_chunks_come_back_ok() {
+        let test_data = (0..255).collect();
+        let mut chip = At28C256::new(0x0000, 0x3fff, test_data);
+
+        let chunks = chip.chunks(16);
+        assert_eq!(chunks.len(), 16);
+    }
+
+    #[test]
+    fn partial_blocks_come_back_ok() {
+        let test_data = (0..=3).collect();
+        let mut chip = At28C256::new(0x0000, 0x3fff, test_data);
+
+        let chunks = chip.chunks(16);
+        assert_eq!(chunks.len(), 1);
+        for chunk in chunks {
+            assert_eq!(chunk.len(), 4);
+        }
+    }
+}

core/src/periph/at28c256/dump.rs

@@ -1,13 +1,15 @@
 use crate::periph::at28c256::At28C256;
 
 pub struct At28C256State {
-    offset: u16
+    offset: u16,
+    max_offset: u16
 }
 
 impl At28C256 {
     pub fn dump(&self) -> At28C256State {
         At28C256State {
-            offset: self.offset
+            offset: self.offset,
+            max_offset: self.max_offset
         }
     }
 }

core/src/periph/at28c256/mod.rs

@@ -1,10 +1,11 @@
 pub mod default;
 pub mod rom_chip;
 pub mod tick;
-mod new;
-mod program;
-mod dump;
-mod checksum;
+pub mod new;
+pub mod program;
+pub mod dump;
+pub mod checksum;
+pub mod blocks;
 
 use crate::constants::constants_system::SIZE_32KB;
 use crate::periph::rom_chip::RomChip;

core/src/periph/at28c256/tick.rs

@@ -4,11 +4,12 @@ use crate::periph::hm62256::Hm62256;
 
 impl At28C256 {
     fn talking_to_me(&self, address: u16) -> bool {
+        //println!("Checking on {address:04x} in range of {:04x} {:04x}", self.offset, self.max_offset);
         address >= self.offset && address < self.max_offset
     }
 
     pub fn tick(&mut self, address_bus: u16, data_bus: u8, read_mode: bool) -> (u16, u8) {
-        println!("At28C256: Tick starting for A${address_bus:04x} D${data_bus:02x} R{read_mode}");
+        print!("At28C256: Tick starting for A${address_bus:04x} D${data_bus:02x} R{read_mode}");
 
         // we aren't being addressed
         // OR
@@ -16,9 +17,11 @@ impl At28C256 {
         if !self.talking_to_me(address_bus) ||
             !read_mode {
             // ...go away.
+          //  println!("At28C256 Tick not for me.");
             return (address_bus, data_bus)
         }
 
+       // print!("At28C256 tick for me.");
         let effective = address_bus - self.offset;
         if effective < self.max_offset {
             if effective < self.data.len() as u16 {
@@ -31,8 +34,7 @@ impl At28C256 {
             return (address_bus, data_bus)
         }
 
-        println!("At28C256: Read... {:02x}", self.data_bus);
-        println!("At28C256: Done with ticking the AtC256");
+       // print!("At28C256: Read... {:02x}", self.data_bus);
         (address_bus, self.data_bus)
     }
 }

core/src/periph/backplane.rs

@@ -7,3 +7,4 @@ pub trait Backplane {
     fn set_address_bus(&mut self, new_value: u16);
     fn tick(&mut self);
 }
+

core/src/periph/hm62256/tick.rs

@@ -17,7 +17,7 @@ impl Hm62256 {
         let addr = address_bus.wrapping_sub(self.offset) + self.offset;
 
         // did we want to talk to the chip...
-        if !cs {
+          if !cs {
             return (address_bus, data_bus);
         }
 
@@ -29,7 +29,8 @@ impl Hm62256 {
 
         // ok.  lets see what we are dealing with
         self.data_bus = if read_mode {
-            self.data[addr as usize]
+            let new_value = self.data[addr as usize];
+            new_value
         } else {
             // writing to ram
             self.data[addr as usize] = data_bus.into();