adds docs

working on widetick

core/src/computers/ram_rom/backplane.rs

@@ -1,6 +1,6 @@
 use crate::computers::ram_rom::RamRomComputer;
 use crate::periph::at28c256::At28C256;
-use crate::periph::backplane::Backplane;
+use crate::traits::backplane::Backplane;
 use crate::periph::hm62256::Hm62256;
 
 
@@ -53,5 +53,17 @@ impl Backplane for RamRomComputer {
             }
         }
     }
+
+    fn tick_ram(&mut self, address: u16, data: u8, cs: bool, oe: bool, we: bool) {
+        todo!()
+    }
+
+    fn tick_rom(&mut self, address: u16, data: u8, cs: bool, oe: bool, we: bool) -> (u8) {
+        todo!()
+    }
+
+    fn tick_via(&mut self, address: u16, data: u8, cs: bool, rw: bool, ce: bool) -> (u8, u8, bool) {
+        todo!()
+    }
 }
 

core/src/computers/ram_rom/tick2.rs

@@ -2,26 +2,50 @@ use std::collections::BTreeMap;
 use crate::computers::ram_rom::RamRomComputer;
 use crate::traits::bus_device::BusDevice;
 
+struct ChipSignals {
+    cs: bool,
+    oe: bool,
+    we: bool
+}
+
+enum RomRamChips {
+    At28C256,
+    Hm62256
+}
+
 impl RamRomComputer {
+    pub fn signal_tick(&mut self, address: u16, data: u8) {
+        println!("⏲️RAM ROM COMPUTER SIGNAL TICK");
+
+        // no CPU to tick.
+
+        let mut ram_state = ChipSignals { oe: false, we: false, cs: false};
+        let mut rom_state = ChipSignals { oe: false, we: false, cs: false};
+
+
+        // Tick the RAM
+        // Tick the ROM
+    }
+
     pub fn tick2(&mut self, address: u16, control: u8, data: u8) -> (u8) {
-        println!("RAM ROM Computer tick starting");
+        println!("RAM ROM Computer tick starting / {address:04x} {control:08b} {data:02x}");
 
         // tick the parts
-        let (_, new_data) = self.rom.tick(address, data, control == 1);
-        let (_, new_data2) = self.ram.tick(address, data, control == 1, true);
 
         // map of memory
         // 0x0000 -> 0x3fff -> RAM (HM62256)
         // 0x4000 -> 0x7fff -> ROM (At28C256)
         match address {
             0x0000..=0x3fff => {
-                self.data_bus = new_data
+                println!("__DATA TARGETTING ROM BEING STORED ON DATA BUS");
             }
             0x4000 ..=0x7fff => {
-                self.data_bus = new_data2
+                println!("__DATA TARGETTING RRAAMM GETTING STORED ON DATA BUS");
             }
             _ => {}
         };
+        let (_, rom_data_bus) = self.rom.tick(address, data, control == 1);
+        let (_, ram_data_bus) = self.ram.tick(address, data, control == 1, true);
         0
     }
 }

core/src/computers/rom_only/backplane.rs

@@ -1,5 +1,6 @@
+use log::debug;
 use crate::computers::rom_only::RomOnlyComputer;
-use crate::periph::backplane::Backplane;
+use crate::traits::backplane::Backplane;
 
 impl Backplane for RomOnlyComputer {
     fn data_bus(&self) -> u8 { self.data_bus }
@@ -17,7 +18,6 @@ impl Backplane for RomOnlyComputer {
 
     fn tick(&mut self) {
         println!("COMPUTER: Preparing to tick.");
-
         // do are we being addressed?
         println!("COMPUTER: BUSSES PRE: 0x{:04x} 0x{:02x} {}", self.address_bus, self.data_bus, self.read_mode);
         let (new_addr, new_data) = self.rom.tick(self.address_bus, self.data_bus, self.read_mode);
@@ -26,4 +26,18 @@ impl Backplane for RomOnlyComputer {
         println!("COMPUTER: BUSSES POST: 0x{:04x} 0x{:02x} {}", self.address_bus, self.data_bus, self.read_mode);
         println!("COMPUTER: Done ticking.");
     }
+
+    fn tick_ram(&mut self, address: u16, data: u8, cs: bool, oe: bool, we: bool) {
+        debug!("This system has no ram.  ROM only.");
+    }
+
+    fn tick_rom(&mut self, address: u16, data: u8, cs: bool, oe: bool, we: bool) -> (u8) {
+        let (_, data) = self.rom.tick(address, data, true);
+        data
+    }
+
+    fn tick_via(&mut self, address: u16, data: u8, cs: bool, rw: bool, ce: bool) -> (u8, u8, bool) {
+        debug!("This system has no VIA controllers.  ROM only");
+        (0,0,true)
+    }
 }

core/src/computers/rom_only/mod.rs

@@ -1,5 +1,5 @@
 use crate::periph::at28c256::At28C256;
-use crate::periph::backplane::Backplane;
+use crate::traits::backplane::Backplane;
 
 pub mod backplane;
 pub mod new;