rustfmt cleanup
This commit is contained in:
@@ -1,9 +1,9 @@
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// This is the GUI for the BenEater PC
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use beneater::parts::backplane::Backplane;
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use beneater::parts::ben_eater_pc::BenEaterPC;
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use beneater::parts::cpu_display::CpuDisplay;
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use macroquad::prelude::*;
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use macroquad::telemetry::frame;
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use beneater::parts::ben_eater_pc::BenEaterPC;
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use beneater::parts::backplane::Backplane;
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#[macroquad::main("Ben Eaters PC")]
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async fn main() {
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println!("Taxation is Theft");
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@@ -21,7 +21,7 @@ async fn main() {
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draw_text("Ben Eater", 20.0, 20.0, 30.0, BLACK);
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dm.render(20.0, 40.0);
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// CpuDisplay::render(&computer.cpu, 20.0, 120.0);
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// CpuDisplay::render(&computer.cpu, 20.0, 120.0);
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frame_number += 1;
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@@ -1,5 +1,5 @@
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use std::fs;
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use core::constants::constants_system::SIZE_32KB;
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use std::fs;
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fn main() {
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// make the rom data in memory.
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@@ -1,20 +1,24 @@
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use beneater::parts::backplane::Backplane;
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use core::constants::constants_isa_op::*;
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use core::constants::constants_system::*;
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use std::fs;
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use std::ops::Index;
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use beneater::parts::backplane::Backplane;
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use core::constants::constants_system::*;
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use core::constants::constants_isa_op::*;
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fn main() {
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println!("Taxation is Theft");
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let mut backplane = Backplane::new();
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backplane.load_rom();
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println!("Backplane is live.");
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let mut new_program = [0x00u8; SIZE_32KB];
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new_program[(OFFSET_RESET_VECTOR - SIZE_32KB as u16) as usize] = 0x00;
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new_program[(OFFSET_RESET_VECTOR + 1 - SIZE_32KB as u16) as usize] = 0x60;
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println!("Set offset in rom...");
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println!("VALUE AT OFFSET_RESET_VECTOR = 0x{:02x} ", new_program[(OFFSET_RESET_VECTOR - SIZE_32KB as u16) as usize]);
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println!(
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"VALUE AT OFFSET_RESET_VECTOR = 0x{:02x} ",
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new_program[(OFFSET_RESET_VECTOR - SIZE_32KB as u16) as usize]
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);
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// println!("{:?}", new_program);
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backplane.rom.program(&new_program);
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@@ -22,5 +26,4 @@ fn main() {
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backplane.memory[0x6000] = ISA_OP_LDA_I;
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backplane.memory[0x6001] = 0xab;
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backplane.tick();
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}
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@@ -1,9 +1,9 @@
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pub struct AddressBus {
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pub address: u16
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pub address: u16,
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}
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impl AddressBus {
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pub fn new() -> Self {
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AddressBus { address: 0x0000 }
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}
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}
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}
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@@ -1,15 +1,27 @@
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use core::mos6502cpu::Mos6502Cpu;
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use crate::parts::mos6522_peripheral::Mos6522Peripheral;
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use crate::parts::via6522::VIA6522;
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use core::constants::constants_system::*;
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use core::mos6502cpu::Mos6502Cpu;
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use core::periph::at28c256::At28C256;
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use core::periph::rom_chip::RomChip;
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/// Backplane
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///
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/// A Backplane hold and coordinates the cpu with the
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/// rest of the peripherals.
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///
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/// This system has
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/// -> VIA6522 for peripherals
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/// -> 322KB RAM
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/// -> 32KB ROM
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pub struct Backplane {
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// pub for dev
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pub cpu: Mos6502Cpu,
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pub via: VIA6522,
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pub memory: Box<[u8; SIZE_64KB]>,
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pub rom: At28C256
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pub memory: Box<[u8; SIZE_32KB]>,
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pub rom: At28C256,
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data_bus: u8,
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address_bus: u16
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}
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impl Backplane {
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@@ -17,8 +29,10 @@ impl Backplane {
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Backplane {
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cpu: Mos6502Cpu::default(),
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via: VIA6522::default(),
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memory: Box::new([0x00; SIZE_64KB]),
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rom: At28C256::default()
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memory: Box::new([0x00; SIZE_32KB]),
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rom: At28C256::default(),
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data_bus: 0x00,
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address_bus: 0x0000
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}
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}
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@@ -26,48 +40,91 @@ impl Backplane {
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self.rom.program(to_load);
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}
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pub fn tick(&mut self) {
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// is the CPU in read or write state
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let address = self.cpu.address_bus();
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let data = self.cpu.data_bus();
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self.address_bus = self.cpu.address_bus();
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self.data_bus = self.cpu.data_bus();
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let rw = self.cpu.read_signal;
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println!("- TICK START:");
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println!("| CPU: Address: 0b{address:016b} Data: 0b{data:08b} CPU RW: {rw}");
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println!("| CPU: Address: 0b{:016b} Data: 0b{:08b} CPU RW: {rw}", self.address_bus, self.data_bus);
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// via state
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println!("| VIA 0b{:08b}/0b{:08b}/0b{:08b}/0b{:08b}/",
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println!(
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"| VIA 0b{:08b}/0b{:08b}/0b{:08b}/0b{:08b}/",
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self.via.read(VIA6522_ORA),
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self.via.read(VIA6522_ORA),
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self.via.read(VIA6522_DDRB),
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self.via.read(VIA6522_DDRA),
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);
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println!("| LCD");
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match address {
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/// VIA
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0x6000..0x6010 => {
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if self.cpu.read_signal {
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self.cpu.set_data_bus(self.via.read((address - 0x6000) as u8));
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} else {
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self.via.write((address - 0x6000) as u8, self.cpu.data_bus());
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// if we are reading
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if rw {
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println!("CPU HAS SET READ FLAG FOR ADDRESS {address:04x} with data 0x{data:02x}");
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match self.address_bus {
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0x0000..=0x3fff => {
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// read from ram
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},
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0x4000..=0x7fff => {
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// read from ROM
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}
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self.via.tick();
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}
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/// RAM
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0x0000..=0x3fff => {
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if self.cpu.read_signal {
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self.cpu.set_data_bus(self.memory[address as usize]);
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} else {
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self.memory[address as usize] = data;
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_ => {
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println!("READ OUTSIDE DATA RANGE");
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}
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}
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/// ROM
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0x4000..=0x7fff => {
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self.rom.read(&(address - 0x4000));
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}
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/// The ether. Scarrrrrrrryyyy......
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_ => {
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println!("Lost READ:?{} to {:04x}", self.cpu.read_signal, address);
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} else {
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println!("CPU HAS SET WRITE FLAG FOR ADDRESS 0x{address:04x} with data 0x{data:02x}");
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match self.address_bus {
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0x6000..=0x600f => {
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self.via.write((self.address_bus - 0x6000) as u8, self.data_bus);
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},
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0x0000..=0x3fff => {
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self.memory[self.address_bus] = self.data_bus;
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}
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_ => {
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println!("ATTEMPT TO WRITE OUTSIDE OF MEMORY");
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}
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}
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}
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//
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//
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// match address {
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// /// VIA
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// 0x6000..=0x600f => {
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// if self.cpu.read_signal {
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// self.cpu
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// .set_data_bus(self.via.read((address - 0x6000) as u8));
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// } else {
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// self.via
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// .write((address - 0x6000) as u8, self.cpu.data_bus());
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// }
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// self.via.tick();
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// }
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// /// RAM
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// 0x0000..=0x3fff => {
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// if self.cpu.read_signal {
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// self.cpu.set_data_bus(self.memory[address as usize]);
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// } else {
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// self.memory[address as usize] = data;
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// }
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// }
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// /// ROM
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// 0x4000..=0x7fff => {
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// println!("ROM READ AT {address:04x} / ROM OFFSET {:04x}", address - 0x4000);
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// self.rom.read(&(address - 0x4000));
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// }
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// /// The ether. Scarrrrrrrryyyy......
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// _ => {
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// println!("XXXXLost READ:?{} to {:04x}", self.cpu.read_signal, address);
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// }
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// }
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println!("- TICK DONE");
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}
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}
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}
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@@ -1,10 +1,10 @@
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use crate::parts::clock::Clock;
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use core::constants::constants_system::*;
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use core::mos6502cpu::Mos6502Cpu;
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use std::fs;
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use std::fs::File;
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use std::io::{BufReader, Read};
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use std::path::Path;
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use crate::parts::clock::Clock;
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use core::mos6502cpu::Mos6502Cpu;
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use core::constants::constants_system::*;
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pub struct BenEaterPC {
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clock: Clock,
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@@ -19,11 +19,11 @@ impl BenEaterPC {
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println!("New BENEATERPC");
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BenEaterPC {
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clock: Clock::new(),
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cpu: Mos6502Cpu::default()
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cpu: Mos6502Cpu::default(),
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}
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}
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pub fn tick_system(&mut self) {
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pub fn tick_system(&mut self) {
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self.cpu.tick();
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if self.cpu.microcode_step == 0 {
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// tick the clock.
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@@ -1,13 +1,10 @@
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pub struct Clock {
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ticks: u32
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ticks: u32,
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}
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impl Clock {
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pub fn new() -> Self {
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Clock {
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ticks: 0
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}
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Clock { ticks: 0 }
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}
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pub fn tick(&mut self) {
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@@ -1,7 +1,7 @@
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use core::mos6502cpu::Mos6502Cpu;
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use macroquad::color::{BLACK, Color};
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use macroquad::prelude::*;
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use macroquad::text::draw_text;
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use core::mos6502cpu::Mos6502Cpu;
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pub struct CpuDisplay {}
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impl CpuDisplay {
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@@ -12,11 +12,41 @@ impl CpuDisplay {
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// ...build the interface
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Self::draw_square(x_offset, y_offset, x_offset + 300.0, y_offset + 85.0, BLACK);
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draw_text(format!("PC: 0x{:04x} / {}", pc, pc).as_str(), x_offset + 5.0, y_offset + 18.0, 15.0, BLACK);
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draw_text(format!("A: 0x{:02x} X: 0x{:02x} Y: 0x{:02x}", a, x, y).as_str(), x_offset + 5.0, y_offset + 35.0, 15.0, BLACK);
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draw_text(format!("Address: {:016b} | {:04x}", address_bus, address_bus).as_str(), x_offset + 5.0, y_offset + 55.0, 15.0, BLACK);
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draw_text(format!("Data: {:08b} | {:02x}", data_bus, data_bus).as_str(), x_offset + 5.0, y_offset + 75.0, 15.0, BLACK);
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draw_text(format!("MS: {:02x}", microsteps_remaining).as_str(), x_offset + 5.0, y_offset + 95.0, 15.0, BLACK);
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draw_text(
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format!("PC: 0x{:04x} / {}", pc, pc).as_str(),
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x_offset + 5.0,
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y_offset + 18.0,
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15.0,
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BLACK,
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);
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draw_text(
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format!("A: 0x{:02x} X: 0x{:02x} Y: 0x{:02x}", a, x, y).as_str(),
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x_offset + 5.0,
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y_offset + 35.0,
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15.0,
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BLACK,
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);
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draw_text(
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format!("Address: {:016b} | {:04x}", address_bus, address_bus).as_str(),
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x_offset + 5.0,
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y_offset + 55.0,
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15.0,
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BLACK,
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);
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draw_text(
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format!("Data: {:08b} | {:02x}", data_bus, data_bus).as_str(),
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x_offset + 5.0,
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y_offset + 75.0,
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15.0,
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BLACK,
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);
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draw_text(
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format!("MS: {:02x}", microsteps_remaining).as_str(),
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x_offset + 5.0,
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y_offset + 95.0,
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15.0,
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BLACK,
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);
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}
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fn draw_square(x1: f32, y1: f32, x2: f32, y2: f32, color: Color) {
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@@ -26,4 +56,4 @@ impl CpuDisplay {
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draw_line(x1, y2, x2, y2, 1.0, color);
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draw_line(x2, y1, x2, y2, 1.0, color);
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}
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}
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}
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@@ -1,9 +1,9 @@
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pub struct DataBus {
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pub data: u8
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pub data: u8,
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}
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impl DataBus {
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pub fn new() -> Self {
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DataBus { data: 0x00 }
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}
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}
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}
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@@ -1,5 +1,5 @@
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use std::time::{Duration, Instant};
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use crate::parts::mos6522_peripheral::Mos6522Peripheral;
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use std::time::{Duration, Instant};
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#[derive(Debug)]
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pub struct HD44780 {
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@@ -46,7 +46,7 @@ impl Mos6522Peripheral for HD44780 {
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self.write_control_lines(
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control & 1 << 2 == 0,
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control & 1 << 1 == 0,
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control & 1 == 0
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control & 1 == 0,
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);
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}
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@@ -1,10 +1,10 @@
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pub mod clock;
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pub mod ben_eater_pc;
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pub mod via6522;
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pub mod display_matrix;
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pub mod address_bus;
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pub mod data_bus;
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pub mod cpu_display;
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pub mod ram_display;
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pub mod mos6522_peripheral;
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pub mod backplane;
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pub mod ben_eater_pc;
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pub mod clock;
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pub mod cpu_display;
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pub mod data_bus;
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pub mod display_matrix;
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pub mod mos6522_peripheral;
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pub mod ram_display;
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pub mod via6522;
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@@ -4,10 +4,15 @@ pub struct RamDisplay {}
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impl RamDisplay {
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pub fn render(ram: &Box<[u8]>, x_offset: f32, y_offset: f32) {
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Self::draw_square(x_offset, y_offset, x_offset + 200.0, y_offset + 300.0, BLACK);
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Self::draw_square(
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x_offset,
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y_offset,
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x_offset + 200.0,
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y_offset + 300.0,
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BLACK,
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);
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draw_text("RAM", x_offset + 5.0, y_offset + 5.0, 15.0, BLACK);
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}
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fn draw_square(x1: f32, y1: f32, x2: f32, y2: f32, color: Color) {
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@@ -17,4 +22,4 @@ impl RamDisplay {
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draw_line(x1, y2, x2, y2, 1.0, color);
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draw_line(x2, y1, x2, y2, 1.0, color);
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}
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}
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}
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@@ -57,7 +57,6 @@ impl VIA6522 {
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}
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}
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pub fn read(&self, addr: u8) -> u8 {
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match (addr & 0x0F) {
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VIA6522_ORB => self.orb,
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