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core/src/computers/rom_only/debug_memory.rs

@@ -7,7 +7,6 @@ impl RomOnlyComputer {
         for index in 0..size {
             println!("Index {index} for {}", index + start_offset);
         }
-
         data
     }
-}
+}

core/src/computers/rom_only/mod.rs

@@ -8,16 +8,18 @@ pub mod debug_memory;
 mod rom_chunks;
 
 pub struct RomOnlyComputer {
-    pub(crate) rom: At28C256,
-    pub(crate) data_bus: u8,
-    pub(crate) address_bus: u16,
-    pub(crate) read_mode: bool,
+    pub rom: At28C256,
+    pub data_bus: u8,
+    pub address_bus: u16,
+    pub read_mode: bool,
 }
 
 impl RomOnlyComputer {
     pub fn tick2(&mut self, address: u16, control: u8, data: u8) -> (u8) {
         // tick the parts...
         println!("WIDETICK: A:${address:04x} D:${data:02x} C:b{control:08b}");
+        self.address_bus = address;
+        self.data_bus = data;
 
         let new_data = self.rom.signal_tick(self.address_bus, self.data_bus, true, true, true);
         println!("\nNew Data : {new_data:02x}");

core/src/computers/rom_only/new.rs

@@ -9,5 +9,4 @@ impl RomOnlyComputer {
         }
         RomOnlyComputer::program(working)
     }
-
 }