decodes all instructions i think.

start of a beneater pc

core/src/periph/at28c256.rs

@@ -0,0 +1,52 @@
+use crate::mos6502cpu::SIZE_32KB;
+use crate::periph::rom_chip::RomChip;
+
+/// At28C256
+///
+/// Represents a single At28C256 Chip
+///
+/// 256kbit storage
+/// 32kbyte storage
+pub struct At28C256 {
+    data: [u8; SIZE_32KB]
+}
+
+impl RomChip for At28C256 {
+    fn read(&self, offset: &u16) -> u8 {
+        self.data[*offset as usize]
+    }
+
+    fn program(new_data: &[u8; SIZE_32KB]) -> Self {
+        println!("Writing new chip.");
+        At28C256 {
+            data: *new_data
+        }
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    #[test]
+    fn smoke() {
+        assert!(true)
+    }
+
+    #[test]
+    fn programmed_data_reads_back_same() {
+        print!("Starting test...");
+        let data_to_write = [0xea; SIZE_32KB];
+        print!("allocated data for rom...");
+        let chip: At28C256 = At28C256::program(&data_to_write);
+        println!("programmed chip...");
+        print!("testing");
+        for offset in 0..SIZE_32KB {
+            if offset.is_multiple_of(1000) {
+              print!(".");
+            };
+            assert_eq!(0xea, chip.read(&(offset as u16)));
+        }
+        println!("passed!");
+    }
+}

core/src/periph/mod.rs

@@ -0,0 +1,3 @@
+pub mod rom_chip;
+
+pub mod at28c256;

core/src/periph/rom_chip.rs

@@ -0,0 +1,17 @@
+use crate::mos6502cpu::SIZE_32KB;
+
+pub trait RomChip {
+    /// Read
+    ///
+    /// Reads a single byte from the specified address
+    fn read(&self, offset: &u16) -> u8;
+    /// Program
+    ///
+    /// Replaces all data in the ROM chip
+    fn program(new_data: &[u8; SIZE_32KB]) -> Self;
+}
+
+pub trait RamChip: RomChip {
+    fn write(&mut self, offset: &u16, value: &u8);
+}
+