boxswap

core/src/periph/hm62256/default.rs

@@ -0,0 +1,17 @@
+use crate::constants::constants_system::SIZE_32KB;
+use crate::periph::hm62256::Hm62256;
+
+impl Default for Hm62256 {
+    fn default() -> Self {
+        let vec = vec![0x00; SIZE_32KB];
+        let boxed_slice: Box<[u8]> = vec.into_boxed_slice();
+        let boxed_array: Box<[u8; SIZE_32KB]> =
+            boxed_slice.try_into().expect("Unable to box the ram");
+        Hm62256 {
+            offset: 0x0000,
+            data: boxed_array,
+            address_bus: 0x0000,
+            data_bus: 0x00
+        }
+    }
+}

core/src/periph/hm62256/dump.rs

@@ -0,0 +1,17 @@
+use crate::periph::hm62256::Hm62256;
+
+pub struct Hm62256State {
+    pub offset: u16
+}
+
+impl Hm62256 {
+    pub fn dump(&self) -> Hm62256State {
+        Hm62256State {
+            offset: self.offset
+        }
+    }
+
+    pub fn dump_data(&self) -> (u16) {
+        self.offset
+    }
+}

core/src/periph/hm62256/mod.rs

@@ -3,27 +3,23 @@
 pub mod ramchip;
 pub mod romchip;
 pub mod tick;
+pub mod default;
+pub mod new;
+pub mod dump;
 
 use crate::constants::constants_system::SIZE_32KB;
 use crate::periph::ram_chip::RamChip;
 use crate::periph::rom_chip::RomChip;
 use log::debug;
-pub struct Hm62256 {
-    pub(crate) base_offset: u16,
-    pub(crate) data: Box<[u8]>,
-}
 
-impl Default for Hm62256 {
-    fn default() -> Self {
-        let vec = vec![0x00; SIZE_32KB];
-        let boxed_slice: Box<[u8]> = vec.into_boxed_slice();
-        let boxed_array: Box<[u8; SIZE_32KB]> =
-            boxed_slice.try_into().expect("Unable to box the ram");
-        Hm62256 {
-            base_offset: 0x0000,
-            data: boxed_array,
-        }
-    }
+/// Hitachi Semiconductor
+/// 8 Bit High Speed Static Ram
+/// 32KByte
+pub struct Hm62256 {
+    pub(crate) offset: u16,
+    pub(crate) data: Box<[u8]>,
+    pub(crate) address_bus: u16,
+    pub(crate) data_bus: u8
 }
 
 #[cfg(test)]

core/src/periph/hm62256/new.rs

@@ -0,0 +1,13 @@
+use crate::constants::constants_system::SIZE_32KB;
+use crate::periph::hm62256::Hm62256;
+
+impl Hm62256 {
+    pub fn new(base_offset: u16) -> Self {
+        Self {
+            offset: base_offset,
+            data: vec![0; SIZE_32KB].into_boxed_slice(),
+            address_bus: 0x0000,
+            data_bus: 0x00
+        }
+    }
+}

core/src/periph/hm62256/tick.rs

@@ -1,16 +1,41 @@
+use crate::constants::constants_system::SIZE_32KB;
 use crate::periph::hm62256::Hm62256;
 
 impl Hm62256 {
-    fn tick(&mut self, address_bus: u16, data_bus: u8, read_mode: bool) -> (u16, u8) {
-        let new_data_bus = if read_mode {
-            // reading from ram
-            self.data[address_bus as usize]
+    fn max_address(&self) -> u16 {
+        self.offset + SIZE_32KB as u16
+    }
+
+    pub fn tick(&mut self, address_bus: u16, data_bus: u8, read_mode: bool, cs: bool) -> (u16, u8) {
+        if !(address_bus.gt( &self.offset) && address_bus.le(&self.max_address())) {
+            return (address_bus, data_bus);
+        }
+
+        println!("HM62256RAM TICK START -> 0x{address_bus:04x} 0x{data_bus:02x} {read_mode} {cs}");
+
+        self.address_bus = address_bus;
+        self.data_bus = data_bus;
+        let addr = address_bus.wrapping_sub(self.offset) + self.offset;
+
+        // did we want to talk to the chip...
+        if !cs {
+            return (address_bus, data_bus);
+        }
+
+        // ...or are we outside the range?
+        if (addr - self.offset) > SIZE_32KB as u16 {
+            return (address_bus, data_bus);
+        }
+
+        // ok.  lets see what we are dealing with
+        self.data_bus = if read_mode {
+            self.data[addr as usize]
         } else {
             // writing to ram
-            self.data[address_bus as usize] = data_bus.into();
+            self.data[addr as usize] = data_bus.into();
             data_bus
         };
-        (address_bus, new_data_bus)
+        (self.address_bus, self.data_bus)
     }
 }
 
@@ -26,9 +51,9 @@ mod test {
         let mut ram = Hm62256::default();
 
         // load the data to ram
-        ram.tick(0x0000, 0xab, false);
+        ram.tick(0x0000, 0xab, false, true);
         // read the data back
-        let (_, new_data) = ram.tick(0x0000, 0x00, true);
+        let (_, new_data) = ram.tick(0x0000, 0x00, true, true);
 
         assert_eq!(new_data, 0xab);
     }