more stuff i worked on

beneater/src/bin/beneater.rs

@@ -3,13 +3,14 @@ use beneater::parts::cpu_display::CpuDisplay;
 use macroquad::prelude::*;
 use macroquad::telemetry::frame;
 use beneater::parts::ben_eater_pc::BenEaterPC;
-use beneater::parts::display_matrix::DisplayMatrix;
+use beneater::parts::backplane::Backplane;
 #[macroquad::main("Ben Eaters PC")]
 async fn main() {
     println!("Taxation is Theft");
 
-    let mut computer = BenEaterPC::new();
-    computer.load_rom("resources/beneater/roms/ror.bin");
+    let mut backplane = Backplane::new();
+    backplane.load_rom("resources/beneater/roms/ror.bin");
+
 
     let mut dm = DisplayMatrix::new(200.0, 50.0);
     let message_to_show = "Taxation is theft";
@@ -23,7 +24,7 @@ async fn main() {
 
         draw_text("Ben Eater", 20.0, 20.0, 30.0, BLACK);
         dm.render(20.0, 40.0);
-        CpuDisplay::render(&computer.cpu, 20.0, 120.0);
+      //  CpuDisplay::render(&computer.cpu, 20.0, 120.0);
 
         frame_number += 1;
 
@@ -37,6 +38,5 @@ async fn main() {
         }
 
         next_frame().await
-
     }
 }

beneater/src/parts/backplane.rs

@@ -0,0 +1,58 @@
+use core::mos6502cpu::Mos6502Cpu;
+use crate::parts::mos6522_peripheral::Mos6522Peripheral;
+use crate::parts::via6522::VIA6522;
+use core::constants::constants_system::*;
+use core::periph::at28c256::At28C256;
+pub struct Backplane {
+    cpu: Mos6502Cpu,
+    via: VIA6522,
+    memory: [u8; SIZE_64KB],
+    rom: At28C256
+}
+
+impl Backplane {
+    pub fn new() -> Self {
+        Backplane {
+            cpu: Mos6502Cpu::default(),
+            via: VIA6522::default(),
+            memory: [0x00; SIZE_64KB],
+            rom: At28C256::default()
+        }
+    }
+
+    pub fn load_rom(&mut self, to_load: &[u8; SIZE_32KB]) {
+        self.rom.program(to_load);
+    }
+
+    pub fn tick(&mut self) {
+        // is the CPU in read or write state
+        let address = self.cpu.address_bus();
+        let data = self.cpu.data_bus();
+        match address {
+            /// VIA
+            0x6000..0x6010 => {
+                if self.cpu.read_signal {
+                    self.cpu.set_data_bus(self.via.read((address - 0x6000) as u8));
+                } else {
+                    self.via.write((address - 0x6000) as u8, self.cpu.data_bus());
+                }
+            }
+            /// RAM
+            0x0000..=0x3fff => {
+                if self.cpu.read_signal {
+                    self.cpu.set_data_bus(self.memory[address as usize]);
+                } else {
+                    self.memory[*address as usize] = data;
+                }
+            }
+            /// ROM
+            0x4000..=0x7fff => {
+
+            }
+            /// The ether.  Scarrrrrrrryyyy......
+            _ => {
+                println!("Lost READ:?{} to {:04x}", self.cpu.read_signal, address);
+            }
+        }
+    }
+}

beneater/src/parts/ben_eater_pc.rs

@@ -23,7 +23,7 @@ impl BenEaterPC {
     }
 
     pub fn tick_system(&mut self)  {
-        let (address, data, rw) = self.cpu.tick();
+        self.cpu.tick();
         if self.cpu.microcode_step == 0 {
             // tick the clock.
             // tick the memory

beneater/src/parts/display_matrix.rs

@@ -1,79 +1,209 @@
-use macroquad::prelude::*;
-use crate::parts::address_bus::AddressBus;
-use crate::parts::data_bus::DataBus;
+use std::time::{Duration, Instant};
 
-pub struct DisplayMatrix {
-    width: f32,
-    height: f32,
-    text_buffer: String,
-    data_bus: DataBus,
+#[derive(Debug)]
+pub struct HD44780 {
+    // Bus inputs
+    data_bus: u8,
     rs: bool,
     rw: bool,
-    cursor_position: u8
+    enable: bool,
+    prev_enable: bool,
+
+    // Internal memory
+    ddram: [u8; 80],
+    cgram: [u8; 64],
+
+    // Cursor & display state
+    cursor_position: u8,
+    display_on: bool,
+    cursor_on: bool,
+    blink_on: bool,
+    entry_increment: bool,
+    entry_shift: bool,
+
+    // Function set flags
+    data_length_8bit: bool,
+    two_line_mode: bool,
+    font_5x10: bool,
+
+    // Busy flag
+    busy: bool,
+    last_command_time: Instant,
 }
 
-impl DisplayMatrix {
-    pub fn new(width: f32, height: f32) -> DisplayMatrix {
-        DisplayMatrix {
-            width,
-            height,
-            text_buffer: String::from(""),
-            data_bus: DataBus::new(),
+impl HD44780 {
+    pub fn new() -> Self {
+        Self {
+            data_bus: 0,
             rs: false,
             rw: false,
-            cursor_position: 0x00
+            enable: false,
+            prev_enable: false,
+
+            ddram: [b' '; 80],
+            cgram: [0; 64],
+
+            cursor_position: 0,
+            display_on: true,
+            cursor_on: false,
+            blink_on: false,
+            entry_increment: true,
+            entry_shift: false,
+
+            data_length_8bit: true,
+            two_line_mode: true,
+            font_5x10: false,
+
+            busy: false,
+            last_command_time: Instant::now(),
+        }
+    }
+
+    pub fn write_control_lines(&mut self, rs: bool, rw: bool, enable: bool) {
+        self.rs = rs;
+        self.rw = rw;
+
+        // On rising edge of Enable
+        if enable && !self.prev_enable {
+            self.evaluate();
+        }
+
+        self.prev_enable = enable;
+    }
+
+    pub fn set_data_bus(&mut self, value: u8) {
+        self.data_bus = value;
+    }
+
+    pub fn read_data_bus(&self) -> u8 {
+        if !self.rs && self.rw {
+            // Return busy flag + current address
+            let busy_flag = if self.busy { 0x80 } else { 0x00 };
+            busy_flag | (self.cursor_position & 0x7F)
+        } else {
+            // Not implemented: read from DDRAM/CGRAM
+            0
         }
     }
 
-    /// Tick
-    ///
-    /// Checks the data bus and sees what the setup is.
-    ///
-    /// 0 0 0 0 0 0 0 1 -> Clear Display
-    /// 0 0 0 0 0 0 1 - -> Return Home
-    /// 0 0 0 0 0 0 A B -> Sets cursor move direction and shift
-    ///                    A -> 0 = Insert, 1 = Delete
-    ///                    B -> Scroll bool
-    /// 0 0 0 0 1 D C B -> Sets display mode
-    ///                    D -> Display On/Off
-    ///                    C -> Cursor On/Off
-    ///                    B -> Blink
     pub fn tick(&mut self) {
-        // parse whats on the data bus.
-
+        if self.busy && self.last_command_time.elapsed() > Duration::from_micros(50) {
+            self.busy = false;
+        }
     }
 
-    pub fn set_busses(&mut self, address_bus: &mut AddressBus, data_bus: &mut DataBus) {
+    fn evaluate(&mut self) {
+        if self.rw {
+            return;
+        }
 
+        if self.rs {
+            self.write_data(self.data_bus);
+        } else {
+            self.execute_command(self.data_bus);
+        }
+
+        self.busy = true;
+        self.last_command_time = Instant::now();
     }
 
-    pub fn push_letter(&mut self, letter_to_push: char) {
-        self.cursor_position += 1;
-        self.text_buffer.push(letter_to_push)
+    fn write_data(&mut self, data: u8) {
+        if self.cursor_position < 0x50 {
+            self.ddram[self.cursor_position as usize] = data;
+            self.cursor_position = self.cursor_position.wrapping_add(1);
+        }
     }
 
-    pub fn clear_display(&mut self) {
-        self.cursor_position = 0;
-        self.text_buffer.clear()
+    fn execute_command(&mut self, cmd: u8) {
+        match cmd {
+            0x01 => {
+                self.ddram.fill(b' ');
+                self.cursor_position = 0;
+            }
+            0x02 => {
+                self.cursor_position = 0;
+            }
+            0x04..=0x07 => {
+                self.entry_increment = (cmd & 0b10) != 0;
+                self.entry_shift = (cmd & 0b01) != 0;
+            }
+            0x08..=0x0F => {
+                self.display_on = (cmd & 0b100) != 0;
+                self.cursor_on = (cmd & 0b010) != 0;
+                self.blink_on = (cmd & 0b001) != 0;
+            }
+            0x10..=0x1F => {
+                // Cursor/display shift — not yet implemented
+            }
+            0x20..=0x3F => {
+                self.data_length_8bit = (cmd & 0b10000) != 0;
+                self.two_line_mode = (cmd & 0b1000) != 0;
+                self.font_5x10 = (cmd & 0b100) != 0;
+            }
+            0x40..=0x7F => {
+                // Set CGRAM address — stub
+            }
+            0x80..=0xFF => {
+                self.cursor_position = cmd & 0x7F;
+            }
+            _ => {}
+        }
     }
 
-    pub fn render(&self, x_offset: f32, y_offset: f32) {
-        DisplayMatrix::draw_square(x_offset,
-                                   y_offset,
-                                   x_offset + self.width ,
-                                   y_offset + self.height,
-                                   BLACK);
+    pub fn get_display_lines(&self) -> (String, String) {
+        let row1: String = self.ddram[0x00..0x10].iter().map(|&b| b as char).collect();
+        let row2: String = self.ddram[0x40..0x50].iter().map(|&b| b as char).collect();
+        (row1, row2)
+    }
+}
 
-        let mut tmp = self.text_buffer.clone();
-        tmp.push('#');
-        draw_text(&*tmp, x_offset + 5.0, y_offset + 20.0, 20.0, BLACK);
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    fn pulse_enable(lcd: &mut HD44780) {
+        lcd.write_control_lines(lcd.rs, lcd.rw, true);
+        lcd.write_control_lines(lcd.rs, lcd.rw, false);
     }
 
-    fn draw_square(x1: f32, y1: f32, x2: f32, y2: f32, color: Color) {
-        // println!("Square from {x1:2.0}x{y1:2.0} to {x2:2.0}x{y2:2.0} with {:?}", color);
-        draw_line(x1, y1, x2, y1, 1.0, color);
-        draw_line(x1, y1, x1, y2, 1.0, color);
-        draw_line(x1, y2, x2, y2, 1.0, color);
-        draw_line(x2, y1, x2, y2, 1.0, color);
+    #[test]
+    fn test_clear_display() {
+        let mut lcd = HD44780::new();
+        lcd.set_data_bus(0x01);
+        lcd.write_control_lines(false, false, true);
+        lcd.write_control_lines(false, false, false);
+        lcd.tick();
+        assert!(lcd.ddram.iter().all(|&b| b == b' '));
+    }
+
+    #[test]
+    fn test_write_data() {
+        let mut lcd = HD44780::new();
+        lcd.set_data_bus(0x41); // 'A'
+        lcd.write_control_lines(true, false, true);
+        lcd.write_control_lines(true, false, false);
+        lcd.tick();
+        assert_eq!(lcd.ddram[0], b'A');
+    }
+
+    #[test]
+    fn test_set_cursor() {
+        let mut lcd = HD44780::new();
+        lcd.set_data_bus(0x80 | 0x40);
+        lcd.write_control_lines(false, false, true);
+        lcd.write_control_lines(false, false, false);
+        lcd.tick();
+        assert_eq!(lcd.cursor_position, 0x40);
+    }
+
+    #[test]
+    fn test_read_busy_flag_and_address() {
+        let mut lcd = HD44780::new();
+        lcd.busy = true;
+        lcd.cursor_position = 0x15;
+        lcd.write_control_lines(false, true, true);
+        let data = lcd.read_data_bus();
+        assert_eq!(data, 0x80 | 0x15);
     }
 }

beneater/src/parts/mod.rs

@@ -6,3 +6,5 @@ pub mod address_bus;
 pub mod data_bus;
 pub mod cpu_display;
 pub mod ram_display;
+pub mod mos6522_peripheral;
+pub mod backplane;

beneater/src/parts/mos6522_peripheral.rs

@@ -0,0 +1,5 @@
+pub trait Mos6522Peripheral {
+    fn write(&mut self, port: u8);
+    fn control(&mut self, control: u8);
+    fn read(&mut self) -> u8;
+}

beneater/src/parts/via6522.rs

@@ -1,45 +1,127 @@
-pub enum Via6522Port {
-    A(u8),
-    B(u8)
+use crate::parts::display_matrix::HD44780;
+use crate::parts::mos6522_peripheral::Mos6522Peripheral;
+
+pub struct VIA6522 {
+    // Data registers
+    ora: u8,
+    orb: u8,
+
+    // Data direction
+    ddra: u8,
+    ddrb: u8,
+
+    // Control lines (external pins)
+    ca1: bool,
+    ca2: bool,
+    cb1: bool,
+    cb2: bool,
+
+    // Timers
+    t1_counter: u16,
+    t1_latch: u16,
+    t1_enabled: bool,
+
+    t2_counter: u16,
+    t2_latch: u16,
+    t2_enabled: bool,
+
+    // Interrupt flags
+    ifr: u8,
+    ier: u8,
+
+    // Peripheral (e.g., LCD)
+    pub lcd: Option<Box<dyn Mos6522Peripheral>>,
 }
 
-#[derive(Default)]
-pub struct Via6522 {
-    data_bus: u8,
-    address_bus: u16,
-    port_a_state: u8,
-    port_b_data: u8,
-    port_a_direction: u8,
-    port_b_direction: u8,
-    memory_offset: u16,
-}
-
-impl Via6522 {
-    pub fn new(offset: u16) -> Self {
-        Via6522 {
-            memory_offset: offset,
-            ..Default::default()
+impl VIA6522 {
+    pub fn new() -> Self {
+        Self {
+            ora: 0,
+            orb: 0,
+            ddra: 0,
+            ddrb: 0,
+            ca1: false,
+            ca2: false,
+            cb1: false,
+            cb2: false,
+            t1_counter: 0,
+            t1_latch: 0,
+            t1_enabled: false,
+            t2_counter: 0,
+            t2_latch: 0,
+            t2_enabled: false,
+            ifr: 0,
+            ier: 0,
+            lcd: Some(HD44780::new().into()),
         }
     }
 
-    pub fn set_port_direction(&mut self, port: Via6522Port) {
-        match port {
-            Via6522Port::A(x) => {
-                self.port_a_direction = x;
-            },
-            Via6522Port::B(x) => {
-                self.port_b_direction = x;
+    pub fn read(&self, addr: u8) -> u8 {
+        match addr & 0x0F {
+            0x0 => self.orb,
+            0x1 => self.ora,
+            0x2 => self.ddrb,
+            0x3 => self.ddra,
+            0x4 => (self.t1_counter & 0xFF) as u8,
+            0x5 => (self.t1_counter >> 8) as u8,
+            0x6 => (self.t1_latch & 0xFF) as u8,
+            0x7 => (self.t1_latch >> 8) as u8,
+            0x8 => (self.t2_counter & 0xFF) as u8,
+            0x9 => (self.t2_latch & 0xFF) as u8,
+            0xD => self.ifr,
+            0xE => self.ier | 0x80,
+            _ => 0,
+        }
+    }
+
+    pub fn write(&mut self, addr: u8, value: u8) {
+        match addr & 0x0F {
+            0x0 => self.orb = value,
+            0x1 => self.ora = value,
+            0x2 => self.ddrb = value,
+            0x3 => self.ddra = value,
+            0x4 => {
+                self.t1_latch = (self.t1_latch & 0xFF00) | value as u16;
+                self.t1_counter = self.t1_latch;
+            }
+            0x5 => {
+                self.t1_latch = (value as u16) << 8 | (self.t1_latch & 0x00FF);
+                self.t1_counter = self.t1_latch;
+                self.t1_enabled = true;
+            }
+            0x6 => self.t1_latch = (self.t1_latch & 0xFF00) | value as u16,
+            0x7 => self.t1_latch = (value as u16) << 8 | (self.t1_latch & 0x00FF),
+            0x8 => self.t2_counter = value as u16,
+            0x9 => self.t2_latch = value as u16,
+            0xD => self.ifr &= !value, // Clear interrupt flags
+            0xE => {
+                if value & 0x80 != 0 {
+                    self.ier |= value & 0x7F;
+                } else {
+                    self.ier &= !(value & 0x7F);
+                }
+            }
+            _ => {}
+        }
+    }
+
+    pub fn tick(&mut self) {
+        if self.t1_enabled {
+            if self.t1_counter > 0 {
+                self.t1_counter -= 1;
+                if self.t1_counter == 0 {
+                    self.ifr |= 0x40; // Set T1 interrupt
+                }
+            }
+        }
+
+        if self.t2_enabled {
+            if self.t2_counter > 0 {
+                self.t2_counter -= 1;
+                if self.t2_counter == 0 {
+                    self.ifr |= 0x20; // Set T2 interrupt
+                }
             }
         }
     }
-
-    /// check for output pins and see what they say
-    pub fn update_pins(&mut self) {
-
-    }
-
-    /// check for input mode pins and see what they say
-    pub fn read_pins(&self) {
-
-    }
-}
+}

core/src/constants/constants_system.rs

@@ -2,6 +2,5 @@ pub const SIZE_1KB: usize = 1024;
 pub const SIZE_32KB: usize = SIZE_1KB * 32;
 pub const SIZE_64KB: usize = SIZE_1KB * 64;
 
-
 pub const OFFSET_RESET_VECTOR: u16 = 0xfffc;
 pub const OFFSET_INT_VECTOR: u16 = 0xfffe;

core/src/instruction_table.rs

@@ -4,6 +4,15 @@ use crate::op_info::OpInfo;
 use crate::operation::Operation;
 use crate::operation::Operation::*;
 
+
+pub fn INSTRUCTION_CYCLES(instruction: u8) -> u8 {
+    INSTRUCTION_TABLE[instruction as usize].unwrap().cycles
+}
+
+pub fn INSTRUCTION_LENGTH(instruction: u8) -> u8 {
+    INSTRUCTION_TABLE[instruction as usize].unwrap().length
+}
+
 pub const INSTRUCTION_TABLE: [Option<OpInfo>; 256] = {
     let mut table: [Option<OpInfo>; 256] = [const { None }; 256];
 

core/src/mos6502cpu.rs

@@ -1,60 +1,77 @@
+use log::trace;
 use crate::address_mode::AddressMode;
-use crate::constants::constants_system::{OFFSET_INT_VECTOR, OFFSET_RESET_VECTOR, SIZE_64KB};
+use crate::constants::constants_isa_op::ISA_OP_NOP;
 use crate::instruction::Instruction;
 use crate::mos6502flags::{Mos6502Flag, Mos6502Flags};
-use crate::mos6502flags::Mos6502Flag::{Carry, Decimal, Interrupt, Overflow};
+use crate::mos6502flags::Mos6502Flag::*;
 use crate::op_info::OpInfo;
 use crate::operand::Operand;
 use crate::operation::Operation;
+use crate::constants::constants_system::*;
+use crate::instruction_table::INSTRUCTION_TABLE;
 
 pub struct Mos6502Cpu {
-    // this is public for rendering quickly.
-    pub memory: Box<[u8]>,
+    memory: [u8; SIZE_64KB],
+    /// accumulator
     a: u8,
+    /// x register
     x: u8,
+    /// y register
     y: u8,
+    /// cpu flags
     flags: Mos6502Flags,
+    /// program counter
     pc: u16,
+    /// stack offset
     s: u8,
     pub microcode_step: u8,
-    pub address_bus: u16,
-    pub data_bus: u8,
+    address_bus: u16,
+    data_bus: u8,
     ir: Instruction, // Instruction Register
     oi: OpInfo,
     has_reset: bool,
-    iv: u16 // Interrupt Vector
+    iv: u16, // Interrupt Vector
+    cycle_carry: u16, // Value to hold between microsteps
+    ir_bytes: [u8; 4],
+    /// CPU Read signal
+    pub read_signal: bool
+}
+
+impl Mos6502Cpu {
+
+    /// set_data_bus
+    ///
+    /// Sets data on the data bus.
+    /// Used when CPU is in "R" mode
+    pub fn set_data_bus(&mut self, to_set: u8) {
+        self.data_bus = to_set;
+    }
 }
 
 impl Default for Mos6502Cpu {
     fn default() -> Self {
-        let vec = vec![0x00; SIZE_64KB];
-        let boxed_slize: Box<[u8]> = vec.into_boxed_slice();
-        let boxed_array: Box<[u8; SIZE_64KB]> = boxed_slize.try_into().expect("Failed to allocate system memory");
-
         let mut working = Mos6502Cpu {
-            memory: boxed_array,
-            a: 0,
-            x: 0,
-            y: 0,
+            memory: [0x00; SIZE_64KB],
+            a: 0x00,
+            x: 0x00,
+            y: 0x00,
             flags: Default::default(),
             pc: 0xfffd,
-            s: 0,
-            microcode_step: 0,
-            address_bus: 0,
-            data_bus: 0,
+            s: 0x00,
+            microcode_step: 0x00,
+            address_bus: 0x00,
+            data_bus: 0x00,
             ir: Instruction {
                 op: Operation::NOP,
                 mode: AddressMode::Implied,
                 operand: Operand::None,
             },
-            oi: OpInfo {
-                operation: Operation::NOP,
-                mode: AddressMode::Implied,
-                length: 1,
-                cycles: 2,
-            },
+            oi: INSTRUCTION_TABLE[ISA_OP_NOP as usize].unwrap(),
             has_reset: false,
-            iv: 0xfffe
+            iv: 0xfffe,
+            cycle_carry: 0x0000,
+            ir_bytes: [0x00; 4],
+            read_signal: true
         };
         working.reset_cpu();
         working
@@ -62,34 +79,20 @@ impl Default for Mos6502Cpu {
 }
 
 impl Mos6502Cpu {
+    pub fn address_bus(&self) -> u16 {
+        self.address_bus
+    }
+
+    pub fn data_bus(&self) -> u8 {
+        self.data_bus
+    }
+
     pub fn new() -> Mos6502Cpu {
-        let vec = vec![0x00; SIZE_64KB];
-        let boxed_slize: Box<[u8]> = vec.into_boxed_slice();
-        let boxed_array: Box<[u8; SIZE_64KB]> = boxed_slize.try_into().expect("Failed to allocate system memory");
+        let array = [0x00u8; SIZE_64KB];
         let mut working = Mos6502Cpu {
-            memory: boxed_array,
-            a: 0,
-            x: 0,
-            y: 0,
-            flags: Mos6502Flags::default(),
-            pc: 0,
-            s: 0xfd,
-            microcode_step: 0,
-            address_bus: 0x0000,
-            data_bus: 0x00,
-            ir: Instruction {
-                op: Operation::NOP,
-                mode: AddressMode::Implied,
-                operand: Operand::None,
-            },
-            oi: OpInfo {
-                operation: Operation::NOP,
-                mode: AddressMode::Implied,
-                length: 1,
-                cycles: 2,
-            },
-            has_reset: false,
-            iv: 0xfffe
+            memory: array,
+            ir_bytes: [0x00; 4],
+            ..Default::default()
         };
         working.reset_cpu();
         working
@@ -123,6 +126,7 @@ impl Mos6502Cpu {
     }
 
     pub fn poke(&mut self, offset: u16, value: u8) {
+        println!("Setting memory at {offset:04x} to {value:02x}");
         self.memory[offset as usize] = value
     }
 
@@ -130,7 +134,10 @@ impl Mos6502Cpu {
         self.a
     }
     pub fn poke_a(&mut self, new_a: u8) {
-        self.a = new_a;
+
+    println!("Updating register A from [{}] to [{}]", self.a, new_a);
+
+    self.a = new_a;
     }
 
     pub fn peek_x(&self) -> u8 {
@@ -159,9 +166,8 @@ impl Mos6502Cpu {
     }
 
     /// Ticks the CPU
-    /// Returns
-    ///   AddressBus, DataBus, RW flag
-    pub fn tick(&mut self) -> (u16, u8, bool) {
+    pub fn tick(&mut self) {
+
         println!("PREPARiNG TO TICK CPU AT PC 0x{:04x}", self.pc);
         if self.microcode_step == 0 {
             println!("OUT OF MICROSTEPS.  Decoding the next instruction");
@@ -176,9 +182,27 @@ impl Mos6502Cpu {
             // set the counter to the number of steps left
         } else {
             // run 1 microcode step
-            println!("Microstep {} for {:?}", self.microcode_step, self.ir.op);
+            println!("Microstep {}/{} for {:?}", self.microcode_step, self.oi.cycles,  self.ir.op);
             match self.ir.op {
                 Operation::ADC => {
+                    match self.microcode_step {
+                        1 => {
+                            match self.ir.mode {
+                                AddressMode::Immediate => {}
+                                AddressMode::ZeroPage => {}
+                                AddressMode::ZeroPageX => {}
+                                AddressMode::Absolute => {}
+                                AddressMode::AbsoluteX => {}
+                                AddressMode::AbsoluteY => {}
+                                AddressMode::Indirect => {}
+                                AddressMode::IndirectX => {}
+                                AddressMode::IndirectY => {}
+                                _ => {}
+                            }
+                        },
+                        2 => {},
+                        _ => {}
+                    }
                 }
                 Operation::AND => {}
                 Operation::ASL => {}
@@ -207,7 +231,65 @@ impl Mos6502Cpu {
                 Operation::CMP => {}
                 Operation::CPX => {}
                 Operation::CPY => {}
-                Operation::DEC => {}
+                Operation::DEC => {
+                    match self.microcode_step {
+                        // DEC Step 1
+                        1 => {
+                            let working_value = match self.oi.mode {
+                                AddressMode::ZeroPage => {
+                                    // read from
+                                    let offset = match self.ir.operand {
+                                        Operand::Byte(z) => {
+                                            z
+                                        }
+                                        _ => { 0x00 }
+                                    };
+                                    trace!("READING FROM MEMORY AT 0x{offset:04x}");
+                                    self.memory[offset as usize]
+                                    // self.peek(offset);
+                                }
+                                AddressMode::ZeroPageX => {
+                                    let offset = match self.ir.operand {
+                                        Operand::Byte(z) => {
+                                            z
+                                        }
+                                        _ => { 0x00 }
+                                    };
+                                    // self.memory.peek(offset + self.x);
+                                    self.memory[offset as usize]
+                                }
+                                AddressMode::Absolute => {
+                                    let offset = match self.ir.operand {
+                                        Operand::Word(offset) => {
+                                            offset
+                                        }
+                                        _ => { 0x00 }
+                                    };
+                                    // self.memory.peek(offset)
+                                    self.memory[offset as usize]
+                                }
+                                AddressMode::AbsoluteX => {
+                                    let offset = match self.ir.operand {
+                                        Operand::Word(offset) => {
+                                            offset
+                                        }
+                                        _ => { 0x00 }
+                                    };
+                                    // self.memory.peek(offset + self.x);
+                                    self.memory[offset as usize]
+                                }
+                                _ => {
+                                    0x00
+                                }
+                            };
+                        }
+                        // DEC write memory
+                        2 => {
+                            self.a = self.cycle_carry as u8;
+                        }
+                        _ => {}
+                    }
+                }
                 Operation::DEX => {
                     if self.microcode_step == 1 {
                         let (new_x, new_carry) = self.x.overflowing_sub(1);
@@ -227,6 +309,8 @@ impl Mos6502Cpu {
                         let (new_x, new_carry) = self.x.overflowing_add(1);
                         self.poke_x(new_x);
                         self.poke_flag(Carry, new_carry);
+                        self.address_bus = self.pc;
+                        self.data_bus = 0x00;
                     }
                 }
                 Operation::INY => {
@@ -234,16 +318,23 @@ impl Mos6502Cpu {
                         let (new_y, new_carry) = self.y.overflowing_add(1);
                         self.poke_y(new_y);
                         self.poke_flag(Carry, new_carry);
+                        self.address_bus = self.pc;
+                        self.data_bus = 0x00;
                     }                }
                 Operation::JMP => {
                     match self.ir.operand {
                         Operand::Word(offset) => {
                             self.pc = offset;
+                            self.address_bus = self.pc;
+                            self.data_bus = 0x00;
                         }
                         _ => {}
                     }
                 }
-                Operation::JSR => {}
+                Operation::JSR => {
+                    // push pc to stack.
+                    // jump to the subroutine.
+                }
                 Operation::LDA => {
                     match self.oi.mode {
                         AddressMode::Immediate => {
@@ -264,11 +355,32 @@ impl Mos6502Cpu {
                                 _ => {}
                             }
                         }
-                        AddressMode::ZeroPageX => {}
-                        AddressMode::ZeroPageY => {}
-                        AddressMode::Absolute => {}
-                        AddressMode::AbsoluteX => {}
-                        AddressMode::AbsoluteY => {}
+                        AddressMode::ZeroPageX => {
+                            match self.ir.operand {
+                                Operand::Byte(value) => {
+                                    let x_offset = self.x;
+                                    self.a = self.memory[(value + x_offset) as usize];
+                                }
+                                _ => {}
+                            }
+                        }
+                        AddressMode::Absolute => {
+                            if let Operand::Word(offset) = self.ir.operand {
+                                println!("Loading from absolute address 0x{offset:04x}");
+                                self.a = self.memory[offset as usize];
+                            }
+
+                        }
+                        AddressMode::AbsoluteX => {
+                            if let Operand::Word(offset) = self.ir.operand {
+                                self.a = self.memory[(offset + self.x as u16) as usize];
+                            }
+                        }
+                        AddressMode::AbsoluteY => {
+                            if let Operand::Word(offset) = self.ir.operand {
+                                self.a = self.memory[(offset + self.y as u16) as usize];
+                            }
+                        }
                         AddressMode::Indirect => {}
                         AddressMode::IndirectX => {}
                         AddressMode::IndirectY => {}
@@ -356,7 +468,16 @@ impl Mos6502Cpu {
                                 }
                             }
                         }
-                        AddressMode::AbsoluteY => {}
+                        AddressMode::AbsoluteY => {
+                            match self.ir.operand {
+                                Operand::Word(offset) => {
+                                    self.memory[(offset + self.y as u16) as usize] = self.a;
+                                }
+                                _ => {
+                                    // Invalid Parameter
+                                }
+                            }
+                        }
                         AddressMode::IndirectX => {}
                         AddressMode::IndirectY => {}
                         _ => {
@@ -385,8 +506,6 @@ impl Mos6502Cpu {
             }
             self.microcode_step -= 1;
         }
-
-        (0,0,false)
     }
 
     pub fn dump(&self) {
@@ -398,16 +517,12 @@ impl Mos6502Cpu {
         (self.pc, self.a, self.x, self.y, self.address_bus, self.data_bus, self.microcode_step)
     }
 
-    fn run_microstep(&self, instruction: Instruction, step: u8) {
-
-    }
 }
 
-
 #[cfg(test)]
 mod test {
     use crate::constants::constants_isa_op::*;
-    use crate::instruction_table::INSTRUCTION_TABLE;
+    use crate::instruction_table::{INSTRUCTION_CYCLES, INSTRUCTION_TABLE};
     use super::*;
 
     #[test]
@@ -445,7 +560,7 @@ mod test {
         cpu.memory[0x6000] = ISA_OP_CLI;
         cpu.pc = 0x6000;
 
-        for _ in 0..INSTRUCTION_TABLE[ISA_OP_CLI as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_CLI) { cpu.tick(); }
 
         assert!(!cpu.peek_flag(Interrupt));
 
@@ -458,7 +573,7 @@ mod test {
         cpu.memory[0x6000] = ISA_OP_CLV;
         cpu.pc = 0x6000;
 
-        for _ in 0..INSTRUCTION_TABLE[ISA_OP_CLV as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_CLV) { cpu.tick(); }
 
         assert!(!cpu.peek_flag(Overflow));
     }
@@ -470,24 +585,88 @@ mod test {
         cpu.memory[0x6001] = 0xab;
         cpu.pc = 0x6000;
 
-        for _ in 0..INSTRUCTION_TABLE[ISA_OP_LDA_I as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_LDA_I) { cpu.tick(); }
 
         assert_eq!(cpu.a, 0xab);
     }
 
+    #[test]
+    fn lda_zx() {
+        let mut cpu = Mos6502Cpu::default();
+        cpu.poke_x(1);
+        cpu.memory[0x6000] = ISA_OP_LDA_ZX;
+        cpu.memory[0x6001] = 0xab;
+        cpu.memory[0x00ac] = 0xbe;
+        cpu.pc = 0x6000;
+
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_LDA_ZX) { cpu.tick(); };
+
+        // println!("MEMORY AT 0x00aa, ab, ac, ad, ae -> {:02x} {:02x} {:02x} {:02x} {:02x}", cpu.memory[0x00aa], cpu.memory[0x00ab], cpu.memory[0x00ac], cpu.memory[0x00ad], cpu.memory[0x00ae]);
+        // cpu.dump();
+        assert_eq!(cpu.peek_a(), 0xbe);
+        assert!(!cpu.peek_flag(Zero));
+        assert!(!cpu.peek_flag(Carry));
+        assert!(!cpu.peek_flag(Negative));
+    }
+
     #[test]
     fn lda_zeropage() {
         let mut cpu = Mos6502Cpu::default();
         cpu.memory[0x6000] = ISA_OP_LDA_Z;
         cpu.memory[0x6001] = 0xab;
+        // Load ZeroPage
         cpu.memory[0x00ab] = 0xbe;
         cpu.pc = 0x6000;
 
-        for _ in 0..INSTRUCTION_TABLE[ISA_OP_LDA_Z as usize].unwrap().cycles + 1 { cpu.tick(); }
+        for _ in 0..INSTRUCTION_CYCLES(ISA_OP_LDA_Z) { cpu.tick(); }
 
         assert_eq!(cpu.a, 0xbe);
     }
 
+    #[test]
+    fn lda_absolute() {
+        let mut cpu = Mos6502Cpu::default();
+        cpu.memory[0x6000] = ISA_OP_LDA_ABS;
+        cpu.memory[0x6001] = 0xef;
+        cpu.memory[0x6002] = 0x0e;
+        cpu.memory[0x0eef] = 0xab;
+        cpu.pc = 0x6000;
+
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_LDA_ABS) { cpu.tick(); }
+
+        assert_eq!(cpu.a, 0xab);
+    }
+
+    #[test]
+    fn lda_absolutex() {
+        let mut cpu = Mos6502Cpu::default();
+        cpu.memory[0x6000] = ISA_OP_LDA_ABSX;
+        cpu.memory[0x6001] = 0xef;
+        cpu.memory[0x6002] = 0x0e;
+        cpu.poke_x(0x01);
+        cpu.memory[0x0ef0] = 0xab;
+        cpu.pc = 0x6000;
+
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_LDA_ABSX) { cpu.tick(); }
+
+        assert_eq!(cpu.a, 0xab);
+    }
+
+    #[test]
+    fn lda_absolutey() {
+        let mut cpu = Mos6502Cpu::default();
+        cpu.memory[0x6000] = ISA_OP_LDA_ABSY;
+        cpu.memory[0x6001] = 0xef;
+        cpu.memory[0x6002] = 0xbe;
+        cpu.poke_y(0x01);
+        cpu.memory[0x0ef0] = 0xab;
+        cpu.pc = 0x6000;
+
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_LDA_ABSY) { cpu.tick(); }
+
+        assert_eq!(cpu.a, 0xab);
+    }
+
     #[test]
     fn dex_inx() {
         let mut cpu = Mos6502Cpu::default();
@@ -496,9 +675,9 @@ mod test {
         cpu.memory[0x6001] = ISA_OP_INX;
         cpu.pc = 0x6000;
 
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_DEX as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_DEX) { cpu.tick(); }
         assert_eq!(0xaa, cpu.x);
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_INX as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_INX) { cpu.tick(); }
         assert_eq!(0xab, cpu.x);
     }
 
@@ -510,9 +689,9 @@ mod test {
         cpu.memory[0x6001] = ISA_OP_INY;
         cpu.pc = 0x6000;
 
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_DEY as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_DEY) { cpu.tick(); }
         assert_eq!(0xaa, cpu.peek_y());
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_INY as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_INY) { cpu.tick(); }
         assert_eq!(0xab, cpu.peek_y());
     }
 
@@ -524,9 +703,9 @@ mod test {
         cpu.memory[0x6001] = ISA_OP_ROR_A;
         cpu.pc = 0x6000;
 
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_ROL_A as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_ROL_A) { cpu.tick(); }
         assert_eq!(cpu.peek_a(), 0b0101_0101);
-        for _ in 0..=INSTRUCTION_TABLE[ISA_OP_ROR_A as usize].unwrap().cycles { cpu.tick(); }
+        for _ in 0..=INSTRUCTION_CYCLES(ISA_OP_ROR_A) { cpu.tick(); }
         assert_eq!(cpu.peek_a(), 0b1010_1010);
     }
-}
+}

core/src/mos6502flags.rs

@@ -1,4 +1,12 @@
+use crate::mos6502flags::Mos6502Flag::{Break, Carry, Decimal, Interrupt, Negative, Overflow, Zero};
 
+pub const BIT_NEGATIVE: u8 = 7;
+pub const BIT_OVERFLOW: u8 = 6;
+pub const BIT_BREAK: u8 = 4;
+pub const BIT_DECIMAL: u8 = 3;
+pub const BIT_INTERRUPT: u8 = 2;
+pub const BIT_ZERO: u8 = 1;
+pub const BIT_CARRY: u8 = 0;
 /// Represents the status flags in the 6502 processor's status register (P).
 #[derive(Debug, Copy, Clone, PartialEq)]
 pub enum Mos6502Flag {
@@ -42,7 +50,21 @@ pub enum Mos6502Flag {
     Negative,
 }
 
-#[derive(Default)]
+impl Mos6502Flag {
+    pub fn index(&self) -> u8 {
+        match self {
+            Carry => BIT_CARRY,
+            Zero => BIT_ZERO,
+            Interrupt => BIT_INTERRUPT,
+            Decimal => BIT_DECIMAL,
+            Break => BIT_BREAK,
+            Overflow => BIT_OVERFLOW,
+            Negative => BIT_NEGATIVE
+        }
+    }
+}
+
+#[derive(Default, PartialEq, Debug)]
 pub struct Mos6502Flags {
     carry: bool,
     zero: bool,
@@ -56,78 +78,133 @@ pub struct Mos6502Flags {
 impl Mos6502Flags {
     pub fn dump(&self) -> String {
         format!("{}{}{}{}{}{}{}",
-            if self.carry { 'C' } else { 'c' },
-            if self.zero { 'Z' } else { 'z' },
-            if self.interrupt { 'I' } else { 'i' },
-            if self.decimal { 'D' } else { 'd' },
-            if self.break_flag { 'B' } else { 'b' },
-            if self.overflow { 'O' } else { 'o' },
-            if self.negative { 'N' } else { 'n' }
+                if self.carry { 'C' } else { 'c' },
+                if self.zero { 'Z' } else { 'z' },
+                if self.interrupt { 'I' } else { 'i' },
+                if self.decimal { 'D' } else { 'd' },
+                if self.break_flag { 'B' } else { 'b' },
+                if self.overflow { 'O' } else { 'o' },
+                if self.negative { 'N' } else { 'n' }
         )
     }
 }
 
 impl Mos6502Flags {
-
     pub fn set_flag(&mut self, flag_to_set: Mos6502Flag) {
-        self.change_flag(flag_to_set, true);
+        println!("Setting {flag_to_set:?} flag");
+        match flag_to_set {
+            Carry => self.carry = true,
+            Zero => self.zero = true,
+            Interrupt => self.interrupt = true,
+            Decimal => self.decimal = true,
+            Break => self.break_flag = true,
+            Overflow => self.overflow = true,
+            Negative => self.negative = true,
+        }
     }
 
     pub fn clear_flag(&mut self, flag_to_clear: Mos6502Flag) {
-        self.change_flag(flag_to_clear, false);
-    }
+        println!("Clearing {flag_to_clear:?} flag");
+        match flag_to_clear {
+            Carry => self.carry = false,
+            Zero => self.zero = false,
+            Interrupt => self.interrupt = false,
+            Decimal => self.decimal = false,
+            Break => self.break_flag = false,
+            Overflow => self.overflow = false,
+            Negative => self.negative = false,
+        }    }
 
     fn change_flag(&mut self, flag_to_change: Mos6502Flag, new_value: bool) {
-        match flag_to_change {
-            Mos6502Flag::Carry => {
-                self.carry = new_value
-            }
-            Mos6502Flag::Zero => {
-                self.zero = new_value
-            }
-            Mos6502Flag::Interrupt => {
-                self.interrupt = new_value
-            }
-            Mos6502Flag::Decimal => {
-                self.decimal = new_value
-            }
-            Mos6502Flag::Break => {
-                self.break_flag = new_value
-            }
-            Mos6502Flag::Overflow => {
-                self.overflow = new_value
-            }
-            Mos6502Flag::Negative => {
-                self.negative = new_value
-            }
+        if new_value {
+            self.set_flag(flag_to_change);
+        } else {
+            self.clear_flag(flag_to_change);
         }
     }
 
     pub fn flag(&self, flag_to_read: Mos6502Flag) -> bool {
         match flag_to_read {
-            Mos6502Flag::Carry => {
-                self.carry
-            }
-            Mos6502Flag::Zero => {
-                self.zero
-            }
-            Mos6502Flag::Interrupt => {
-                self.interrupt
-            }
-            Mos6502Flag::Decimal => {
-                self.decimal
-            }
-            Mos6502Flag::Break => {
-                self.break_flag
-            }
-            Mos6502Flag::Overflow => {
-                self.overflow
-            }
-            Mos6502Flag::Negative => {
-                self.negative
-            }
+            Mos6502Flag::Negative => self.negative,
+            Mos6502Flag::Overflow => self.overflow,
+            // 5
+            Mos6502Flag::Break => self.break_flag,
+            Mos6502Flag::Decimal => self.decimal,
+            Mos6502Flag::Interrupt => self.interrupt,
+            Mos6502Flag::Zero => self.zero,
+            Mos6502Flag::Carry => self.carry,
         }
     }
+
+    pub fn as_byte(&self) -> u8 {
+        let mut working = 0x00;
+
+        if self.flag(Negative)  { working += 1 << Negative.index(); }
+        if self.flag(Overflow)  { working += 1 << Overflow.index(); }
+                                  working += 1 << 5; // Always Set
+        if self.flag(Break)     { working += 1 << Break.index(); }
+        if self.flag(Decimal)   { working += 1 << Decimal.index(); }
+        if self.flag(Interrupt) { working += 1 << Interrupt.index(); }
+        if self.flag(Zero)      { working += 1 << Zero.index(); }
+        if self.flag(Carry)     { working += 1 << Carry.index(); }
+
+        working
+    }
+
+
+
+    pub fn from_byte(src: u8) -> Self {
+        let mut working = Self::default();
+
+        working.change_flag(Negative, Self::bit(src, Negative.index()));
+        working.change_flag(Overflow,  Self::bit(src, Overflow.index()));
+        working.change_flag(Break, Self::bit(src, Break.index()));
+        working.change_flag(Decimal, Self::bit(src, Decimal.index()));
+        working.change_flag(Interrupt, Self::bit(src, Interrupt.index()));
+        working.change_flag(Zero, Self::bit(src, Zero.index()));
+        working.change_flag(Carry, Self::bit(src, Carry.index()));
+
+        working
+    }
+
+    /// bit
+    ///
+    /// src -> Source byte to check in
+    /// pos -> Which bit to check
+    ///
+    /// returns bool
+    ///
+    /// True if the bit is set.
+    /// False if the bit is not set
+    #[inline]
+    fn bit(src: u8, pos: u8) -> bool {
+        (src >> pos) & 1 != 0
+    }
 }
 
 
+#[cfg(test)]
+mod test {
+
+    use super::*;
+
+    #[test]
+    fn smoke() { assert!(true); }
+
+    #[test]
+    fn sanity() {
+        let f = Mos6502Flags::default();
+        let magic_byte = 0b1110_1101;
+        let magic_flags = Mos6502Flags {
+            carry: true,
+            zero: false,
+            interrupt: true,
+            decimal: true,
+            break_flag: false,
+            overflow: true,
+            negative: true,
+        };
+
+        assert_eq!(magic_flags, Mos6502Flags::from_byte(magic_byte));
+    }
+}

core/src/operation.rs

@@ -5,117 +5,121 @@ pub enum Operation {
     ///
     /// Affects flags: N, V, Z, C
     ///
-    /// Addressing Modes: Immediate, ZeroPage, ZeroPageX, Absolute, AbsoluteX, AbsoluteY, IndirectX, IndirectY
+    /// Addressing Modes: Immediate (2/2), ZeroPage (2/3), ZeroPageX (2/4), Absolute (3/4),
+    /// AbsoluteX (3/4), AbsoluteY (3/4), IndirectX (2/6), IndirectY (2/5)
     ADC,
 
     /// Logical AND with Accumulator
     ///
     /// Affects flags: N, Z
     ///
-    /// Addressing Modes: Immediate, ZeroPage, ZeroPageX, Absolute, AbsoluteX, AbsoluteY, IndirectX, IndirectY
+    /// Addressing Modes: Immediate (2/2), ZeroPage (2/3), ZeroPageX (2/4), Absolute (3/4),
+    /// AbsoluteX (3/4), AbsoluteY (3/4), IndirectX (2/6), IndirectY (2/5)
     AND,
 
     /// Arithmetic Shift Left
     ///
     /// Affects flags: N, Z, C
     ///
-    /// Addressing Modes: Accumulator, ZeroPage, ZeroPageX, Absolute, AbsoluteX
+    /// Addressing Modes: Accumulator (1/2), ZeroPage (2/5), ZeroPageX (2/6), Absolute (3/6),
+    /// AbsoluteX (3/7)
     ASL,
 
     /// Branch if Carry Clear
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BCC,
 
     /// Branch if Carry Set
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BCS,
 
     /// Branch if Equal (Zero Set)
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BEQ,
 
     /// Bit Test
     ///
     /// Affects flags: N, V, Z
     ///
-    /// Addressing Modes: ZeroPage, Absolute
+    /// Addressing Modes: ZeroPage (2/3), Absolute (3/4)
     BIT,
 
     /// Branch if Minus (Negative Set)
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BMI,
 
     /// Branch if Not Equal (Zero Clear)
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BNE,
 
     /// Branch if Positive (Negative Clear)
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BPL,
 
     /// Force Interrupt
     ///
     /// Affects flags: B
     ///
-    /// Addressing Modes: Implied
+    /// Addressing Modes: Implied (1/7)
     BRK,
 
     /// Branch if Overflow Clear
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BVC,
 
     /// Branch if Overflow Set
     ///
-    /// Addressing Modes: Relative
+    /// Addressing Modes: Relative (2/2)
     BVS,
 
     /// Clear Carry Flag
     ///
     /// Affects flags: C
     ///
-    /// Addressing Modes: Implied
+    /// Addressing Modes: Implied (1/2)
     CLC,
 
     /// Clear Decimal Mode
     ///
     /// Affects flags: D
     ///
-    /// Addressing Modes: Implied
+    /// Addressing Modes: Implied (1/2)
     CLD,
 
     /// Clear Interrupt Disable
     ///
     /// Affects flags: I
     ///
-    /// Addressing Modes: Implied
+    /// Addressing Modes: Implied (1/2)
     CLI,
 
     /// Clear Overflow Flag
     ///
     /// Affects flags: V
     ///
-    /// Addressing Modes: Implied
+    /// Addressing Modes: Implied (2/2)
     CLV,
 
     /// Compare Accumulator
     ///
     /// Affects flags: N, Z, C
     ///
-    /// Addressing Modes: Immediate, ZeroPage, ZeroPageX, Absolute, AbsoluteX, AbsoluteY, IndirectX, IndirectY
+    /// Addressing Modes: Immediate (2/2), ZeroPage (2/3), ZeroPageX (2/4), Absolute (3/4),
+    /// AbsoluteX (3/4), AbsoluteY (3/4), IndirectX (2/6), IndirectY (2/5)
     CMP,
 
     /// Compare X Register
     ///
     /// Affects flags: N, Z, C
     ///
-    /// Addressing Modes: Immediate, ZeroPage, Absolute
+    /// Addressing Modes: Immediate (2/2), ZeroPage (2/3), Absolute (3/4)
     CPX,
 
     /// Compare Y Register

core/src/periph/at28c256/mod.rs

@@ -14,6 +14,12 @@ pub struct At28C256 {
     data: Box<[u8; SIZE_32KB]>,
 }
 
+impl At28C256 {
+    pub fn program(&mut self, new_program: &[u8; 32768]) {
+        self.data= new_program.into();
+    }
+}
+
 #[cfg(test)]
 mod test {
     use crate::constants::constants_system::SIZE_1KB;

core/src/periph/at28c256/rom_chip.rs

@@ -8,7 +8,7 @@ impl RomChip for At28C256 {
         self.data[*offset as usize]
     }
 
-    fn program(new_data: Box<[u8; SIZE_32KB]>) -> Box<At28C256> {
+    fn program(new_data: &[u8; SIZE_32KB]) -> Box<At28C256> {
         println!("Writing new chip.");
         let mut working = At28C256::default();
         working.data = Box::new(*new_data);

core/src/periph/hm62256.rs

@@ -29,7 +29,7 @@ impl RomChip for Hm62256 {
         self.data[effective as usize]
     }
 
-    fn program(_: Box<[u8; SIZE_32KB]>) -> Box<Self> {
+    fn program(_: &[u8; SIZE_32KB]) -> Box<Self> {
         debug!("Dont program ram.");
         Hm62256::default().into()
     }

core/src/periph/rom_chip.rs

@@ -8,5 +8,5 @@ pub trait RomChip {
     /// Program
     ///
     /// Replaces all data in the ROM chip
-    fn program(new_data: Box<[u8; SIZE_32KB]>) -> Box<Self>;
+    fn program(new_data: &[u8; SIZE_32KB]) -> Box<Self>;
 }