Files
mos6502/core/src/computers/ram_rom/tick2.rs
T

51 lines
1.4 KiB
Rust

use std::collections::BTreeMap;
use crate::computers::ram_rom::RamRomComputer;
use crate::traits::bus_device::BusDevice;
struct ChipSignals {
cs: bool,
oe: bool,
we: bool
}
enum RomRamChips {
At28C256,
Hm62256
}
impl RamRomComputer {
pub fn signal_tick(&mut self, address: u16, data: u8) {
println!("⏲️RAM ROM COMPUTER SIGNAL TICK");
// no CPU to tick.
let mut ram_state = ChipSignals { oe: false, we: false, cs: false};
let mut rom_state = ChipSignals { oe: false, we: false, cs: false};
// Tick the RAM
// Tick the ROM
}
pub fn tick2(&mut self, address: u16, control: u8, data: u8) -> (u8) {
println!("RAM ROM Computer tick starting / {address:04x} {control:08b} {data:02x}");
// tick the parts
// map of memory
// 0x0000 -> 0x3fff -> RAM (HM62256)
// 0x4000 -> 0x7fff -> ROM (At28C256)
match address {
0x0000..=0x3fff => {
println!("__DATA TARGETTING ROM BEING STORED ON DATA BUS");
}
0x4000 ..=0x7fff => {
println!("__DATA TARGETTING RRAAMM GETTING STORED ON DATA BUS");
}
_ => {}
};
let rom_data_bus = self.rom.signal_tick(self.address_bus ,self.data_bus, true ,true , true);
let (_, ram_data_bus) = self.ram.tick(address, data, control == 1, true);
0
}
}