more tests.
registers are their own struct now
This commit is contained in:
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@ -1,6 +1,7 @@
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use log::{debug, error};
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use crate::chip8::delay_timer::DelayTimer;
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use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION;
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use crate::chip8::registers::Chip8Registers;
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use crate::chip8::sound_timer::SoundTimer;
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use crate::chip8::util::InstructionUtil;
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use crate::constants::{CHIP8_MEMORY_SIZE, CHIP8_REGISTER_COUNT};
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@ -9,16 +10,13 @@ use super::{
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cpu_states::Chip8CpuStates, instructions::Chip8CpuInstructions, system_memory::Chip8SystemMemory, video::Chip8Video,
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};
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#[derive(Clone, Copy)]
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pub struct Chip8Computer {
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pub pc: u16,
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pub sp: u8,
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pub memory: Chip8SystemMemory,
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pub registers: [u8; 16],
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pub registers: Chip8Registers,
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pub sound_timer: SoundTimer,
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pub delay_timer: DelayTimer,
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pub i_register: u16,
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pub video_memory: Chip8Video,
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pub state: Chip8CpuStates,
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}
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@ -26,14 +24,12 @@ pub struct Chip8Computer {
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impl Default for Chip8Computer {
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fn default() -> Self {
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Self {
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pc: 0x0200,
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sp: 0x00,
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memory: Chip8SystemMemory::default(),
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video_memory: Chip8Video::default(),
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registers: [0; CHIP8_REGISTER_COUNT as usize],
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registers: Chip8Registers::default(),
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sound_timer: SoundTimer::new(),
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delay_timer: DelayTimer::new(),
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i_register: 0x0000,
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state: Chip8CpuStates::WaitingForInstruction,
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}
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}
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@ -68,8 +64,9 @@ impl Chip8Computer {
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// read the next instruction
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let mut working_instruction: u16 = 0b0000000000000000;
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let high_byte = (self.memory.clone().peek(self.pc) as u16).rotate_left(8);
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let low_byte = self.memory.clone().peek(self.pc + 1) as u16;
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let start_pc = self.registers.peek_pc();
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let high_byte = (self.memory.clone().peek(start_pc) as u16).rotate_left(8);
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let low_byte = self.memory.clone().peek(start_pc + 1) as u16;
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working_instruction = InstructionUtil::join_bytes(high_byte as u8, low_byte as u8);
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@ -81,44 +78,6 @@ impl Chip8Computer {
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// todo: THIS IS BAD AND IS A SIDE EFFECT
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decoded_instruction.execute(self);
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/*
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match (self.state, decoded_instruction) {
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::SeVxVy(vx_register, vy_register)) => {
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debug!("INST* SeVxVy: 0x{vx_register:1x}/0x{vy_register:1x}");
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if self.registers[vx_register as usize] == self.registers[vy_register as usize] {
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self.pc += 2;
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};
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::LdVxByte(vx_register, byte)) => {
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debug!("INST* LdVxByte: 0x{vx_register:1x}/0x{byte:2x}");
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::AddVxByte(vx_register, byte)) => {
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debug!("INST: AddVxByte: 0x{vx_register:1x}/0x{byte:2x}");
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self.registers[vx_register as usize] += byte as u8;
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::LdVxVy(vx_register, vy_register)) => {
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debug!("INST: LdVxVy: 0x{vx_register:1x}/0x{vy_register:1x}");
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self.registers[vx_register as usize] = self.registers[vy_register as usize];
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::OrVxVy(vx_register, vy_register)) => {
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debug!("INST: OrVxVy: {vx_register}/{vy_register:1x}");
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self.registers[vx_register as usize] = self.registers[vx_register as usize] | self.registers[vy_register as usize];
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::AndVxVy(vx_register, vy_register)) => {
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debug!("INST: AndVxVy: {vx_register:1x}/{vy_register:1x}");
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self.registers[vx_register as usize] = self.registers[vx_register as usize] & self.registers[vy_register as usize];
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::XorVxVy(vx_register, vy_register)) => {
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debug!("INST: XorVxVy: {vx_register:1x}/{vy_register:1x}");
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self.registers[vx_register as usize] = self.registers[vx_register as usize] ^ self.registers[vy_register as usize];
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}
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(Chip8CpuStates::WaitingForInstruction, Chip8CpuInstructions::AddVxVy) => {
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debug!("INST: AddVxVy: {vx_register:1x}/{vy_register:1x}");
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}
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}
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*/
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self.sound_timer.tick();
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self.delay_timer.tick();
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self
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@ -1,8 +1,18 @@
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use log::debug;
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use rand::random;
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use crate::chip8::computer::{Chip8Computer};
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use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION;
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use crate::chip8::util::InstructionUtil;
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use crate::chip8::video::Chip8Video;
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/*
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nnn or addr - A 12-bit value, the lowest 12 bits of the instruction
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n or nibble - A 4-bit value, the lowest 4 bits of the instruction
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x - A 4-bit value, the lower 4 bits of the high byte of the instruction
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y - A 4-bit value, the upper 4 bits of the low byte of the instruction
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kk or byte - An 8-bit value, the lowest 8 bits of the instruction
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*/
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#[derive(Debug)]
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pub enum Chip8CpuInstructions {
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SysAddr(i16), // 0x0nnn Exit to System Call
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@ -42,9 +52,6 @@ pub enum Chip8CpuInstructions {
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LdVxI(u16), // 0xFx65 Load V0 to Vx in memory starting at I
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XXXXERRORINSTRUCTION,
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}
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impl Chip8CpuInstructions {
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pub fn encode(&self) -> u16 {
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match self {
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@ -84,7 +91,6 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::OrVxVy(x_register, y_register) => {
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0x8001u16 | x_register << 8 | y_register << 4
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}
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Chip8CpuInstructions::AndVxVy(x_register, y_register) => {
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0x8002u16 | x_register << 8 | y_register << 4
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}
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@ -93,15 +99,12 @@ impl Chip8CpuInstructions {
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}
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Chip8CpuInstructions::AddVxVy(x_register, y_register) => {
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0x8004u16 | x_register << 8 | y_register << 4
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}
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Chip8CpuInstructions::SubVxVy(x_register, y_register) => {
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0x8005u16 | x_register << 8 | y_register << 4
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}
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Chip8CpuInstructions::ShrVxVy(x_register, y_register) => {
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0x8006u16 | x_register << 8 | y_register << 4
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}
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Chip8CpuInstructions::SubnVxVy(x_register, y_register) => {
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0x8007u16 | x_register << 8 | y_register << 4
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@ -129,7 +132,6 @@ impl Chip8CpuInstructions {
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}
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Chip8CpuInstructions::SnkpVx(x_register) => {
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0xE0A1u16 | x_register << 8
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}
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Chip8CpuInstructions::LdVxDt(x_register) => {
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0xF007u16 | x_register << 8
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@ -145,7 +147,6 @@ impl Chip8CpuInstructions {
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}
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Chip8CpuInstructions::AddIVx(x_register) => {
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0xF01Eu16 | x_register << 8
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}
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Chip8CpuInstructions::LdFVx(x_register) => {
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0xF029u16 | x_register << 8
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@ -164,9 +165,6 @@ impl Chip8CpuInstructions {
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}
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}
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}
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}
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impl Chip8CpuInstructions {
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pub fn decode(input: u16) -> Chip8CpuInstructions {
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let x_param = InstructionUtil::read_x_from_instruction(input);
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let y_param = InstructionUtil::read_y_from_instruction(input);
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@ -306,7 +304,7 @@ impl Chip8CpuInstructions {
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}
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}
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0xF007..=0xFF65 => {
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println!("COMPARING LAST BYTE FROM TODECODE: {:2x} to {:4x} with {:2x}", last_byte, input, ubln);
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// println!("COMPARING LAST BYTE FROM TODECODE: {:2x} to {:4x} with {:2x}", last_byte, input, ubln);
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match last_byte {
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0x07 => {
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Chip8CpuInstructions::LdVxDt(ubln)
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@ -347,58 +345,127 @@ impl Chip8CpuInstructions {
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}
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pub fn execute(&self, mut input: &mut Chip8Computer) -> Chip8Computer {
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input.pc += 2;
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let start_pc = input.registers.peek_pc();
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input.registers.poke_pc(start_pc + 2);
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let _ = match self {
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// 0x0nnn Exit to System Call
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Chip8CpuInstructions::SysAddr(new_address) => {
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let mut new_state = input.clone();
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new_state.pc = *new_address as u16;
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// println!("SYS TO [{new_address}]");
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input.registers.poke_pc(*new_address as u16);
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}
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// * 0x00E0 Clear Screen
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Chip8CpuInstructions::CLS => {
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for i in 0..(64 * 32) {
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input.video_memory.poke(i, false);
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}
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}
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Chip8CpuInstructions::RET => {}
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// 0x00EE Return from Subroutine
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Chip8CpuInstructions::RET => {
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debug!("RET");
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}
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// 0x1nnn Jump to Address
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Chip8CpuInstructions::JpAddr(new_address) => {
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input.pc = *new_address as u16
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input.registers.poke_pc(*new_address as u16);
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}
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Chip8CpuInstructions::CallAddr(_) => {}
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// 0x2nnn Call Subroutine
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Chip8CpuInstructions::CallAddr(new_address) => {
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debug!("CALL ADDR {new_address}");
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}
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// 0x3xkk Skip next instruction if Vx = kk.
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Chip8CpuInstructions::SeVxByte(vx_register, byte) => {
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input.registers[*vx_register as usize] = *byte as u8;
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}
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Chip8CpuInstructions::SneVxByte(vx_register, byte) => {
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if input.registers[*vx_register as usize] == *byte as u8 {
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input.pc += 2;
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if input.registers.peek(*vx_register as u8) == *byte as u8 {
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input.registers.advance_pc();
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}
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}
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Chip8CpuInstructions::SeVxVy(_, _) => {}
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// 0x4xkk Skip next instruction if Vx != kk
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Chip8CpuInstructions::SneVxByte(x, byte) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = byte.to_be_bytes()[0];
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if lhs == rhs {
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input.registers.advance_pc();
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}
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}
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// 0x5xy0 Skip next instruction if Vx == Vy
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Chip8CpuInstructions::SeVxVy(x,y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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// println!("COMPARING [{lhs}] to [{rhs}]");
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if lhs == rhs {
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input.registers.advance_pc();
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}
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}
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// 0x6xkk Set Vx = kk
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Chip8CpuInstructions::LdVxByte(register, byte) => {
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input.registers[*register as usize] = byte.to_be_bytes()[0];
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let start_value = input.registers.peek(*register as u8);
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let byte_value = *byte as u8;
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// println!("SETTING REGISTER [{register}] FROM [{start_value}] to [{byte_value}] by loading.");
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input.registers.poke(*register as u8, byte_value);
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}
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Chip8CpuInstructions::AddVxByte(_, _) => {}
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Chip8CpuInstructions::LdVxVy(_, _) => {}
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Chip8CpuInstructions::OrVxVy(_, _) => {}
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Chip8CpuInstructions::AndVxVy(_, _) => {}
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Chip8CpuInstructions::XorVxVy(_, _) => {}
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Chip8CpuInstructions::AddVxVy(vx_register, vy_register) => {
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input.registers[*vx_register as usize] += input.registers[*vy_register as usize];
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// 0x7xkk Set Vx = Vx + kk
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Chip8CpuInstructions::AddVxByte(vx_register, byte) => {
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let to_add = *byte as u8;
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let old_value = input.registers.peek(*vx_register as u8);
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println!("Adding [{old_value}] from register [{vx_register}] to [{to_add}] ");
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input.registers.poke(*vx_register as u8, (old_value + to_add));
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}
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Chip8CpuInstructions::SubVxVy(vx_register, vy_register) => {
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input.registers[*vx_register as usize] -= input.registers[*vy_register as usize];
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// 0x8xy0 Set value of Vy in Vx
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Chip8CpuInstructions::LdVxVy(x, y) => {
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input.registers.poke(*x as u8, input.registers.peek(*y as u8));
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}
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// 0x8xy1 Set Vx = Vx OR Vy
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Chip8CpuInstructions::OrVxVy(x, y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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input.registers.poke(*x as u8, lhs | rhs);
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}
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// 0x8xy2 Set Vx = Vx AND Vy
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Chip8CpuInstructions::AndVxVy(x, y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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input.registers.poke(*x as u8, lhs & rhs);
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}
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// 0x8xy3 Set Vx = Vx XOR Vy
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Chip8CpuInstructions::XorVxVy(x, y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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input.registers.poke(*x as u8, lhs ^ rhs);
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}
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// 0x8xy4 Set Vx = Vx + Vy (SET VF on Carry)
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Chip8CpuInstructions::AddVxVy(x, y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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let working =(lhs + rhs) as i16;
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if working > 255 {
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input.registers.poke(0xf, 0x01);
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}
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input.registers.poke(*x as u8, working as u8);
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}
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Chip8CpuInstructions::SubVxVy(x,y) => {
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let lhs = input.registers.peek(*x as u8);
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let rhs = input.registers.peek(*y as u8);
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input.registers.poke(*x as u8, lhs - rhs);
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}
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Chip8CpuInstructions::ShrVxVy(_, _) => {}
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Chip8CpuInstructions::SubnVxVy(_, _) => {}
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Chip8CpuInstructions::ShlVxVy(_, _) => {}
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Chip8CpuInstructions::SneVxVy(vx_register, vy_register) => {
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if input.registers[*vx_register as usize] != input.registers[*vy_register as usize] {
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input.pc += 02;
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let x_reg_value = input.registers.peek(*vx_register as u8);
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let y_reg_value = input.registers.peek(*vy_register as u8);
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if x_reg_value != y_reg_value {
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input.registers.advance_pc();
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}
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}
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Chip8CpuInstructions::LdIAddr(new_index) => {
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input.i_register = *new_index;
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input.registers.poke_i(input.registers.peek(*new_index as u8) as u16);
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}
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// 0xBnnn Jump to nnn+V0
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Chip8CpuInstructions::JpV0Addr(_) => {}
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Chip8CpuInstructions::RndVxByte(_, _) => {}
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Chip8CpuInstructions::RndVxByte(x, byte) => {
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let new_value: u8 = random() ;
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input.registers.poke(*x as u8, (new_value & *byte as u8))
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}
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Chip8CpuInstructions::DrawVxVyNibble(x, y, n) => {
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// read nibble bytes from memory starting at I
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@ -411,9 +478,9 @@ impl Chip8CpuInstructions {
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}
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if did_change {
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input.registers[0xF] = 1u8;
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input.registers.poke(0x10, 1u8);
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} else {
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input.registers[0xF] = 0u8;
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input.registers.poke(0x10, 0u8);
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}
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}
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Chip8CpuInstructions::SkpVx(_) => {}
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@ -425,7 +492,9 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::AddIVx(_) => {}
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Chip8CpuInstructions::LdFVx(_) => {}
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Chip8CpuInstructions::LdBVx(_) => {}
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Chip8CpuInstructions::LdIVx(_) => {}
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Chip8CpuInstructions::LdIVx(x) => {
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input.registers.poke(*x as u8, input.registers.peek_i() as u8);
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}
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Chip8CpuInstructions::LdVxI(_) => {}
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Chip8CpuInstructions::XXXXERRORINSTRUCTION => {}
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};
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@ -522,4 +591,132 @@ mod test {
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assert!(matches!(Chip8CpuInstructions::decode(0xfe55), Chip8CpuInstructions::LdIVx(0xe)));
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assert!(matches!(Chip8CpuInstructions::decode(0xf365), Chip8CpuInstructions::LdVxI(0x3)));
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}
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/// START OF THE EXECUTION TESTS
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#[test]
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fn sys_test() {
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// 0x0nnn Exit to System Call
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let mut x = Chip8Computer::new();
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Chip8CpuInstructions::SysAddr(0).execute(&mut x);
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assert_eq!(x.registers.peek_pc(), 0);
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Chip8CpuInstructions::SysAddr(0xFA0).execute(&mut x);
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assert_eq!(x.registers.peek_pc(), 0xFA0);
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Chip8CpuInstructions::SysAddr(0x0AF).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0x0AF);
|
||||
}
|
||||
fn cls_test() {
|
||||
// * 0x00E0 Clear Screen
|
||||
// todo: Need to write this
|
||||
}
|
||||
|
||||
fn ret_test() {
|
||||
// 0x00EE Return from Subroutine
|
||||
// todo: no stack yet.
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn jpaddr_test() {
|
||||
// 0x1nnn Jump to Address
|
||||
let mut x = Chip8Computer::new();
|
||||
Chip8CpuInstructions::JpAddr(0).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0);
|
||||
Chip8CpuInstructions::JpAddr(0xABC).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0xABC);
|
||||
}
|
||||
|
||||
fn calladdr_test() {
|
||||
// 0x2nnn Call Subroutine
|
||||
// todo: no stack
|
||||
}
|
||||
|
||||
// ** test moved up so it can be used later
|
||||
#[test]
|
||||
fn LdVxByte_test() {
|
||||
// 0x6xkk Set Vx = kk
|
||||
let mut x = Chip8Computer::new();
|
||||
Chip8CpuInstructions::LdVxByte(1, 0x12).execute(&mut x);
|
||||
Chip8CpuInstructions::LdVxByte(2, 0x21).execute(&mut x);
|
||||
assert_eq!(x.registers.peek(1), 0x12);
|
||||
assert_eq!(x.registers.peek(2), 0x21);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn sevxbyte_match_test() {
|
||||
// 0x3xkk Skip next instruction if Vx = kk.
|
||||
// The interpreter compares register Vx to kk,
|
||||
// and if they are equal, increments the program counter by 2.
|
||||
|
||||
// test setup: Load value 0x84 into V1
|
||||
let mut x = Chip8Computer::new();
|
||||
Chip8CpuInstructions::LdVxByte(1, 0x84).execute(&mut x);
|
||||
Chip8CpuInstructions::SeVxByte(1, 0x84).execute(&mut x);
|
||||
// we should be 6 instructions past.
|
||||
// 2 for the LDVXBYTE
|
||||
// 2 for the SEVXBYTE
|
||||
// 2 for skipping.
|
||||
assert_eq!(x.registers.peek_pc(), 0x206);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn sevxbyte_nomatch_test() {
|
||||
// 0x3xkk Skip next instruction if Vx = kk.
|
||||
// The interpreter compares register Vx to kk,
|
||||
// and if they are equal, increments the program counter by 2.
|
||||
|
||||
// test setup: Load value 0x84 into V1
|
||||
let mut x = Chip8Computer::new();
|
||||
Chip8CpuInstructions::LdVxByte(0x01, 0x84).execute(&mut x);
|
||||
// PC will be 2 bytes past as we executed an instruction...
|
||||
assert_eq!(x.registers.peek_pc(), 0x202);
|
||||
|
||||
Chip8CpuInstructions::SeVxByte(1, 0x48).execute(&mut x);
|
||||
// we should be 2 instructions past.
|
||||
// 2 for what we executed
|
||||
assert_eq!(x.registers.peek_pc(), 0x204);
|
||||
|
||||
Chip8CpuInstructions::SeVxByte(1, 0x84).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0x208);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn SeVxVy_test() {
|
||||
// 0x4xkk Skip next instruction if Vx != kk
|
||||
let mut x = Chip8Computer::new();
|
||||
Chip8CpuInstructions::LdVxByte(0x01, 0x84).execute(&mut x);
|
||||
Chip8CpuInstructions::LdVxByte(0x02, 0x84).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0x204);
|
||||
|
||||
// skip, compare 0x84 to 0x84
|
||||
Chip8CpuInstructions::SeVxVy(0x1, 0x2).execute(&mut x);
|
||||
assert_eq!(x.registers.peek_pc(), 0x208);
|
||||
|
||||
// load 0x48 (not matching) into V2
|
||||
Chip8CpuInstructions::LdVxByte(0x2, 0x48).execute(&mut x);
|
||||
// verify its there.
|
||||
assert_eq!(x.registers.peek(2), 0x48);
|
||||
// no skip, compare 0x84 and 0x48
|
||||
Chip8CpuInstructions::SeVxVy(0x01, 0x02).execute(&mut x);
|
||||
assert_eq!(x.registers.peek(2), 0x48);
|
||||
assert_eq!(x.registers.peek_pc(), 0x20C);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn AddVxByte_test() {
|
||||
// 0x7xkk Set Vx = Vx + kk
|
||||
let x = Chip8Computer::new();
|
||||
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn LdVxVy_test() {}
|
||||
|
||||
#[test]
|
||||
fn OrVxVy_test() {}
|
||||
|
||||
#[test]
|
||||
fn AndVxVy_test() {}
|
||||
|
||||
#[test]
|
||||
fn XorVxVy_test() {}
|
||||
|
||||
}
|
||||
53
emma/src/chip8/registers.rs
Normal file
53
emma/src/chip8/registers.rs
Normal file
@ -0,0 +1,53 @@
|
||||
|
||||
/// Registers. numbered 1-16 publicly.
|
||||
/// Privately using zero base array so -1 to shift from pub to priv.
|
||||
#[derive(Clone, Copy)]
|
||||
pub struct Chip8Registers {
|
||||
registers: [u8; 16],
|
||||
i_register: u16,
|
||||
pc: u16
|
||||
}
|
||||
|
||||
impl Chip8Registers {
|
||||
pub fn advance_pc(&mut self) {
|
||||
self.pc += 2;
|
||||
}
|
||||
}
|
||||
|
||||
impl Default for Chip8Registers {
|
||||
fn default() -> Self {
|
||||
Chip8Registers {
|
||||
registers: [0x00; 16],
|
||||
i_register: 0x00,
|
||||
pc: 0x200
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl Chip8Registers {
|
||||
pub fn poke_pc(&mut self, new_pc: u16) {
|
||||
self.pc = new_pc
|
||||
}
|
||||
pub fn peek_i(&self) -> u16 {
|
||||
self.i_register
|
||||
}
|
||||
|
||||
pub fn poke_i(&mut self, new_value: u16) {
|
||||
self.i_register = new_value;
|
||||
}
|
||||
pub fn peek(&self, register_number: u8) -> u8 {
|
||||
self.registers[(register_number - 1) as usize]
|
||||
}
|
||||
|
||||
pub fn poke(&mut self, register_number: u8, value: u8) {
|
||||
self.registers[(register_number - 1) as usize] = value;
|
||||
}
|
||||
|
||||
pub fn peek_pc(&mut self) -> u16 {
|
||||
self.pc
|
||||
}
|
||||
|
||||
pub fn set_pc(&mut self, new_pc: u16) {
|
||||
self.pc = new_pc
|
||||
}
|
||||
}
|
||||
@ -10,7 +10,8 @@ impl InstructionUtil {
|
||||
}
|
||||
|
||||
pub fn join_bytes(high: u8, low: u8) -> u16 {
|
||||
(high as u16 )<< 8 & low as u16
|
||||
let result = (high as u16 )<< 8 | low as u16;
|
||||
result
|
||||
}
|
||||
|
||||
// nnn or addr - A 12-bit value, the lowest 12 bits of the instruction
|
||||
|
||||
@ -8,6 +8,7 @@ pub mod chip8 {
|
||||
pub mod instructions;
|
||||
pub mod cpu_states;
|
||||
pub mod util;
|
||||
pub mod registers;
|
||||
}
|
||||
|
||||
pub mod constants;
|
||||
Loading…
x
Reference in New Issue
Block a user