more passing tests. almost have coverage of instructions back
This commit is contained in:
+85
-77
@@ -4,7 +4,7 @@ use gemma::chip8::computer::Chip8Computer;
|
||||
use gemma::chip8::delay_timer::DelayTimer;
|
||||
use gemma::chip8::instructions::Chip8CpuInstructions;
|
||||
use gemma::chip8::keypad::Keypad;
|
||||
use gemma::chip8::quirk_modes::QuirkMode::Chip8;
|
||||
use gemma::chip8::quirk_modes::QuirkMode::{Chip8, SChipModern, XOChip};
|
||||
use gemma::chip8::registers::Chip8Registers;
|
||||
use gemma::chip8::sound_timer::SoundTimer;
|
||||
use gemma::chip8::stack::Chip8Stack;
|
||||
@@ -72,54 +72,54 @@ fn encode_decode_test() {
|
||||
assert_eq!(Chip8CpuInstructions::LIDR(1).encode(), 0xF185);
|
||||
|
||||
|
||||
/*
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF175), Chip8CpuInstructions::STR(1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF185), Chip8CpuInstructions::LIDR(1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00C1u16), Chip8CpuInstructions::SDN(0x01)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FCu16), Chip8CpuInstructions::SLF));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FBu16), Chip8CpuInstructions::SRT));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FDu16), Chip8CpuInstructions::EXIT));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FEu16), Chip8CpuInstructions::DIS));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FFu16), Chip8CpuInstructions::ENA));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF030u16), Chip8CpuInstructions::LDF2(0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00E0u16), Chip8CpuInstructions::CLS));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00EEu16), Chip8CpuInstructions::RET));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x0123), Chip8CpuInstructions::SYS(0x123)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x0FFF), Chip8CpuInstructions::SYS(0xfff)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x1002), Chip8CpuInstructions::JPA(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x1FF0), Chip8CpuInstructions::JPA(0xFF0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x2002), Chip8CpuInstructions::CALL(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x3123), Chip8CpuInstructions::SEX(0x1, 0x23)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x4abc), Chip8CpuInstructions::SNEB(0xa, 0xbc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x5ab0), Chip8CpuInstructions::SEY(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x6aff), Chip8CpuInstructions::LDR(0xa, 0xff)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x7abc), Chip8CpuInstructions::ADD(0xa, 0xbc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ab0), Chip8CpuInstructions::LDR_Y(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ba1), Chip8CpuInstructions::OR(0xb, 0xa)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8cd2), Chip8CpuInstructions::AND(0xc, 0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8de3), Chip8CpuInstructions::ORY(0xd, 0xe)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ef4), Chip8CpuInstructions::ADDR(0xe, 0xf)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8f05), Chip8CpuInstructions::SUB(0xf, 0x0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8016), Chip8CpuInstructions::SHR(0x0, 0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8127), Chip8CpuInstructions::SUBC(0x1, 0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x834e), Chip8CpuInstructions::SHL(0x3, 0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x9ab0), Chip8CpuInstructions::SNEY(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xa123), Chip8CpuInstructions::LDIA(0x123)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xb234), Chip8CpuInstructions::JPI(0x234)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xcaca), Chip8CpuInstructions::RND(0xa, 0xca)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xdab4), Chip8CpuInstructions::DRW(0xa, 0xb, 0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xe19e), Chip8CpuInstructions::SKP(0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xe2a1), Chip8CpuInstructions::SKNP(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf107), Chip8CpuInstructions::LDRD(0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf40a), Chip8CpuInstructions::LDRK(0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf615), Chip8CpuInstructions::LDD(0x6)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LDIS(0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd1e), Chip8CpuInstructions::ADDI(0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfc29), Chip8CpuInstructions::LDFX(0xc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd33), Chip8CpuInstructions::BCD(0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfe55), Chip8CpuInstructions::LDIX(0xe)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf365), Chip8CpuInstructions::LDRI(0x3)));
|
||||
*/
|
||||
/*
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF175), Chip8CpuInstructions::STR(1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF185), Chip8CpuInstructions::LIDR(1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00C1u16), Chip8CpuInstructions::SDN(0x01)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FCu16), Chip8CpuInstructions::SLF));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FBu16), Chip8CpuInstructions::SRT));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FDu16), Chip8CpuInstructions::EXIT));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FEu16), Chip8CpuInstructions::DIS));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00FFu16), Chip8CpuInstructions::ENA));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xF030u16), Chip8CpuInstructions::LDF2(0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00E0u16), Chip8CpuInstructions::CLS));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x00EEu16), Chip8CpuInstructions::RET));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x0123), Chip8CpuInstructions::SYS(0x123)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x0FFF), Chip8CpuInstructions::SYS(0xfff)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x1002), Chip8CpuInstructions::JPA(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x1FF0), Chip8CpuInstructions::JPA(0xFF0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x2002), Chip8CpuInstructions::CALL(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x3123), Chip8CpuInstructions::SEX(0x1, 0x23)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x4abc), Chip8CpuInstructions::SNEB(0xa, 0xbc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x5ab0), Chip8CpuInstructions::SEY(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x6aff), Chip8CpuInstructions::LDR(0xa, 0xff)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x7abc), Chip8CpuInstructions::ADD(0xa, 0xbc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ab0), Chip8CpuInstructions::LDR_Y(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ba1), Chip8CpuInstructions::OR(0xb, 0xa)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8cd2), Chip8CpuInstructions::AND(0xc, 0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8de3), Chip8CpuInstructions::ORY(0xd, 0xe)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8ef4), Chip8CpuInstructions::ADDR(0xe, 0xf)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8f05), Chip8CpuInstructions::SUB(0xf, 0x0)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8016), Chip8CpuInstructions::SHR(0x0, 0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x8127), Chip8CpuInstructions::SUBC(0x1, 0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x834e), Chip8CpuInstructions::SHL(0x3, 0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0x9ab0), Chip8CpuInstructions::SNEY(0xa, 0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xa123), Chip8CpuInstructions::LDIA(0x123)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xb234), Chip8CpuInstructions::JPI(0x234)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xcaca), Chip8CpuInstructions::RND(0xa, 0xca)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xdab4), Chip8CpuInstructions::DRW(0xa, 0xb, 0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xe19e), Chip8CpuInstructions::SKP(0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xe2a1), Chip8CpuInstructions::SKNP(0x2)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf107), Chip8CpuInstructions::LDRD(0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf40a), Chip8CpuInstructions::LDRK(0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf615), Chip8CpuInstructions::LDD(0x6)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LDIS(0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd1e), Chip8CpuInstructions::ADDI(0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfc29), Chip8CpuInstructions::LDFX(0xc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd33), Chip8CpuInstructions::BCD(0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfe55), Chip8CpuInstructions::LDIX(0xe)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf365), Chip8CpuInstructions::LDRI(0x3)));
|
||||
*/
|
||||
}
|
||||
|
||||
#[test]
|
||||
@@ -1342,38 +1342,46 @@ fn instructions_operands_tests() {
|
||||
#[test]
|
||||
fn instruction_ena_dis_tests() {
|
||||
let mut x = Chip8Computer::new();
|
||||
assert!(!x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::HIGH.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::HIGH.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::LOW.execute(&mut x);
|
||||
assert!(!x.video_memory.is_highres());
|
||||
for quirk in [SChipModern, XOChip] {
|
||||
x.quirk_mode = quirk;
|
||||
assert!(!x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::HIGH.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::HIGH.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::LOW.execute(&mut x);
|
||||
assert!(!x.video_memory.is_highres());
|
||||
}
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn instruction_test_scrolling_lowres() {
|
||||
let mut x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SCR.execute(&mut x);
|
||||
for quirk in [SChipModern, XOChip] {
|
||||
let mut x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
x.quirk_mode = quirk.clone();
|
||||
Chip8CpuInstructions::SCR.execute(&mut x);
|
||||
assert_eq!(read_test_result("test_scroll_right_4.asc"), x.dump_video_to_string());
|
||||
|
||||
assert_eq!(read_test_result("test_scroll_right_4.asc"), x.dump_video_to_string());
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
x.quirk_mode = quirk.clone();
|
||||
Chip8CpuInstructions::SCL.execute(&mut x);
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SCL.execute(&mut x);
|
||||
assert_eq!(read_test_result("test_scroll_left_4.asc"), x.dump_video_to_string());
|
||||
|
||||
assert_eq!(read_test_result("test_scroll_left_4.asc"), x.dump_video_to_string());
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
x.quirk_mode = quirk.clone();
|
||||
Chip8CpuInstructions::SCD(0x01).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_1.asc"), x.dump_video_to_string());
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SCD(0x01).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_1.asc"), x.dump_video_to_string());
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SCD(0xA).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_10.asc"), x.dump_video_to_string());
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
x.quirk_mode = quirk.clone();
|
||||
Chip8CpuInstructions::SCD(0xA).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_10.asc"), x.dump_video_to_string());
|
||||
}
|
||||
}
|
||||
|
||||
#[test]
|
||||
@@ -1388,10 +1396,10 @@ fn computer_dump_keypad_to_string() {
|
||||
fn computer_dump_registers_to_string() {
|
||||
let mut x = Chip8Computer::new();
|
||||
let values_to_set = [0x0b, 0xad, 0xbe, 0xef,
|
||||
0xca, 0xb0,
|
||||
0x7a, 0xc0, 0xca, 0x70,
|
||||
0xba, 0xdb, 0xed, 0x00,
|
||||
0x00, 0x00
|
||||
0xca, 0xb0,
|
||||
0x7a, 0xc0, 0xca, 0x70,
|
||||
0xba, 0xdb, 0xed, 0x00,
|
||||
0x00, 0x00
|
||||
];
|
||||
let expected_value = "Vx: 0x0b 0xad 0xbe 0xef 0xca 0xb0 0x7a 0xc0\n 0xca 0x70 0xba 0xdb 0xed 0x00 0x00 0x00\nI: 0x0000\tPC: 0x0200";
|
||||
|
||||
|
||||
@@ -7,7 +7,7 @@ use gemma::constants::*;
|
||||
struct InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions,
|
||||
schip: Chip8CpuInstructions,
|
||||
xochip: Chip8CpuInstructions
|
||||
xochip: Chip8CpuInstructions,
|
||||
}
|
||||
|
||||
#[derive(Clone)]
|
||||
@@ -17,7 +17,7 @@ struct InstructionTest {
|
||||
operands: String,
|
||||
asm: String,
|
||||
encoded: u16,
|
||||
quirks: InstructionTestQuirks
|
||||
quirks: InstructionTestQuirks,
|
||||
}
|
||||
|
||||
#[test]
|
||||
@@ -191,7 +191,6 @@ fn instructions_encode_decode_tests_with_quirks() {
|
||||
xochip: Chip8CpuInstructions::SEX(0x1, 0xfa)
|
||||
},
|
||||
},
|
||||
|
||||
InstructionTest {
|
||||
name: INST_SNEB.to_string(),
|
||||
instruction: Chip8CpuInstructions::SNEB(0x01, 0xab),
|
||||
@@ -241,17 +240,343 @@ fn instructions_encode_decode_tests_with_quirks() {
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRK.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRK(0x6),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "LDRK 0x06".to_string(),
|
||||
encoded: 0xF60A,
|
||||
name: INST_LDRK.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRK(0x6),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "LDRK 0x06".to_string(),
|
||||
encoded: 0xF60A,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions::LDRK(0x6),
|
||||
schip: Chip8CpuInstructions::LDRK(0x6),
|
||||
xochip: Chip8CpuInstructions::LDRK(0x6),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADDI.to_string(),
|
||||
instruction: Chip8CpuInstructions::ADDI(0x02),
|
||||
operands: "0x02".to_string(),
|
||||
asm: "ADDI 0x02".to_string(),
|
||||
encoded: 0xF21E,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: ADDI(0x02),
|
||||
schip: ADDI(0x02),
|
||||
xochip: ADDI(0x02),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADD.to_string(),
|
||||
instruction: Chip8CpuInstructions::ADD(0x02, 0x12),
|
||||
operands: "0x02, 0x12".to_string(),
|
||||
asm: "ADD 0x02, 0x12".to_string(),
|
||||
encoded: 0x7212,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: ADD(0x02, 0x12),
|
||||
schip: ADD(0x02, 0x12),
|
||||
xochip: ADD(0x02, 0x12),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SCU.to_string(),
|
||||
instruction: Chip8CpuInstructions::SCU(0x04),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "SCU 0x04".to_string(),
|
||||
encoded: 0x00D4,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: XXXXERRORINSTRUCTION,
|
||||
schip: XXXXERRORINSTRUCTION,
|
||||
xochip: SCU(0x04)
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADDR.to_string(),
|
||||
instruction: ADDR(0x01, 0x02),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "ADDR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8124,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: ADDR(0x01, 0x02),
|
||||
schip: ADDR(0x01, 0x02),
|
||||
xochip: ADDR(0x01, 0x02),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_AND.to_string(),
|
||||
instruction: AND(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "AND 0x1, 0x2".to_string(),
|
||||
encoded: 0x8122,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: AND(0x1, 0x2),
|
||||
schip: AND(0x1, 0x2),
|
||||
xochip: AND(0x1, 0x2),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPA.to_string(),
|
||||
instruction: JPA(0x345),
|
||||
operands: "0x0345".to_string(),
|
||||
asm: "JPA 0x0345".to_string(),
|
||||
encoded: 0x1345,
|
||||
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: JPA(0x345),
|
||||
schip: JPA(0x345),
|
||||
xochip: JPA(0x345),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_BCD.to_string(),
|
||||
instruction: BCD(0xc),
|
||||
operands: "0x0c".to_string(),
|
||||
asm: "BCD 0x0c".to_string(),
|
||||
encoded: 0xfc33,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: BCD(0xcd),
|
||||
schip: BCD(0xcd),
|
||||
xochip: BCD(0xcd)
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDD.to_string(),
|
||||
instruction: LDD(0xfc),
|
||||
operands: "0xfc".to_string(),
|
||||
asm: "LDD 0xfc".to_string(),
|
||||
encoded: 0xfc15,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDD(0xfc),
|
||||
schip: LDD(0xfc),
|
||||
xochip: LDD(0xfc),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ORY.to_string(),
|
||||
instruction: ORY(0x01, 0x3),
|
||||
operands: "0x1, 0x3".to_string(),
|
||||
asm: "ORY 0x1, 0x3".to_string(),
|
||||
encoded: 0x8133,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: ORY(0x01, 0x3),
|
||||
schip: ORY(0x01, 0x3),
|
||||
xochip: ORY(0x01, 0x3),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUBC.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUBC(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "SUBC 0x1, 0x2".to_string(),
|
||||
encoded: 0x8127,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions::SUBC(0x1, 0x2),
|
||||
schip: Chip8CpuInstructions::SUBC(0x1, 0x2),
|
||||
xochip: Chip8CpuInstructions::SUBC(0x1, 0x2),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUB.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUB(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "SUB 0x1, 0x2".to_string(),
|
||||
encoded: 0x8125,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions::SUB(0x1, 0x2),
|
||||
schip: Chip8CpuInstructions::SUB(0x1, 0x2),
|
||||
xochip: Chip8CpuInstructions::SUB(0x1, 0x2),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_STR.to_string(),
|
||||
instruction: Chip8CpuInstructions::STR(0x06),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "STR 0x06".to_string(),
|
||||
encoded: 0xf675,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: XXXXERRORINSTRUCTION,
|
||||
schip: Chip8CpuInstructions::STR(0x06),
|
||||
xochip: Chip8CpuInstructions::STR(0x06),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_OR.to_string(),
|
||||
instruction: OR(0x01, 0x02),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "OR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8121,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: OR(0x01, 0x02),
|
||||
schip: OR(0x01, 0x02),
|
||||
xochip: OR(0x01, 0x02),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SHR.to_string(),
|
||||
instruction: SHR(0x04, 0x4),
|
||||
operands: "0x4, 0x4".to_string(),
|
||||
asm: "SHR 0x4, 0x4".to_string(),
|
||||
encoded: 0x8446,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: SHR(0x04, 0x4),
|
||||
schip: SHR(0x04, 0x4),
|
||||
xochip: SHR(0x04, 0x4)
|
||||
}
|
||||
}, InstructionTest {
|
||||
name: INST_SHL.to_string(),
|
||||
instruction: SHL(0x04, 0x4),
|
||||
operands: "0x4, 0x4".to_string(),
|
||||
asm: "SHL 0x4, 0x4".to_string(),
|
||||
encoded: 0x844e,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: SHL(0x04, 0x4),
|
||||
schip: SHL(0x04, 0x4),
|
||||
xochip: SHL(0x04, 0x4)
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_RND.to_string(),
|
||||
instruction: RND(0x01, 0xff),
|
||||
operands: "0x01, 0xff".to_string(),
|
||||
asm: "RND 0x01, 0xff".to_string(),
|
||||
encoded: 0xc1ff,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: RND(0x01, 0xff),
|
||||
schip: RND(0x01, 0xff),
|
||||
xochip: RND(0x01, 0xff),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRY.to_string(),
|
||||
instruction: LDR_Y(0x01, 0x02),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "LDRY 0x1, 0x2".to_string(),
|
||||
encoded: 0x8120,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDR_Y(0x01, 0x02),
|
||||
schip: LDR_Y(0x01, 0x02),
|
||||
xochip: LDR_Y(0x01, 0x02)
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIS.to_string(),
|
||||
instruction: LDIS(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDIS 0x01".to_string(),
|
||||
encoded: 0xf118,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDIS(0x01),
|
||||
schip: LDIS(0x01),
|
||||
xochip: LDIS(0x01),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LIDR.to_string(),
|
||||
instruction: LIDR(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LIDR 0x01".to_string(),
|
||||
encoded: 0xf185,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: XXXXERRORINSTRUCTION,
|
||||
schip: LIDR(0x01),
|
||||
xochip: LIDR(0x01),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF2.to_string(),
|
||||
instruction: LDF2(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDF2 0x01".to_string(),
|
||||
encoded: 0xf130,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: XXXXERRORINSTRUCTION,
|
||||
schip: LDF2(0x01),
|
||||
xochip: LDF2(0x01)
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF.to_string(),
|
||||
instruction: LDFX(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDF 0x01".to_string(),
|
||||
encoded: 0xf129,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDFX(0x01),
|
||||
schip: LDFX(0x01),
|
||||
xochip: LDFX(0x01)
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIA.to_string(),
|
||||
instruction: LDIA(0x01),
|
||||
operands: "0x0001".to_string(),
|
||||
asm: "LDIA 0x0001".to_string(),
|
||||
encoded: 0xa001,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDIA(0x01),
|
||||
schip: LDIA(0x01),
|
||||
xochip: LDIA(0x01),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIX.to_string(),
|
||||
instruction: LDIX(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDIX 0x01".to_string(),
|
||||
encoded: 0xf155,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: LDIX(0x01),
|
||||
schip: LDIX(0x01),
|
||||
xochip: LDIX(0x01),
|
||||
}
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRD.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRD(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDRD 0x01".to_string(),
|
||||
encoded: 0xf107,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions::LDRD(0x01),
|
||||
schip: Chip8CpuInstructions::LDRD(0x01),
|
||||
xochip: Chip8CpuInstructions::LDRD(0x01),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRI.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRI(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDRI 0x01".to_string(),
|
||||
encoded: 0xf165,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: Chip8CpuInstructions::LDRI(0x01),
|
||||
schip: Chip8CpuInstructions::LDRI(0x01),
|
||||
xochip: Chip8CpuInstructions::LDRI(0x01),
|
||||
},
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SKP.to_string(),
|
||||
instruction: SKP(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "SKP 0x01".to_string(),
|
||||
encoded: 0xe19e,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: SKP(0x01),
|
||||
schip: SKP(0x01),
|
||||
xochip: SKP(0x01),
|
||||
}
|
||||
},
|
||||
|
||||
InstructionTest {
|
||||
name: INST_SNEY.to_string(),
|
||||
instruction: SNEY(0x01, 0x1),
|
||||
operands: "0x01, 0x01".to_string(),
|
||||
asm: "SNEY 0x01, 0x01".to_string(),
|
||||
encoded: 0x0000,
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: SNEY(0x01, 0x1),
|
||||
schip: SNEY(0x01, 0x1),
|
||||
xochip: SNEY(0x01, 0x1),
|
||||
}
|
||||
},
|
||||
|
||||
];
|
||||
|
||||
for current in it {
|
||||
|
||||
Reference in New Issue
Block a user