disassembler disassembles
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@ -8,7 +8,7 @@ use crate::chip8::computer::{Chip8Computer};
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use crate::chip8::cpu_states::Chip8CpuStates::WaitingForKey;
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use crate::chip8::cpu_states::Chip8CpuStates::WaitingForKey;
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use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION;
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use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION;
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use crate::chip8::util::InstructionUtil;
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use crate::chip8::util::InstructionUtil;
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use crate::constants::{INST_ADD, INST_ADDI, INST_ADDR, INST_AND, INST_BCD, INST_CALL, INST_CLS, INST_DRW, INST_EXIT, INST_JPA, INST_JPI, INST_LDD, INST_LDF, INST_LDF2, INST_LDIA, INST_LDIX, INST_LDR, INST_LDRD, INST_LDRI, INST_LDRK, INST_LDRY, INST_LIDR, INST_LIDS};
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use crate::constants::{*};
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/*
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/*
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nnn or addr - A 12-bit value, the lowest 12 bits of the instruction
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nnn or addr - A 12-bit value, the lowest 12 bits of the instruction
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@ -286,27 +286,27 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::LDRI(_) => INST_LDRI,
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Chip8CpuInstructions::LDRI(_) => INST_LDRI,
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Chip8CpuInstructions::LDRK(_) => INST_LDRK,
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Chip8CpuInstructions::LDRK(_) => INST_LDRK,
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Chip8CpuInstructions::LDR_Y(_, _) => INST_LDRY,
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Chip8CpuInstructions::LDR_Y(_, _) => INST_LDRY,
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Chip8CpuInstructions::OR(_, _) => "OR",
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Chip8CpuInstructions::OR(_, _) => INST_OR,
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Chip8CpuInstructions::RET => "RET",
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Chip8CpuInstructions::RET => INST_RET,
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Chip8CpuInstructions::RND(_, _) => "RND",
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Chip8CpuInstructions::RND(_, _) => INST_RND,
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Chip8CpuInstructions::SDN(_) => "SDN",
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Chip8CpuInstructions::SDN(_) => INST_SDN,
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Chip8CpuInstructions::SLF => "SLF",
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Chip8CpuInstructions::SLF => INST_SLF,
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Chip8CpuInstructions::SRT => "SRT",
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Chip8CpuInstructions::SRT => INST_SRT,
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Chip8CpuInstructions::SEX(_, _) => "SEX",
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Chip8CpuInstructions::SEX(_, _) => INST_SEX,
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Chip8CpuInstructions::SEY(_, _) => "SEY",
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Chip8CpuInstructions::SEY(_, _) => INST_SEY,
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Chip8CpuInstructions::SHL(_, _) => "SHL",
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Chip8CpuInstructions::SHL(_, _) => INST_SHL,
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Chip8CpuInstructions::SHR(_, _) => "SHR",
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Chip8CpuInstructions::SHR(_, _) => INST_SHR,
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Chip8CpuInstructions::SKP(_) => "SKP",
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Chip8CpuInstructions::SKP(_) => INST_SKP,
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Chip8CpuInstructions::SNEB(_, _) => "SNEB",
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Chip8CpuInstructions::SNEB(_, _) => INST_SNEB,
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Chip8CpuInstructions::SNEY(_, _) => "SNEY",
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Chip8CpuInstructions::SNEY(_, _) => INST_SNEY,
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Chip8CpuInstructions::SKNP(_) => "SNKP",
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Chip8CpuInstructions::SKNP(_) => INST_SNKP,
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Chip8CpuInstructions::STR(x) => "STR",
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Chip8CpuInstructions::STR(x) => INST_STR,
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Chip8CpuInstructions::SUB(_, _) => "SUB",
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Chip8CpuInstructions::SUB(_, _) => INST_SUB,
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Chip8CpuInstructions::SUBC(_, _) => "SUBC",
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Chip8CpuInstructions::SUBC(_, _) => INST_SUBC,
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Chip8CpuInstructions::SYS(_) => "SYS",
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Chip8CpuInstructions::SYS(_) => INST_SYS,
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Chip8CpuInstructions::DIS => "DIS",
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Chip8CpuInstructions::DIS => INST_DIS,
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Chip8CpuInstructions::ENA => "ENA",
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Chip8CpuInstructions::ENA => INST_ENA,
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Chip8CpuInstructions::ORY(_, _) => "ORY",
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Chip8CpuInstructions::ORY(_, _) => INST_ORY,
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XXXXERRORINSTRUCTION => "XX ERROR XX",
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XXXXERRORINSTRUCTION => "XX ERROR XX",
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}
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}
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}
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}
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@ -889,7 +889,6 @@ impl Chip8CpuInstructions {
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println!("SCROLLING LEFT 4 LINES");
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println!("SCROLLING LEFT 4 LINES");
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}
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}
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Chip8CpuInstructions::DIS => {
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Chip8CpuInstructions::DIS => {
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println!("DISABLE VIDEO MODE");
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println!("DISABLE VIDEO MODE");
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}
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}
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Chip8CpuInstructions::ENA => {
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Chip8CpuInstructions::ENA => {
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@ -39,3 +39,27 @@ pub const INST_LDRD: &str = "LDRD";
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pub const INST_LDRI: &str = "LDRI";
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pub const INST_LDRI: &str = "LDRI";
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pub const INST_LDRK: &str = "LDRK";
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pub const INST_LDRK: &str = "LDRK";
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pub const INST_LDRY: &str = "LDRY";
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pub const INST_LDRY: &str = "LDRY";
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pub const INST_OR: &str = "OR";
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pub const INST_RET: &str = "RET";
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pub const INST_RND: &str = "RND";
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pub const INST_SDN: &str = "SDN";
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pub const INST_SRT: &str = "SRT";
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pub const INST_SLF: &str = "SLF";
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pub const INST_SEX: &str = "SEX";
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pub const INST_SEY: &str = "SEY";
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pub const INST_SHL: &str = "SHL";
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pub const INST_SHR: &str = "SHR";
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pub const INST_SKP: &str = "SKP";
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pub const INST_SNEB: &str = "SNEB";
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pub const INST_SNEY: &str = "SNEY";
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pub const INST_SNKP: &str = "SNKP";
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pub const INST_STR : &str = "STR";
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pub const INST_SUB: &str = "SUB";
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pub const INST_SUBC: &str = "SUBC";
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pub const INST_SYS: &str = "SYS";
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pub const INST_DIS: &str = "DIS";
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pub const INST_ENA: &str = "ENA";
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pub const INST_ORY: &str = "ORY";
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@ -15,34 +15,50 @@ struct DisassemblerApp {
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output_file: Option<Box<Path>>,
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output_file: Option<Box<Path>>,
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}
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}
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struct Disassembler {}
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impl Disassembler {
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pub fn disassemble(from_data: Vec<u8>) -> String {
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String::new()
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}
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}
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fn main() {
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fn main() {
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println!("Taxation is Theft");
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println!("Taxation is Theft");
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let result = DisassemblerApp::parse();
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let result = DisassemblerApp::parse();
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println!("PREPARING TO DISASSEMBLE {:?}", result.input_file.file_name());
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println!("PREPARING TO DISASSEMBLE {:?}", result.input_file.file_name());
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let mut last_byte: u8 = 0x00;
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// let target_file =
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let source_file = result.input_file.to_str().unwrap();
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let mut working_instruction: u16 = 0x0000;
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let mut working_instruction: u16 = 0x0000;
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let mut dump_as_data: bool = false;
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// read the input file and loop through it byte by byte.
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// read the input file and loop through it byte by byte.
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for (offset, byte) in std::fs::read(result.input_file).unwrap().iter().enumerate() {
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let mut output_string = String::new();
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for (offset, byte) in std::fs::read(source_file).unwrap().iter().enumerate() {
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working_instruction = (working_instruction << 8) | (*byte as u16);
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working_instruction = (working_instruction << 8) | (*byte as u16);
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if offset % 2 != 0 {
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if offset % 2 != 0 {
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let decoded = Chip8CpuInstructions::decode(working_instruction);
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let decoded = Chip8CpuInstructions::decode(working_instruction);
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let decoded_string = decoded.to_string();
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let mut current_parts = String::new();
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match decoded {
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match decoded {
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XXXXERRORINSTRUCTION => {
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XXXXERRORINSTRUCTION => {
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println!("DW 0x{working_instruction:04x}{:>16}; {working_instruction:04x}", " ");
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current_parts = format!("DW 0x{:04x}", working_instruction);
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}
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Chip8CpuInstructions::JPA(x) => {
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if (offset + 0x200) == x as usize {
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println!("INFINITE LOOP")
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}
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}
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}
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_ => {
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_ => {
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let fill_len = 25 - decoded.to_string().len();
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current_parts = format!("{}", decoded);
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println!("{}{:<fill_len$}; Bytes [{:04x}] offset [{:04x}]", decoded, " ", working_instruction, offset - 1);
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}
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}
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}
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};
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let target_length: i32 = 25;
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let spacing_length = target_length.saturating_sub(current_parts.len() as i32);
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// now add the rest after the string
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let x = spacing_length as usize;
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current_parts = format!("{}{:<x$}; Bytes [0x{:04x}] offset [0x{:04x}]\n", current_parts, " ", working_instruction, offset -1);
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// println!("SHOULD OUTPUT: [{current_parts}]");
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output_string = output_string.to_string() + &*current_parts.to_string();
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working_instruction = 0x0000;
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working_instruction = 0x0000;
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}
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}
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}
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}
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@ -50,9 +66,21 @@ fn main() {
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match result.output_file {
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match result.output_file {
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None => {
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None => {
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println!("Output to console.");
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println!("Output to console.");
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println!("OS: \n\n{}", output_string);
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}
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}
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Some(target) => {
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Some(target) => {
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println!("Output to {:?}", target);
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println!("Output to {:?}", target);
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std::fs::write(target, output_string).unwrap();
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}
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}
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}
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}
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}
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}
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mod test {
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#[test]
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fn smoke() { assert!(true); }
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#[test]
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fn assemble_test_file() {
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}
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}
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36
resources/test/gemma_disassembler_manual_document.asc
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36
resources/test/gemma_disassembler_manual_document.asc
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@ -0,0 +1,36 @@
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CLS ; Bytes [0x00e0] offset [0x0000]
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RET ; Bytes [0x00ee] offset [0x0002]
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SYS 0x0123 ; Bytes [0x0123] offset [0x0004]
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JPA 0x0123 ; Bytes [0x1123] offset [0x0006]
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CALL 0x0123 ; Bytes [0x2123] offset [0x0008]
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SEX 0x01, 0x23 ; Bytes [0x3123] offset [0x000a]
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SNEB 0x01, 0x23 ; Bytes [0x4123] offset [0x000c]
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SEY 0x01, 0x02 ; Bytes [0x5120] offset [0x000e]
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LDR 0x01, 0x23 ; Bytes [0x6123] offset [0x0010]
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ADD 0x01, 0x23 ; Bytes [0x7123] offset [0x0012]
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LDRY 0x01, 0x02 ; Bytes [0x8120] offset [0x0014]
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OR 0x01, 0x02 ; Bytes [0x8121] offset [0x0016]
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AND 0x01, 0x02 ; Bytes [0x8122] offset [0x0018]
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ORY 0x01, 0x02 ; Bytes [0x8123] offset [0x001a]
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ADDR 0x01, 0x02 ; Bytes [0x8124] offset [0x001c]
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SUB 0x01, 0x02 ; Bytes [0x8125] offset [0x001e]
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SHR 0x01, 0x02 ; Bytes [0x8126] offset [0x0020]
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SUBC 0x01, 0x02 ; Bytes [0x8127] offset [0x0022]
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SHL 0x01, 0x02 ; Bytes [0x812e] offset [0x0024]
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SNEY 0x01, 0x02 ; Bytes [0x9120] offset [0x0026]
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LDIA 0x0123 ; Bytes [0xa123] offset [0x0028]
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JPI 0x0123 ; Bytes [0xb123] offset [0x002a]
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RND 0x01, 0x23 ; Bytes [0xc123] offset [0x002c]
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DRW 0x01, 0x02, 0x03 ; Bytes [0xd123] offset [0x002e]
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SKP 0x01 ; Bytes [0xe19e] offset [0x0030]
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SNKP ; Bytes [0xe1a1] offset [0x0032]
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LDRD 0x01 ; Bytes [0xf107] offset [0x0034]
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LDRK 0x01 ; Bytes [0xf10a] offset [0x0036]
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LDD 0x01 ; Bytes [0xf115] offset [0x0038]
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LIDS 0x01 ; Bytes [0xf118] offset [0x003a]
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ADDI 0x01 ; Bytes [0xf11e] offset [0x003c]
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LDF 0x01 ; Bytes [0xf129] offset [0x003e]
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BCD 0x01 ; Bytes [0xf133] offset [0x0040]
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LDIX 0x01 ; Bytes [0xf155] offset [0x0042]
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LDRI 0x01 ; Bytes [0xf165] offset [0x0044]
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DW 0xffff ; Bytes [0xffff] offset [0x0046]
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BIN
resources/test/gemma_disassembler_manual_document.ch8
Normal file
BIN
resources/test/gemma_disassembler_manual_document.ch8
Normal file
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