adds better handling for invalid instructions

adds tests for invalid instructions
adds tarpaulin for generating coverage
This commit is contained in:
Trevor Merritt 2024-09-26 12:46:26 -04:00
parent 9c60454270
commit 7436200a6f
3 changed files with 46 additions and 6 deletions

5
.cargo/config.toml Normal file
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@ -0,0 +1,5 @@
[alias]
coverage = "tarpaulin --out Html --skip-clean"
[build]
rustc-wrapper = "sccache"

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@ -102,9 +102,30 @@ mod test {
#[test]
fn decoder_test_invalid_instructions() {
// 'bad' instructions that should be dropped...
// assert!(matches!(Chip8Computer::decode_instruction(0x5ab1), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// assert!(matches!(Chip8Computer::decode_instruction(0x8ab8), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// assert!(matches!(Chip8Computer::decode_instruction(0xeaba), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// 5xy0 is the only valid 5 series.
assert!(matches!(Chip8CpuInstructions::decode(0x5ab1), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0x5abf), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// 8__8 -> 8__D and 8__F are invalid
assert!(matches!(Chip8CpuInstructions::decode(0x8ab8), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0x8abd), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0x8abf), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// 9__1 -> 9__F are invalid
assert!(matches!(Chip8CpuInstructions::decode(0x9ab1), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0x9abf), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// Only valid E suffixes are 9E and A1
assert!(matches!(Chip8CpuInstructions::decode(0xea9d), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0xea9f), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0xeaa0), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0xeaa2), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
// oh god f is a mess.
assert!(matches!(Chip8CpuInstructions::decode(0xf006), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
assert!(matches!(Chip8CpuInstructions::decode(0xf008), Chip8CpuInstructions::XXXXERRORINSTRUCTION));
}
#[test]
@ -120,6 +141,9 @@ mod test {
let test_computer = Chip8Computer::new_with_program(new_program);
// ...and check the registers
// let (high, low) = InstructionUtil::split_bytes(Chip8CpuInstructions::LdVxI(0x10).encode());
// assert_eq!(test_computer.memory.peek(0x200), high);
// assert_eq!(test_computer.memory.peek(0x201), low);
}
}

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@ -1,3 +1,4 @@
use imgui::ColorPicker3;
use log::debug;
use rand::random;
use crate::chip8::computer::{Chip8Computer};
@ -213,7 +214,13 @@ impl Chip8CpuInstructions {
0x5000..=0x5FF0 => {
// 5xy0 - SE Vx, Vy
// Skip next instruction if Vx = Vy.
Chip8CpuInstructions::SeVxVy(x_param, y_param)
// if the last nibble isn't 0...
if 0xf & input > 0 {
// ... we have a problem.
Chip8CpuInstructions::XXXXERRORINSTRUCTION
} else {
Chip8CpuInstructions::SeVxVy(x_param, y_param)
}
}
0x6000..=0x6FFF => {
// 6xkk - LD Vx, byte
@ -265,13 +272,17 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::ShlVxVy(x_param, y_param)
}
_ => {
panic!("UNABLE TO DECODE 0x8000 SERIES INSTRUCTION");
Chip8CpuInstructions::XXXXERRORINSTRUCTION
}
}
}
0x9000..=0x9FF0 => {
// SNE Vx, Vy
Chip8CpuInstructions::SneVxVy(x_param, y_param)
if 0xf & input > 0 {
XXXXERRORINSTRUCTION
} else {
Chip8CpuInstructions::SneVxVy(x_param, y_param)
}
}
0xA000..=0xAFFF => {
// LD I, Addr