WIP
richer test suite Updates imgui to have target ips and limits correctly. Initial IPS = 1000, plan to expose to user More tests for encode/decode of instructions Adding text to instruction parsing
This commit is contained in:
@@ -1,6 +1,7 @@
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use log::{debug};
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use crate::chip8::delay_timer::DelayTimer;
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use crate::chip8::keypad::Keypad;
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use crate::chip8::quirk_modes::QuirkMode;
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use crate::chip8::registers::Chip8Registers;
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use crate::chip8::sound_timer::SoundTimer;
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use crate::chip8::stack::Chip8Stack;
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@@ -19,7 +20,8 @@ pub struct Chip8Computer {
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pub video_memory: Chip8Video,
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pub state: Chip8CpuStates,
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pub keypad: Keypad,
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pub stack: Chip8Stack
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pub stack: Chip8Stack,
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pub quirk_mode: QuirkMode
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}
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impl Default for Chip8Computer {
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fn default() -> Self {
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@@ -32,7 +34,8 @@ impl Default for Chip8Computer {
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delay_timer: DelayTimer::new(),
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state: Chip8CpuStates::default(),
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keypad: Keypad::default(),
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stack: Chip8Stack::default()
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stack: Chip8Stack::default(),
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quirk_mode: QuirkMode::default()
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}
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}
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}
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@@ -45,6 +48,8 @@ impl Chip8Computer {
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self.delay_timer.reset();
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self.sound_timer.reset();
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self.stack.reset();
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self.memory.reset();
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self.quirk_mode = QuirkMode::Chip8;
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}
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pub fn dump_keypad_to_string(&self) -> String {
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@@ -23,7 +23,7 @@ impl Default for Chip8ComputerManager {
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fn default() -> Self {
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Chip8ComputerManager {
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core_should_run: false,
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one_step: true,
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one_step: false,
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core_cycle_timer: false,
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core_last_cycle_start: Instant::now() ,
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computer: Chip8Computer::new()
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@@ -32,18 +32,16 @@ impl Default for Chip8ComputerManager {
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}
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impl Chip8ComputerManager {
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pub fn reset(&mut self) {
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self.one_step = false;
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self.core_should_run = false;
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self.computer.reset();
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}
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pub fn new() -> Chip8ComputerManager {
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let core_handle = thread::spawn(move || {
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loop {
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let start_time = Instant::now();
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// println!("Core Thread starting at {start_time:?}");
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let sleep_time = Instant::now().duration_since(start_time).as_millis();
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// println!("Core Thread sleeping for {sleep_time}ms");
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sleep(Duration::from_millis((16 - sleep_time) as u64));
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}
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});
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@@ -67,13 +65,15 @@ impl Chip8ComputerManager {
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&self.computer
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}
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pub fn tick( &mut self) {
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pub fn tick( &mut self) -> bool {
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// println!("STARTING TICK");
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let mut did_tick: bool = false;
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if self.one_step | self.core_should_run {
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match self.computer.state {
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WaitingForInstruction => {
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self.core_last_cycle_start = Instant::now();
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self.computer.step_system();
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did_tick = true
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// println!("SYSTEM STEP");
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}
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_ => {}
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@@ -84,7 +84,9 @@ impl Chip8ComputerManager {
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// stop the CPU for the next cycle, we are only
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// wanting one step.
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self.one_step = false;
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did_tick = true;
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}
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did_tick
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}
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pub fn press_key(&mut self, key_index: u8) {
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@@ -1,10 +1,10 @@
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#[derive(Clone, Copy)]
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pub struct DelayTimer {
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counter: i32
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counter: u8
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}
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impl DelayTimer {
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pub fn current(&self) -> i32 {
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pub fn current(&self) -> u8 {
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self.counter
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}
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@@ -18,8 +18,8 @@ impl DelayTimer {
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self.counter = 0xff;
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}
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pub fn set_timer(&mut self, new_value: i32) {
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self.counter = new_value
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pub fn set_timer(&mut self, new_value: u8) {
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self.counter = new_value as u8
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}
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pub fn tick(&mut self) {
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+136
-22
@@ -2,11 +2,12 @@ use std::arch::x86_64::_mm_xor_pd;
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use std::fmt::{Debug, Display, Formatter};
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use std::ops::{BitAnd, Deref, Shr};
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use std::time::Instant;
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use chrono::ParseMonthError;
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use log::debug;
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use rand::{random, Rng};
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use crate::chip8::computer::{Chip8Computer};
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use crate::chip8::cpu_states::Chip8CpuStates::WaitingForKey;
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use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION;
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use crate::chip8::instructions::Chip8CpuInstructions::*;
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use crate::chip8::util::InstructionUtil;
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use crate::constants::{*};
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@@ -188,7 +189,7 @@ pub enum Chip8CpuInstructions {
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/// Set sound timer = Vx.
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///
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/// ST is set equal to the value of Vx.
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LDI_S(u8),
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LDIS(u8),
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/// Fx1E - ADD I, Vx
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/// Set I = I + Vx.
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///
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@@ -280,7 +281,7 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::LDIA(_) => INST_LDIA,
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Chip8CpuInstructions::LDIX(_) => INST_LDIX,
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Chip8CpuInstructions::LIDR(_) => INST_LIDR,
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Chip8CpuInstructions::LDI_S(_) => INST_LIDS,
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Chip8CpuInstructions::LDIS(_) => INST_LDIS,
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Chip8CpuInstructions::LDR(_, _) => INST_LDR,
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Chip8CpuInstructions::LDRD(_) => INST_LDRD,
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Chip8CpuInstructions::LDRI(_) => INST_LDRI,
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@@ -327,6 +328,7 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::ADD(x, byte) => {
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format!("0x{x:02x}, 0x{byte:02x}")
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}
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// Reg, Reg
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Chip8CpuInstructions::SEY(x, y) |
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Chip8CpuInstructions::LDR_Y(x, y) |
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Chip8CpuInstructions::OR(x, y) |
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@@ -338,50 +340,162 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::SUBC(x, y) |
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Chip8CpuInstructions::SHL(x, y) |
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Chip8CpuInstructions::SNEY(x, y) => {
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format!("0x{x:02x}, 0x{y:02x}")
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format!("0x{x:01x}, 0x{y:01x}")
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}
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// Reg, Reg, Nibble
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Chip8CpuInstructions::DRW(x, y, nibble) => {
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format!("0x{x:02x}, 0x{y:02x}, 0x{nibble:02x}")
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}
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// Registers. 0-F
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Chip8CpuInstructions::LDD(x) |
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Chip8CpuInstructions::LDI_S(x) |
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Chip8CpuInstructions::LDIS(x) |
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Chip8CpuInstructions::ADDI(x) |
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Chip8CpuInstructions::LDFX(x) |
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Chip8CpuInstructions::BCD(x) |
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Chip8CpuInstructions::LDIX(x) |
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Chip8CpuInstructions::SKP(x) |
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Chip8CpuInstructions::LDRD(x) |
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Chip8CpuInstructions::LDRK(x) |
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Chip8CpuInstructions::LDRI(x) |
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Chip8CpuInstructions::LDF2(x) |
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Chip8CpuInstructions::STR(x) |
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Chip8CpuInstructions::LIDR(x) |
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Chip8CpuInstructions::SDN(x) |
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Chip8CpuInstructions::SKNP(x) |
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Chip8CpuInstructions::SKP(x) => {
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format!("0x{x:02x}")
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}
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_ => { String::new() }
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Chip8CpuInstructions::EXIT |
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Chip8CpuInstructions::ENA |
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Chip8CpuInstructions::DIS |
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Chip8CpuInstructions::SLF |
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Chip8CpuInstructions::XXXXERRORINSTRUCTION |
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Chip8CpuInstructions::SRT |
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Chip8CpuInstructions::CLS |
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Chip8CpuInstructions::RET => {
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String::new()
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}
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}
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}
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}
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impl Display for Chip8CpuInstructions {
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fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
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write!(f, "{} {}", self.name(), self.operands())
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let ops = self.operands();
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let space = if ops.is_empty() { "" } else { " " };
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write!(f, "{}{}{}", self.name(), space, ops)
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}
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}
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impl Chip8CpuInstructions {
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pub fn from_str(input: &str) -> Chip8CpuInstructions {
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let parts = input.split(" ");
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println!("THERE ARE {} PARTS", parts.count());
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XXXXERRORINSTRUCTION
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//
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// match input.to_uppercase().as_str() {
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// INST_ADDI => Chip8CpuInstructions::ADDI(parts.nth(1)),
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// INST_ADD => Chip8CpuInstructions::ADD(parts[1], parts[2]),
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// INST_ADDR => Chip8CpuInstructions::ADDR(parts[1], parts[2]),
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// _ => XXXXERRORINSTRUCTION
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// }
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let mut parts = input.split(" ");
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// print!("THERE ARE {} PARTS", parts.clone().count());
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let first_part = parts.next().unwrap_or("");
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// take the next value...
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// ...strip off the extra...
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// ...convert it to an integer from base 16
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let param1 = u16::from_str_radix(parts.next().unwrap_or("0").trim_start_matches("0x").trim_end_matches(","), 16).unwrap_or(0);
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let param2 = u16::from_str_radix(parts.next().unwrap_or("0").trim_start_matches("0x").trim_end_matches(","), 16).unwrap_or(0);
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let param3 = u16::from_str_radix(parts.next().unwrap_or("0").trim_start_matches("0x").trim_end_matches(","), 16).unwrap_or(0);
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// println!("\tFirst part is {:?} / {:?} / {:?} / {:?}", first_part, param1 ,param2 ,param3);
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match first_part {
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INST_CLS => {
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CLS
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}
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INST_DRW => {
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DRW(param1 as u8, param2 as u8, param3 as u8)
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}
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INST_ADD => {
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ADD(param1 as u8, param2 as u8)
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}
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INST_CALL => {
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CALL(param1)
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}
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INST_SYS => {
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SYS(param1)
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}
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INST_RET => {
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RET
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}
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INST_JPA => {
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JPA(param1)
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}
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INST_JPI => {
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JPI(param1)
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}
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INST_SEX => {
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SEX(param1 as u8, param2 as u8)
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}
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INST_SNEB => {
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SNEB(param1 as u8, param2 as u8)
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}
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INST_SDN => {
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SDN(param1 as u8)
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}
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INST_SRT => {
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SRT
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}
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INST_SLF => {
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SLF
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}
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INST_EXIT => {
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EXIT
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}
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INST_DIS => {
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DIS
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}
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INST_ENA => {
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ENA
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}
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INST_SEY => {
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SEY(param1 as u8, param2 as u8)
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}
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INST_LDRY => {
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LDR_Y(param1 as u8, param2 as u8)
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}
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INST_LDR => {
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LDR(param1 as u8, param2 as u8)
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}
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INST_OR => {
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OR(param1 as u8, param2 as u8)
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}
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INST_AND => {
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AND(param1 as u8, param2 as u8)
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}
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INST_ORY => {
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ORY(param1 as u8, param2 as u8)
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}
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INST_ADDR => {
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ADDR(param1 as u8, param2 as u8)
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}
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INST_SUB => {
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SUB(param1 as u8, param2 as u8)
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}
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INST_SHR => {
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SHR(param1 as u8, param2 as u8)
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}
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INST_SHL => {
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SHL(param1 as u8, param2 as u8)
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}
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INST_SUBC => {
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SUBC(param1 as u8, param2 as u8)
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}
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INST_SNEY => {
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SNEY(param1 as u8, param2 as u8)
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}
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INST_LDIA => {
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LDIA(param1)
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}
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INST_RND => {
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RND(param1 as u8, param2 as u8)
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}
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INST_DRW => {
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DRW(param1 as u8, param2 as u8, param3 as u8)
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}
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_ => {
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XXXXERRORINSTRUCTION
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}
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}
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}
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pub fn encode(&self) -> u16 {
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@@ -417,7 +531,7 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::LDRD(x_register) => 0xF007 | ((*x_register as u16) << 8),
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Chip8CpuInstructions::LDRK(x_register) => 0xF00A | ((*x_register as u16) << 8),
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Chip8CpuInstructions::LDD(x_register) => 0xF015 | ((*x_register as u16) << 8),
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Chip8CpuInstructions::LDI_S(x_register) => 0xF018 | ((*x_register as u16) << 8),
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Chip8CpuInstructions::LDIS(x_register) => 0xF018 | ((*x_register as u16) << 8),
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Chip8CpuInstructions::ADDI(x_register) => 0xF01E | ((*x_register as u16) << 8),
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Chip8CpuInstructions::LDFX(x_register) => 0xF029 | ((*x_register as u16) << 8),
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Chip8CpuInstructions::BCD(x_register) => 0xF033 | ((*x_register as u16) << 8),
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@@ -488,7 +602,7 @@ impl Chip8CpuInstructions {
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0x07 => Chip8CpuInstructions::LDRD(ubln),
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0x0A => Chip8CpuInstructions::LDRK(ubln),
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0x15 => Chip8CpuInstructions::LDD(ubln),
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0x18 => Chip8CpuInstructions::LDI_S(ubln),
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0x18 => Chip8CpuInstructions::LDIS(ubln),
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0x1E => Chip8CpuInstructions::ADDI(ubln),
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0x29 => Chip8CpuInstructions::LDFX(ubln),
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0x30 => Chip8CpuInstructions::LDF2(ubln),
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@@ -816,9 +930,9 @@ impl Chip8CpuInstructions {
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//
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// DT is set equal to the value of Vx.
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let new_time = input.registers.peek(*source_register as u8);
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input.delay_timer.set_timer(new_time as i32);
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input.delay_timer.set_timer(new_time);
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}
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Chip8CpuInstructions::LDI_S(new_time) => {
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Chip8CpuInstructions::LDIS(new_time) => {
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let new_value = input.registers.peek(*new_time as u8);
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input.sound_timer.set_timer(new_value as i32);
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}
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@@ -11,15 +11,17 @@ impl Keypad {
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// draw a 4x4 grid showing the keys with * filling the cells that are depressed
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for row in CHIP8_KEYBOARD.iter() {
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for (index, key) in row.iter().enumerate() {
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let is_lit = if self.keys[*key as usize] { "*".to_string() } else { char::from_digit(*key as u32, 16).unwrap_or(' ').to_string() };
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match index {
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3 => {
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// last in col
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return_value += format!("|{}|\n", is_lit).as_str();
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}
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_=> {
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return_value += format!("|{}", is_lit).as_str();
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}
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let is_lit = if self.keys[*key as usize] {
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"*".to_string()
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} else {
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char::from_digit(*key as u32, 16).unwrap_or(' ').to_string()
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};
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if index == 3 {
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return_value += format!("|{}|\n", is_lit).as_str();
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} else {
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return_value += format!("|{}", is_lit).as_str();
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}
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}
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}
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@@ -0,0 +1,8 @@
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#[derive(Default, Clone)]
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pub enum QuirkMode {
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#[default]
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Chip8,
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SChipLegacy,
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XOChip,
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SChipModern
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}
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@@ -20,6 +20,12 @@ impl Default for Chip8SystemMemory {
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}
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}
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impl Chip8SystemMemory {
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pub fn reset(&mut self){
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self.memory = [0x00; CHIP8_MEMORY_SIZE as usize];
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self.load_fonts_to_memory();
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self.load_schip_fonts_to_memory();
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}
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pub fn new() -> Self {
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Chip8SystemMemory {
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@@ -136,10 +136,9 @@ impl Chip8Video {
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(CHIP8_VIDEO_WIDTH, CHIP8_VIDEO_HEIGHT)
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}
|
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}
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fn get_memory_size(&self) -> i32 {
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let w = self.get_resolution();
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w.1 * w.0
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let (width, height) = self.get_resolution();
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width * height
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}
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pub fn tick(&mut self) {
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@@ -36,7 +36,7 @@ pub const INST_LDF2: &str = "LDF2";
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pub const INST_LDIA: &str = "LDIA";
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pub const INST_LDIX: &str = "LDIX";
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pub const INST_LIDR: &str = "LIDR";
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pub const INST_LIDS: &str = "LIDS";
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pub const INST_LDIS: &str = "LIDS";
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pub const INST_LDR: &str = "LDR";
|
||||
pub const INST_LDRD: &str = "LDRD";
|
||||
pub const INST_LDRI: &str = "LDRI";
|
||||
|
||||
+1
-1
@@ -11,8 +11,8 @@ pub mod chip8 {
|
||||
pub mod registers;
|
||||
|
||||
pub mod stack;
|
||||
|
||||
pub mod computer_manager;
|
||||
pub mod quirk_modes;
|
||||
}
|
||||
|
||||
pub mod constants;
|
||||
+333
-8
@@ -1,8 +1,10 @@
|
||||
use std::collections::{BTreeMap, BTreeSet};
|
||||
use log::debug;
|
||||
use rand::random;
|
||||
use gemma::chip8::computer::Chip8Computer;
|
||||
use gemma::chip8::delay_timer::DelayTimer;
|
||||
use gemma::chip8::instructions::Chip8CpuInstructions;
|
||||
use gemma::chip8::instructions::Chip8CpuInstructions::JPA;
|
||||
use gemma::chip8::keypad::Keypad;
|
||||
use gemma::chip8::registers::Chip8Registers;
|
||||
use gemma::chip8::sound_timer::SoundTimer;
|
||||
@@ -11,7 +13,7 @@ use gemma::chip8::util::InstructionUtil;
|
||||
use gemma::chip8::video::Chip8Video;
|
||||
use gemma::constants::*;
|
||||
|
||||
const TEST_OUTPUT_SAMPLE_DIR: &str = "/home/tmerritt/Projects/trevors_chip8_toy/resources/test/";
|
||||
const TEST_OUTPUT_SAMPLE_DIR: &str = "/home/tmerritt/Projects/chip8_toy/resources/test/";
|
||||
|
||||
fn read_test_result(suffix: &str) -> String {
|
||||
std::fs::read_to_string(TEST_OUTPUT_SAMPLE_DIR.to_owned() + suffix)
|
||||
@@ -54,7 +56,7 @@ fn encode_decode_test() {
|
||||
assert_eq!(Chip8CpuInstructions::LDRD(0x1).encode(), 0xf107);
|
||||
assert_eq!(Chip8CpuInstructions::LDRK(0x4).encode(), 0xf40a);
|
||||
assert_eq!(Chip8CpuInstructions::LDD(0x6).encode(), 0xf615);
|
||||
assert_eq!(Chip8CpuInstructions::LDI_S(0xb).encode(), 0xfb18);
|
||||
assert_eq!(Chip8CpuInstructions::LDIS(0xb).encode(), 0xfb18);
|
||||
assert_eq!(Chip8CpuInstructions::ADDI(0xd).encode(), 0xfd1e);
|
||||
assert_eq!(Chip8CpuInstructions::LDFX(0xc).encode(), 0xfc29);
|
||||
assert_eq!(Chip8CpuInstructions::BCD(0xd).encode(), 0xfd33);
|
||||
@@ -110,7 +112,7 @@ fn encode_decode_test() {
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf107), Chip8CpuInstructions::LDRD(0x1)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf40a), Chip8CpuInstructions::LDRK(0x4)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xf615), Chip8CpuInstructions::LDD(0x6)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LDI_S(0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LDIS(0xb)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd1e), Chip8CpuInstructions::ADDI(0xd)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfc29), Chip8CpuInstructions::LDFX(0xc)));
|
||||
assert!(matches!(Chip8CpuInstructions::decode(0xfd33), Chip8CpuInstructions::BCD(0xd)));
|
||||
@@ -334,7 +336,7 @@ fn addivx_test() {
|
||||
fn ldstvt_test() {
|
||||
let mut x = Chip8Computer::new();
|
||||
x.registers.poke(0x1, 0xf0);
|
||||
Chip8CpuInstructions::LDI_S(0x01).execute(&mut x);
|
||||
Chip8CpuInstructions::LDIS(0x01).execute(&mut x);
|
||||
assert_eq!(x.sound_timer.current(), 0xf0);
|
||||
x.sound_timer.tick();
|
||||
x.sound_timer.tick();
|
||||
@@ -565,7 +567,6 @@ fn subn_vx_vy_test() {
|
||||
assert_eq!(x.registers.peek_pc(), 0x206);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn draw_nibble_vx_vy_n_test_hd() {
|
||||
let mut x = Chip8Computer::new();
|
||||
|
||||
@@ -770,6 +771,15 @@ fn keypad_keys_check() {
|
||||
assert!(k.released(1));
|
||||
}
|
||||
|
||||
|
||||
#[test]
|
||||
fn keypad_string_format_test() {
|
||||
let mut k = Keypad::new();
|
||||
|
||||
|
||||
assert_eq!(k.format_as_string(), read_test_result("gemma_keypad_string_result.asc"));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn register_rw_test() {
|
||||
let mut x = Chip8Registers::default();
|
||||
@@ -853,7 +863,7 @@ fn stack_push_pop_test() {
|
||||
#[should_panic]
|
||||
fn stack_overflow_test() {
|
||||
let mut x = Chip8Stack::new();
|
||||
for i in 0..17 {
|
||||
for i in 0..17 {
|
||||
x.push(&i);
|
||||
}
|
||||
}
|
||||
@@ -894,7 +904,6 @@ fn stack_lots_of_subs() {
|
||||
}
|
||||
assert_eq!(x.depth(), 15);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -945,7 +954,6 @@ fn instruction_byte_to_bool_changes() {
|
||||
}
|
||||
|
||||
|
||||
|
||||
fn real_build_checkboard(in_hd: bool) -> Chip8Video {
|
||||
let mut r = Chip8Video::default();
|
||||
let (width, height) = if in_hd {
|
||||
@@ -1318,3 +1326,320 @@ fn video_scroll_right_4_row_test_high_def() {
|
||||
x.scroll_right();
|
||||
assert_eq!(read_test_result("test_scroll_right_4_hd.asc"), x.format_as_string());
|
||||
}
|
||||
|
||||
struct InstructionTest {
|
||||
name: String,
|
||||
instruction: Chip8CpuInstructions,
|
||||
asm: String,
|
||||
encoded: u16,
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn instructions_name_tests() {
|
||||
assert_eq!(Chip8CpuInstructions::SYS(0x0000).name(), INST_SYS);
|
||||
assert_eq!(Chip8CpuInstructions::ADD(0x0, 0x1).name(), INST_ADD);
|
||||
assert_eq!(Chip8CpuInstructions::ADDI(0x0).name(), INST_ADDI);
|
||||
assert_eq!(Chip8CpuInstructions::ADDR(0x01, 0x02).name(), INST_ADDR);
|
||||
assert_eq!(Chip8CpuInstructions::AND(0x01, 0x02).name(), INST_AND);
|
||||
|
||||
let it = vec![
|
||||
InstructionTest {
|
||||
name: INST_SYS.to_string(),
|
||||
instruction: Chip8CpuInstructions::SYS(0x123),
|
||||
asm: "SYS 0x0123".to_string(),
|
||||
encoded: 0x0123
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_CLS.to_string(),
|
||||
instruction: Chip8CpuInstructions::CLS,
|
||||
asm: "CLS".to_string(),
|
||||
encoded: 0x00E0
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_RET.to_string(),
|
||||
instruction: Chip8CpuInstructions::RET,
|
||||
asm: "RET".to_string(),
|
||||
encoded: 0x00ee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPA.to_string(),
|
||||
instruction: JPA(0x234),
|
||||
asm: "JPA 0x0234".to_string(),
|
||||
encoded: 0xb234
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_CALL.to_string(),
|
||||
instruction: Chip8CpuInstructions::CALL(0x123),
|
||||
asm: "CALL 0x0123".to_string(),
|
||||
encoded: 0x2123,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_DRW.to_string(),
|
||||
instruction: Chip8CpuInstructions::DRW(0x01, 0x02, 0x03),
|
||||
asm: "DRW 0x01, 0x02, 0x03".to_string(),
|
||||
encoded: 0xd123
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPI.to_string(),
|
||||
instruction: Chip8CpuInstructions::JPI(0x321),
|
||||
asm: "JPI 0x0321".to_string(),
|
||||
encoded: 0xb321
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SDN.to_string(),
|
||||
instruction: Chip8CpuInstructions::SDN(0x01),
|
||||
asm: "SDN 0x01".to_string(),
|
||||
encoded: 0x00c1
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SRT.to_string(),
|
||||
instruction: Chip8CpuInstructions::SRT,
|
||||
asm: "SRT".to_string(),
|
||||
encoded: 0x00FB
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SLF.to_string(),
|
||||
instruction: Chip8CpuInstructions::SLF,
|
||||
asm: "SLF".to_string(),
|
||||
encoded: 0x00FC,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_EXIT.to_string(),
|
||||
instruction: Chip8CpuInstructions::EXIT,
|
||||
asm: "EXIT".to_string(),
|
||||
encoded: 0x00FD,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_DIS.to_string(),
|
||||
instruction: Chip8CpuInstructions::DIS,
|
||||
asm: "DIS".to_string(),
|
||||
encoded: 0x00FE,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ENA.to_string(),
|
||||
instruction: Chip8CpuInstructions::ENA,
|
||||
asm: "ENA".to_string(),
|
||||
encoded: 0x00FF,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SEX.to_string(),
|
||||
instruction: Chip8CpuInstructions::SEX(0x01, 0xfa),
|
||||
asm: "SEX 0x01, 0xfa".to_string(),
|
||||
encoded: 0x32fa,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SNEB.to_string(),
|
||||
instruction: Chip8CpuInstructions::SNEB(0x01, 0xab),
|
||||
asm: "SNEB 0x01, 0xab".to_string(),
|
||||
encoded: 0x41ab,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SEY.to_string(),
|
||||
instruction: Chip8CpuInstructions::SEY(0x1, 0x2),
|
||||
asm: "SEY 0x1, 0x2".to_string(),
|
||||
encoded: 0x5120
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDR.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDR(0xa, 0xbe),
|
||||
asm: "LDR 0x0a, 0xbe".to_string(),
|
||||
encoded: 0x6abe,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADD.to_string(),
|
||||
instruction: Chip8CpuInstructions::ADD(0x01, 0xab),
|
||||
asm: "ADD 0x01, 0xab".to_string(),
|
||||
encoded: 0x71ab
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRY.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDR_Y(0x1, 0x2),
|
||||
asm: "LDRY 0x1, 0x2".to_string(),
|
||||
encoded: 0x8120,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_OR.to_string(),
|
||||
instruction: Chip8CpuInstructions::OR(0x1, 0x2),
|
||||
asm: "OR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8121
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_AND.to_string(),
|
||||
instruction: Chip8CpuInstructions::AND(0xb, 0xc),
|
||||
asm: "AND 0xb, 0xc".to_string(),
|
||||
encoded: 0x8bc2,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ORY.to_string(),
|
||||
instruction: Chip8CpuInstructions::ORY(0xa, 0x3),
|
||||
asm: "ORY 0xa, 0x3".to_string(),
|
||||
encoded: 0x8a33
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADDR.to_string(),
|
||||
instruction: Chip8CpuInstructions::ADDR(0x1, 0x2),
|
||||
asm: "ADDR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8124
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUB.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUB(0x4, 0x5),
|
||||
asm: "SUB 0x4, 0x5".to_string(),
|
||||
encoded: 0x8455
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SHR.to_string(),
|
||||
instruction: Chip8CpuInstructions::SHR(0x01, 0x1),
|
||||
asm: "SHR 0x1, 0x1".to_string(),
|
||||
encoded: 0x8116,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUBC.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUBC(0xf, 0xa),
|
||||
asm: "SUBC 0xf, 0xa".to_string(),
|
||||
encoded: 0x8fa7,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SHL.to_string(),
|
||||
instruction: Chip8CpuInstructions::SHL(0x1, 0x4),
|
||||
asm: "SHL 0x1, 0x4".to_string(),
|
||||
encoded: 0x814e,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SNEY.to_string(),
|
||||
instruction: Chip8CpuInstructions::SNEY(0x4, 0x5),
|
||||
asm: "SNEY 0x4, 0x5".to_string(),
|
||||
encoded: 0x9450,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIA.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIA(0xbee),
|
||||
asm: "LDIA 0x0bee".to_string(),
|
||||
encoded: 0x9bee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPI.to_string(),
|
||||
instruction: Chip8CpuInstructions::JPI(0xfee),
|
||||
asm: "JPI 0x0fee".to_string(),
|
||||
encoded: 0xbfee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_RND.to_string(),
|
||||
instruction: Chip8CpuInstructions::RND(0x1, 0xae),
|
||||
asm: "RND 0x01, 0xae".to_string(),
|
||||
encoded: 0xc1ae,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_DRW.to_string(),
|
||||
instruction: Chip8CpuInstructions::DRW(0x1, 0x2, 0xf),
|
||||
asm: "DRW 0x01, 0x02, 0x0f".to_string(),
|
||||
encoded: 0xd12f
|
||||
}
|
||||
/*
|
||||
0xE09E..=0xEFA1 => match last_byte {
|
||||
0x9E => Chip8CpuInstructions::SKP(ubln),
|
||||
0xA1 => Chip8CpuInstructions::SKNP(ubln),
|
||||
0xF007..=0xFF65 => match last_byte {
|
||||
0x07 => Chip8CpuInstructions::LDRD(ubln),
|
||||
0x0A => Chip8CpuInstructions::LDRK(ubln),
|
||||
0x15 => Chip8CpuInstructions::LDD(ubln),
|
||||
0x18 => Chip8CpuInstructions::LDIS(ubln),
|
||||
0x1E => Chip8CpuInstructions::ADDI(ubln),
|
||||
0x29 => Chip8CpuInstructions::LDFX(ubln),
|
||||
0x30 => Chip8CpuInstructions::LDF2(ubln),
|
||||
0x33 => Chip8CpuInstructions::BCD(ubln),
|
||||
0x55 => Chip8CpuInstructions::LDIX(ubln),
|
||||
0x65 => Chip8CpuInstructions::LDRI(ubln),
|
||||
0x75 => Chip8CpuInstructions::STR(ubln),
|
||||
0x85 => Chip8CpuInstructions::LIDR(ubln),
|
||||
|
||||
*/
|
||||
];
|
||||
|
||||
for current in it {
|
||||
assert_eq!(current.instruction.name(), current.name);
|
||||
let i = current.instruction;
|
||||
assert!(matches!(Chip8CpuInstructions::decode(current.encoded), i));
|
||||
assert_eq!(i.to_string(), current.asm);
|
||||
let asm = Chip8CpuInstructions::from_str(¤t.asm);
|
||||
assert_eq!(i.to_string(), asm.to_string());
|
||||
}
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn instructions_operands_tests() {
|
||||
assert_eq!(Chip8CpuInstructions::SYS(0x000).operands(), "0x0000");
|
||||
assert_eq!(Chip8CpuInstructions::JPI(0x123).operands(), "0x0123");
|
||||
assert_eq!(Chip8CpuInstructions::JPA(0x234).operands(), "0x0234");
|
||||
assert_eq!(Chip8CpuInstructions::LDIA(0x345).operands(), "0x0345");
|
||||
assert_eq!(Chip8CpuInstructions::CALL(0x456).operands(), "0x0456");
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn instruction_ena_dis_tests() {
|
||||
let mut x = Chip8Computer::new();
|
||||
assert!(!x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::ENA.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::ENA.execute(&mut x);
|
||||
assert!(x.video_memory.is_highres());
|
||||
Chip8CpuInstructions::DIS.execute(&mut x);
|
||||
assert!(!x.video_memory.is_highres());
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn instruction_test_scrolling_lowres() {
|
||||
let mut x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SRT.execute(&mut x);
|
||||
|
||||
assert_eq!(read_test_result("test_scroll_right_4.asc"), x.dump_video_to_string());
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SLF.execute(&mut x);
|
||||
|
||||
assert_eq!(read_test_result("test_scroll_left_4.asc"), x.dump_video_to_string());
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SDN(0x01).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_1.asc"), x.dump_video_to_string());
|
||||
|
||||
x = Chip8Computer::new();
|
||||
x.video_memory = build_checkerboard();
|
||||
Chip8CpuInstructions::SDN(0xA).execute(&mut x);
|
||||
assert_eq!(read_test_result("test_video_scroll_down_10.asc"), x.dump_video_to_string());
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn computer_dump_keypad_to_string() {
|
||||
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn computer_dump_registers_to_string() {
|
||||
let mut x = Chip8Computer::new();
|
||||
let values_to_set = [0x0b, 0xad, 0xbe, 0xef,
|
||||
0xca, 0xb0,
|
||||
0x7a, 0xc0, 0xca, 0x70,
|
||||
0xba, 0xdb, 0xed, 0x00,
|
||||
0x00, 0x00
|
||||
];
|
||||
let expected_value = "Vx: 0x0b 0xad 0xbe 0xef 0xca 0xb0 0x7a 0xc0\n 0xca 0x70 0xba 0xdb 0xed 0x00 0x00 0x00\nI: 0x0000\tPC: 0x0200";
|
||||
|
||||
for i in 0..16 {
|
||||
x.registers.poke(i, values_to_set[i as usize]);
|
||||
}
|
||||
|
||||
// now verify.
|
||||
assert_eq!(expected_value, x.dump_registers_to_string());
|
||||
}
|
||||
|
||||
//#[test]
|
||||
fn quirks_chip8_vf_reset_tests() {
|
||||
// vF reset - The AND, OR and XOR opcodes (8xy1, 8xy2 and 8xy3) reset the flags
|
||||
// register to zero. Test will show ERR1 if the AND and OR tests don't behave
|
||||
// the same and ERR2 if the AND and XOR tests don't behave the same.
|
||||
let mut x = Chip8Computer::new();
|
||||
}
|
||||
Reference in New Issue
Block a user