Adds 'name' and 'operand' to Chip8Instruction
This commit is contained in:
+143
-87
@@ -1,6 +1,6 @@
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use std::arch::x86_64::_mm_xor_pd;
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use std::fmt::{Debug, Display, Formatter};
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use std::ops::{BitAnd, Shr};
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use std::ops::{BitAnd, Deref, Shr};
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use std::time::Instant;
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use log::debug;
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use rand::{random, Rng};
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@@ -21,7 +21,7 @@ kk or byte - An 8-bit value, the lowest 8 bits of the instruction
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pub enum Chip8CpuInstructions {
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/// 0nnn
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/// Exit to System Call at nnn
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SysAddr(i16),
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SysAddr(u16),
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/// 00E0
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/// Clear the display.
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CLS,
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@@ -35,13 +35,13 @@ pub enum Chip8CpuInstructions {
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/// Jump to location nnn.
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///
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/// The interpreter sets the program counter to nnn.
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JpAddr(i16),
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JpAddr(u16),
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/// 2nnn
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/// Call subroutine at nnn.
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///
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/// The interpreter increments the stack pointer, then puts the current PC on the top
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/// of the stack. The PC is then set to nnn.
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CallAddr(i16),
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CallAddr(u16),
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/// 0x3xkk
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/// Skip next instruction if Vx = kk.
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///
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@@ -215,118 +215,175 @@ pub enum Chip8CpuInstructions {
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XXXXERRORINSTRUCTION,
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}
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impl Display for Chip8CpuInstructions {
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fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
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write!(f, "{}", format!("{}", match self {
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Chip8CpuInstructions::SysAddr(x) => {
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format!("SYS 0x{:04x}", x)
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impl Chip8CpuInstructions {
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pub fn name(&self) -> &str {
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match self {
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Chip8CpuInstructions::SysAddr(_) => {
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"SYS"
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}
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Chip8CpuInstructions::CLS => {
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String::from("CLS")
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"CLS"
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}
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Chip8CpuInstructions::RET => {
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String::from("RET")
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"RET"
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}
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Chip8CpuInstructions::JpAddr(x) => {
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format!("JP 0x{:04x}", x)
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Chip8CpuInstructions::JpAddr(_) => {
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"JPA"
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}
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Chip8CpuInstructions::CallAddr(x) => {
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format!("SUB 0x{:04x}", x)
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Chip8CpuInstructions::CallAddr(_) => {
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"CALL"
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}
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Chip8CpuInstructions::SeVxByte(x, byte) => {
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format!("SeVxByte 0x{:02x}, 0x{:02x}", x, byte)
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Chip8CpuInstructions::SeVxByte(_, _) => {
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"SeVxByte"
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}
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Chip8CpuInstructions::SneVxByte(x, byte) => {
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format!("SneVxByte 0x{:02x}, 0x{:02x}", x, byte)
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Chip8CpuInstructions::SneVxByte(_, _) => {
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"SneVxByte"
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}
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Chip8CpuInstructions::SeVxVy(x, y) => {
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format!("SeVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::SeVxVy(_, _) => {
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"SeVeVy"
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}
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Chip8CpuInstructions::LdVxByte(x, byte) => {
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format!("LdVxByte 0x{:02x}, 0x{:02x}", x, byte)
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Chip8CpuInstructions::LdVxByte(_, _) => {
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"LdVxByte"
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}
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Chip8CpuInstructions::AddVxByte(x, byte) => {
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format!("AddVxByte 0x{:02x}, 0x{:02x}", x, byte)
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Chip8CpuInstructions::AddVxByte(_, _) => {
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"AddVxByte"
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}
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Chip8CpuInstructions::LdVxVy(x, y) => {
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format!("LdVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::LdVxVy(_, _) => {
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"LdVxVy"
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}
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Chip8CpuInstructions::OrVxVy(x, y) => {
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format!("OrVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::OrVxVy(_, _) => {
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"OrVxVy"
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}
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Chip8CpuInstructions::AndVxVy(x, y) => {
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format!("AndVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::AndVxVy(_, _) => {
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"AndVxVy"
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}
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Chip8CpuInstructions::XorVxVy(x, y) => {
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format!("XorVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::XorVxVy(_, _) => {
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"XorVxVy"
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}
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Chip8CpuInstructions::AddVxVy(x, y) => {
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format!("AddVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::AddVxVy(_, _) => {
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"AddVxVy"
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}
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Chip8CpuInstructions::SubVxVy(x, y) => {
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format!("SubVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::SubVxVy(_, _) => {
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"SubVxVy"
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}
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Chip8CpuInstructions::ShrVxVy(x, y) => {
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format!("ShrVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::ShrVxVy(_, _) => {
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"ShrVxVy"
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}
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Chip8CpuInstructions::SubnVxVy(x, y) => {
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format!("SubnVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::SubnVxVy(_, _) => {
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"SubnVxVy"
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}
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Chip8CpuInstructions::ShlVxVy(x, y) => {
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format!("ShlVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::ShlVxVy(_, _) => {
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"ShlVxVy"
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}
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Chip8CpuInstructions::SneVxVy(x, y) => {
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format!("SneVxVy 0x{:02x}, 0x{:02x}", x, y)
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Chip8CpuInstructions::SneVxVy(_, _) => {
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"SneVxVy"
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}
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Chip8CpuInstructions::LdIAddr(addr) => {
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format!("LdIAddr 0x{:04x}", addr)
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Chip8CpuInstructions::LdIAddr(_) => {
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"LdIAddr"
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}
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Chip8CpuInstructions::JpV0Addr(addr) => {
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format!("JpV0Addr 0x{:04x}", addr)
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Chip8CpuInstructions::JpV0Addr(_) => {
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"JpV0Addr"
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}
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Chip8CpuInstructions::RndVxByte(x, byte) => {
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format!("RndVxByte 0x:{:02x}, 0x{:02x}", x, byte)
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Chip8CpuInstructions::RndVxByte(_, _) => {
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"RndVxByte"
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}
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Chip8CpuInstructions::DrawVxVyNibble(x, y, nibble) => {
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format!("DrawVxVyNibble 0x:{:02x}, 0x{:02x}, 0x{:02x}", x, y, nibble)
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Chip8CpuInstructions::DrawVxVyNibble(_, _, _) => {
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"DrawVxVyNibble"
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}
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Chip8CpuInstructions::SkpVx(x) => {
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format!("SkpVx 0x{:02x}", x)
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Chip8CpuInstructions::SkpVx(_) => {
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"SkpVx"
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}
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Chip8CpuInstructions::SnkpVx(x) => {
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format!("SnkpVx 0x{:02x}", x)
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Chip8CpuInstructions::SnkpVx(_) => {
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"SnkpVx"
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}
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Chip8CpuInstructions::LdVxDt(x) => {
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format!("LdVxDt 0x{:02x}", x)
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Chip8CpuInstructions::LdVxDt(_) => {
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"LdVxDt"
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}
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Chip8CpuInstructions::LdVxK(x) => {
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format!("LdVxK 0x{:02x}", x)
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Chip8CpuInstructions::LdVxK(_) => {
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"LdVxK"
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}
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Chip8CpuInstructions::LdDtVx(x) => {
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format!("LdDtVx 0x{:02x}", x)
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Chip8CpuInstructions::LdDtVx(_) => {
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"LdDtVx"
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}
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Chip8CpuInstructions::LdStVx(x) => {
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format!("LdStVx 0x{:02x}", x)
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Chip8CpuInstructions::LdStVx(_) => {
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"LdStVx"
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}
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Chip8CpuInstructions::AddIVx(x) => {
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format!("AddIVx 0x{:02x}", x)
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Chip8CpuInstructions::AddIVx(_) => {
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"AddIVx"
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}
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Chip8CpuInstructions::LdFVx(x) => {
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format!("LdFVx 0x{:02x}", x)
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Chip8CpuInstructions::LdFVx(_) => {
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"LdFVx"
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}
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Chip8CpuInstructions::LdBVx(x) => {
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format!("LdBVx 0x{:02x}", x)
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Chip8CpuInstructions::LdBVx(_) => {
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"LdBVx"
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}
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Chip8CpuInstructions::LdIVx(x) => {
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format!("LdIVx 0x{:02x}", x)
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Chip8CpuInstructions::LdIVx(_) => {
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"LdIVx"
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}
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Chip8CpuInstructions::LdVxI(i) => {
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format!("LdVxI 0x{:02x}", i)
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Chip8CpuInstructions::LdVxI(_) => {
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"LdVxI"
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}
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XXXXERRORINSTRUCTION => {
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String::from("INVALID INSTRUCTION")
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"XX ERROR XX"
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}
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}))
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}
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}
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pub fn operands(&self) -> String {
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match self {
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Chip8CpuInstructions::SysAddr(addr) |
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Chip8CpuInstructions::JpV0Addr(addr) |
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Chip8CpuInstructions::JpAddr(addr) |
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Chip8CpuInstructions::LdIAddr(addr) |
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Chip8CpuInstructions::CallAddr(addr) => {
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format!("{addr:04x}")
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}
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Chip8CpuInstructions::SeVxByte(x, byte) |
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Chip8CpuInstructions::SneVxByte(x, byte) |
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Chip8CpuInstructions::LdVxByte(x, byte) |
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Chip8CpuInstructions::RndVxByte(x, byte) |
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Chip8CpuInstructions::AddVxByte(x, byte) => {
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format!("{x:02x}, {byte:04x}")
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}
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Chip8CpuInstructions::SeVxVy(x,y) |
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Chip8CpuInstructions::LdVxVy(x,y) |
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Chip8CpuInstructions::OrVxVy(x,y) |
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Chip8CpuInstructions::AndVxVy(x,y) |
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Chip8CpuInstructions::XorVxVy(x,y) |
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Chip8CpuInstructions::AddVxVy(x,y) |
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Chip8CpuInstructions::SubVxVy(x,y) |
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Chip8CpuInstructions::ShrVxVy(x,y) |
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Chip8CpuInstructions::SubnVxVy(x,y) |
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Chip8CpuInstructions::ShlVxVy(x,y) |
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Chip8CpuInstructions::SneVxVy(x,y) => {
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format!("{x:02x}, {y:02x}")
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}
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Chip8CpuInstructions::DrawVxVyNibble(x,y,nibble) => {
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format!("{x:02x}, {y:02x}, {nibble:02x}")
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}
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Chip8CpuInstructions::LdDtVx(x) |
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Chip8CpuInstructions::LdStVx(x) |
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Chip8CpuInstructions::AddIVx(x) |
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Chip8CpuInstructions::LdFVx(x) |
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Chip8CpuInstructions::LdBVx(x) |
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Chip8CpuInstructions::LdIVx(x) |
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Chip8CpuInstructions::SkpVx(x) |
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Chip8CpuInstructions::LdVxDt(x) |
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Chip8CpuInstructions::LdVxK(x) |
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Chip8CpuInstructions::LdVxI(x) |
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Chip8CpuInstructions::SnkpVx(x) => {
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format!("{x:02x}")
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}
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_ => {
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"".parse().unwrap()
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}
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}
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}
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}
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impl Display for Chip8CpuInstructions {
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fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
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write!(f, "{} {}", self.name(), self.operands())
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}
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}
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@@ -386,9 +443,9 @@ impl Chip8CpuInstructions {
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match input {
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0x00E0 => Chip8CpuInstructions::CLS,
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0x00EE => Chip8CpuInstructions::RET,
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0x0000..=0x0FFF => Chip8CpuInstructions::SysAddr(addr_param as i16),
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0x1000..=0x1FFF => Chip8CpuInstructions::JpAddr(addr_param as i16),
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0x2000..=0x2FFF => Chip8CpuInstructions::CallAddr(addr_param as i16),
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0x0000..=0x0FFF => Chip8CpuInstructions::SysAddr(addr_param),
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0x1000..=0x1FFF => Chip8CpuInstructions::JpAddr(addr_param),
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0x2000..=0x2FFF => Chip8CpuInstructions::CallAddr(addr_param),
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0x3000..=0x3FFF => Chip8CpuInstructions::SeVxByte(x_param, byte_param),
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0x4000..=0x4FFF => Chip8CpuInstructions::SneVxByte(x_param, byte_param),
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0x5000..=0x5FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SeVxVy(x_param, y_param),
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@@ -412,9 +469,9 @@ impl Chip8CpuInstructions {
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0xC000..=0xCFFF => Chip8CpuInstructions::RndVxByte(x_param, byte_param),
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0xD000..=0xDFFF => Chip8CpuInstructions::DrawVxVyNibble(x_param, y_param, nibble_param),
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0xE09E..=0xEFA1 => match last_byte {
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0x9E => Chip8CpuInstructions::SkpVx(ubln),
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0xA1 => Chip8CpuInstructions::SnkpVx(ubln),
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_ => XXXXERRORINSTRUCTION
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0x9E => Chip8CpuInstructions::SkpVx(ubln),
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0xA1 => Chip8CpuInstructions::SnkpVx(ubln),
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_ => XXXXERRORINSTRUCTION
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}
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0xF007..=0xFF65 => match last_byte {
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0x07 => Chip8CpuInstructions::LdVxDt(ubln),
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@@ -432,7 +489,7 @@ impl Chip8CpuInstructions {
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}
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}
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pub fn execute(&self, input: &mut Chip8Computer) -> Chip8Computer {
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// print!("INSTRUCTION {}", self);
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// print!("INSTRUCTION {}", self);
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let start_time = Instant::now();
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let start_pc = input.registers.peek_pc();
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input.registers.poke_pc(start_pc + 2);
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@@ -624,7 +681,7 @@ impl Chip8CpuInstructions {
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// Set I = nnn.
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//
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// The value of register I is set to nnn.
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// debug!("LdiAddr [0x{new_index:3x}]");
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// debug!("LdiAddr [0x{new_index:3x}]");
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input.registers.poke_i(*new_index);
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}
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// 0xBnnn Jump to nnn+V0
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@@ -680,7 +737,6 @@ impl Chip8CpuInstructions {
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};
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input.registers.poke(0xf, target);
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}
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Chip8CpuInstructions::SkpVx(x) => {
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// Ex9E - SKP Vx
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@@ -811,7 +867,7 @@ impl Chip8CpuInstructions {
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Chip8CpuInstructions::XXXXERRORINSTRUCTION => {}
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};
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let cycle_time = Instant::now().duration_since(start_time).as_nanos();
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// println!("\t\tTook {cycle_time}ms");
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// println!("\t\tTook {cycle_time}ms");
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input.to_owned()
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}
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}
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