diff --git a/.idea/vcs.xml b/.idea/vcs.xml
new file mode 100644
index 0000000..35eb1dd
--- /dev/null
+++ b/.idea/vcs.xml
@@ -0,0 +1,6 @@
+
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\ No newline at end of file
diff --git a/.idea/workspace.xml b/.idea/workspace.xml
new file mode 100644
index 0000000..208412c
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+++ b/.idea/workspace.xml
@@ -0,0 +1,233 @@
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+ "associatedIndex": 8
+}
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+ {
+ "keyToString": {
+ "Cargo.Build `Run emmagui`.executor": "Run",
+ "Cargo.Build `Run trevors_chip8_toy`.executor": "Run",
+ "Cargo.Build `Test chip8::computer::test::cls_test`.executor": "Run",
+ "Cargo.Build `Test chip8::instructions::test::LdStVx_test`.executor": "Run",
+ "Cargo.Build `Test chip8::instructions::test::shl_vx_vy_test`.executor": "Run",
+ "Cargo.Build `Test chip8::util::test::byte_to_bool_changes`.executor": "Run",
+ "Cargo.Build `Test chip8::util::test::ubln`.executor": "Run",
+ "Cargo.Build `Test chip8::video::test::poke_byte_test`.executor": "Run",
+ "Cargo.Build `Test chip8::video::test::poke_byte`.executor": "Run",
+ "Cargo.Build `Test computer::test`.executor": "Run",
+ "Cargo.Build `Test instructions::test`.executor": "Run",
+ "Cargo.Run emmagui.executor": "Run",
+ "Cargo.Run trevors_chip8_toy.executor": "Debug",
+ "Cargo.Test chip8::computer::test::cls_test.executor": "Run",
+ "Cargo.Test chip8::computer::test::decoder_test_valid_instructions.executor": "Run",
+ "Cargo.Test chip8::instructions::test::LdStVx_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::LdVxDt_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::LdiAddr_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::RndVxByte_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::ShrVxVy_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::SneVxVy_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::decoder_test_invalid_instructions.executor": "Run",
+ "Cargo.Test chip8::instructions::test::draw_nibble_vx_vy_n_test.executor": "Debug",
+ "Cargo.Test chip8::instructions::test::encode_decode_test.executor": "Debug",
+ "Cargo.Test chip8::instructions::test::shl_vx_vy_test.executor": "Run",
+ "Cargo.Test chip8::instructions::test::subn_vx_vy_test.executor": "Run",
+ "Cargo.Test chip8::util::test::bool_to_byte_changes.executor": "Run",
+ "Cargo.Test chip8::util::test::byte_to_bool_changes.executor": "Run",
+ "Cargo.Test chip8::util::test::ubln.executor": "Run",
+ "Cargo.Test chip8::video::test::poke_byte.executor": "Run",
+ "Cargo.Test chip8::video::test::poke_byte_test.executor": "Run",
+ "Cargo.Test chip8::video::test::poke_sprite_test.executor": "Debug",
+ "Cargo.Test computer::test.executor": "Debug",
+ "Cargo.Test instructions::test.executor": "Debug",
+ "Cargo.Test sound_timer::test.executor": "Run",
+ "Cargo.Test util::test.executor": "Run",
+ "Cargo.Test video::test.executor": "Coverage",
+ "RunOnceActivity.ShowReadmeOnStart": "true",
+ "RunOnceActivity.rust.reset.selective.auto.import": "true",
+ "git-widget-placeholder": "master",
+ "last_opened_file_path": "/home/tmerritt/Projects/trevors_chip8_toy",
+ "node.js.detected.package.eslint": "true",
+ "node.js.selected.package.eslint": "(autodetect)",
+ "nodejs_package_manager_path": "npm",
+ "org.rust.cargo.project.model.PROJECT_DISCOVERY": "true",
+ "org.rust.cargo.project.model.impl.CargoExternalSystemProjectAware.subscribe.first.balloon": "",
+ "org.rust.first.attach.projects": "true",
+ "settings.editor.selected.configurable": "language.rust.build.tool.cargo"
+ }
+}
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+ file://$PROJECT_DIR$/emma/src/chip8/system_memory.rs
+ 46
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\ No newline at end of file
diff --git a/gemma/src/chip8/instructions.rs b/gemma/src/chip8/instructions.rs
index 787598a..4ca55d5 100644
--- a/gemma/src/chip8/instructions.rs
+++ b/gemma/src/chip8/instructions.rs
@@ -33,52 +33,52 @@ pub enum Chip8CpuInstructions {
CallAddr(i16),
/// 0x3xkk
/// Skip next instruction if Vx == kk
- SeVxByte(i16, i16),
+ SeVxByte(u8, u8),
/// 4xkk
/// Skip next instruction if Vx != kk
- SneVxByte(i16, i16),
+ SneVxByte(u8, u8),
/// 5xy0
/// Skip next instruction if Vx == Vy
- SeVxVy(u16, u16),
+ SeVxVy(u8, u8),
/// 6xkk
/// Set Vx = kk
- LdVxByte(u16, u16),
+ LdVxByte(u8, u8),
/// 7xkk
/// Set Vx = Vx + kk
- AddVxByte(u16, u16),
+ AddVxByte(u8, u8),
/// 8xy0
/// Set Vx = Vy
- LdVxVy(u16, u16),
+ LdVxVy(u8, u8),
/// 8xy1
/// Set Vx = Vx OR Vy
- OrVxVy(u16, u16),
+ OrVxVy(u8, u8),
/// 8xy2
/// Set Vx = Vx AND Vy
- AndVxVy(u16, u16),
+ AndVxVy(u8, u8),
/// 8xy3
/// Set Vx = Vx XOR Vy
- XorVxVy(u16, u16),
+ XorVxVy(u8, u8),
/// 8xy4
/// Set Vx = Vx + Vy
/// Set VF=1 if Carry
- AddVxVy(u16, u16),
+ AddVxVy(u8, u8),
/// 8xy5
/// Set Vx = Vx - Vy
/// Set VF=1 if No Borrow
- SubVxVy(u16, u16),
+ SubVxVy(u8, u8),
/// 8xy6
/// Set Vx = Vx SHR 1
- ShrVxVy(u16, u16),
+ ShrVxVy(u8, u8),
/// 8xy7
/// Set Vx = Vy - Vx
/// Set VF=1 if No Borrow
- SubnVxVy(u16, u16),
+ SubnVxVy(u8, u8),
/// 8xye
/// Set Vx = Vx SHL 1
- ShlVxVy(u16, u16),
+ ShlVxVy(u8, u8),
/// 9xy0
/// Skip next instruction if Vx != Vy
- SneVxVy(u16, u16),
+ SneVxVy(u8, u8),
/// Annn
/// Load I register with NNN
LdIAddr(u16),
@@ -87,34 +87,34 @@ pub enum Chip8CpuInstructions {
JpV0Addr(u16),
/// Cxkk
/// Set Vx = Random u8 AND kk
- RndVxByte(u16, u16),
+ RndVxByte(u8, u8),
/// Dxyn
/// Display N byte tall sprite starting at Vx, Vy
- DrawVxVyNibble(u16, u16, u16),
+ DrawVxVyNibble(u8, u8, u8),
/// Ex9E
/// Skip next instruction of key in Vx pressed
- SkpVx(u16),
+ SkpVx(u8),
/// ExA1
/// Skip Next If Key Not Pressed
- SnkpVx(u16),
+ SnkpVx(u8),
/// Fx07
/// Set Vx = Dt
- LdVxDt(u16),
+ LdVxDt(u8),
/// Fx0A
/// Wait for Key to be pressed and store
/// in Vx
- LdVxK(u16),
+ LdVxK(u8),
/// Fx15
/// Load Value in Delay Timer to Vx
- LdDtVx(u16), // 0xFx15 Set Delay Timer
+ LdDtVx(u8), // 0xFx15 Set Delay Timer
/// Fx18
/// Set Dt = Vx
- LdStVx(u16),
- AddIVx(u16), // 0xFx1E I = I + Vx
- LdFVx(u16), // 0xFx29 Set I = Location of sprite for Digit Vx
- LdBVx(u16), // 0xFx33 Store BCD of Vx in I, I+1, I+2
- LdIVx(u16), // 0xFx55 Store V0 to Vx in memory starting at I
- LdVxI(u16), // 0xFx65 Load V0 to Vx in memory starting at I
+ LdStVx(u8),
+ AddIVx(u8), // 0xFx1E I = I + Vx
+ LdFVx(u8), // 0xFx29 Set I = Location of sprite for Digit Vx
+ LdBVx(u8), // 0xFx33 Store BCD of Vx in I, I+1, I+2
+ LdIVx(u8), // 0xFx55 Store V0 to Vx in memory starting at I
+ LdVxI(u8), // 0xFx65 Load V0 to Vx in memory starting at I
XXXXERRORINSTRUCTION,
}
@@ -140,46 +140,46 @@ impl Chip8CpuInstructions {
(0x3000 | (vx_register << 8 | byte) as u16)
}
Chip8CpuInstructions::SneVxByte(vx_register, byte) => {
- (0x4000i16 | vx_register << 8 | byte) as u16
+ 0x4000u16 | (*vx_register as u16) << 8 | *byte as u16
}
Chip8CpuInstructions::SeVxVy(x_register, y_register) => {
- 0x5000u16 | (x_register << 8 | y_register << 4)
+ 0x5000u16 | (*x_register as u16) << 8 | (*y_register as u16 )<< 4
}
Chip8CpuInstructions::LdVxByte(x_register, byte) => {
- 0x6000u16 | x_register << 8 | byte
+ 0x6000u16 | (*x_register as u16) << 8 | ( *byte as u16)
}
Chip8CpuInstructions::AddVxByte(x_register, byte) => {
- 0x7000u16 | x_register << 8 | byte
+ 0x7000u16 | (*x_register as u16) << 8 | *byte as u16
}
Chip8CpuInstructions::LdVxVy(x_register, y_register) => {
- 0x8000u16 | x_register << 8 | y_register << 4
+ 0x8000u16 | (*x_register as u16) << 8 | (*y_register as u16 )<< 4
}
Chip8CpuInstructions::OrVxVy(x_register, y_register) => {
- 0x8001u16 | x_register << 8 | y_register << 4
+ 0x8001u16 | (*x_register as u16 )<< 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::AndVxVy(x_register, y_register) => {
- 0x8002u16 | x_register << 8 | y_register << 4
+ 0x8002u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::XorVxVy(x_register, y_register) => {
- 0x8003u16 | x_register << 8 | y_register << 4
+ 0x8003u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::AddVxVy(x_register, y_register) => {
- 0x8004u16 | x_register << 8 | y_register << 4
+ 0x8004u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::SubVxVy(x_register, y_register) => {
- 0x8005u16 | x_register << 8 | y_register << 4
+ 0x8005u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::ShrVxVy(x_register, y_register) => {
- 0x8006u16 | x_register << 8 | y_register << 4
+ 0x8006u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::SubnVxVy(x_register, y_register) => {
- 0x8007u16 | x_register << 8 | y_register << 4
+ 0x8007u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::ShlVxVy(x_register, y_register) => {
- 0x800Eu16 | x_register << 8 | y_register << 4
+ 0x800Eu16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::SneVxVy(x_register, y_register) => {
- 0x9000u16 | x_register << 8 | y_register << 4
+ 0x9000u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4
}
Chip8CpuInstructions::LdIAddr(addr) => {
0xA000u16 | addr
@@ -188,43 +188,43 @@ impl Chip8CpuInstructions {
0xB000u16 | addr
}
Chip8CpuInstructions::RndVxByte(x_register, byte) => {
- 0xC000u16 | x_register << 8 | byte
+ 0xC000u16 | (*x_register as u16) << 8 | (*byte as u16)
}
Chip8CpuInstructions::DrawVxVyNibble(x_register, y_register, height) => {
- 0xD000u16 | x_register << 8 | y_register << 4 | height
+ 0xD000u16 | (*x_register as u16) << 8 | (*y_register as u16) << 4 | (*height as u16)
}
Chip8CpuInstructions::SkpVx(x_register) => {
- 0xE09Eu16 | x_register << 8
+ 0xE09Eu16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::SnkpVx(x_register) => {
- 0xE0A1u16 | x_register << 8
+ 0xE0A1u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdVxDt(x_register) => {
- 0xF007u16 | x_register << 8
+ 0xF007u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdVxK(x_register) => {
- 0xF00Au16 | x_register << 8
+ 0xF00Au16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdDtVx(x_register) => {
- 0xF015u16 | x_register << 8
+ 0xF015u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdStVx(x_register) => {
- 0xF018u16 | x_register << 8
+ 0xF018u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::AddIVx(x_register) => {
- 0xF01Eu16 | x_register << 8
+ 0xF01Eu16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdFVx(x_register) => {
- 0xF029u16 | x_register << 8
+ 0xF029u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdBVx(x_register) => {
- 0xf033u16 | x_register << 8
+ 0xf033u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdIVx(x_register) => {
- 0xf055u16 | x_register << 8
+ 0xf055u16 | (*x_register as u16) << 8
}
Chip8CpuInstructions::LdVxI(x_register) => {
- 0xf065u16 | x_register << 8
+ 0xf065u16 | (*x_register as u16) << 8
}
XXXXERRORINSTRUCTION => {
0xffff
@@ -232,12 +232,12 @@ impl Chip8CpuInstructions {
}
}
pub fn decode(input: u16) -> Chip8CpuInstructions {
- let x_param = InstructionUtil::read_x_from_instruction(input);
- let y_param = InstructionUtil::read_y_from_instruction(input);
- let addr_param = InstructionUtil::read_addr_from_instruction(input);
- let byte_param = InstructionUtil::read_byte_from_instruction(input);
- let nibble_param = InstructionUtil::read_nibble_from_instruction(input);
- let ubln = InstructionUtil::read_upper_byte_lower_nibble(input);
+ let x_param = InstructionUtil::read_x_from_instruction(input) as u8;
+ let y_param = InstructionUtil::read_y_from_instruction(input) as u8;
+ let addr_param = InstructionUtil::read_addr_from_instruction(input) as u16;
+ let byte_param = InstructionUtil::read_byte_from_instruction(input) as u8;
+ let nibble_param = InstructionUtil::read_nibble_from_instruction(input) as u8;
+ let ubln = InstructionUtil::read_upper_byte_lower_nibble(input) as u8;
let last_byte = input & 0xFF;
match input {
@@ -269,12 +269,12 @@ impl Chip8CpuInstructions {
0x3000..=0x3FFF => {
// 3xkk - SE Vx, byte
// Skip next instruction if Vx = kk.
- Chip8CpuInstructions::SeVxByte(x_param as i16, byte_param as i16)
+ Chip8CpuInstructions::SeVxByte(x_param, byte_param)
}
0x4000..=0x4FFF => {
// 4xkk - SNE Vx, byte
// Skip next instruction if Vx != kk.
- Chip8CpuInstructions::SneVxByte(x_param as i16, byte_param as i16)
+ Chip8CpuInstructions::SneVxByte(x_param, byte_param)
}
0x5000..=0x5FF0 => {
// 5xy0 - SE Vx, Vy
@@ -484,9 +484,9 @@ impl Chip8CpuInstructions {
}
// 0x7xkk Set Vx = Vx + kk
Chip8CpuInstructions::AddVxByte(vx_register, byte) => {
- let x_value: u16 = input.registers.peek(*vx_register as u8) as u16;
- let value_to_poke = (x_value + *byte) as u8;
- input.registers.poke(*vx_register as u8, value_to_poke);
+ let x_value: u16 = input.registers.peek(*vx_register) as u16;
+ let value_to_poke = (x_value + *byte as u16) as u8;
+ input.registers.poke(*vx_register, value_to_poke);
debug!("AddVxByte [0x{vx_register:1x}] [0x{byte:02x}] [0x{value_to_poke:02x}");
}
// 0x8xy0 Set value of Vy in Vx
@@ -651,10 +651,10 @@ impl Chip8CpuInstructions {
let num_bytes_to_read = *n;
println!("CHIP8CPUINSTRUCTION:DRAWVXNIBBLE -> PREPARING TO READ {num_bytes_to_read} BYTES FROM MEMORY TO VIDEO");
for byte_index in 0..num_bytes_to_read {
- let current_byte = input.memory.peek(byte_index + source_memory_offset);
+ let current_byte = input.memory.peek(byte_index as u16 + source_memory_offset);
println!("CHIP8CPUINSTRUCTION:DRAWVXNIBBLE -> READ BYTE [0x{byte_index:2x}]\t{current_byte:02x}\t{current_byte:08b}");
for bit_index in 0..8 {
- let data_offset = ((x_offset as u16 + byte_index) * 64 ) + (y_offset + bit_index) as u16;
+ let data_offset = ((x_offset as u16 + byte_index as u16) * 64 ) + (y_offset + bit_index) as u16;
let current_bit = (current_byte.shr(7 - bit_index) & 0x1u8) == 0x1u8;
input.video_memory.poke(data_offset, current_bit);
}
@@ -778,7 +778,7 @@ impl Chip8CpuInstructions {
let num_loops = x;
let offset = input.registers.peek_i();
for i in 0..=*x {
- input.memory.poke(offset + i, input.registers.peek(i as u8));
+ input.memory.poke(offset + i as u16, input.registers.peek(i as u8));
}
input.registers.poke_i(offset + 1);
}
@@ -1307,7 +1307,7 @@ mod test {
}
x.registers.poke_i(0x500);
- Chip8CpuInstructions::LdIVx(to_load.len() as u16).execute(&mut x);
+ Chip8CpuInstructions::LdIVx(to_load.len() as u8).execute(&mut x);
// Verify the values are in memory from 0x500 to 0x507
for (idx, value) in to_load.iter().enumerate() {
@@ -1396,7 +1396,7 @@ mod test {
x.registers.poke(y_register, y_offset);
x.registers.poke_i(char_offset);
// we are using 5 rows.
- Chip8CpuInstructions::DrawVxVyNibble(x_register as u16, y_register as u16, 5).execute(&mut x);
+ Chip8CpuInstructions::DrawVxVyNibble(x_register, y_register, 5).execute(&mut x);
// now check that video memory has the values at
// 1,2->1,9
diff --git a/gemma/tests/computer_tests.rs b/gemma/tests/computer_tests.rs
index b46d6e4..c4f373d 100644
--- a/gemma/tests/computer_tests.rs
+++ b/gemma/tests/computer_tests.rs
@@ -1,4 +1,4 @@
-use emmaemu::chip8::computer::Chip8Computer;
+use gemmaemu::chip8::computer::Chip8Computer;
#[test]
fn smoke() { assert!(true) }
@@ -6,6 +6,4 @@ fn smoke() { assert!(true) }
#[test]
fn test_rom_1_works() {
let mut x = Chip8Computer::new();
-
-
-}
\ No newline at end of file
+}