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more unit tests working.

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This commit is contained in:
Trevor Merritt
2024-10-30 12:00:33 -04:00
parent 011874bca6
commit d8b14fa084
10 changed files with 506 additions and 383 deletions
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gemma/src/chip8/instructions.rs
+109 -59
View File
@@ -18,7 +18,7 @@ y - A 4-bit value, the upper 4 bits of the low byte of the instruction
kk or byte - An 8-bit value, the lowest 8 bits of the instruction
*/
#[derive(Debug)]
#[derive(Debug, Clone)]
pub enum Chip8CpuInstructions {
/// 0nnn
/// Exit to System Call at nnn
@@ -222,26 +222,26 @@ pub enum Chip8CpuInstructions {
LDRI(u8),
XXXXERRORINSTRUCTION,
/* START OF SCHIP-8 */
/// 00CN
/// 00CN - CHIP8 * SCHIP * XOCHIP
///
/// Scrolll Display N Lines Down
SDN(u8),
SCD(u8),
/// 00FB
///
/// Scroll 4 lines Right
SRT,
SCR,
/// 00FC
///
/// Scroll 4 lines Left
SLF,
SCL,
/// 00FE
///
/// Disable Extended Mode
DIS,
LOW,
/// 00FF
///
/// Enable Extended Mode
ENA,
HIGH,
/// 00FD
///
/// Exit App
@@ -293,9 +293,9 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::OR(_, _) => INST_OR,
Chip8CpuInstructions::RET => INST_RET,
Chip8CpuInstructions::RND(_, _) => INST_RND,
Chip8CpuInstructions::SDN(_) => INST_SDN,
Chip8CpuInstructions::SLF => INST_SLF,
Chip8CpuInstructions::SRT => INST_SRT,
Chip8CpuInstructions::SCD(_) => INST_SCD,
Chip8CpuInstructions::SCL => INST_SCL,
Chip8CpuInstructions::SCR => INST_SCR,
Chip8CpuInstructions::SEX(_, _) => INST_SEX,
Chip8CpuInstructions::SEY(_, _) => INST_SEY,
Chip8CpuInstructions::SHL(_, _) => INST_SHL,
@@ -308,8 +308,8 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::SUB(_, _) => INST_SUB,
Chip8CpuInstructions::SUBC(_, _) => INST_SUBC,
Chip8CpuInstructions::SYS(_) => INST_SYS,
Chip8CpuInstructions::DIS => INST_DIS,
Chip8CpuInstructions::ENA => INST_ENA,
Chip8CpuInstructions::LOW => INST_LOW,
Chip8CpuInstructions::HIGH => INST_HIGH,
Chip8CpuInstructions::ORY(_, _) => INST_ORY,
JPX(_, _) => INST_JPX,
XXXXERRORINSTRUCTION => "XX ERROR XX",
@@ -319,7 +319,8 @@ impl Chip8CpuInstructions {
pub fn operands(&self) -> String {
match self {
JPX(x, addr) => {
format!("0x{x:02x}, 0x{addr:04x}")
let addr_for_display = (*x as u16 ) << 8 | *addr;
format!("0x{x:02x}, 0x{addr_for_display:04x}")
}
Chip8CpuInstructions::SYS(addr) |
Chip8CpuInstructions::JPI(addr) |
@@ -366,17 +367,17 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::LDF2(x) |
Chip8CpuInstructions::STR(x) |
Chip8CpuInstructions::LIDR(x) |
Chip8CpuInstructions::SDN(x) |
Chip8CpuInstructions::SCD(x) |
Chip8CpuInstructions::SKNP(x) |
Chip8CpuInstructions::SKP(x) => {
format!("0x{x:02x}")
}
Chip8CpuInstructions::EXIT |
Chip8CpuInstructions::ENA |
Chip8CpuInstructions::DIS |
Chip8CpuInstructions::SLF |
Chip8CpuInstructions::HIGH |
Chip8CpuInstructions::LOW |
Chip8CpuInstructions::SCL |
Chip8CpuInstructions::XXXXERRORINSTRUCTION |
Chip8CpuInstructions::SRT |
Chip8CpuInstructions::SCR |
Chip8CpuInstructions::CLS |
Chip8CpuInstructions::RET => {
String::new()
@@ -406,15 +407,18 @@ impl Chip8CpuInstructions {
let param3 = u16::from_str_radix(parts.next().unwrap_or("0").trim_start_matches("0x").trim_end_matches(","), 16).unwrap_or(0);
// println!("\tFirst part is {:?} / {:?} / {:?} / {:?}", first_part, param1 ,param2 ,param3);
match first_part {
INST_ADDI => {
ADDI(param1 as u8)
}
INST_ADD => {
ADD(param1 as u8, param2 as u8)
}
INST_CLS => {
CLS
}
INST_DRW => {
DRW(param1 as u8, param2 as u8, param3 as u8)
}
INST_ADD => {
ADD(param1 as u8, param2 as u8)
}
INST_CALL => {
CALL(param1)
}
@@ -436,23 +440,23 @@ impl Chip8CpuInstructions {
INST_SNEB => {
SNEB(param1 as u8, param2 as u8)
}
INST_SDN => {
SDN(param1 as u8)
INST_SCD => {
SCD(param1 as u8)
}
INST_SRT => {
SRT
INST_STR => {
STR(param1 as u8)
}
INST_SLF => {
SLF
INST_SCL => {
SCL
}
INST_EXIT => {
EXIT
}
INST_DIS => {
DIS
INST_LOW => {
LOW
}
INST_ENA => {
ENA
INST_HIGH => {
HIGH
}
INST_SEY => {
SEY(param1 as u8, param2 as u8)
@@ -568,7 +572,7 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::SNEY(x_register, y_register) => 0x9000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4),
Chip8CpuInstructions::LDIA(addr) => 0xA000 | addr,
Chip8CpuInstructions::JPI(addr) => 0xB000 | addr,
JPX(x_register, addr)=> 0xB000u16 | ((*x_register as u16) << 12) | *addr ,
JPX(x_register, addr)=> (0xb000 | (*x_register as u16) << 8) | *addr,
Chip8CpuInstructions::RND(x_register, byte) => 0xC000 | ((*x_register as u16) << 8) | (*byte as u16),
Chip8CpuInstructions::DRW(x_register, y_register, height) => {
0xD000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4) | (*height as u16)
@@ -584,11 +588,11 @@ impl Chip8CpuInstructions {
Chip8CpuInstructions::BCD(x_register) => 0xF033 | ((*x_register as u16) << 8),
Chip8CpuInstructions::LDIX(x_register) => 0xF055 | ((*x_register as u16) << 8),
Chip8CpuInstructions::LDRI(x_register) => 0xF065 | ((*x_register as u16) << 8),
Chip8CpuInstructions::SDN(x_register) => 0x00C0 | (*x_register as u16),
Chip8CpuInstructions::SRT => 0x00FB,
Chip8CpuInstructions::SLF => 0x00FC,
Chip8CpuInstructions::DIS => 0x00FE,
Chip8CpuInstructions::ENA => 0x00FF,
Chip8CpuInstructions::SCD(x_register) => 0x00C0 | (*x_register as u16),
Chip8CpuInstructions::SCR => 0x00FB,
Chip8CpuInstructions::SCL => 0x00FC,
Chip8CpuInstructions::LOW => 0x00FE,
Chip8CpuInstructions::HIGH => 0x00FF,
Chip8CpuInstructions::EXIT => 0x00FD,
Chip8CpuInstructions::LDF2(x_register) => 0xF030 | ((*x_register as u16) << 8),
Chip8CpuInstructions::STR(x_register) => 0xF075 | ((*x_register as u16) << 8),
@@ -613,10 +617,10 @@ impl Chip8CpuInstructions {
XXXXERRORINSTRUCTION
}
QuirkMode::XOChip => {
SDN(last_nibble)
SCD(last_nibble)
}
QuirkMode::SChipModern => {
SDN(last_nibble)
SCD(last_nibble)
}
}
},
@@ -629,25 +633,54 @@ impl Chip8CpuInstructions {
XXXXERRORINSTRUCTION
}
QuirkMode::XOChip => {
Chip8CpuInstructions::SRT
Chip8CpuInstructions::SCR
}
QuirkMode::SChipModern => {
Chip8CpuInstructions::SRT
Chip8CpuInstructions::SCR
}
}
},
0x00FC => Chip8CpuInstructions::SLF,
0x00FC => Chip8CpuInstructions::SCL,
0x00FD => Chip8CpuInstructions::EXIT,
0x00FE => Chip8CpuInstructions::DIS,
0x00FF => Chip8CpuInstructions::ENA,
0x0000..=0x0FFF => Chip8CpuInstructions::SYS(addr_param),
0x1000..=0x1FFF => Chip8CpuInstructions::JPA(addr_param),
0x2000..=0x2FFF => Chip8CpuInstructions::CALL(addr_param),
0x3000..=0x3FFF => Chip8CpuInstructions::SEX(x_param, byte_param),
0x4000..=0x4FFF => Chip8CpuInstructions::SNEB(x_param, byte_param),
0x5000..=0x5FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SEY(x_param, y_param),
0x6000..=0x6FFF => Chip8CpuInstructions::LDR(x_param, byte_param),
0x7000..=0x7FFF => Chip8CpuInstructions::ADD(x_param, byte_param),
0x00FE => {
match quirk_mode {
QuirkMode::Chip8 => {
XXXXERRORINSTRUCTION
}
QuirkMode::XOChip |
QuirkMode::SChipModern => {
LOW
}
}
},
0x00FF => {
match quirk_mode {
QuirkMode::Chip8 => {
XXXXERRORINSTRUCTION
},
QuirkMode::XOChip |
QuirkMode::SChipModern => {
HIGH
}
}
},
0x0000..=0x0FFF => {
match quirk_mode {
QuirkMode::Chip8 => {
Chip8CpuInstructions::SYS(addr_param)
}
QuirkMode::XOChip | QuirkMode::SChipModern => {
XXXXERRORINSTRUCTION
}
}
},
0x1000..=0x1FFF => JPA(addr_param),
0x2000..=0x2FFF => CALL(addr_param),
0x3000..=0x3FFF => SEX(x_param, byte_param),
0x4000..=0x4FFF => SNEB(x_param, byte_param),
0x5000..=0x5FF0 if input & 0x01 == 0 => SEY(x_param, y_param),
0x6000..=0x6FFF => LDR(x_param, byte_param),
0x7000..=0x7FFF => ADD(x_param, byte_param),
0x8000..=0x8FFE => match last_nibble {
0x0 => Chip8CpuInstructions::LDR_Y(x_param, y_param),
0x1 => Chip8CpuInstructions::OR(x_param, y_param),
@@ -1088,19 +1121,36 @@ impl Chip8CpuInstructions {
input.registers.poke_i(offset + 1);
}
Chip8CpuInstructions::XXXXERRORINSTRUCTION => {}
Chip8CpuInstructions::SDN(x) => {
input.video_memory.scroll_down(*x as i32);
Chip8CpuInstructions::SCD(x) => {
match input.quirk_mode {
QuirkMode::Chip8 => {
panic!("Attempt to execute SCD in Chip8 Mode");
}
QuirkMode::XOChip |
QuirkMode::SChipModern => {
input.video_memory.scroll_down(*x as i32);
}
}
}
Chip8CpuInstructions::SRT => {
input.video_memory.scroll_right();
Chip8CpuInstructions::SCR => {
match input.quirk_mode {
QuirkMode::Chip8 => {
// panic!("Attempt to execute SCR in Chip8 Mode");
}
QuirkMode::XOChip |
QuirkMode::SChipModern => {
input.video_memory.scroll_right();
}
}
}
Chip8CpuInstructions::SLF => {
Chip8CpuInstructions::SCL => {
input.video_memory.scroll_left();
}
Chip8CpuInstructions::DIS => {
Chip8CpuInstructions::LOW => {
input.video_memory.set_lowres();
}
Chip8CpuInstructions::ENA => {
Chip8CpuInstructions::HIGH => {
input.video_memory.set_highres();
}
Chip8CpuInstructions::EXIT => {
gemma/src/constants.rs
+5 -5
View File
@@ -46,9 +46,9 @@ pub const INST_LDRY: &str = "LDRY";
pub const INST_OR: &str = "OR";
pub const INST_RET: &str = "RET";
pub const INST_RND: &str = "RND";
pub const INST_SDN: &str = "SDN";
pub const INST_SRT: &str = "SRT";
pub const INST_SLF: &str = "SLF";
pub const INST_SCD: &str = "SCD";
pub const INST_SCR: &str = "SCR";
pub const INST_SCL: &str = "SCL";
pub const INST_SEX: &str = "SEX";
pub const INST_SEY: &str = "SEY";
pub const INST_SHL: &str = "SHL";
@@ -61,8 +61,8 @@ pub const INST_STR: &str = "STR";
pub const INST_SUB: &str = "SUB";
pub const INST_SUBC: &str = "SUBC";
pub const INST_SYS: &str = "SYS";
pub const INST_DIS: &str = "DIS";
pub const INST_ENA: &str = "ENA";
pub const INST_LOW: &str = "LOW";
pub const INST_HIGH: &str = "HIGH";
pub const INST_ORY: &str = "ORY";
pub const CHIP8_PROGRAM_LOAD_OFFSET: i32 = 0x200;