more unit tests working.
imgui drawing directly to background now
This commit is contained in:
+12
-12
@@ -61,12 +61,12 @@ fn encode_decode_test() {
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assert_eq!(Chip8CpuInstructions::BCD(0xd).encode(), 0xfd33);
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assert_eq!(Chip8CpuInstructions::LDIX(0xe).encode(), 0xfe55);
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assert_eq!(Chip8CpuInstructions::LDRI(0x3).encode(), 0xf365);
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assert_eq!(Chip8CpuInstructions::SDN(0x1).encode(), 0x00C1);
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assert_eq!(Chip8CpuInstructions::SLF.encode(), 0x00FC);
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assert_eq!(Chip8CpuInstructions::SRT.encode(), 0x00FB);
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assert_eq!(Chip8CpuInstructions::SCD(0x1).encode(), 0x00C1);
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assert_eq!(Chip8CpuInstructions::SCL.encode(), 0x00FC);
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assert_eq!(Chip8CpuInstructions::SCR.encode(), 0x00FB);
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assert_eq!(Chip8CpuInstructions::EXIT.encode(), 0x00FD);
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assert_eq!(Chip8CpuInstructions::ENA.encode(), 0x00FF);
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assert_eq!(Chip8CpuInstructions::DIS.encode(), 0x00FE);
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assert_eq!(Chip8CpuInstructions::HIGH.encode(), 0x00FF);
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assert_eq!(Chip8CpuInstructions::LOW.encode(), 0x00FE);
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assert_eq!(Chip8CpuInstructions::LDF2(0).encode(), 0xF030);
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assert_eq!(Chip8CpuInstructions::STR(1).encode(), 0xF175);
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assert_eq!(Chip8CpuInstructions::LIDR(1).encode(), 0xF185);
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@@ -1343,11 +1343,11 @@ fn instructions_operands_tests() {
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fn instruction_ena_dis_tests() {
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let mut x = Chip8Computer::new();
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assert!(!x.video_memory.is_highres());
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Chip8CpuInstructions::ENA.execute(&mut x);
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Chip8CpuInstructions::HIGH.execute(&mut x);
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assert!(x.video_memory.is_highres());
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Chip8CpuInstructions::ENA.execute(&mut x);
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Chip8CpuInstructions::HIGH.execute(&mut x);
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assert!(x.video_memory.is_highres());
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Chip8CpuInstructions::DIS.execute(&mut x);
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Chip8CpuInstructions::LOW.execute(&mut x);
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assert!(!x.video_memory.is_highres());
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}
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@@ -1355,24 +1355,24 @@ fn instruction_ena_dis_tests() {
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fn instruction_test_scrolling_lowres() {
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let mut x = Chip8Computer::new();
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x.video_memory = build_checkerboard();
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Chip8CpuInstructions::SRT.execute(&mut x);
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Chip8CpuInstructions::SCR.execute(&mut x);
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assert_eq!(read_test_result("test_scroll_right_4.asc"), x.dump_video_to_string());
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x = Chip8Computer::new();
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x.video_memory = build_checkerboard();
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Chip8CpuInstructions::SLF.execute(&mut x);
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Chip8CpuInstructions::SCL.execute(&mut x);
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assert_eq!(read_test_result("test_scroll_left_4.asc"), x.dump_video_to_string());
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x = Chip8Computer::new();
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x.video_memory = build_checkerboard();
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Chip8CpuInstructions::SDN(0x01).execute(&mut x);
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Chip8CpuInstructions::SCD(0x01).execute(&mut x);
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assert_eq!(read_test_result("test_video_scroll_down_1.asc"), x.dump_video_to_string());
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x = Chip8Computer::new();
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x.video_memory = build_checkerboard();
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Chip8CpuInstructions::SDN(0xA).execute(&mut x);
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Chip8CpuInstructions::SCD(0xA).execute(&mut x);
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assert_eq!(read_test_result("test_video_scroll_down_10.asc"), x.dump_video_to_string());
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}
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@@ -3,12 +3,14 @@ use gemma::chip8::instructions::Chip8CpuInstructions::*;
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use gemma::chip8::quirk_modes::QuirkMode::{Chip8, SChipModern, XOChip};
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use gemma::constants::*;
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#[derive(Clone)]
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struct InstructionTestQuirks {
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chip8: Chip8CpuInstructions,
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schip: Chip8CpuInstructions,
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xochip: Chip8CpuInstructions
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}
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#[derive(Clone)]
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struct InstructionTest {
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name: String,
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instruction: Chip8CpuInstructions,
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@@ -23,7 +25,7 @@ fn instructions_encode_decode_tests_with_quirks() {
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let it = vec![
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InstructionTest {
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name: INST_SYS.to_string(),
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instruction: Chip8CpuInstructions::SYS(0x123),
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instruction: SYS(0x123),
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operands: "0x0123".to_string(),
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asm: "SYS 0x0123".to_string(),
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encoded: 0x0123,
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@@ -35,7 +37,7 @@ fn instructions_encode_decode_tests_with_quirks() {
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},
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InstructionTest {
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name: INST_CLS.to_string(),
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instruction: Chip8CpuInstructions::CLS,
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instruction: CLS,
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asm: "CLS".to_string(),
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operands: "".to_string(),
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encoded: 0x00E0,
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@@ -47,7 +49,7 @@ fn instructions_encode_decode_tests_with_quirks() {
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},
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InstructionTest {
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name: INST_RET.to_string(),
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instruction: Chip8CpuInstructions::RET,
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instruction: RET,
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asm: "RET".to_string(),
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operands: "".to_string(),
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encoded: 0x00ee,
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@@ -57,333 +59,204 @@ fn instructions_encode_decode_tests_with_quirks() {
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xochip: RET
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}
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},
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InstructionTest {
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name: INST_JPA.to_string(),
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instruction: JPA(0x234),
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asm: "JPA 0x0234".to_string(),
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encoded: 0xb234,
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operands: "0x0234".to_string(),
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quirks: InstructionTestQuirks {
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chip8: JPA(0x0234),
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schip: JPA(0x0234),
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xochip: JPA(0x0234)
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}
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},
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InstructionTest {
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name: INST_JPX.to_string(),
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instruction: Chip8CpuInstructions::JPX(0x1, 0xab),
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instruction: JPX(0x1, 0xab),
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operands: "0x01, 0x01ab".to_string(),
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asm: "JPX 0x01, 0x01ab".to_string(),
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encoded: 0,
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encoded: 0xb1ab,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: JPX(0x1, 0xab),
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xochip: XXXXERRORINSTRUCTION,
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},
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}
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/*
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,
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},
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InstructionTest {
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name: INST_CALL.to_string(),
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instruction: Chip8CpuInstructions::CALL(0x123),
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instruction: CALL(0x123),
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asm: "CALL 0x0123".to_string(),
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encoded: 0x2123,
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operands: "0x0123".to_string()
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operands: "0x0123".to_string(),
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quirks: InstructionTestQuirks {
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chip8: CALL(0x123),
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schip: CALL(0x123),
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xochip: CALL(0x123),
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}
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},
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InstructionTest {
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name: INST_DRW.to_string(),
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instruction: Chip8CpuInstructions::DRW(0x01, 0x02, 0x03),
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instruction: DRW(0x01, 0x02, 0x03),
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operands: "0x01, 0x02, 0x03".to_string(),
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asm: "DRW 0x01, 0x02, 0x03".to_string(),
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encoded: 0xd123
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encoded: 0xd123,
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quirks: InstructionTestQuirks {
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chip8: DRW(0x1, 0x2, 0x3),
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schip: DRW(0x1, 0x2, 0x3),
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xochip: DRW(0x1, 0x2, 0x3)
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}
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},
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InstructionTest {
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name: INST_JPI.to_string(),
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instruction: Chip8CpuInstructions::JPI(0x321),
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instruction: JPI(0x321),
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operands: "0x0321".to_string(),
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asm: "JPI 0x0321".to_string(),
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encoded: 0xb321
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encoded: 0xb321,
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quirks: InstructionTestQuirks {
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chip8: JPI(0x321),
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schip: XXXXERRORINSTRUCTION,
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xochip: JPI(0x321)
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}
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},
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InstructionTest {
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name: INST_SDN.to_string(),
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instruction: Chip8CpuInstructions::SDN(0x01),
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name: INST_SCD.to_string(),
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instruction: SCD(0x01),
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operands: "0x01".to_string(),
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asm: "SDN 0x01".to_string(),
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encoded: 0x00c1
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asm: "SCD 0x01".to_string(),
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encoded: 0x00c1,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: SCD(0x1),
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xochip: SCD(0x1)
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}
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},
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InstructionTest {
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name: INST_SRT.to_string(),
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instruction: Chip8CpuInstructions::SRT,
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name: INST_SCR.to_string(),
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instruction: Chip8CpuInstructions::SCR,
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operands: "".to_string(),
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asm: "SRT".to_string(),
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encoded: 0x00FB
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asm: "SCR".to_string(),
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encoded: 0x00FB,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: SCR,
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xochip: SCR
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}
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},
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InstructionTest {
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name: INST_SLF.to_string(),
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instruction: Chip8CpuInstructions::SLF,
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name: INST_SCL.to_string(),
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instruction: SCL,
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operands: "".to_string(),
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asm: "SLF".to_string(),
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asm: "SCL".to_string(),
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encoded: 0x00FC,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: SCL,
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xochip: SCL
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}
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},
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InstructionTest {
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name: INST_EXIT.to_string(),
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instruction: Chip8CpuInstructions::EXIT,
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instruction: EXIT,
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operands: "".to_string(),
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asm: "EXIT".to_string(),
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encoded: 0x00FD,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: EXIT,
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xochip: EXIT
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}
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},
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InstructionTest {
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name: INST_DIS.to_string(),
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instruction: Chip8CpuInstructions::DIS,
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name: INST_LOW.to_string(),
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instruction: LOW,
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operands: "".to_string(),
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asm: "DIS".to_string(),
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asm: "LOW".to_string(),
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encoded: 0x00FE,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: LOW,
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xochip: LOW,
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}
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},
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InstructionTest {
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name: INST_ENA.to_string(),
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instruction: Chip8CpuInstructions::ENA,
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name: INST_HIGH.to_string(),
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instruction: HIGH,
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operands: "".to_string(),
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asm: "ENA".to_string(),
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asm: "HIGH".to_string(),
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encoded: 0x00FF,
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quirks: InstructionTestQuirks {
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chip8: XXXXERRORINSTRUCTION,
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schip: HIGH,
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xochip: HIGH
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}
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},
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InstructionTest {
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name: INST_SEX.to_string(),
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instruction: Chip8CpuInstructions::SEX(0x01, 0xfa),
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operands: "0x01, 0xfa".to_string(),
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asm: "SEX 0x01, 0xfa".to_string(),
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encoded: 0x32fa,
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encoded: 0x31fa,
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quirks: InstructionTestQuirks {
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chip8: Chip8CpuInstructions::SEX(0x1, 0xfa),
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schip: Chip8CpuInstructions::SEX(0x1, 0xfa),
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xochip: Chip8CpuInstructions::SEX(0x1, 0xfa)
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},
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},
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InstructionTest {
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name: INST_SNEB.to_string(),
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instruction: Chip8CpuInstructions::SNEB(0x01, 0xab),
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operands: "0x01, 0xab".to_string(),
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asm: "SNEB 0x01, 0xab".to_string(),
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encoded: 0x41ab,
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quirks: InstructionTestQuirks {
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chip8: SNEB(0x01, 0xab),
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schip: SNEB(0x01, 0xab),
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xochip: SNEB(0x01, 0xab),
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},
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},
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InstructionTest {
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name: INST_SEY.to_string(),
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instruction: Chip8CpuInstructions::SEY(0x1, 0x2),
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operands: "0x1, 0x2".to_string(),
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asm: "SEY 0x1, 0x2".to_string(),
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encoded: 0x5120
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encoded: 0x5120,
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quirks: InstructionTestQuirks {
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chip8: SEY(0x1, 0x2),
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schip: SEY(0x1, 0x2),
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xochip: SEY(0x1, 0x2)
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}
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},
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InstructionTest {
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name: INST_LDR.to_string(),
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instruction: Chip8CpuInstructions::LDR(0xa, 0xbe),
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instruction: LDR(0xa, 0xbe),
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operands: "0x0a, 0xbe".to_string(),
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asm: "LDR 0x0a, 0xbe".to_string(),
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encoded: 0x6abe,
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quirks: InstructionTestQuirks {
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chip8: LDR(0xa, 0xbe),
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schip: LDR(0xa, 0xbe),
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xochip: LDR(0xa, 0xbe)
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},
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},
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InstructionTest {
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name: INST_ADD.to_string(),
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instruction: Chip8CpuInstructions::ADD(0x01, 0xab),
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operands: "0x01, 0xab".to_string(),
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asm: "ADD 0x01, 0xab".to_string(),
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encoded: 0x71ab
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encoded: 0x71ab,
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quirks: InstructionTestQuirks {
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chip8: ADD(0x01, 0xab),
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schip: ADD(0x01, 0xab),
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xochip: ADD(0x01, 0xab),
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},
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},
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InstructionTest {
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name: INST_LDRY.to_string(),
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instruction: Chip8CpuInstructions::LDR_Y(0x1, 0x2),
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operands: "0x1, 0x2".to_string(),
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asm: "LDRY 0x1, 0x2".to_string(),
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encoded: 0x8120,
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name: INST_LDRK.to_string(),
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instruction: Chip8CpuInstructions::LDRK(0x6),
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operands: "0x06".to_string(),
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asm: "LDRK 0x06".to_string(),
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encoded: 0xF60A,
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quirks: InstructionTestQuirks {
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chip8: Chip8CpuInstructions::LDRK(0x6),
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schip: Chip8CpuInstructions::LDRK(0x6),
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xochip: Chip8CpuInstructions::LDRK(0x6),
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},
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},
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InstructionTest {
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name: INST_OR.to_string(),
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instruction: Chip8CpuInstructions::OR(0x1, 0x2),
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operands: "0x1, 0x2".to_string(),
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asm: "OR 0x1, 0x2".to_string(),
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encoded: 0x8121
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},
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InstructionTest {
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name: INST_AND.to_string(),
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instruction: Chip8CpuInstructions::AND(0xb, 0xc),
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operands: "0xb, 0xc".to_string(),
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asm: "AND 0xb, 0xc".to_string(),
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encoded: 0x8bc2,
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},
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InstructionTest {
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name: INST_ORY.to_string(),
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instruction: Chip8CpuInstructions::ORY(0xa, 0x3),
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operands: "0xa, 0x3".to_string(),
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asm: "ORY 0xa, 0x3".to_string(),
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encoded: 0x8a33
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},
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InstructionTest {
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name: INST_ADDR.to_string(),
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instruction: Chip8CpuInstructions::ADDR(0x1, 0x2),
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operands: "0x1, 0x2".to_string(),
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asm: "ADDR 0x1, 0x2".to_string(),
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encoded: 0x8124
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},
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InstructionTest {
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name: INST_SUB.to_string(),
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instruction: Chip8CpuInstructions::SUB(0x4, 0x5),
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operands: "0x4, 0x5".to_string(),
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asm: "SUB 0x4, 0x5".to_string(),
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encoded: 0x8455
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},
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InstructionTest {
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name: INST_SHR.to_string(),
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instruction: Chip8CpuInstructions::SHR(0x01, 0x1),
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operands: "0x1, 0x1".to_string(),
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asm: "SHR 0x1, 0x1".to_string(),
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encoded: 0x8116,
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},
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InstructionTest {
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name: INST_SUBC.to_string(),
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instruction: Chip8CpuInstructions::SUBC(0xf, 0xa),
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operands: "0xf, 0xa".to_string(),
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asm: "SUBC 0xf, 0xa".to_string(),
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encoded: 0x8fa7,
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},
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InstructionTest {
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name: INST_SHL.to_string(),
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instruction: Chip8CpuInstructions::SHL(0x1, 0x4),
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operands: "0x1, 0x4".to_string(),
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asm: "SHL 0x1, 0x4".to_string(),
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encoded: 0x814e,
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},
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InstructionTest {
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name: INST_SNEY.to_string(),
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instruction: Chip8CpuInstructions::SNEY(0x4, 0x5),
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operands: "0x4, 0x5".to_string(),
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asm: "SNEY 0x4, 0x5".to_string(),
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encoded: 0x9450,
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},
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InstructionTest {
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name: INST_LDIA.to_string(),
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instruction: Chip8CpuInstructions::LDIA(0xbee),
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operands: "0x0bee".to_string(),
|
||||
asm: "LDIA 0x0bee".to_string(),
|
||||
encoded: 0x9bee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPI.to_string(),
|
||||
instruction: Chip8CpuInstructions::JPI(0xfee),
|
||||
operands: "0x0fee".to_string(),
|
||||
asm: "JPI 0x0fee".to_string(),
|
||||
encoded: 0xbfee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_RND.to_string(),
|
||||
instruction: Chip8CpuInstructions::RND(0x1, 0xae),
|
||||
operands: "0x01, 0xae".to_string(),
|
||||
asm: "RND 0x01, 0xae".to_string(),
|
||||
encoded: 0xc1ae,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_DRW.to_string(),
|
||||
instruction: Chip8CpuInstructions::DRW(0x1, 0x2, 0xf),
|
||||
operands: "0x01, 0x02, 0x0f".to_string(),
|
||||
asm: "DRW 0x01, 0x02, 0x0f".to_string(),
|
||||
encoded: 0xd12f
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SKP.to_string(),
|
||||
instruction: Chip8CpuInstructions::SKP(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "SKP 0x04".to_string(),
|
||||
encoded: 0xe49e,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SKNP.to_string(),
|
||||
instruction: Chip8CpuInstructions::SKNP(0x3),
|
||||
operands: "0x03".to_string(),
|
||||
asm: "SKNP 0x03".to_string(),
|
||||
encoded: 0x83a1
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRD.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRD(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "LDRD 0x04".to_string(),
|
||||
encoded: 0xF407
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRK.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRK(0x6),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "LDRK 0x06".to_string(),
|
||||
encoded: 0xF60A
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDD.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDD(0x02),
|
||||
operands: "0x02".to_string(),
|
||||
asm: "LDD 0x02".to_string(),
|
||||
encoded: 0xF215,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRI.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRI(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDRI 0x01".to_string(),
|
||||
encoded: 0xF118,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_BCD.to_string(),
|
||||
instruction: Chip8CpuInstructions::BCD(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "BCD 0x04".to_string(),
|
||||
encoded: 0xF433,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDFX(0x5),
|
||||
operands: "0x05".to_string(),
|
||||
asm: "LDF 0x05".to_string(),
|
||||
encoded: 0xF529
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF2.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDF2(0x6),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "LDF2 0x06".to_string(),
|
||||
encoded: 0xF630
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIX.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIX(0x5),
|
||||
operands: "0x05".to_string(),
|
||||
asm: "LDIX 0x05".to_string(),
|
||||
encoded: 0xF555
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIS.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIS(0xf),
|
||||
operands: "0x0f".to_string(),
|
||||
asm: "LDIS 0x0f".to_string(),
|
||||
encoded: 0xFF18
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LIDR.to_string(),
|
||||
instruction: Chip8CpuInstructions::LIDR(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "LIDR 0x04".to_string(),
|
||||
encoded: 0xF485,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_STR.to_string(),
|
||||
instruction: Chip8CpuInstructions::STR(0xa),
|
||||
operands: "0x0a".to_string(),
|
||||
asm: "STR 0x0a".to_string(),
|
||||
encoded: 0xF000
|
||||
}
|
||||
*/
|
||||
];
|
||||
|
||||
for current in it {
|
||||
assert_eq!(current.instruction.name(), current.name);
|
||||
let i = current.instruction;
|
||||
assert!(matches!(Chip8CpuInstructions::decode(current.encoded, &Chip8), i));
|
||||
assert_eq!(i.to_string(), current.asm);
|
||||
let instruction = current.clone().instruction;
|
||||
let asm = Chip8CpuInstructions::from_str(¤t.asm);
|
||||
assert_eq!(i.to_string(), asm.to_string());
|
||||
assert_eq!(i.operands(), current.operands);
|
||||
// test quirks
|
||||
let as_chip8 = Chip8CpuInstructions::decode(current.encoded, &Chip8);
|
||||
let quirks_chip8 = current.quirks.chip8;
|
||||
let as_schip = Chip8CpuInstructions::decode(current.encoded, &SChipModern);
|
||||
@@ -391,9 +264,224 @@ fn instructions_encode_decode_tests_with_quirks() {
|
||||
let as_xochip = Chip8CpuInstructions::decode(current.encoded, &XOChip);
|
||||
let quirks_xochip = current.quirks.xochip;
|
||||
|
||||
// ** CONVERSION **
|
||||
// -> Integer to Instruction
|
||||
assert!(matches!(Chip8CpuInstructions::decode(current.encoded, &Chip8), i));
|
||||
// -> Instruction to Integer
|
||||
println!("TESTING INSTRUCTION TO INTEGER FOR {:?} / {:04x} {:04x}", current.instruction, current.encoded, instruction.encode());
|
||||
assert_eq!(current.encoded, instruction.encode());
|
||||
// -> Instruction to String
|
||||
assert_eq!(instruction.to_string(), current.asm);
|
||||
assert_eq!(instruction.operands(), current.operands);
|
||||
assert_eq!(current.instruction.name(), current.name);
|
||||
// -> String to Instruction
|
||||
assert!(matches!(Chip8CpuInstructions::from_str(¤t.name), asm));
|
||||
// ** QUIRKS **
|
||||
assert!(matches!(as_chip8, quirks_chip8));
|
||||
assert!(matches!(as_schip, quirks_schip));
|
||||
assert!(matches!(as_xochip, quirks_xochip));
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
|
||||
|
||||
|
||||
InstructionTest {
|
||||
name: INST_LDRY.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDR_Y(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "LDRY 0x1, 0x2".to_string(),
|
||||
encoded: 0x8120,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_OR.to_string(),
|
||||
instruction: Chip8CpuInstructions::OR(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "OR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8121
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_AND.to_string(),
|
||||
instruction: Chip8CpuInstructions::AND(0xb, 0xc),
|
||||
operands: "0xb, 0xc".to_string(),
|
||||
asm: "AND 0xb, 0xc".to_string(),
|
||||
encoded: 0x8bc2,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ORY.to_string(),
|
||||
instruction: Chip8CpuInstructions::ORY(0xa, 0x3),
|
||||
operands: "0xa, 0x3".to_string(),
|
||||
asm: "ORY 0xa, 0x3".to_string(),
|
||||
encoded: 0x8a33
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_ADDR.to_string(),
|
||||
instruction: Chip8CpuInstructions::ADDR(0x1, 0x2),
|
||||
operands: "0x1, 0x2".to_string(),
|
||||
asm: "ADDR 0x1, 0x2".to_string(),
|
||||
encoded: 0x8124
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUB.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUB(0x4, 0x5),
|
||||
operands: "0x4, 0x5".to_string(),
|
||||
asm: "SUB 0x4, 0x5".to_string(),
|
||||
encoded: 0x8455
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SHR.to_string(),
|
||||
instruction: Chip8CpuInstructions::SHR(0x01, 0x1),
|
||||
operands: "0x1, 0x1".to_string(),
|
||||
asm: "SHR 0x1, 0x1".to_string(),
|
||||
encoded: 0x8116,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SUBC.to_string(),
|
||||
instruction: Chip8CpuInstructions::SUBC(0xf, 0xa),
|
||||
operands: "0xf, 0xa".to_string(),
|
||||
asm: "SUBC 0xf, 0xa".to_string(),
|
||||
encoded: 0x8fa7,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SHL.to_string(),
|
||||
instruction: Chip8CpuInstructions::SHL(0x1, 0x4),
|
||||
operands: "0x1, 0x4".to_string(),
|
||||
asm: "SHL 0x1, 0x4".to_string(),
|
||||
encoded: 0x814e,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SNEY.to_string(),
|
||||
instruction: Chip8CpuInstructions::SNEY(0x4, 0x5),
|
||||
operands: "0x4, 0x5".to_string(),
|
||||
asm: "SNEY 0x4, 0x5".to_string(),
|
||||
encoded: 0x9450,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIA.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIA(0xbee),
|
||||
operands: "0x0bee".to_string(),
|
||||
asm: "LDIA 0x0bee".to_string(),
|
||||
encoded: 0x9bee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_JPI.to_string(),
|
||||
instruction: Chip8CpuInstructions::JPI(0xfee),
|
||||
operands: "0x0fee".to_string(),
|
||||
asm: "JPI 0x0fee".to_string(),
|
||||
encoded: 0xbfee
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_RND.to_string(),
|
||||
instruction: Chip8CpuInstructions::RND(0x1, 0xae),
|
||||
operands: "0x01, 0xae".to_string(),
|
||||
asm: "RND 0x01, 0xae".to_string(),
|
||||
encoded: 0xc1ae,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_DRW.to_string(),
|
||||
instruction: Chip8CpuInstructions::DRW(0x1, 0x2, 0xf),
|
||||
operands: "0x01, 0x02, 0x0f".to_string(),
|
||||
asm: "DRW 0x01, 0x02, 0x0f".to_string(),
|
||||
encoded: 0xd12f
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SKP.to_string(),
|
||||
instruction: Chip8CpuInstructions::SKP(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "SKP 0x04".to_string(),
|
||||
encoded: 0xe49e,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_SKNP.to_string(),
|
||||
instruction: Chip8CpuInstructions::SKNP(0x3),
|
||||
operands: "0x03".to_string(),
|
||||
asm: "SKNP 0x03".to_string(),
|
||||
encoded: 0x83a1
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRD.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRD(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "LDRD 0x04".to_string(),
|
||||
encoded: 0xF407
|
||||
}
|
||||
InstructionTest {
|
||||
name: INST_LDD.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDD(0x02),
|
||||
operands: "0x02".to_string(),
|
||||
asm: "LDD 0x02".to_string(),
|
||||
encoded: 0xF215,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDRI.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDRI(0x01),
|
||||
operands: "0x01".to_string(),
|
||||
asm: "LDRI 0x01".to_string(),
|
||||
encoded: 0xF118,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_BCD.to_string(),
|
||||
instruction: Chip8CpuInstructions::BCD(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "BCD 0x04".to_string(),
|
||||
encoded: 0xF433,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDFX(0x5),
|
||||
operands: "0x05".to_string(),
|
||||
asm: "LDF 0x05".to_string(),
|
||||
encoded: 0xF529
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDF2.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDF2(0x6),
|
||||
operands: "0x06".to_string(),
|
||||
asm: "LDF2 0x06".to_string(),
|
||||
encoded: 0xF630
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIX.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIX(0x5),
|
||||
operands: "0x05".to_string(),
|
||||
asm: "LDIX 0x05".to_string(),
|
||||
encoded: 0xF555
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LDIS.to_string(),
|
||||
instruction: Chip8CpuInstructions::LDIS(0xf),
|
||||
operands: "0x0f".to_string(),
|
||||
asm: "LDIS 0x0f".to_string(),
|
||||
encoded: 0xFF18
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_LIDR.to_string(),
|
||||
instruction: Chip8CpuInstructions::LIDR(0x4),
|
||||
operands: "0x04".to_string(),
|
||||
asm: "LIDR 0x04".to_string(),
|
||||
encoded: 0xF485,
|
||||
},
|
||||
InstructionTest {
|
||||
name: INST_STR.to_string(),
|
||||
instruction: Chip8CpuInstructions::STR(0xa),
|
||||
operands: "0x0a".to_string(),
|
||||
asm: "STR 0x0a".to_string(),
|
||||
encoded: 0xF000
|
||||
}
|
||||
|
||||
|
||||
InstructionTest {
|
||||
name: INST_JPA.to_string(),
|
||||
instruction: JPA(0x234),
|
||||
asm: "JPA 0x0234".to_string(),
|
||||
encoded: 0xb234,
|
||||
operands: "0x0234".to_string(),
|
||||
quirks: InstructionTestQuirks {
|
||||
chip8: JPA(0x0234),
|
||||
schip: JPA(0x0234),
|
||||
xochip: JPA(0x0234)
|
||||
}
|
||||
},
|
||||
*/
|
||||
Reference in New Issue
Block a user