diff --git a/.idea/workspace.xml b/.idea/workspace.xml index c530292..c1eaa0a 100644 --- a/.idea/workspace.xml +++ b/.idea/workspace.xml @@ -8,10 +8,13 @@ - - + + + + + - { + "keyToString": { + "Cargo.Build `Run emmagui`.executor": "Run", + "Cargo.Build `Run gemmaegui_viewer`.executor": "Run", + "Cargo.Build `Run gemmaegui`.executor": "Run", + "Cargo.Build `Run gemmaimgui`.executor": "Run", + "Cargo.Build `Run trevors_chip8_toy`.executor": "Run", + "Cargo.Build `Test chip8::computer::test::cls_test`.executor": "Run", + "Cargo.Build `Test chip8::instructions::test::LdStVx_test`.executor": "Run", + "Cargo.Build `Test chip8::instructions::test::random_produces_different_numbers`.executor": "Run", + "Cargo.Build `Test chip8::instructions::test::series8xy6_corex_tests`.executor": "Run", + "Cargo.Build `Test chip8::instructions::test::shl_vx_vy_test`.executor": "Run", + "Cargo.Build `Test chip8::util::test::byte_to_bool_changes`.executor": "Run", + "Cargo.Build `Test chip8::util::test::ubln`.executor": "Run", + "Cargo.Build `Test chip8::video::test::poke_byte_test`.executor": "Run", + "Cargo.Build `Test chip8::video::test::poke_byte`.executor": "Run", + "Cargo.Build `Test computer::test`.executor": "Run", + "Cargo.Build `Test instructions::test (1)`.executor": "Run", + "Cargo.Build `Test instructions::test`.executor": "Run", + "Cargo.Build gemma.executor": "Run", + "Cargo.Run emmagui.executor": "Run", + "Cargo.Run gemmaegui.executor": "Run", + "Cargo.Run gemmaegui_viewer.executor": "Debug", + "Cargo.Run gemmaimgui.executor": "Run", + "Cargo.Run trevors_chip8_toy.executor": "Debug", + "Cargo.Test chip8::computer::test::cls_test.executor": "Run", + "Cargo.Test chip8::computer::test::decoder_test_valid_instructions.executor": "Run", + "Cargo.Test chip8::instructions::test::LdStVx_test.executor": "Run", + "Cargo.Test chip8::instructions::test::LdVxDt_test.executor": "Run", + "Cargo.Test chip8::instructions::test::LdiAddr_test.executor": "Run", + "Cargo.Test chip8::instructions::test::RndVxByte_test.executor": "Run", + "Cargo.Test chip8::instructions::test::ShrVxVy_test.executor": "Run", + "Cargo.Test chip8::instructions::test::SneVxVy_test.executor": "Run", + "Cargo.Test chip8::instructions::test::decoder_test_invalid_instructions.executor": "Run", + "Cargo.Test chip8::instructions::test::draw_nibble_vx_vy_n_test.executor": "Debug", + "Cargo.Test chip8::instructions::test::encode_decode_test.executor": "Run", + "Cargo.Test chip8::instructions::test::random_produces_different_numbers.executor": "Run", + "Cargo.Test chip8::instructions::test::series4000_corex_tests.executor": "Run", + "Cargo.Test chip8::instructions::test::series8xy4_corex_tests.executor": "Run", + "Cargo.Test chip8::instructions::test::series8xy6_corex_tests.executor": "Run", + "Cargo.Test chip8::instructions::test::shl_vx_vy_test.executor": "Run", + "Cargo.Test chip8::instructions::test::subn_vx_vy_test.executor": "Run", + "Cargo.Test chip8::util::test::bool_to_byte_changes.executor": "Run", + "Cargo.Test chip8::util::test::byte_to_bool_changes.executor": "Run", + "Cargo.Test chip8::util::test::ubln.executor": "Run", + "Cargo.Test chip8::video::test::poke_byte.executor": "Run", + "Cargo.Test chip8::video::test::poke_byte_test.executor": "Run", + "Cargo.Test chip8::video::test::poke_sprite_test.executor": "Debug", + "Cargo.Test computer::test.executor": "Debug", + "Cargo.Test instructions::test (1).executor": "Debug", + "Cargo.Test instructions::test.executor": "Debug", + "Cargo.Test sound_timer::test.executor": "Run", + "Cargo.Test util::test.executor": "Run", + "Cargo.Test video::test.executor": "Coverage", + "RunOnceActivity.ShowReadmeOnStart": "true", + "RunOnceActivity.rust.reset.selective.auto.import": "true", + "git-widget-placeholder": "rename__instructions", + "last_opened_file_path": "/home/tmerritt/Projects/chip8_toy/gemmaimgui", + "node.js.detected.package.eslint": "true", + "node.js.selected.package.eslint": "(autodetect)", + "nodejs_package_manager_path": "npm", + "org.rust.cargo.project.model.PROJECT_DISCOVERY": "true", + "org.rust.cargo.project.model.impl.CargoExternalSystemProjectAware.subscribe.first.balloon": "", + "org.rust.first.attach.projects": "true", + "settings.editor.selected.configurable": "language.rust.build.tool.cargo" }, - "keyToStringList": { - "com.intellij.ide.scratch.ScratchImplUtil$2/New Scratch File": [ - "TEXT" + "keyToStringList": { + "com.intellij.ide.scratch.ScratchImplUtil$2/New Scratch File": [ + "TEXT" ] } -}]]> +} @@ -230,6 +233,8 @@ + + diff --git a/gemma/src/chip8/instructions.rs b/gemma/src/chip8/instructions.rs index 831214a..0955c34 100644 --- a/gemma/src/chip8/instructions.rs +++ b/gemma/src/chip8/instructions.rs @@ -8,6 +8,7 @@ use crate::chip8::computer::{Chip8Computer}; use crate::chip8::cpu_states::Chip8CpuStates::WaitingForKey; use crate::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION; use crate::chip8::util::InstructionUtil; +use crate::constants::{INST_ADD, INST_ADDI, INST_ADDR, INST_AND, INST_BCD, INST_CALL, INST_CLS, INST_DRW, INST_EXIT, INST_JPA, INST_JPI, INST_LDD, INST_LDF, INST_LDF2, INST_LDIA, INST_LDIX, INST_LDR, INST_LDRD, INST_LDRI, INST_LDRK, INST_LDRY, INST_LIDR, INST_LIDS}; /* nnn or addr - A 12-bit value, the lowest 12 bits of the instruction @@ -21,7 +22,7 @@ kk or byte - An 8-bit value, the lowest 8 bits of the instruction pub enum Chip8CpuInstructions { /// 0nnn /// Exit to System Call at nnn - SysAddr(u16), + SYS(u16), /// 00E0 /// Clear the display. CLS, @@ -35,57 +36,57 @@ pub enum Chip8CpuInstructions { /// Jump to location nnn. /// /// The interpreter sets the program counter to nnn. - JpAddr(u16), + JPA(u16), /// 2nnn /// Call subroutine at nnn. /// /// The interpreter increments the stack pointer, then puts the current PC on the top /// of the stack. The PC is then set to nnn. - CallAddr(u16), + CALL(u16), /// 0x3xkk /// Skip next instruction if Vx = kk. /// /// The interpreter compares register Vx to kk, and if they are equal, increments the /// program counter by 2. - SeVxByte(u8, u8), + SEX(u8, u8), /// 4xkk /// Skip next instruction if Vx != kk. /// /// The interpreter compares register Vx to kk, and if they are not equal, increments /// the program counter by 2. - SneVxByte(u8, u8), + SNEB(u8, u8), /// 5xy0 /// Skip next instruction if Vx = Vy. /// /// The interpreter compares register Vx to register Vy, and if they are equal, increments /// the program counter by 2. - SeVxVy(u8, u8), + SEY(u8, u8), /// 6xkk /// Set Vx = kk - LdVxByte(u8, u8), + LDR(u8, u8), /// 7xkk /// The interpreter puts the value kk into register Vx. - AddVxByte(u8, u8), + ADD(u8, u8), /// 8xy0 /// Adds the value kk to the value of register Vx, then stores the result in Vx. - LdVxVy(u8, u8), + LDR_Y(u8, u8), /// 8xy1 /// Stores the value of register Vy in register Vx. - OrVxVy(u8, u8), + OR(u8, u8), /// 8xy2 /// Set Vx = Vx OR Vy. /// /// Performs a bitwise OR on the values of Vx and Vy, then stores the result in Vx. /// A bitwise OR compares the corrseponding bits from two values, and if either /// bit is 1, then the same bit in the result is also 1. Otherwise, it is 0. - AndVxVy(u8, u8), + AND(u8, u8), /// 8xy3 /// Set Vx = Vx AND Vy. /// /// Performs a bitwise AND on the values of Vx and Vy, then stores the result in Vx. /// A bitwise AND compares the corrseponding bits from two values, and if both bits /// are 1, then the same bit in the result is also 1. Otherwise, it is 0. - XorVxVy(u8, u8), + ORY(u8, u8), /// 8xy4 /// Set Vx = Vx XOR Vy. /// @@ -93,53 +94,53 @@ pub enum Chip8CpuInstructions { /// result in Vx. An exclusive OR compares the corrseponding bits from two values, /// and if the bits are not both the same, then the corresponding bit in the result /// is set to 1. Otherwise, it is 0. - AddVxVy(u8, u8), + ADDR(u8, u8), /// 8xy5 /// Set Vx = Vx + Vy, set VF = carry. /// /// The values of Vx and Vy are added together. If the result is greater than 8 bits /// (i.e., > 255,) VF is set to 1, otherwise 0. Only the lowest 8 bits of the result /// are kept, and stored in Vx. - SubVxVy(u8, u8), + SUB(u8, u8), /// 8xy6 /// Set Vx = Vx - Vy, set VF = NOT borrow. /// /// If Vx > Vy, then VF is set to 1, otherwise 0. Then Vy is subtracted from Vx, and the /// results stored in Vx. - ShrVxVy(u8, u8), + SHR(u8, u8), /// 8xy7 /// If the least-significant bit of Vx is 1, then VF is set to 1, otherwise 0. Then Vx /// is divided by 2. - SubnVxVy(u8, u8), + SUBC(u8, u8), /// 8xye /// Set Vx = Vy - Vx, set VF = NOT borrow. // /// If Vy > Vx, then VF is set to 1, otherwise 0. Then Vx is subtracted from Vy, and the /// results stored in Vx. - ShlVxVy(u8, u8), + SHL(u8, u8), /// 9xy0 /// Skip next instruction if Vx != Vy. /// /// The values of Vx and Vy are compared, and if they are not equal, the program /// counter is increased by 2. - SneVxVy(u8, u8), + SNEY(u8, u8), /// Annn /// Set I = nnn. /// /// The value of register I is set to nnn - LdIAddr(u16), + LDIA(u16), /// Bnnn /// Jump to location nnn + V0. /// /// The program counter is set to nnn plus the value of V0. - JpV0Addr(u16), + JPI(u16), /// Cxkk /// Set Vx = random byte AND kk. /// /// The interpreter generates a random number from 0 to 255, which is then /// ANDed with the value kk. The results are stored in Vx. See instruction /// 8xy2 for more information on AND. - RndVxByte(u8, u8), + RND(u8, u8), /// Dxyn /// Display n-byte sprite starting at memory location I at (Vx, Vy), set VF = collision. /// @@ -157,205 +158,205 @@ pub enum Chip8CpuInstructions { /// /// Show N-byte sprite from M(I) at Coords (VX,VY) VF = Collision. /// If N=0 AND ExtendedMode, 16x16 sprite - DrawVxVyNibble(u8, u8, u8), + DRW(u8, u8, u8), /// Ex9E /// Skip next instruction if key with the value of Vx is pressed. /// /// Checks the keyboard, and if the key corresponding to the value of Vx is currently /// in the down position, PC is increased by 2. - SkpVx(u8), + SKP(u8), /// ExA1 /// Skip next instruction if key with the value of Vx is not pressed. /// /// Checks the keyboard, and if the key corresponding to the value of Vx is currently in /// the up position, PC is increased by 2. - SnkpVx(u8), + SKNP(u8), /// Fx07 /// The value of DT is placed into Vx. - LdVxDt(u8), + LDRD(u8), /// Fx0A /// Wait for a key press, store the value of the key in Vx. /// /// All execution stops until a key is pressed, then the value of that key is stored in Vx. - LdVxK(u8), + LDRK(u8), /// Fx15 /// Set delay timer = Vx. /// /// DT is set equal to the value of Vx. - LdDtVx(u8), // 0xFx15 Set Delay Timer + LDD(u8), // 0xFx15 Set Delay Timer /// Fx18 /// Set sound timer = Vx. /// /// ST is set equal to the value of Vx. - LdStVx(u8), + LDI_S(u8), /// Fx1E - ADD I, Vx /// Set I = I + Vx. /// /// The values of I and Vx are added, and the results are stored in I. - AddIVx(u8), + ADDI(u8), /// Fx29 - LD F, Vx /// Set I = location of sprite for digit Vx. /// /// The value of I is set to the location for the hexadecimal sprite /// corresponding to the value of Vx. See section 2.4, Display, for /// more information on the Chip-8 hexadecimal font. - LdFVx(u8), + LDFX(u8), /// Fx33 - LD B, Vx /// Store BCD representation of Vx in memory locations I, I+1, and I+2. /// /// The interpreter takes the decimal value of Vx, and places the hundreds /// digit in memory at location in I, the tens digit at location I+1, and the /// ones digit at location I+2. - LdBVx(u8), + BCD(u8), /// Fx55 - LD [I], Vx /// Store registers V0 through Vx in memory starting at location I. /// /// The interpreter copies the values of registers V0 through Vx into memory, /// starting at the address in I. - LdIVx(u8), + LDIX(u8), /// Fx65 - LD Vx, [I] /// Read registers V0 through Vx from memory starting at location I. /// /// The interpreter reads values from memory starting at location I into registers /// V0 through Vx. - LdVxI(u8), + LDRI(u8), XXXXERRORINSTRUCTION, /* START OF SCHIP-8 */ /// 00CN /// /// Scrolll Display N Lines Down - ScrDn(u8), + SDN(u8), /// 00FB /// /// Scroll 4 lines Right - ScrRt, + SRT, /// 00FC /// /// Scroll 4 lines Left - ScrLf, + SLF, /// 00FE /// /// Disable Extended Mode - VidDis, + DIS, /// 00FF /// /// Enable Extended Mode - VidEna, + ENA, /// 00FD /// /// Exit App - Exit, + EXIT, /// FX30 /// /// Point I to 10 yte font sprite for digit VX (0..9) - LdFVx10(u8), + LDF2(u8), /// FX75 /// /// Store V0..VX in RPL user flags (X <= 7 - StRpl(u8), + STR(u8), /// FX85 /// /// Load V0..VX from RPL user flags (X <= 7) - LdRpl(u8), + LIDR(u8), } impl Chip8CpuInstructions { pub fn name(&self) -> &str { match self { - Chip8CpuInstructions::AddIVx(_) => "AddIVx", - Chip8CpuInstructions::AddVxByte(_, _) => "AddVxByte", - Chip8CpuInstructions::AddVxVy(_, _) => "AddVxVy", - Chip8CpuInstructions::AndVxVy(_, _) => "AndVxVy", - Chip8CpuInstructions::CLS => "CLS", - Chip8CpuInstructions::CallAddr(_) => "CALL", - Chip8CpuInstructions::DrawVxVyNibble(_, _, _) => "DrawVxVyNibble", - Chip8CpuInstructions::Exit => "EXIT", - Chip8CpuInstructions::JpAddr(_) => "JPA", - Chip8CpuInstructions::JpV0Addr(_) => "JpV0Addr", - Chip8CpuInstructions::LdBVx(_) => "LdBVx", - Chip8CpuInstructions::LdDtVx(_) => "LdDtVx", - Chip8CpuInstructions::LdFVx(_) => "LdFVx", - Chip8CpuInstructions::LdFVx10(x) => "LdFVx10", - Chip8CpuInstructions::LdIAddr(_) => "LdIAddr", - Chip8CpuInstructions::LdIVx(_) => "LdIVx", - Chip8CpuInstructions::LdRpl(x) => "LdRpl", - Chip8CpuInstructions::LdStVx(_) => "LdStVx", - Chip8CpuInstructions::LdVxByte(_, _) => "LdVxByte", - Chip8CpuInstructions::LdVxDt(_) => "LdVxDt", - Chip8CpuInstructions::LdVxI(_) => "LdVxI", - Chip8CpuInstructions::LdVxK(_) => "LdVxK", - Chip8CpuInstructions::LdVxVy(_, _) => "LdVxVy", - Chip8CpuInstructions::OrVxVy(_, _) => "OrVxVy", + Chip8CpuInstructions::ADDI(_) => INST_ADDI, + Chip8CpuInstructions::ADD(_, _) => INST_ADD, + Chip8CpuInstructions::ADDR(_, _) => INST_ADDR, + Chip8CpuInstructions::AND(_, _) => INST_AND, + Chip8CpuInstructions::CLS => INST_CLS, + Chip8CpuInstructions::CALL(_) => INST_CALL, + Chip8CpuInstructions::DRW(_, _, _) => INST_DRW, + Chip8CpuInstructions::EXIT => INST_EXIT, + Chip8CpuInstructions::JPA(_) => INST_JPA, + Chip8CpuInstructions::JPI(_) => INST_JPI, + Chip8CpuInstructions::BCD(_) => INST_BCD, + Chip8CpuInstructions::LDD(_) => INST_LDD, + Chip8CpuInstructions::LDFX(_) => INST_LDF, + Chip8CpuInstructions::LDF2(_) => INST_LDF2, + Chip8CpuInstructions::LDIA(_) => INST_LDIA, + Chip8CpuInstructions::LDIX(_) => INST_LDIX, + Chip8CpuInstructions::LIDR(_) => INST_LIDR, + Chip8CpuInstructions::LDI_S(_) => INST_LIDS, + Chip8CpuInstructions::LDR(_, _) => INST_LDR, + Chip8CpuInstructions::LDRD(_) => INST_LDRD, + Chip8CpuInstructions::LDRI(_) => INST_LDRI, + Chip8CpuInstructions::LDRK(_) => INST_LDRK, + Chip8CpuInstructions::LDR_Y(_, _) => INST_LDRY, + Chip8CpuInstructions::OR(_, _) => "OR", Chip8CpuInstructions::RET => "RET", - Chip8CpuInstructions::RndVxByte(_, _) => "RndVxByte", - Chip8CpuInstructions::ScrDn(_) => "ScrDn", - Chip8CpuInstructions::ScrLf => "ScrLf", - Chip8CpuInstructions::ScrRt => "ScrRt", - Chip8CpuInstructions::SeVxByte(_, _) => "SeVxByte", - Chip8CpuInstructions::SeVxVy(_, _) => "SeVeVy", - Chip8CpuInstructions::ShlVxVy(_, _) => "ShlVxVy", - Chip8CpuInstructions::ShrVxVy(_, _) => "ShrVxVy", - Chip8CpuInstructions::SkpVx(_) => "SkpVx", - Chip8CpuInstructions::SneVxByte(_, _) => "SneVxByte", - Chip8CpuInstructions::SneVxVy(_, _) => "SneVxVy", - Chip8CpuInstructions::SnkpVx(_) => "SnkpVx", - Chip8CpuInstructions::StRpl(x) => "StRpl", - Chip8CpuInstructions::SubVxVy(_, _) => "SubVxVy", - Chip8CpuInstructions::SubnVxVy(_, _) => "SubnVxVy", - Chip8CpuInstructions::SysAddr(_) => "SYS", - Chip8CpuInstructions::VidDis => "VidDis", - Chip8CpuInstructions::VidEna => "VidEna", - Chip8CpuInstructions::XorVxVy(_, _) => "XorVxVy", + Chip8CpuInstructions::RND(_, _) => "RND", + Chip8CpuInstructions::SDN(_) => "SDN", + Chip8CpuInstructions::SLF => "SLF", + Chip8CpuInstructions::SRT => "SRT", + Chip8CpuInstructions::SEX(_, _) => "SEX", + Chip8CpuInstructions::SEY(_, _) => "SEY", + Chip8CpuInstructions::SHL(_, _) => "SHL", + Chip8CpuInstructions::SHR(_, _) => "SHR", + Chip8CpuInstructions::SKP(_) => "SKP", + Chip8CpuInstructions::SNEB(_, _) => "SNEB", + Chip8CpuInstructions::SNEY(_, _) => "SNEY", + Chip8CpuInstructions::SKNP(_) => "SNKP", + Chip8CpuInstructions::STR(x) => "STR", + Chip8CpuInstructions::SUB(_, _) => "SUB", + Chip8CpuInstructions::SUBC(_, _) => "SUBC", + Chip8CpuInstructions::SYS(_) => "SYS", + Chip8CpuInstructions::DIS => "DIS", + Chip8CpuInstructions::ENA => "ENA", + Chip8CpuInstructions::ORY(_, _) => "ORY", XXXXERRORINSTRUCTION => "XX ERROR XX", } } pub fn operands(&self) -> String { match self { - Chip8CpuInstructions::SysAddr(addr) | - Chip8CpuInstructions::JpV0Addr(addr) | - Chip8CpuInstructions::JpAddr(addr) | - Chip8CpuInstructions::LdIAddr(addr) | - Chip8CpuInstructions::CallAddr(addr) => { + Chip8CpuInstructions::SYS(addr) | + Chip8CpuInstructions::JPI(addr) | + Chip8CpuInstructions::JPA(addr) | + Chip8CpuInstructions::LDIA(addr) | + Chip8CpuInstructions::CALL(addr) => { format!("0x{addr:04x}") } - Chip8CpuInstructions::SeVxByte(x, byte) | - Chip8CpuInstructions::SneVxByte(x, byte) | - Chip8CpuInstructions::LdVxByte(x, byte) | - Chip8CpuInstructions::RndVxByte(x, byte) | - Chip8CpuInstructions::AddVxByte(x, byte) => { + Chip8CpuInstructions::SEX(x, byte) | + Chip8CpuInstructions::SNEB(x, byte) | + Chip8CpuInstructions::LDR(x, byte) | + Chip8CpuInstructions::RND(x, byte) | + Chip8CpuInstructions::ADD(x, byte) => { format!("0x{x:02x}, 0x{byte:02x}") } - Chip8CpuInstructions::SeVxVy(x, y) | - Chip8CpuInstructions::LdVxVy(x, y) | - Chip8CpuInstructions::OrVxVy(x, y) | - Chip8CpuInstructions::AndVxVy(x, y) | - Chip8CpuInstructions::XorVxVy(x, y) | - Chip8CpuInstructions::AddVxVy(x, y) | - Chip8CpuInstructions::SubVxVy(x, y) | - Chip8CpuInstructions::ShrVxVy(x, y) | - Chip8CpuInstructions::SubnVxVy(x, y) | - Chip8CpuInstructions::ShlVxVy(x, y) | - Chip8CpuInstructions::SneVxVy(x, y) => { + Chip8CpuInstructions::SEY(x, y) | + Chip8CpuInstructions::LDR_Y(x, y) | + Chip8CpuInstructions::OR(x, y) | + Chip8CpuInstructions::AND(x, y) | + Chip8CpuInstructions::ORY(x, y) | + Chip8CpuInstructions::ADDR(x, y) | + Chip8CpuInstructions::SUB(x, y) | + Chip8CpuInstructions::SHR(x, y) | + Chip8CpuInstructions::SUBC(x, y) | + Chip8CpuInstructions::SHL(x, y) | + Chip8CpuInstructions::SNEY(x, y) => { format!("0x{x:02x}, 0x{y:02x}") } - Chip8CpuInstructions::DrawVxVyNibble(x, y, nibble) => { + Chip8CpuInstructions::DRW(x, y, nibble) => { format!("0x{x:02x}, 0x{y:02x}, 0x{nibble:02x}") } - Chip8CpuInstructions::LdDtVx(x) | - Chip8CpuInstructions::LdStVx(x) | - Chip8CpuInstructions::AddIVx(x) | - Chip8CpuInstructions::LdFVx(x) | - Chip8CpuInstructions::LdBVx(x) | - Chip8CpuInstructions::LdIVx(x) | - Chip8CpuInstructions::SkpVx(x) | - Chip8CpuInstructions::LdVxDt(x) | - Chip8CpuInstructions::LdVxK(x) | - Chip8CpuInstructions::LdVxI(x) | - Chip8CpuInstructions::LdFVx10(x) | - Chip8CpuInstructions::StRpl(x) | - Chip8CpuInstructions::LdRpl(x) | - Chip8CpuInstructions::SnkpVx(x) => { + Chip8CpuInstructions::LDD(x) | + Chip8CpuInstructions::LDI_S(x) | + Chip8CpuInstructions::ADDI(x) | + Chip8CpuInstructions::LDFX(x) | + Chip8CpuInstructions::BCD(x) | + Chip8CpuInstructions::LDIX(x) | + Chip8CpuInstructions::SKP(x) | + Chip8CpuInstructions::LDRD(x) | + Chip8CpuInstructions::LDRK(x) | + Chip8CpuInstructions::LDRI(x) | + Chip8CpuInstructions::LDF2(x) | + Chip8CpuInstructions::STR(x) | + Chip8CpuInstructions::LIDR(x) | + Chip8CpuInstructions::SKP(x) => { format!("0x{x:02x}") } _ => { String::new() } @@ -370,54 +371,67 @@ impl Display for Chip8CpuInstructions { } impl Chip8CpuInstructions { + pub fn from_str(input: &str) -> Chip8CpuInstructions { + let parts = input.split(" "); + println!("THERE ARE {} PARTS", parts.count()); + XXXXERRORINSTRUCTION + // + // match input.to_uppercase().as_str() { + // INST_ADDI => Chip8CpuInstructions::ADDI(parts.nth(1)), + // INST_ADD => Chip8CpuInstructions::ADD(parts[1], parts[2]), + // INST_ADDR => Chip8CpuInstructions::ADDR(parts[1], parts[2]), + // _ => XXXXERRORINSTRUCTION + // } + } + pub fn encode(&self) -> u16 { match self { - Chip8CpuInstructions::SysAddr(target) => 0x0000 | (target & 0x0FFF) as u16, + Chip8CpuInstructions::SYS(target) => 0x0000 | (target & 0x0FFF) as u16, Chip8CpuInstructions::CLS => 0x00E0, Chip8CpuInstructions::RET => 0x00EE, - Chip8CpuInstructions::JpAddr(new_addr) => 0x1000 | (new_addr & 0x0FFF) as u16, - Chip8CpuInstructions::CallAddr(address) => 0x2000 | (address & 0x0FFF) as u16, - Chip8CpuInstructions::SeVxByte(vx_register, byte) => 0x3000 | ((*vx_register as u16) << 8) | (*byte as u16), - Chip8CpuInstructions::SneVxByte(vx_register, byte) => 0x4000 | ((*vx_register as u16) << 8) | (*byte as u16), - Chip8CpuInstructions::SeVxVy(x_register, y_register) => 0x5000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::LdVxByte(x_register, byte) => 0x6000 | ((*x_register as u16) << 8) | (*byte as u16), - Chip8CpuInstructions::AddVxByte(x_register, byte) => 0x7000 | ((*x_register as u16) << 8) | (*byte as u16), - Chip8CpuInstructions::LdVxVy(x_register, y_register) => 0x8000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::OrVxVy(x_register, y_register) => 0x8001 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::AndVxVy(x_register, y_register) => 0x8002 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::XorVxVy(x_register, y_register) => 0x8003 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::AddVxVy(x_register, y_register) => 0x8004 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::SubVxVy(x_register, y_register) => 0x8005 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::ShrVxVy(x_register, y_register) => 0x8006 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::SubnVxVy(x_register, y_register) => 0x8007 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::ShlVxVy(x_register, y_register) => 0x800E | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::SneVxVy(x_register, y_register) => 0x9000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), - Chip8CpuInstructions::LdIAddr(addr) => 0xA000 | addr, - Chip8CpuInstructions::JpV0Addr(addr) => 0xB000 | addr, - Chip8CpuInstructions::RndVxByte(x_register, byte) => 0xC000 | ((*x_register as u16) << 8) | (*byte as u16), - Chip8CpuInstructions::DrawVxVyNibble(x_register, y_register, height) => { + Chip8CpuInstructions::JPA(new_addr) => 0x1000 | (new_addr & 0x0FFF) as u16, + Chip8CpuInstructions::CALL(address) => 0x2000 | (address & 0x0FFF) as u16, + Chip8CpuInstructions::SEX(vx_register, byte) => 0x3000 | ((*vx_register as u16) << 8) | (*byte as u16), + Chip8CpuInstructions::SNEB(vx_register, byte) => 0x4000 | ((*vx_register as u16) << 8) | (*byte as u16), + Chip8CpuInstructions::SEY(x_register, y_register) => 0x5000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::LDR(x_register, byte) => 0x6000 | ((*x_register as u16) << 8) | (*byte as u16), + Chip8CpuInstructions::ADD(x_register, byte) => 0x7000 | ((*x_register as u16) << 8) | (*byte as u16), + Chip8CpuInstructions::LDR_Y(x_register, y_register) => 0x8000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::OR(x_register, y_register) => 0x8001 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::AND(x_register, y_register) => 0x8002 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::ORY(x_register, y_register) => 0x8003 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::ADDR(x_register, y_register) => 0x8004 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::SUB(x_register, y_register) => 0x8005 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::SHR(x_register, y_register) => 0x8006 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::SUBC(x_register, y_register) => 0x8007 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::SHL(x_register, y_register) => 0x800E | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::SNEY(x_register, y_register) => 0x9000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4), + Chip8CpuInstructions::LDIA(addr) => 0xA000 | addr, + Chip8CpuInstructions::JPI(addr) => 0xB000 | addr, + Chip8CpuInstructions::RND(x_register, byte) => 0xC000 | ((*x_register as u16) << 8) | (*byte as u16), + Chip8CpuInstructions::DRW(x_register, y_register, height) => { 0xD000 | ((*x_register as u16) << 8) | ((*y_register as u16) << 4) | (*height as u16) } - Chip8CpuInstructions::SkpVx(x_register) => 0xE09E | ((*x_register as u16) << 8), - Chip8CpuInstructions::SnkpVx(x_register) => 0xE0A1 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdVxDt(x_register) => 0xF007 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdVxK(x_register) => 0xF00A | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdDtVx(x_register) => 0xF015 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdStVx(x_register) => 0xF018 | ((*x_register as u16) << 8), - Chip8CpuInstructions::AddIVx(x_register) => 0xF01E | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdFVx(x_register) => 0xF029 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdBVx(x_register) => 0xF033 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdIVx(x_register) => 0xF055 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdVxI(x_register) => 0xF065 | ((*x_register as u16) << 8), - Chip8CpuInstructions::ScrDn(x_register) => 0x00C0 | (*x_register as u16), - Chip8CpuInstructions::ScrRt => 0x00FB, - Chip8CpuInstructions::ScrLf => 0x00FC, - Chip8CpuInstructions::VidDis => 0x00FE, - Chip8CpuInstructions::VidEna => 0x00FF, - Chip8CpuInstructions::Exit => 0x00FD, - Chip8CpuInstructions::LdFVx10(x_register) => 0xF030 | ((*x_register as u16) << 8), - Chip8CpuInstructions::StRpl(x_register) => 0xF075 | ((*x_register as u16) << 8), - Chip8CpuInstructions::LdRpl(x_register) => 0xF085 | ((*x_register as u16) << 8), + Chip8CpuInstructions::SKP(x_register) => 0xE09E | ((*x_register as u16) << 8), + Chip8CpuInstructions::SKNP(x_register) => 0xE0A1 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDRD(x_register) => 0xF007 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDRK(x_register) => 0xF00A | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDD(x_register) => 0xF015 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDI_S(x_register) => 0xF018 | ((*x_register as u16) << 8), + Chip8CpuInstructions::ADDI(x_register) => 0xF01E | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDFX(x_register) => 0xF029 | ((*x_register as u16) << 8), + Chip8CpuInstructions::BCD(x_register) => 0xF033 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDIX(x_register) => 0xF055 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LDRI(x_register) => 0xF065 | ((*x_register as u16) << 8), + Chip8CpuInstructions::SDN(x_register) => 0x00C0 | (*x_register as u16), + Chip8CpuInstructions::SRT => 0x00FB, + Chip8CpuInstructions::SLF => 0x00FC, + Chip8CpuInstructions::DIS => 0x00FE, + Chip8CpuInstructions::ENA => 0x00FF, + Chip8CpuInstructions::EXIT => 0x00FD, + Chip8CpuInstructions::LDF2(x_register) => 0xF030 | ((*x_register as u16) << 8), + Chip8CpuInstructions::STR(x_register) => 0xF075 | ((*x_register as u16) << 8), + Chip8CpuInstructions::LIDR(x_register) => 0xF085 | ((*x_register as u16) << 8), XXXXERRORINSTRUCTION => 0xFFFF } } @@ -432,57 +446,57 @@ impl Chip8CpuInstructions { let last_nibble = (input & 0xF) as u8; match input { - 0x00C0..=0x00CF => Chip8CpuInstructions::ScrDn(last_nibble), + 0x00C0..=0x00CF => Chip8CpuInstructions::SDN(last_nibble), 0x00E0 => Chip8CpuInstructions::CLS, 0x00EE => Chip8CpuInstructions::RET, - 0x00FB => Chip8CpuInstructions::ScrRt, - 0x00FC => Chip8CpuInstructions::ScrLf, - 0x00FD => Chip8CpuInstructions::Exit, - 0x00FE => Chip8CpuInstructions::VidDis, - 0x00FF => Chip8CpuInstructions::VidEna, - 0x0000..=0x0FFF => Chip8CpuInstructions::SysAddr(addr_param), - 0x1000..=0x1FFF => Chip8CpuInstructions::JpAddr(addr_param), - 0x2000..=0x2FFF => Chip8CpuInstructions::CallAddr(addr_param), - 0x3000..=0x3FFF => Chip8CpuInstructions::SeVxByte(x_param, byte_param), - 0x4000..=0x4FFF => Chip8CpuInstructions::SneVxByte(x_param, byte_param), - 0x5000..=0x5FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SeVxVy(x_param, y_param), - 0x6000..=0x6FFF => Chip8CpuInstructions::LdVxByte(x_param, byte_param), - 0x7000..=0x7FFF => Chip8CpuInstructions::AddVxByte(x_param, byte_param), + 0x00FB => Chip8CpuInstructions::SRT, + 0x00FC => Chip8CpuInstructions::SLF, + 0x00FD => Chip8CpuInstructions::EXIT, + 0x00FE => Chip8CpuInstructions::DIS, + 0x00FF => Chip8CpuInstructions::ENA, + 0x0000..=0x0FFF => Chip8CpuInstructions::SYS(addr_param), + 0x1000..=0x1FFF => Chip8CpuInstructions::JPA(addr_param), + 0x2000..=0x2FFF => Chip8CpuInstructions::CALL(addr_param), + 0x3000..=0x3FFF => Chip8CpuInstructions::SEX(x_param, byte_param), + 0x4000..=0x4FFF => Chip8CpuInstructions::SNEB(x_param, byte_param), + 0x5000..=0x5FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SEY(x_param, y_param), + 0x6000..=0x6FFF => Chip8CpuInstructions::LDR(x_param, byte_param), + 0x7000..=0x7FFF => Chip8CpuInstructions::ADD(x_param, byte_param), 0x8000..=0x8FFE => match last_nibble { - 0x0 => Chip8CpuInstructions::LdVxVy(x_param, y_param), - 0x1 => Chip8CpuInstructions::OrVxVy(x_param, y_param), - 0x2 => Chip8CpuInstructions::AndVxVy(x_param, y_param), - 0x3 => Chip8CpuInstructions::XorVxVy(x_param, y_param), - 0x4 => Chip8CpuInstructions::AddVxVy(x_param, y_param), - 0x5 => Chip8CpuInstructions::SubVxVy(x_param, y_param), - 0x6 => Chip8CpuInstructions::ShrVxVy(x_param, y_param), - 0x7 => Chip8CpuInstructions::SubnVxVy(x_param, y_param), - 0xE => Chip8CpuInstructions::ShlVxVy(x_param, y_param), + 0x0 => Chip8CpuInstructions::LDR_Y(x_param, y_param), + 0x1 => Chip8CpuInstructions::OR(x_param, y_param), + 0x2 => Chip8CpuInstructions::AND(x_param, y_param), + 0x3 => Chip8CpuInstructions::ORY(x_param, y_param), + 0x4 => Chip8CpuInstructions::ADDR(x_param, y_param), + 0x5 => Chip8CpuInstructions::SUB(x_param, y_param), + 0x6 => Chip8CpuInstructions::SHR(x_param, y_param), + 0x7 => Chip8CpuInstructions::SUBC(x_param, y_param), + 0xE => Chip8CpuInstructions::SHL(x_param, y_param), _ => XXXXERRORINSTRUCTION } - 0x9000..=0x9FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SneVxVy(x_param, y_param), - 0xA000..=0xAFFF => Chip8CpuInstructions::LdIAddr(addr_param), - 0xB000..=0xBFFF => Chip8CpuInstructions::JpV0Addr(addr_param), - 0xC000..=0xCFFF => Chip8CpuInstructions::RndVxByte(x_param, byte_param), - 0xD000..=0xDFFF => Chip8CpuInstructions::DrawVxVyNibble(x_param, y_param, nibble_param), + 0x9000..=0x9FF0 if input & 0x01 == 0 => Chip8CpuInstructions::SNEY(x_param, y_param), + 0xA000..=0xAFFF => Chip8CpuInstructions::LDIA(addr_param), + 0xB000..=0xBFFF => Chip8CpuInstructions::JPI(addr_param), + 0xC000..=0xCFFF => Chip8CpuInstructions::RND(x_param, byte_param), + 0xD000..=0xDFFF => Chip8CpuInstructions::DRW(x_param, y_param, nibble_param), 0xE09E..=0xEFA1 => match last_byte { - 0x9E => Chip8CpuInstructions::SkpVx(ubln), - 0xA1 => Chip8CpuInstructions::SnkpVx(ubln), + 0x9E => Chip8CpuInstructions::SKP(ubln), + 0xA1 => Chip8CpuInstructions::SKNP(ubln), _ => XXXXERRORINSTRUCTION } 0xF007..=0xFF65 => match last_byte { - 0x07 => Chip8CpuInstructions::LdVxDt(ubln), - 0x0A => Chip8CpuInstructions::LdVxK(ubln), - 0x15 => Chip8CpuInstructions::LdDtVx(ubln), - 0x18 => Chip8CpuInstructions::LdStVx(ubln), - 0x1E => Chip8CpuInstructions::AddIVx(ubln), - 0x29 => Chip8CpuInstructions::LdFVx(ubln), - 0x30 => Chip8CpuInstructions::LdFVx10(ubln), - 0x33 => Chip8CpuInstructions::LdBVx(ubln), - 0x55 => Chip8CpuInstructions::LdIVx(ubln), - 0x65 => Chip8CpuInstructions::LdVxI(ubln), - 0x75 => Chip8CpuInstructions::StRpl(ubln), - 0x85 => Chip8CpuInstructions::LdRpl(ubln), + 0x07 => Chip8CpuInstructions::LDRD(ubln), + 0x0A => Chip8CpuInstructions::LDRK(ubln), + 0x15 => Chip8CpuInstructions::LDD(ubln), + 0x18 => Chip8CpuInstructions::LDI_S(ubln), + 0x1E => Chip8CpuInstructions::ADDI(ubln), + 0x29 => Chip8CpuInstructions::LDFX(ubln), + 0x30 => Chip8CpuInstructions::LDF2(ubln), + 0x33 => Chip8CpuInstructions::BCD(ubln), + 0x55 => Chip8CpuInstructions::LDIX(ubln), + 0x65 => Chip8CpuInstructions::LDRI(ubln), + 0x75 => Chip8CpuInstructions::STR(ubln), + 0x85 => Chip8CpuInstructions::LIDR(ubln), _ => XXXXERRORINSTRUCTION } _ => XXXXERRORINSTRUCTION @@ -495,7 +509,7 @@ impl Chip8CpuInstructions { input.registers.poke_pc(start_pc + 2); let _ = match self { // 0x0nnn Exit to System Call - Chip8CpuInstructions::SysAddr(new_address) => { + Chip8CpuInstructions::SYS(new_address) => { input.registers.poke_pc(*new_address as u16); } // * 0x00E0 Clear Screen @@ -507,23 +521,23 @@ impl Chip8CpuInstructions { input.registers.poke_pc(input.stack.pop()); } // 0x1nnn Jump to Address - Chip8CpuInstructions::JpAddr(new_address) => { + Chip8CpuInstructions::JPA(new_address) => { input.registers.poke_pc(*new_address as u16); } // 0x2nnn Call Subroutine - Chip8CpuInstructions::CallAddr(new_address) => { + Chip8CpuInstructions::CALL(new_address) => { let return_address = input.registers.peek_pc(); input.registers.poke_pc(*new_address as u16); input.stack.push(&return_address); } // 0x3xkk Skip next instruction if Vx = kk. - Chip8CpuInstructions::SeVxByte(vx_register, byte) => { + Chip8CpuInstructions::SEX(vx_register, byte) => { if input.registers.peek(*vx_register as u8) == *byte as u8 { input.registers.advance_pc(); } } // 0x4xkk Skip next instruction if Vx != kk - Chip8CpuInstructions::SneVxByte(x, byte) => { + Chip8CpuInstructions::SNEB(x, byte) => { // 4xkk - SNE Vx, byte // Skip next instruction if Vx != kk. // @@ -534,25 +548,25 @@ impl Chip8CpuInstructions { } } // 0x5xy0 Skip next instruction if Vx == Vy - Chip8CpuInstructions::SeVxVy(x, y) => { + Chip8CpuInstructions::SEY(x, y) => { if input.registers.peek(*x as u8) == input.registers.peek(*y as u8) { input.registers.advance_pc(); } } // 0x6xkk Set Vx = kk - Chip8CpuInstructions::LdVxByte(register, byte) => { + Chip8CpuInstructions::LDR(register, byte) => { input.registers.poke(*register, *byte); } // 0x7xkk Set Vx = Vx + kk - Chip8CpuInstructions::AddVxByte(vx_register, byte) => { + Chip8CpuInstructions::ADD(vx_register, byte) => { input.registers.poke(*vx_register, (input.registers.peek(*vx_register) as u16 + *byte as u16) as u8); } // 0x8xy0 Set value of Vy in Vx - Chip8CpuInstructions::LdVxVy(x, y) => { + Chip8CpuInstructions::LDR_Y(x, y) => { input.registers.poke(*x as u8, input.registers.peek(*y as u8)); } // 0x8xy1 Set Vx = Vx OR Vy - Chip8CpuInstructions::OrVxVy(x, y) => { + Chip8CpuInstructions::OR(x, y) => { // shift them to 16 bit let working_16_x = input.registers.peek(*x as u8) as u16; let working_16_y = input.registers.peek(*y as u8) as u16; @@ -563,19 +577,19 @@ impl Chip8CpuInstructions { debug!("OrVxVy [0x{x:1x}] [0x{y:1x}]") } // 0x8xy2 Set Vx = Vx AND Vy - Chip8CpuInstructions::AndVxVy(x, y) => { + Chip8CpuInstructions::AND(x, y) => { let lhs_16 = input.registers.peek(*x as u8) as u16; let rhs_16 = input.registers.peek(*y as u8) as u16; input.registers.poke(*x as u8, (lhs_16 & rhs_16) as u8); } // 0x8xy3 Set Vx = Vx XOR Vy - Chip8CpuInstructions::XorVxVy(x, y) => { + Chip8CpuInstructions::ORY(x, y) => { let lhs_16 = input.registers.peek(*x as u8) as u16; let rhs_16 = input.registers.peek(*y as u8) as u16; input.registers.poke(*x as u8, (lhs_16 ^ rhs_16) as u8); } // 0x8xy4 Set Vx = Vx + Vy (SET VF on Carry) - Chip8CpuInstructions::AddVxVy(x, y) => { + Chip8CpuInstructions::ADDR(x, y) => { let lhs = input.registers.peek(*x as u8) as i16; let rhs = input.registers.peek(*y as u8) as i16; let working = lhs + rhs; @@ -587,7 +601,7 @@ impl Chip8CpuInstructions { input.registers.poke(0x0f, 0x00); } } - Chip8CpuInstructions::SubVxVy(x, y) => { + Chip8CpuInstructions::SUB(x, y) => { // 8xy5 - SUB Vx, Vy // Set Vx = Vx - Vy, set VF = NOT borrow. // @@ -609,7 +623,7 @@ impl Chip8CpuInstructions { input.registers.poke(*x as u8, result as u8); input.registers.poke(0x0f, borrow_flag); } - Chip8CpuInstructions::ShrVxVy(x, _) => { + Chip8CpuInstructions::SHR(x, _) => { // 8xy6 - SHR Vx {, Vy} // Set Vx = Vx SHR 1. // SHIFT 1 Bit ----> @@ -625,7 +639,7 @@ impl Chip8CpuInstructions { input.registers.poke(0x0f, 0x00); } } - Chip8CpuInstructions::SubnVxVy(x, y) => { + Chip8CpuInstructions::SUBC(x, y) => { // 8xy7 - SUBN Vx, Vy // Set Vx = Vy - Vx, set VF = NOT borrow. // @@ -648,7 +662,7 @@ impl Chip8CpuInstructions { input.registers.poke(0xf, new_value); } - Chip8CpuInstructions::ShlVxVy(x, _) => { + Chip8CpuInstructions::SHL(x, _) => { // 8xyE - SHL Vx {, Vy} // Set Vx = Vx SHL 1. // @@ -664,7 +678,7 @@ impl Chip8CpuInstructions { input.registers.poke(0x0f, 0x00); } } - Chip8CpuInstructions::SneVxVy(vx_register, vy_register) => { + Chip8CpuInstructions::SNEY(vx_register, vy_register) => { // 9xy0 - SNE Vx, Vy // Skip next instruction if Vx != Vy. // @@ -676,7 +690,7 @@ impl Chip8CpuInstructions { input.registers.advance_pc(); } } - Chip8CpuInstructions::LdIAddr(new_index) => { + Chip8CpuInstructions::LDIA(new_index) => { // Annn - LD I, addr // Set I = nnn. // @@ -685,14 +699,14 @@ impl Chip8CpuInstructions { input.registers.poke_i(*new_index); } // 0xBnnn Jump to nnn+V0 - Chip8CpuInstructions::JpV0Addr(addr) => { + Chip8CpuInstructions::JPI(addr) => { // Bnnn - JP V0, addr // Jump to location nnn + V0. // // The program counter is set to nnn plus the value of V0. input.registers.poke_pc(input.registers.peek(0) as u16 + addr); } - Chip8CpuInstructions::RndVxByte(x, byte) => { + Chip8CpuInstructions::RND(x, byte) => { // Cxkk - RND Vx, byte // Set Vx = random byte AND kk. // @@ -706,7 +720,7 @@ impl Chip8CpuInstructions { debug!("RANDOM: [{new_value:02x}] AND: [{and_value:02x} Result: [{result:02x}]"); input.registers.poke(*x as u8, new_value & *byte as u8) } - Chip8CpuInstructions::DrawVxVyNibble(y, x, n) => { + Chip8CpuInstructions::DRW(y, x, n) => { // Display n-byte sprite starting at memory location I at (Vx, Vy), set VF = collision. // The interpreter reads n bytes from memory, starting at the address stored in I. @@ -738,7 +752,7 @@ impl Chip8CpuInstructions { input.registers.poke(0xf, target); } - Chip8CpuInstructions::SkpVx(x) => { + Chip8CpuInstructions::SKP(x) => { // Ex9E - SKP Vx // Skip next instruction if key with the value of Vx is pressed. // @@ -749,7 +763,7 @@ impl Chip8CpuInstructions { input.registers.advance_pc(); } } - Chip8CpuInstructions::SnkpVx(x) => { + Chip8CpuInstructions::SKNP(x) => { // ExA1 - SKNP Vx // Skip next instruction if key with the value of Vx is not pressed. // @@ -764,7 +778,7 @@ impl Chip8CpuInstructions { input.registers.advance_pc(); } } - Chip8CpuInstructions::LdVxDt(x) => { + Chip8CpuInstructions::LDRD(x) => { // Fx07 - LD Vx, DT // Set Vx = delay timer value. // @@ -772,14 +786,14 @@ impl Chip8CpuInstructions { let value_to_set = input.delay_timer.current(); input.registers.poke(*x as u8, value_to_set as u8); } - Chip8CpuInstructions::LdVxK(x) => { + Chip8CpuInstructions::LDRK(x) => { // Fx0A - LD Vx, K // Wait for a key press, store the value of the key in Vx. // // All execution stops until a key is pressed, then the value of that key is stored in Vx. input.state = WaitingForKey; } - Chip8CpuInstructions::LdDtVx(source_register) => { + Chip8CpuInstructions::LDD(source_register) => { // Fx15 - LD DT, Vx // Set delay timer = Vx. // @@ -787,11 +801,11 @@ impl Chip8CpuInstructions { let new_time = input.registers.peek(*source_register as u8); input.delay_timer.set_timer(new_time as i32); } - Chip8CpuInstructions::LdStVx(new_time) => { + Chip8CpuInstructions::LDI_S(new_time) => { let new_value = input.registers.peek(*new_time as u8); input.sound_timer.set_timer(new_value as i32); } - Chip8CpuInstructions::AddIVx(x) => { + Chip8CpuInstructions::ADDI(x) => { // Fx1E - ADD I, Vx // Set I = I + Vx. // @@ -800,7 +814,7 @@ impl Chip8CpuInstructions { let x_value = input.registers.peek(*x as u8); input.registers.poke_i(base + x_value as u16); } - Chip8CpuInstructions::LdFVx(x) => { + Chip8CpuInstructions::LDFX(x) => { // Fx29 - LD F, Vx // Set I = location of sprite for digit Vx. // @@ -813,7 +827,7 @@ impl Chip8CpuInstructions { let real_offset = x_value as u16 * 5; input.registers.poke_i(real_offset as u16); } - Chip8CpuInstructions::LdBVx(x) => { + Chip8CpuInstructions::BCD(x) => { // Fx33 - LD B, Vx // Store BCD representation of Vx in memory locations I, I+1, and I+2. // @@ -838,7 +852,7 @@ impl Chip8CpuInstructions { input.memory.poke(target_start_offset + 1, tens); input.memory.poke(target_start_offset + 2, units); } - Chip8CpuInstructions::LdIVx(x) => { + Chip8CpuInstructions::LDIX(x) => { // Store registers V0 through Vx in memory starting at location I. // // The interpreter copies the values of registers V0 through Vx into memory, @@ -849,7 +863,7 @@ impl Chip8CpuInstructions { } input.registers.poke_i(offset + 1); } - Chip8CpuInstructions::LdVxI(x) => { + Chip8CpuInstructions::LDRI(x) => { // Read registers V0 through Vx from memory starting at location I. // // The interpreter reads values from memory starting at location I into registers V0 through Vx. @@ -865,31 +879,32 @@ impl Chip8CpuInstructions { input.registers.poke_i(offset + 1); } Chip8CpuInstructions::XXXXERRORINSTRUCTION => {} - Chip8CpuInstructions::ScrDn(x) => { + Chip8CpuInstructions::SDN(x) => { println!("SCROLLING DOWN {x} LINES"); } - Chip8CpuInstructions::ScrRt => { + Chip8CpuInstructions::SRT => { println!("SCROLING RIGHT 4 LINES"); } - Chip8CpuInstructions::ScrLf => { + Chip8CpuInstructions::SLF => { println!("SCROLLING LEFT 4 LINES"); } - Chip8CpuInstructions::VidDis => { + Chip8CpuInstructions::DIS => { + println!("DISABLE VIDEO MODE"); } - Chip8CpuInstructions::VidEna => { + Chip8CpuInstructions::ENA => { println!("ENABLE VIDEO MODE"); } - Chip8CpuInstructions::Exit => { + Chip8CpuInstructions::EXIT => { println!("EXIT INTERPRETER"); } - Chip8CpuInstructions::LdFVx10(x) => { + Chip8CpuInstructions::LDF2(x) => { println!("POINTING TO FONT AT {x:02x}"); } - Chip8CpuInstructions::StRpl(x) => { + Chip8CpuInstructions::STR(x) => { println!("STORING FROM RPL FOR {x}"); } - Chip8CpuInstructions::LdRpl(x) => { + Chip8CpuInstructions::LIDR(x) => { println!("LOADING FROM RPL FOR {x}"); } }; @@ -897,6 +912,13 @@ impl Chip8CpuInstructions { // println!("\t\tTook {cycle_time}ms"); input.to_owned() } + + pub fn from_string(input: &str) -> Chip8CpuInstructions { + let parts = input.split(" "); + println!("Parts -> {:?}", parts); + + Chip8CpuInstructions::XXXXERRORINSTRUCTION + } } #[cfg(test)] @@ -914,96 +936,95 @@ mod test { fn encode_decode_test() { assert_eq!(Chip8CpuInstructions::CLS.encode(), 0x00E0); assert_eq!(Chip8CpuInstructions::RET.encode(), 0x00EE); - assert_eq!(Chip8CpuInstructions::SysAddr(0x123).encode(), 0x0123); - assert_eq!(Chip8CpuInstructions::JpAddr(0x234).encode(), 0x1234); - assert_eq!(Chip8CpuInstructions::CallAddr(0x345).encode(), 0x2345); - assert_eq!(Chip8CpuInstructions::SeVxByte(0x4, 0x56).encode(), 0x3456); - assert_eq!(Chip8CpuInstructions::SneVxByte(0xa, 0xbc).encode(), 0x4abc); - assert_eq!(Chip8CpuInstructions::SeVxVy(0xa, 0xb).encode(), 0x5ab0); - assert_eq!(Chip8CpuInstructions::LdVxByte(0xa, 0xff).encode(), 0x6aff); - assert_eq!(Chip8CpuInstructions::AddVxByte(0xa, 0xbc).encode(), 0x7abc); - assert_eq!(Chip8CpuInstructions::LdVxVy(0xa, 0xb).encode(), 0x8ab0); - assert_eq!(Chip8CpuInstructions::OrVxVy(0xb, 0xa).encode(), 0x8ba1); - assert_eq!(Chip8CpuInstructions::AndVxVy(0xc, 0xd).encode(), 0x8cd2); - assert_eq!(Chip8CpuInstructions::XorVxVy(0xd, 0xe).encode(), 0x8de3); - assert_eq!(Chip8CpuInstructions::AddVxVy(0xe, 0xf).encode(), 0x8ef4); - assert_eq!(Chip8CpuInstructions::SubVxVy(0xf, 0x0).encode(), 0x8f05); - assert_eq!(Chip8CpuInstructions::ShrVxVy(0x0, 0x1).encode(), 0x8016); - assert_eq!(Chip8CpuInstructions::SubnVxVy(0x1, 0x2).encode(), 0x8127); - assert_eq!(Chip8CpuInstructions::ShlVxVy(0x3, 0x4).encode(), 0x834e); - assert_eq!(Chip8CpuInstructions::SneVxVy(0xa, 0xb).encode(), 0x9ab0); - assert_eq!(Chip8CpuInstructions::LdIAddr(0x123).encode(), 0xa123); - assert_eq!(Chip8CpuInstructions::JpV0Addr(0x234).encode(), 0xb234); - assert_eq!(Chip8CpuInstructions::RndVxByte(0xa, 0xca).encode(), 0xcaca); - assert_eq!(Chip8CpuInstructions::DrawVxVyNibble(0xa, 0xb, 0x4).encode(), 0xdab4); - assert_eq!(Chip8CpuInstructions::SkpVx(0x1).encode(), 0xe19e); - assert_eq!(Chip8CpuInstructions::SnkpVx(0x2).encode(), 0xe2a1); - assert_eq!(Chip8CpuInstructions::LdVxDt(0x1).encode(), 0xf107); - assert_eq!(Chip8CpuInstructions::LdVxK(0x4).encode(), 0xf40a); - assert_eq!(Chip8CpuInstructions::LdDtVx(0x6).encode(), 0xf615); - assert_eq!(Chip8CpuInstructions::LdStVx(0xb).encode(), 0xfb18); - assert_eq!(Chip8CpuInstructions::AddIVx(0xd).encode(), 0xfd1e); - assert_eq!(Chip8CpuInstructions::LdFVx(0xc).encode(), 0xfc29); - assert_eq!(Chip8CpuInstructions::LdBVx(0xd).encode(), 0xfd33); - assert_eq!(Chip8CpuInstructions::LdIVx(0xe).encode(), 0xfe55); - assert_eq!(Chip8CpuInstructions::LdVxI(0x3).encode(), 0xf365); - assert_eq!(Chip8CpuInstructions::ScrDn(0x1).encode(), 0x00C1); - assert_eq!(Chip8CpuInstructions::ScrLf.encode(), 0x00FC); - assert_eq!(Chip8CpuInstructions::ScrRt.encode(), 0x00FB); - assert_eq!(Chip8CpuInstructions::Exit.encode(), 0x00FD); - assert_eq!(Chip8CpuInstructions::VidEna.encode(), 0x00FF); - assert_eq!(Chip8CpuInstructions::VidDis.encode(), 0x00FE); - assert_eq!(Chip8CpuInstructions::LdFVx10(0).encode(), 0xF030); - assert_eq!(Chip8CpuInstructions::StRpl(1).encode(), 0xF175); - assert_eq!(Chip8CpuInstructions::LdRpl(1).encode(), 0xF185); - - assert!(matches!(Chip8CpuInstructions::decode(0xF175), Chip8CpuInstructions::StRpl(1))); - assert!(matches!(Chip8CpuInstructions::decode(0xF185), Chip8CpuInstructions::LdRpl(1))); - assert!(matches!(Chip8CpuInstructions::decode(0x00C1u16), Chip8CpuInstructions::ScrDn(0x01))); - assert!(matches!(Chip8CpuInstructions::decode(0x00FCu16), Chip8CpuInstructions::ScrLf)); - assert!(matches!(Chip8CpuInstructions::decode(0x00FBu16), Chip8CpuInstructions::ScrRt)); - assert!(matches!(Chip8CpuInstructions::decode(0x00FDu16), Chip8CpuInstructions::Exit)); - assert!(matches!(Chip8CpuInstructions::decode(0x00FEu16), Chip8CpuInstructions::VidDis)); - assert!(matches!(Chip8CpuInstructions::decode(0x00FFu16), Chip8CpuInstructions::VidEna)); - assert!(matches!(Chip8CpuInstructions::decode(0xF030u16), Chip8CpuInstructions::LdFVx10(0))); + assert_eq!(Chip8CpuInstructions::SYS(0x123).encode(), 0x0123); + assert_eq!(Chip8CpuInstructions::JPA(0x234).encode(), 0x1234); + assert_eq!(Chip8CpuInstructions::CALL(0x345).encode(), 0x2345); + assert_eq!(Chip8CpuInstructions::SEX(0x4, 0x56).encode(), 0x3456); + assert_eq!(Chip8CpuInstructions::SNEB(0xa, 0xbc).encode(), 0x4abc); + assert_eq!(Chip8CpuInstructions::SEY(0xa, 0xb).encode(), 0x5ab0); + assert_eq!(Chip8CpuInstructions::LDR(0xa, 0xff).encode(), 0x6aff); + assert_eq!(Chip8CpuInstructions::ADD(0xa, 0xbc).encode(), 0x7abc); + assert_eq!(Chip8CpuInstructions::LDR_Y(0xa, 0xb).encode(), 0x8ab0); + assert_eq!(Chip8CpuInstructions::OR(0xb, 0xa).encode(), 0x8ba1); + assert_eq!(Chip8CpuInstructions::AND(0xc, 0xd).encode(), 0x8cd2); + assert_eq!(Chip8CpuInstructions::ORY(0xd, 0xe).encode(), 0x8de3); + assert_eq!(Chip8CpuInstructions::ADDR(0xe, 0xf).encode(), 0x8ef4); + assert_eq!(Chip8CpuInstructions::SUB(0xf, 0x0).encode(), 0x8f05); + assert_eq!(Chip8CpuInstructions::SHR(0x0, 0x1).encode(), 0x8016); + assert_eq!(Chip8CpuInstructions::SUBC(0x1, 0x2).encode(), 0x8127); + assert_eq!(Chip8CpuInstructions::SHL(0x3, 0x4).encode(), 0x834e); + assert_eq!(Chip8CpuInstructions::SNEY(0xa, 0xb).encode(), 0x9ab0); + assert_eq!(Chip8CpuInstructions::LDIA(0x123).encode(), 0xa123); + assert_eq!(Chip8CpuInstructions::JPI(0x234).encode(), 0xb234); + assert_eq!(Chip8CpuInstructions::RND(0xa, 0xca).encode(), 0xcaca); + assert_eq!(Chip8CpuInstructions::DRW(0xa, 0xb, 0x4).encode(), 0xdab4); + assert_eq!(Chip8CpuInstructions::SKP(0x1).encode(), 0xe19e); + assert_eq!(Chip8CpuInstructions::SKNP(0x2).encode(), 0xe2a1); + assert_eq!(Chip8CpuInstructions::LDRD(0x1).encode(), 0xf107); + assert_eq!(Chip8CpuInstructions::LDRK(0x4).encode(), 0xf40a); + assert_eq!(Chip8CpuInstructions::LDD(0x6).encode(), 0xf615); + assert_eq!(Chip8CpuInstructions::LDI_S(0xb).encode(), 0xfb18); + assert_eq!(Chip8CpuInstructions::ADDI(0xd).encode(), 0xfd1e); + assert_eq!(Chip8CpuInstructions::LDFX(0xc).encode(), 0xfc29); + assert_eq!(Chip8CpuInstructions::BCD(0xd).encode(), 0xfd33); + assert_eq!(Chip8CpuInstructions::LDIX(0xe).encode(), 0xfe55); + assert_eq!(Chip8CpuInstructions::LDRI(0x3).encode(), 0xf365); + assert_eq!(Chip8CpuInstructions::SDN(0x1).encode(), 0x00C1); + assert_eq!(Chip8CpuInstructions::SLF.encode(), 0x00FC); + assert_eq!(Chip8CpuInstructions::SRT.encode(), 0x00FB); + assert_eq!(Chip8CpuInstructions::EXIT.encode(), 0x00FD); + assert_eq!(Chip8CpuInstructions::ENA.encode(), 0x00FF); + assert_eq!(Chip8CpuInstructions::DIS.encode(), 0x00FE); + assert_eq!(Chip8CpuInstructions::LDF2(0).encode(), 0xF030); + assert_eq!(Chip8CpuInstructions::STR(1).encode(), 0xF175); + assert_eq!(Chip8CpuInstructions::LIDR(1).encode(), 0xF185); + assert!(matches!(Chip8CpuInstructions::decode(0xF175), Chip8CpuInstructions::STR(1))); + assert!(matches!(Chip8CpuInstructions::decode(0xF185), Chip8CpuInstructions::LIDR(1))); + assert!(matches!(Chip8CpuInstructions::decode(0x00C1u16), Chip8CpuInstructions::SDN(0x01))); + assert!(matches!(Chip8CpuInstructions::decode(0x00FCu16), Chip8CpuInstructions::SLF)); + assert!(matches!(Chip8CpuInstructions::decode(0x00FBu16), Chip8CpuInstructions::SRT)); + assert!(matches!(Chip8CpuInstructions::decode(0x00FDu16), Chip8CpuInstructions::EXIT)); + assert!(matches!(Chip8CpuInstructions::decode(0x00FEu16), Chip8CpuInstructions::DIS)); + assert!(matches!(Chip8CpuInstructions::decode(0x00FFu16), Chip8CpuInstructions::ENA)); + assert!(matches!(Chip8CpuInstructions::decode(0xF030u16), Chip8CpuInstructions::LDF2(0))); assert!(matches!(Chip8CpuInstructions::decode(0x00E0u16), Chip8CpuInstructions::CLS)); assert!(matches!(Chip8CpuInstructions::decode(0x00EEu16), Chip8CpuInstructions::RET)); - assert!(matches!(Chip8CpuInstructions::decode(0x0123), Chip8CpuInstructions::SysAddr(0x123))); - assert!(matches!(Chip8CpuInstructions::decode(0x0FFF), Chip8CpuInstructions::SysAddr(0xfff))); - assert!(matches!(Chip8CpuInstructions::decode(0x1002), Chip8CpuInstructions::JpAddr(0x2))); - assert!(matches!(Chip8CpuInstructions::decode(0x1FF0), Chip8CpuInstructions::JpAddr(0xFF0))); - assert!(matches!(Chip8CpuInstructions::decode(0x2002), Chip8CpuInstructions::CallAddr(0x2))); - assert!(matches!(Chip8CpuInstructions::decode(0x3123), Chip8CpuInstructions::SeVxByte(0x1, 0x23))); - assert!(matches!(Chip8CpuInstructions::decode(0x4abc), Chip8CpuInstructions::SneVxByte(0xa, 0xbc))); - assert!(matches!(Chip8CpuInstructions::decode(0x5ab0), Chip8CpuInstructions::SeVxVy(0xa, 0xb))); - assert!(matches!(Chip8CpuInstructions::decode(0x6aff), Chip8CpuInstructions::LdVxByte(0xa, 0xff))); - assert!(matches!(Chip8CpuInstructions::decode(0x7abc), Chip8CpuInstructions::AddVxByte(0xa, 0xbc))); - assert!(matches!(Chip8CpuInstructions::decode(0x8ab0), Chip8CpuInstructions::LdVxVy(0xa, 0xb))); - assert!(matches!(Chip8CpuInstructions::decode(0x8ba1), Chip8CpuInstructions::OrVxVy(0xb, 0xa))); - assert!(matches!(Chip8CpuInstructions::decode(0x8cd2), Chip8CpuInstructions::AndVxVy(0xc, 0xd))); - assert!(matches!(Chip8CpuInstructions::decode(0x8de3), Chip8CpuInstructions::XorVxVy(0xd, 0xe))); - assert!(matches!(Chip8CpuInstructions::decode(0x8ef4), Chip8CpuInstructions::AddVxVy(0xe, 0xf))); - assert!(matches!(Chip8CpuInstructions::decode(0x8f05), Chip8CpuInstructions::SubVxVy(0xf, 0x0))); - assert!(matches!(Chip8CpuInstructions::decode(0x8016), Chip8CpuInstructions::ShrVxVy(0x0, 0x1))); - assert!(matches!(Chip8CpuInstructions::decode(0x8127), Chip8CpuInstructions::SubnVxVy(0x1, 0x2))); - assert!(matches!(Chip8CpuInstructions::decode(0x834e), Chip8CpuInstructions::ShlVxVy(0x3, 0x4))); - assert!(matches!(Chip8CpuInstructions::decode(0x9ab0), Chip8CpuInstructions::SneVxVy(0xa, 0xb))); - assert!(matches!(Chip8CpuInstructions::decode(0xa123), Chip8CpuInstructions::LdIAddr(0x123))); - assert!(matches!(Chip8CpuInstructions::decode(0xb234), Chip8CpuInstructions::JpV0Addr(0x234))); - assert!(matches!(Chip8CpuInstructions::decode(0xcaca), Chip8CpuInstructions::RndVxByte(0xa, 0xca))); - assert!(matches!(Chip8CpuInstructions::decode(0xdab4), Chip8CpuInstructions::DrawVxVyNibble(0xa, 0xb, 0x4))); - assert!(matches!(Chip8CpuInstructions::decode(0xe19e), Chip8CpuInstructions::SkpVx(0x1))); - assert!(matches!(Chip8CpuInstructions::decode(0xe2a1), Chip8CpuInstructions::SnkpVx(0x2))); - assert!(matches!(Chip8CpuInstructions::decode(0xf107), Chip8CpuInstructions::LdVxDt(0x1))); - assert!(matches!(Chip8CpuInstructions::decode(0xf40a), Chip8CpuInstructions::LdVxK(0x4))); - assert!(matches!(Chip8CpuInstructions::decode(0xf615), Chip8CpuInstructions::LdDtVx(0x6))); - assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LdStVx(0xb))); - assert!(matches!(Chip8CpuInstructions::decode(0xfd1e), Chip8CpuInstructions::AddIVx(0xd))); - assert!(matches!(Chip8CpuInstructions::decode(0xfc29), Chip8CpuInstructions::LdFVx(0xc))); - assert!(matches!(Chip8CpuInstructions::decode(0xfd33), Chip8CpuInstructions::LdBVx(0xd))); - assert!(matches!(Chip8CpuInstructions::decode(0xfe55), Chip8CpuInstructions::LdIVx(0xe))); - assert!(matches!(Chip8CpuInstructions::decode(0xf365), Chip8CpuInstructions::LdVxI(0x3))); + assert!(matches!(Chip8CpuInstructions::decode(0x0123), Chip8CpuInstructions::SYS(0x123))); + assert!(matches!(Chip8CpuInstructions::decode(0x0FFF), Chip8CpuInstructions::SYS(0xfff))); + assert!(matches!(Chip8CpuInstructions::decode(0x1002), Chip8CpuInstructions::JPA(0x2))); + assert!(matches!(Chip8CpuInstructions::decode(0x1FF0), Chip8CpuInstructions::JPA(0xFF0))); + assert!(matches!(Chip8CpuInstructions::decode(0x2002), Chip8CpuInstructions::CALL(0x2))); + assert!(matches!(Chip8CpuInstructions::decode(0x3123), Chip8CpuInstructions::SEX(0x1, 0x23))); + assert!(matches!(Chip8CpuInstructions::decode(0x4abc), Chip8CpuInstructions::SNEB(0xa, 0xbc))); + assert!(matches!(Chip8CpuInstructions::decode(0x5ab0), Chip8CpuInstructions::SEY(0xa, 0xb))); + assert!(matches!(Chip8CpuInstructions::decode(0x6aff), Chip8CpuInstructions::LDR(0xa, 0xff))); + assert!(matches!(Chip8CpuInstructions::decode(0x7abc), Chip8CpuInstructions::ADD(0xa, 0xbc))); + assert!(matches!(Chip8CpuInstructions::decode(0x8ab0), Chip8CpuInstructions::LDR_Y(0xa, 0xb))); + assert!(matches!(Chip8CpuInstructions::decode(0x8ba1), Chip8CpuInstructions::OR(0xb, 0xa))); + assert!(matches!(Chip8CpuInstructions::decode(0x8cd2), Chip8CpuInstructions::AND(0xc, 0xd))); + assert!(matches!(Chip8CpuInstructions::decode(0x8de3), Chip8CpuInstructions::ORY(0xd, 0xe))); + assert!(matches!(Chip8CpuInstructions::decode(0x8ef4), Chip8CpuInstructions::ADDR(0xe, 0xf))); + assert!(matches!(Chip8CpuInstructions::decode(0x8f05), Chip8CpuInstructions::SUB(0xf, 0x0))); + assert!(matches!(Chip8CpuInstructions::decode(0x8016), Chip8CpuInstructions::SHR(0x0, 0x1))); + assert!(matches!(Chip8CpuInstructions::decode(0x8127), Chip8CpuInstructions::SUBC(0x1, 0x2))); + assert!(matches!(Chip8CpuInstructions::decode(0x834e), Chip8CpuInstructions::SHL(0x3, 0x4))); + assert!(matches!(Chip8CpuInstructions::decode(0x9ab0), Chip8CpuInstructions::SNEY(0xa, 0xb))); + assert!(matches!(Chip8CpuInstructions::decode(0xa123), Chip8CpuInstructions::LDIA(0x123))); + assert!(matches!(Chip8CpuInstructions::decode(0xb234), Chip8CpuInstructions::JPI(0x234))); + assert!(matches!(Chip8CpuInstructions::decode(0xcaca), Chip8CpuInstructions::RND(0xa, 0xca))); + assert!(matches!(Chip8CpuInstructions::decode(0xdab4), Chip8CpuInstructions::DRW(0xa, 0xb, 0x4))); + assert!(matches!(Chip8CpuInstructions::decode(0xe19e), Chip8CpuInstructions::SKP(0x1))); + assert!(matches!(Chip8CpuInstructions::decode(0xe2a1), Chip8CpuInstructions::SKNP(0x2))); + assert!(matches!(Chip8CpuInstructions::decode(0xf107), Chip8CpuInstructions::LDRD(0x1))); + assert!(matches!(Chip8CpuInstructions::decode(0xf40a), Chip8CpuInstructions::LDRK(0x4))); + assert!(matches!(Chip8CpuInstructions::decode(0xf615), Chip8CpuInstructions::LDD(0x6))); + assert!(matches!(Chip8CpuInstructions::decode(0xfb18), Chip8CpuInstructions::LDI_S(0xb))); + assert!(matches!(Chip8CpuInstructions::decode(0xfd1e), Chip8CpuInstructions::ADDI(0xd))); + assert!(matches!(Chip8CpuInstructions::decode(0xfc29), Chip8CpuInstructions::LDFX(0xc))); + assert!(matches!(Chip8CpuInstructions::decode(0xfd33), Chip8CpuInstructions::BCD(0xd))); + assert!(matches!(Chip8CpuInstructions::decode(0xfe55), Chip8CpuInstructions::LDIX(0xe))); + assert!(matches!(Chip8CpuInstructions::decode(0xf365), Chip8CpuInstructions::LDRI(0x3))); } #[test] @@ -1025,15 +1046,15 @@ mod test { fn sys_test() { // 0x0nnn Exit to System Call let mut x = Chip8Computer::new(); - Chip8CpuInstructions::SysAddr(0).execute(&mut x); + Chip8CpuInstructions::SYS(0).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0); let mut x = Chip8Computer::new(); - Chip8CpuInstructions::SysAddr(0xFA0).execute(&mut x); + Chip8CpuInstructions::SYS(0xFA0).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0xFA0); let mut x = Chip8Computer::new(); - Chip8CpuInstructions::SysAddr(0x0AF).execute(&mut x); + Chip8CpuInstructions::SYS(0x0AF).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x0AF); } @@ -1041,11 +1062,11 @@ mod test { fn jpaddr_test() { // 0x1nnn Jump to Address let mut x = Chip8Computer::new(); - Chip8CpuInstructions::JpAddr(0).execute(&mut x); + Chip8CpuInstructions::JPA(0).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0); let mut x = Chip8Computer::new(); - Chip8CpuInstructions::JpAddr(0xABC).execute(&mut x); + Chip8CpuInstructions::JPA(0xABC).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0xABC); } @@ -1054,11 +1075,11 @@ mod test { fn ld_vx_byte_test() { // 0x6xkk Set Vx = kk let mut x = Chip8Computer::new(); - Chip8CpuInstructions::LdVxByte(1, 0x12).execute(&mut x); + Chip8CpuInstructions::LDR(1, 0x12).execute(&mut x); assert_eq!(x.registers.peek(1), 0x12); let mut x = Chip8Computer::new(); - Chip8CpuInstructions::LdVxByte(2, 0x21).execute(&mut x); + Chip8CpuInstructions::LDR(2, 0x21).execute(&mut x); assert_eq!(x.registers.peek(2), 0x21); } @@ -1071,12 +1092,12 @@ mod test { // test setup: Load value 0x84 into V1 let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0x84); - Chip8CpuInstructions::SeVxByte(1, 0x48).execute(&mut x); + Chip8CpuInstructions::SEX(1, 0x48).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x202); let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0x84); - Chip8CpuInstructions::SeVxByte(1, 0x84).execute(&mut x); + Chip8CpuInstructions::SEX(1, 0x84).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x204); } @@ -1087,13 +1108,13 @@ mod test { x.registers.poke(0x01, 0x84); x.registers.poke(0x2, 0x84); // skip, compare 0x84 to 0x84 - Chip8CpuInstructions::SeVxVy(0x1, 0x2).execute(&mut x); + Chip8CpuInstructions::SEY(0x1, 0x2).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x204); let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x84); x.registers.poke(0x2, 0x48); - Chip8CpuInstructions::SeVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::SEY(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x202); } @@ -1103,7 +1124,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x01); x.registers.poke(0x02, 0x02); - Chip8CpuInstructions::LdVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::LDR_Y(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek(1), 0x02); } @@ -1116,7 +1137,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0b01010000); x.registers.poke(0x02, 0b00001010); - Chip8CpuInstructions::OrVxVy(1, 2).execute(&mut x); + Chip8CpuInstructions::OR(1, 2).execute(&mut x); assert_eq!(x.registers.peek(1), 0b01011010); } @@ -1129,7 +1150,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0xFC); x.registers.poke(0x02, 0xCA); - Chip8CpuInstructions::AndVxVy(1, 2).execute(&mut x); + Chip8CpuInstructions::AND(1, 2).execute(&mut x); assert_eq!(x.registers.peek(1), 0xC8); } @@ -1142,7 +1163,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0b11111100); x.registers.poke(0x02, 0b11001010); - Chip8CpuInstructions::XorVxVy(1, 2).execute(&mut x); + Chip8CpuInstructions::ORY(1, 2).execute(&mut x); assert_eq!(x.registers.peek(1), 0b00110110); } @@ -1157,7 +1178,7 @@ mod test { x.registers.poke(0x0f, 00); x.registers.poke(0x01, 0x01); x.registers.poke(0x02, 0x01); - Chip8CpuInstructions::AddVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::ADDR(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek(0xf), 0x00); assert_eq!(x.registers.peek(0x01), 0x02); @@ -1165,7 +1186,7 @@ mod test { x.registers.poke(0x0f, 0x00); x.registers.poke(0x01, 0xff); x.registers.poke(0x02, 0x01); - Chip8CpuInstructions::AddVxVy(1, 2).execute(&mut x); + Chip8CpuInstructions::ADDR(1, 2).execute(&mut x); assert_eq!(x.registers.peek(0xf), 1); assert_eq!(x.registers.peek(1), 0); } @@ -1181,14 +1202,14 @@ mod test { x.registers.poke(0x0f, 0x00); x.registers.poke(0x01, 0b00001000); x.registers.poke(0x02, 0b00000000); - Chip8CpuInstructions::ShrVxVy(0x1, 0x2).execute(&mut x); // 0b0000 0010 (0x02) (Not Set) + Chip8CpuInstructions::SHR(0x1, 0x2).execute(&mut x); // 0b0000 0010 (0x02) (Not Set) assert_eq!(x.registers.peek(1), 0b00000100); assert_eq!(x.registers.peek(0xf), 0); x = Chip8Computer::new(); x.registers.poke(0x0f, 0x00); x.registers.poke(0x01, 0b00001001); - Chip8CpuInstructions::ShrVxVy(0x1, 0x2).execute(&mut x); + Chip8CpuInstructions::SHR(0x1, 0x2).execute(&mut x); assert_eq!(x.registers.peek(1), 0b00000100); assert_eq!(x.registers.peek(0xf), 1); } @@ -1196,7 +1217,7 @@ mod test { #[test] fn ldi_addr_test() { let mut x = Chip8Computer::new(); - Chip8CpuInstructions::LdIAddr(0x123).execute(&mut x); + Chip8CpuInstructions::LDIA(0x123).execute(&mut x); assert_eq!(x.registers.peek_i(), 0x123); assert_eq!(x.registers.peek_pc(), 0x202); } @@ -1206,7 +1227,7 @@ mod test { let mut x = Chip8Computer::new(); /// jump to I + nnn x.registers.poke(0x0, 0xff); - Chip8CpuInstructions::JpV0Addr(0x100).execute(&mut x); + Chip8CpuInstructions::JPI(0x100).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x1FF); } @@ -1234,12 +1255,12 @@ mod test { fn skip_next_instruction_ne_text() { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0xf0); - Chip8CpuInstructions::SneVxByte(0x1, 0x0f).execute(&mut x); + Chip8CpuInstructions::SNEB(0x1, 0x0f).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x204); let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0xf0); - Chip8CpuInstructions::SneVxByte(0x1, 0xf0).execute(&mut x); + Chip8CpuInstructions::SNEB(0x1, 0xf0).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x202); } @@ -1248,7 +1269,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke_i(0xabc); x.registers.poke(0x0, 0x10); - Chip8CpuInstructions::AddIVx(0x0).execute(&mut x); + Chip8CpuInstructions::ADDI(0x0).execute(&mut x); assert_eq!(x.registers.peek_i(), 0xacc); } @@ -1256,7 +1277,7 @@ mod test { fn ldstvt_test() { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0xf0); - Chip8CpuInstructions::LdStVx(0x01).execute(&mut x); + Chip8CpuInstructions::LDI_S(0x01).execute(&mut x); assert_eq!(x.sound_timer.current(), 0xf0); x.sound_timer.tick(); x.sound_timer.tick(); @@ -1267,7 +1288,7 @@ mod test { #[test] fn rnd_vx_byte_text() { let mut x = Chip8Computer::new(); - Chip8CpuInstructions::RndVxByte(0x1, 0x0f).execute(&mut x); + Chip8CpuInstructions::RND(0x1, 0x0f).execute(&mut x); let new_value = x.registers.peek(0x1); assert!(new_value < 0x10); } @@ -1278,7 +1299,7 @@ mod test { // set a value in the register x.registers.poke(0x01, 0xab); // add 0x10 to register - Chip8CpuInstructions::AddVxByte(0x1, 0x10).execute(&mut x); + Chip8CpuInstructions::ADD(0x1, 0x10).execute(&mut x); assert_eq!(x.registers.peek(1), 0xbb); } @@ -1288,7 +1309,7 @@ mod test { // load values in 2 registers x.registers.poke(0x1, 0x10); x.registers.poke(0x2, 0x08); - Chip8CpuInstructions::SubVxVy(0x1, 0x02).execute(&mut x); + Chip8CpuInstructions::SUB(0x1, 0x02).execute(&mut x); assert_eq!(x.registers.peek(0xf), 1); assert_eq!(x.registers.peek(0x1), 0x8); assert_eq!(x.registers.peek_pc(), 0x202); @@ -1299,13 +1320,13 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0x10); x.registers.poke(0x2, 0x10); - Chip8CpuInstructions::SneVxVy(0x1, 0x2).execute(&mut x); + Chip8CpuInstructions::SNEY(0x1, 0x2).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x202); let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0x10); x.registers.poke(0x2, 0x00); - Chip8CpuInstructions::SneVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::SNEY(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x204) } @@ -1313,7 +1334,7 @@ mod test { fn ld_dt_vx_test() { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0x10); - Chip8CpuInstructions::LdDtVx(0x1).execute(&mut x); + Chip8CpuInstructions::LDD(0x1).execute(&mut x); assert_eq!(x.delay_timer.current(), 0x10); for i in 0..0x20 { x.delay_timer.tick(); @@ -1325,7 +1346,7 @@ mod test { fn ld_vx_dt_test() { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0xf0); - Chip8CpuInstructions::LdDtVx(0x1).execute(&mut x); + Chip8CpuInstructions::LDD(0x1).execute(&mut x); x.delay_timer.tick(); x.delay_timer.tick(); x.delay_timer.tick(); @@ -1344,7 +1365,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0xa0); x.registers.poke(0x2, 0xab); - Chip8CpuInstructions::SubnVxVy(0x1, 0x2).execute(&mut x); + Chip8CpuInstructions::SUBC(0x1, 0x2).execute(&mut x); // expect the result to be 0x0b assert_eq!(x.registers.peek(0x1), 0x0b); // expect the vf register to be set to 1 as there was overflow @@ -1353,7 +1374,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0xab); x.registers.poke(0x02, 0xa0); - Chip8CpuInstructions::SubnVxVy(0x1, 0x2).execute(&mut x); + Chip8CpuInstructions::SUBC(0x1, 0x2).execute(&mut x); // expect the result to be 11110101, -0xB, -11, 245, 0xF5 assert_eq!(x.registers.peek(0x1), 0xf5); @@ -1369,13 +1390,13 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0b00100000); - Chip8CpuInstructions::ShlVxVy(0x1, 0x1).execute(&mut x); + Chip8CpuInstructions::SHL(0x1, 0x1).execute(&mut x); assert_eq!(x.registers.peek(0x1), 0b01000000); assert_eq!(x.registers.peek(0xf), 0x0); let mut x = Chip8Computer::new(); x.registers.poke(0x1, 0b10101010); - Chip8CpuInstructions::ShlVxVy(0x1, 0x1).execute(&mut x); + Chip8CpuInstructions::SHL(0x1, 0x1).execute(&mut x); assert_eq!(x.registers.peek(0x1), 0b01010100); assert_eq!(x.registers.peek(0xf), 0x1); } @@ -1390,13 +1411,13 @@ mod test { // target_sprite = 2 // target_offset = 0x5 x.registers.poke(0x1, 0x2); - Chip8CpuInstructions::LdFVx(0x1).execute(&mut x); + Chip8CpuInstructions::LDFX(0x1).execute(&mut x); assert_eq!(x.registers.peek_i(), 10); let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x06); - Chip8CpuInstructions::LdFVx(0x1).execute(&mut x); + Chip8CpuInstructions::LDFX(0x1).execute(&mut x); assert_eq!(x.registers.peek_i(), 30); } @@ -1413,7 +1434,7 @@ mod test { // load the value 123 (0x7b) x.registers.poke(0x1, 0x7b); x.registers.poke_i(0x500); - Chip8CpuInstructions::LdBVx(0x1).execute(&mut x); + Chip8CpuInstructions::BCD(0x1).execute(&mut x); assert_eq!(x.memory.peek(0x500), 0x1); assert_eq!(x.memory.peek(0x501), 0x2); assert_eq!(x.memory.peek(0x502), 0x3); @@ -1434,7 +1455,7 @@ mod test { } x.registers.poke_i(0x500); - Chip8CpuInstructions::LdIVx(to_load.len() as u8).execute(&mut x); + Chip8CpuInstructions::LDIX(to_load.len() as u8).execute(&mut x); // Verify the values are in memory from 0x500 to 0x507 for (idx, value) in to_load.iter().enumerate() { @@ -1465,7 +1486,7 @@ mod test { x.registers.poke(0x6, to_load.len() as u8); // then copying them values memory to registers - Chip8CpuInstructions::LdVxI(0x6).execute(&mut x); + Chip8CpuInstructions::LDRI(0x6).execute(&mut x); // now check that we have the right values in our registers for (idx, value) in to_load.iter().enumerate() { @@ -1484,10 +1505,10 @@ mod test { let mut x = Chip8Computer::new(); x.keypad.push_key(0x5); x.registers.poke(0x1, 0x5); - Chip8CpuInstructions::SnkpVx(0x1).execute(&mut x); + Chip8CpuInstructions::SKNP(0x1).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x202); x.keypad.release_key(0x5); - Chip8CpuInstructions::SnkpVx(0x1).execute(&mut x); + Chip8CpuInstructions::SKNP(0x1).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x206); } @@ -1500,11 +1521,11 @@ mod test { let mut x = Chip8Computer::new(); x.keypad.push_key(0x5); x.registers.poke(0x1, 0x5); - Chip8CpuInstructions::SkpVx(0x1).execute(&mut x); + Chip8CpuInstructions::SKP(0x1).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x204); x.keypad.release_key(0x5); - Chip8CpuInstructions::SkpVx(0x1).execute(&mut x); + Chip8CpuInstructions::SKP(0x1).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x206); } @@ -1522,7 +1543,7 @@ mod test { x.registers.poke(y_register, y_offset); x.registers.poke_i(char_offset); // we are using 5 rows. - Chip8CpuInstructions::DrawVxVyNibble(x_register, y_register, 5).execute(&mut x); + Chip8CpuInstructions::DRW(x_register, y_register, 5).execute(&mut x); // now check that video memory has the values at // 1,2->1,9 @@ -1551,10 +1572,10 @@ mod test { // 2nnn // Call a subroutine at 2nnn let mut x = Chip8Computer::new(); - Chip8CpuInstructions::CallAddr(0x124).execute(&mut x); + Chip8CpuInstructions::CALL(0x124).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x124); assert_eq!(x.stack.depth(), 1); - Chip8CpuInstructions::CallAddr(0x564).execute(&mut x); + Chip8CpuInstructions::CALL(0x564).execute(&mut x); assert_eq!(x.registers.peek_pc(), 0x564); assert_eq!(x.stack.depth(), 2); } @@ -1584,7 +1605,7 @@ mod test { // SETUP let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x01); - Chip8CpuInstructions::LdVxK(0x1).execute(&mut x); + Chip8CpuInstructions::LDRK(0x1).execute(&mut x); assert!(matches!(x.state, WaitingForKey)); } @@ -1599,7 +1620,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x01); x.registers.poke(0x02, 0x01); - Chip8CpuInstructions::AddVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::ADDR(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0x02); assert_eq!(x.registers.peek(0x0f), 0x00); @@ -1607,7 +1628,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0xff); x.registers.poke(0x02, 0x01); - Chip8CpuInstructions::AddVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::ADDR(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0x00); assert_eq!(x.registers.peek(0x0f), 0x01); @@ -1615,7 +1636,7 @@ mod test { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 128); x.registers.poke(0x02, 192); - Chip8CpuInstructions::AddVxVy(0x01, 0x02).execute(&mut x); + Chip8CpuInstructions::ADDR(0x01, 0x02).execute(&mut x); assert_eq!(x.registers.peek(0x01), 64); assert_eq!(x.registers.peek(0x0f), 1); } @@ -1632,23 +1653,23 @@ mod test { x.registers.poke(0x01, 0b10101010); x.registers.poke(0x0f, 0x0); - Chip8CpuInstructions::ShlVxVy(0x01, 0x00).execute(&mut x); + Chip8CpuInstructions::SHL(0x01, 0x00).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0b01010100); assert_eq!(x.registers.peek(0x0f), 1); - Chip8CpuInstructions::ShlVxVy(0x01, 0x00).execute(&mut x); + Chip8CpuInstructions::SHL(0x01, 0x00).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0b10101000); assert_eq!(x.registers.peek(0x0f), 0x00); - Chip8CpuInstructions::ShlVxVy(0x01, 0x00).execute(&mut x); + Chip8CpuInstructions::SHL(0x01, 0x00).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0b01010000); assert_eq!(x.registers.peek(0x0f), 0x01); - Chip8CpuInstructions::ShlVxVy(0x01, 0x00).execute(&mut x); + Chip8CpuInstructions::SHL(0x01, 0x00).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0b10100000); assert_eq!(x.registers.peek(0x0f), 0x00); - Chip8CpuInstructions::ShlVxVy(0x01, 0x00).execute(&mut x); + Chip8CpuInstructions::SHL(0x01, 0x00).execute(&mut x); assert_eq!(x.registers.peek(0x01), 0b01000000); assert_eq!(x.registers.peek(0x0f), 0x01); } @@ -1657,8 +1678,8 @@ mod test { fn random_produces_different_numbers() { let mut x = Chip8Computer::new(); x.registers.poke(0x01, 0x00); - let first_number = Chip8CpuInstructions::RndVxByte(0x01, 0xff).execute(&mut x).registers.peek(0x01); - let second_number = Chip8CpuInstructions::RndVxByte(0x01, 0xff).execute(&mut x).registers.peek(0x01); + let first_number = Chip8CpuInstructions::RND(0x01, 0xff).execute(&mut x).registers.peek(0x01); + let second_number = Chip8CpuInstructions::RND(0x01, 0xff).execute(&mut x).registers.peek(0x01); assert_ne!(first_number, second_number); } } diff --git a/gemma/src/constants.rs b/gemma/src/constants.rs index 2af31d2..6acd9b3 100644 --- a/gemma/src/constants.rs +++ b/gemma/src/constants.rs @@ -15,3 +15,27 @@ pub const CHIP8_KEYBOARD: [[u8; 4]; 4] = [ pub const SCHIP_VIDEO_HEIGHT: i32 = 64; pub const SCHIP_VIDEO_WIDTH: i32 = 128; pub const SCHIP_VIDE_MEMORY: usize = (SCHIP_VIDEO_HEIGHT * SCHIP_VIDEO_WIDTH) as usize; + +pub const INST_ADDI: &str = "ADDI"; +pub const INST_ADD: &str = "ADD"; +pub const INST_ADDR: &str = "ADDR"; +pub const INST_AND: &str = "AND"; +pub const INST_CLS: &str = "CLS"; +pub const INST_CALL: &str = "CALL"; +pub const INST_DRW: &str = "DRW"; +pub const INST_EXIT: &str = "EXIT"; +pub const INST_JPA: &str = "JPA"; +pub const INST_JPI: &str = "JPI"; +pub const INST_BCD: &str = "BCD"; +pub const INST_LDD: &str = "LDD"; +pub const INST_LDF: &str = "LDF"; +pub const INST_LDF2: &str = "LDF2"; +pub const INST_LDIA: &str = "LDIA"; +pub const INST_LDIX: &str = "LDIX"; +pub const INST_LIDR: &str = "LIDR"; +pub const INST_LIDS: &str = "LIDS"; +pub const INST_LDR: &str = "LDR"; +pub const INST_LDRD: &str = "LDRD"; +pub const INST_LDRI: &str = "LDRI"; +pub const INST_LDRK: &str = "LDRK"; +pub const INST_LDRY: &str = "LDRY"; diff --git a/gemmaegui/src/bin/gemmaegui_viewer.rs b/gemmaegui/src/bin/gemmaegui_viewer.rs index 981c15c..587cf17 100644 --- a/gemmaegui/src/bin/gemmaegui_viewer.rs +++ b/gemmaegui/src/bin/gemmaegui_viewer.rs @@ -52,8 +52,8 @@ fn main() -> eframe::Result { ui.label("display of file here"); ui.vertical(|ui| { - display_instruction(0x010, &Chip8CpuInstructions::AddIVx(0x01), ui); - display_instruction(0x012, &Chip8CpuInstructions::RndVxByte(0x01, 0x02), ui); + display_instruction(0x010, &Chip8CpuInstructions::ADDI(0x01), ui); + display_instruction(0x012, &Chip8CpuInstructions::RND(0x01, 0x02), ui); }); ui.text_edit_multiline(&mut edit_space); }); diff --git a/gemmautil/src/bin/ch8asm.rs b/gemmautil/src/bin/ch8asm.rs index 2426115..709c232 100644 --- a/gemmautil/src/bin/ch8asm.rs +++ b/gemmautil/src/bin/ch8asm.rs @@ -1,5 +1,9 @@ +use std::fs::File; +use std::io; +use std::io::BufRead; use std::path::Path; use clap::Parser; +use gemma::chip8::instructions::Chip8CpuInstructions; /// Ch8Asm /// Converts well formed CH8ASM. @@ -10,19 +14,7 @@ use clap::Parser; pub struct Assembler {} impl Assembler { - pub fn instruction_to_string() -> String { - // Format the output as - // IST [P0] [P1] [P2] ; XXXX - // IST = 3 letter instruction code - // P0-2 = Parameters to Instruction - // XXXX = Hex representation of data - // ** OR ** - // DW XXXX ; - // DW = DATAWORD - // XXXX = HEX OF DATA - String::new() - } } #[derive(Parser)] @@ -30,8 +22,6 @@ impl Assembler { struct AssemblerApp { #[arg(short)] input_file: Box, - #[arg(short)] - output_file: Option } fn main() { @@ -39,6 +29,31 @@ fn main() { let result = AssemblerApp::parse(); - println!("Preparing to assemble {}", result.input_file.file_name()); + let mut assembled_code: Vec = vec![]; + + // println!("Preparing to assemble {}", result.input_file.file_name()); + + let path = Path::new(result.input_file); + + // Open the file in read-only mode + let file = File::open(&path)?; + + // Use a buffered reader for efficient reading + let reader = io::BufReader::new(file); + + // Read the file line by line + for line in reader.lines() { + // Get the line, handling possible errors + let line = line?; + + // Split the line by ';' and collect parts into a vector + let parts: Vec<&str> = line.split(';').collect(); + + // Print each part or process it as needed + for part in &parts { + println!("{}", part); + } + } + // read the line split by a semicolon } \ No newline at end of file diff --git a/gemmautil/src/bin/ch8disasm.rs b/gemmautil/src/bin/ch8disasm.rs index 2b9e76c..b3a929e 100644 --- a/gemmautil/src/bin/ch8disasm.rs +++ b/gemmautil/src/bin/ch8disasm.rs @@ -6,14 +6,13 @@ use gemma::chip8::instructions::Chip8CpuInstructions::XXXXERRORINSTRUCTION; /// ch8disasm /// /// Provide disassembled version of the CH8 file provided. - #[derive(Parser)] #[command(version, about, long_about = None)] struct DisassemblerApp { #[arg(short)] input_file: Box, #[arg(short)] - output_file: Option> + output_file: Option>, } fn main() { @@ -27,26 +26,25 @@ fn main() { // read the input file and loop through it byte by byte. for (offset, byte) in std::fs::read(result.input_file).unwrap().iter().enumerate() { - working_instruction = (working_instruction << 8) | (*byte as u16); - if offset % 2 != 0 { - // println!("ODD BYTE -> {:02x} / WORKING: {working_instruction:04x}", *byte as u16); - let decoded = Chip8CpuInstructions::decode(working_instruction); - match decoded { - XXXXERRORINSTRUCTION => { - println!("\t\t; ERROR: BYTES: {} OFFSET: {}", working_instruction, offset); - println!("FOUND ERROR INSTRUCTION. LIKELY DATA."); - } - Chip8CpuInstructions::JpAddr(x) => { - if (offset + 0x200) == x as usize { - println!("INFINITE LOOP") - } - } - _ => { - println!("{}\t\t; Bytes [{:04x}] ending offset [{:04x}]", decoded, working_instruction, offset); + working_instruction = (working_instruction << 8) | (*byte as u16); + if offset % 2 != 0 { + let decoded = Chip8CpuInstructions::decode(working_instruction); + match decoded { + XXXXERRORINSTRUCTION => { + println!("DW 0x{working_instruction:04x}{:>16}; {working_instruction:04x}", " "); + } + Chip8CpuInstructions::JPA(x) => { + if (offset + 0x200) == x as usize { + println!("INFINITE LOOP") } } - working_instruction = 0x0000; + _ => { + let fill_len = 25 - decoded.to_string().len(); + println!("{}{: