use gemma::chip8::instructions::Chip8CpuInstructions; use gemma::chip8::instructions::Chip8CpuInstructions::*; use gemma::chip8::quirk_modes::QuirkMode::{Chip8, SChipModern, XOChip}; use gemma::constants::*; #[derive(Clone)] struct InstructionTestQuirks { chip8: Chip8CpuInstructions, schip: Chip8CpuInstructions, xochip: Chip8CpuInstructions } #[derive(Clone)] struct InstructionTest { name: String, instruction: Chip8CpuInstructions, operands: String, asm: String, encoded: u16, quirks: InstructionTestQuirks } #[test] fn instructions_encode_decode_tests_with_quirks() { let it = vec![ InstructionTest { name: INST_SYS.to_string(), instruction: SYS(0x123), operands: "0x0123".to_string(), asm: "SYS 0x0123".to_string(), encoded: 0x0123, quirks: InstructionTestQuirks { chip8: SYS(0x123), schip: XXXXERRORINSTRUCTION, xochip: XXXXERRORINSTRUCTION, } }, InstructionTest { name: INST_CLS.to_string(), instruction: CLS, asm: "CLS".to_string(), operands: "".to_string(), encoded: 0x00E0, quirks: InstructionTestQuirks { chip8: CLS, schip: CLS, xochip: CLS } }, InstructionTest { name: INST_RET.to_string(), instruction: RET, asm: "RET".to_string(), operands: "".to_string(), encoded: 0x00ee, quirks: InstructionTestQuirks { chip8: RET, schip: RET, xochip: RET } }, InstructionTest { name: INST_JPX.to_string(), instruction: JPX(0x1, 0xab), operands: "0x01, 0x01ab".to_string(), asm: "JPX 0x01, 0x01ab".to_string(), encoded: 0xb1ab, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: JPX(0x1, 0xab), xochip: XXXXERRORINSTRUCTION, }, }, InstructionTest { name: INST_CALL.to_string(), instruction: CALL(0x123), asm: "CALL 0x0123".to_string(), encoded: 0x2123, operands: "0x0123".to_string(), quirks: InstructionTestQuirks { chip8: CALL(0x123), schip: CALL(0x123), xochip: CALL(0x123), } }, InstructionTest { name: INST_DRW.to_string(), instruction: DRW(0x01, 0x02, 0x03), operands: "0x01, 0x02, 0x03".to_string(), asm: "DRW 0x01, 0x02, 0x03".to_string(), encoded: 0xd123, quirks: InstructionTestQuirks { chip8: DRW(0x1, 0x2, 0x3), schip: DRW(0x1, 0x2, 0x3), xochip: DRW(0x1, 0x2, 0x3) } }, InstructionTest { name: INST_JPI.to_string(), instruction: JPI(0x321), operands: "0x0321".to_string(), asm: "JPI 0x0321".to_string(), encoded: 0xb321, quirks: InstructionTestQuirks { chip8: JPI(0x321), schip: XXXXERRORINSTRUCTION, xochip: JPI(0x321) } }, InstructionTest { name: INST_SCD.to_string(), instruction: SCD(0x01), operands: "0x01".to_string(), asm: "SCD 0x01".to_string(), encoded: 0x00c1, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: SCD(0x1), xochip: SCD(0x1) } }, InstructionTest { name: INST_SCR.to_string(), instruction: Chip8CpuInstructions::SCR, operands: "".to_string(), asm: "SCR".to_string(), encoded: 0x00FB, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: SCR, xochip: SCR } }, InstructionTest { name: INST_SCL.to_string(), instruction: SCL, operands: "".to_string(), asm: "SCL".to_string(), encoded: 0x00FC, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: SCL, xochip: SCL } }, InstructionTest { name: INST_EXIT.to_string(), instruction: EXIT, operands: "".to_string(), asm: "EXIT".to_string(), encoded: 0x00FD, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: EXIT, xochip: EXIT } }, InstructionTest { name: INST_LOW.to_string(), instruction: LOW, operands: "".to_string(), asm: "LOW".to_string(), encoded: 0x00FE, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: LOW, xochip: LOW, } }, InstructionTest { name: INST_HIGH.to_string(), instruction: HIGH, operands: "".to_string(), asm: "HIGH".to_string(), encoded: 0x00FF, quirks: InstructionTestQuirks { chip8: XXXXERRORINSTRUCTION, schip: HIGH, xochip: HIGH } }, InstructionTest { name: INST_SEX.to_string(), instruction: Chip8CpuInstructions::SEX(0x01, 0xfa), operands: "0x01, 0xfa".to_string(), asm: "SEX 0x01, 0xfa".to_string(), encoded: 0x31fa, quirks: InstructionTestQuirks { chip8: Chip8CpuInstructions::SEX(0x1, 0xfa), schip: Chip8CpuInstructions::SEX(0x1, 0xfa), xochip: Chip8CpuInstructions::SEX(0x1, 0xfa) }, }, InstructionTest { name: INST_SNEB.to_string(), instruction: Chip8CpuInstructions::SNEB(0x01, 0xab), operands: "0x01, 0xab".to_string(), asm: "SNEB 0x01, 0xab".to_string(), encoded: 0x41ab, quirks: InstructionTestQuirks { chip8: SNEB(0x01, 0xab), schip: SNEB(0x01, 0xab), xochip: SNEB(0x01, 0xab), }, }, InstructionTest { name: INST_SEY.to_string(), instruction: Chip8CpuInstructions::SEY(0x1, 0x2), operands: "0x1, 0x2".to_string(), asm: "SEY 0x1, 0x2".to_string(), encoded: 0x5120, quirks: InstructionTestQuirks { chip8: SEY(0x1, 0x2), schip: SEY(0x1, 0x2), xochip: SEY(0x1, 0x2) } }, InstructionTest { name: INST_LDR.to_string(), instruction: LDR(0xa, 0xbe), operands: "0x0a, 0xbe".to_string(), asm: "LDR 0x0a, 0xbe".to_string(), encoded: 0x6abe, quirks: InstructionTestQuirks { chip8: LDR(0xa, 0xbe), schip: LDR(0xa, 0xbe), xochip: LDR(0xa, 0xbe) }, }, InstructionTest { name: INST_ADD.to_string(), instruction: Chip8CpuInstructions::ADD(0x01, 0xab), operands: "0x01, 0xab".to_string(), asm: "ADD 0x01, 0xab".to_string(), encoded: 0x71ab, quirks: InstructionTestQuirks { chip8: ADD(0x01, 0xab), schip: ADD(0x01, 0xab), xochip: ADD(0x01, 0xab), }, }, InstructionTest { name: INST_LDRK.to_string(), instruction: Chip8CpuInstructions::LDRK(0x6), operands: "0x06".to_string(), asm: "LDRK 0x06".to_string(), encoded: 0xF60A, quirks: InstructionTestQuirks { chip8: Chip8CpuInstructions::LDRK(0x6), schip: Chip8CpuInstructions::LDRK(0x6), xochip: Chip8CpuInstructions::LDRK(0x6), }, }, ]; for current in it { let instruction = current.clone().instruction; let asm = Chip8CpuInstructions::from_str(¤t.asm); let as_chip8 = Chip8CpuInstructions::decode(current.encoded, &Chip8); let quirks_chip8 = current.quirks.chip8; let as_schip = Chip8CpuInstructions::decode(current.encoded, &SChipModern); let quirks_schip = current.quirks.schip; let as_xochip = Chip8CpuInstructions::decode(current.encoded, &XOChip); let quirks_xochip = current.quirks.xochip; // ** CONVERSION ** // -> Integer to Instruction assert!(matches!(Chip8CpuInstructions::decode(current.encoded, &Chip8), i)); // -> Instruction to Integer println!("TESTING INSTRUCTION TO INTEGER FOR {:?} / {:04x} {:04x}", current.instruction, current.encoded, instruction.encode()); assert_eq!(current.encoded, instruction.encode()); // -> Instruction to String assert_eq!(instruction.to_string(), current.asm); assert_eq!(instruction.operands(), current.operands); assert_eq!(current.instruction.name(), current.name); // -> String to Instruction assert!(matches!(Chip8CpuInstructions::from_str(¤t.name), asm)); // ** QUIRKS ** assert!(matches!(as_chip8, quirks_chip8)); assert!(matches!(as_schip, quirks_schip)); assert!(matches!(as_xochip, quirks_xochip)); } } /* InstructionTest { name: INST_LDRY.to_string(), instruction: Chip8CpuInstructions::LDR_Y(0x1, 0x2), operands: "0x1, 0x2".to_string(), asm: "LDRY 0x1, 0x2".to_string(), encoded: 0x8120, }, InstructionTest { name: INST_OR.to_string(), instruction: Chip8CpuInstructions::OR(0x1, 0x2), operands: "0x1, 0x2".to_string(), asm: "OR 0x1, 0x2".to_string(), encoded: 0x8121 }, InstructionTest { name: INST_AND.to_string(), instruction: Chip8CpuInstructions::AND(0xb, 0xc), operands: "0xb, 0xc".to_string(), asm: "AND 0xb, 0xc".to_string(), encoded: 0x8bc2, }, InstructionTest { name: INST_ORY.to_string(), instruction: Chip8CpuInstructions::ORY(0xa, 0x3), operands: "0xa, 0x3".to_string(), asm: "ORY 0xa, 0x3".to_string(), encoded: 0x8a33 }, InstructionTest { name: INST_ADDR.to_string(), instruction: Chip8CpuInstructions::ADDR(0x1, 0x2), operands: "0x1, 0x2".to_string(), asm: "ADDR 0x1, 0x2".to_string(), encoded: 0x8124 }, InstructionTest { name: INST_SUB.to_string(), instruction: Chip8CpuInstructions::SUB(0x4, 0x5), operands: "0x4, 0x5".to_string(), asm: "SUB 0x4, 0x5".to_string(), encoded: 0x8455 }, InstructionTest { name: INST_SHR.to_string(), instruction: Chip8CpuInstructions::SHR(0x01, 0x1), operands: "0x1, 0x1".to_string(), asm: "SHR 0x1, 0x1".to_string(), encoded: 0x8116, }, InstructionTest { name: INST_SUBC.to_string(), instruction: Chip8CpuInstructions::SUBC(0xf, 0xa), operands: "0xf, 0xa".to_string(), asm: "SUBC 0xf, 0xa".to_string(), encoded: 0x8fa7, }, InstructionTest { name: INST_SHL.to_string(), instruction: Chip8CpuInstructions::SHL(0x1, 0x4), operands: "0x1, 0x4".to_string(), asm: "SHL 0x1, 0x4".to_string(), encoded: 0x814e, }, InstructionTest { name: INST_SNEY.to_string(), instruction: Chip8CpuInstructions::SNEY(0x4, 0x5), operands: "0x4, 0x5".to_string(), asm: "SNEY 0x4, 0x5".to_string(), encoded: 0x9450, }, InstructionTest { name: INST_LDIA.to_string(), instruction: Chip8CpuInstructions::LDIA(0xbee), operands: "0x0bee".to_string(), asm: "LDIA 0x0bee".to_string(), encoded: 0x9bee }, InstructionTest { name: INST_JPI.to_string(), instruction: Chip8CpuInstructions::JPI(0xfee), operands: "0x0fee".to_string(), asm: "JPI 0x0fee".to_string(), encoded: 0xbfee }, InstructionTest { name: INST_RND.to_string(), instruction: Chip8CpuInstructions::RND(0x1, 0xae), operands: "0x01, 0xae".to_string(), asm: "RND 0x01, 0xae".to_string(), encoded: 0xc1ae, }, InstructionTest { name: INST_DRW.to_string(), instruction: Chip8CpuInstructions::DRW(0x1, 0x2, 0xf), operands: "0x01, 0x02, 0x0f".to_string(), asm: "DRW 0x01, 0x02, 0x0f".to_string(), encoded: 0xd12f }, InstructionTest { name: INST_SKP.to_string(), instruction: Chip8CpuInstructions::SKP(0x4), operands: "0x04".to_string(), asm: "SKP 0x04".to_string(), encoded: 0xe49e, }, InstructionTest { name: INST_SKNP.to_string(), instruction: Chip8CpuInstructions::SKNP(0x3), operands: "0x03".to_string(), asm: "SKNP 0x03".to_string(), encoded: 0x83a1 }, InstructionTest { name: INST_LDRD.to_string(), instruction: Chip8CpuInstructions::LDRD(0x4), operands: "0x04".to_string(), asm: "LDRD 0x04".to_string(), encoded: 0xF407 } InstructionTest { name: INST_LDD.to_string(), instruction: Chip8CpuInstructions::LDD(0x02), operands: "0x02".to_string(), asm: "LDD 0x02".to_string(), encoded: 0xF215, }, InstructionTest { name: INST_LDRI.to_string(), instruction: Chip8CpuInstructions::LDRI(0x01), operands: "0x01".to_string(), asm: "LDRI 0x01".to_string(), encoded: 0xF118, }, InstructionTest { name: INST_BCD.to_string(), instruction: Chip8CpuInstructions::BCD(0x4), operands: "0x04".to_string(), asm: "BCD 0x04".to_string(), encoded: 0xF433, }, InstructionTest { name: INST_LDF.to_string(), instruction: Chip8CpuInstructions::LDFX(0x5), operands: "0x05".to_string(), asm: "LDF 0x05".to_string(), encoded: 0xF529 }, InstructionTest { name: INST_LDF2.to_string(), instruction: Chip8CpuInstructions::LDF2(0x6), operands: "0x06".to_string(), asm: "LDF2 0x06".to_string(), encoded: 0xF630 }, InstructionTest { name: INST_LDIX.to_string(), instruction: Chip8CpuInstructions::LDIX(0x5), operands: "0x05".to_string(), asm: "LDIX 0x05".to_string(), encoded: 0xF555 }, InstructionTest { name: INST_LDIS.to_string(), instruction: Chip8CpuInstructions::LDIS(0xf), operands: "0x0f".to_string(), asm: "LDIS 0x0f".to_string(), encoded: 0xFF18 }, InstructionTest { name: INST_LIDR.to_string(), instruction: Chip8CpuInstructions::LIDR(0x4), operands: "0x04".to_string(), asm: "LIDR 0x04".to_string(), encoded: 0xF485, }, InstructionTest { name: INST_STR.to_string(), instruction: Chip8CpuInstructions::STR(0xa), operands: "0x0a".to_string(), asm: "STR 0x0a".to_string(), encoded: 0xF000 } InstructionTest { name: INST_JPA.to_string(), instruction: JPA(0x234), asm: "JPA 0x0234".to_string(), encoded: 0xb234, operands: "0x0234".to_string(), quirks: InstructionTestQuirks { chip8: JPA(0x0234), schip: JPA(0x0234), xochip: JPA(0x0234) } }, */