slu4_minimal/src/memory.rs
Trevor Merritt 533b519d15 Initial commit
Start of the project
2025-06-12 14:31:53 -04:00

48 lines
1.1 KiB
Rust

use log::debug;
use crate::busses::{AddressBus, DataBus};
use crate::constants::SIZE_32KB;
use crate::control_signals::ControlSignals;
use crate::cycle_stages::CycleStages;
pub struct Memory {
data: [u8; SIZE_32KB]
}
impl Memory {
pub fn peek(&self, offset: u16) -> u8 { self.data[offset as usize] }
pub fn poke(&mut self, new_value: u8, offset: u16) { self.data[offset as usize] = new_value; }
pub fn clear(&mut self) {
for i in 0..SIZE_32KB {
self.poke(0x00, i as u16);
}
}
pub fn new() -> Self {
Memory { data: [0; SIZE_32KB] }
}
}
impl Default for Memory {
fn default() -> Self {
Memory::new()
}
}
impl CycleStages for Memory {
fn falling_edge(address_bus: AddressBus, data_bus: DataBus, state: ControlSignals) {
todo!()
}
fn low_state(address_bus: AddressBus, data_bus: DataBus, state: ControlSignals) {
todo!()
}
fn rising_edge(address_bus: AddressBus, data_bus: DataBus, state: ControlSignals) {
todo!()
}
fn high_state(address_bus: AddressBus, data_bus: DataBus, state: ControlSignals) {
todo!()
}
}